Commit Graph

65715 Commits

Author SHA1 Message Date
Martin Liska c7775327e8 Speed up use-after-scope (v2): rewrite into SSA
2017-01-23  Martin Liska  <mliska@suse.cz>

	* asan.c (create_asan_shadow_var): New function.
	(asan_expand_poison_ifn): Likewise.
	* asan.h (asan_expand_poison_ifn): New declaration.
	* internal-fn.c (expand_ASAN_POISON): Likewise.
	* internal-fn.def (ASAN_POISON): New builtin.
	* sanopt.c (pass_sanopt::execute): Expand
	asan_expand_poison_ifn.
	* tree-inline.c (copy_decl_for_dup_finish): Make function
	external.
	* tree-inline.h (copy_decl_for_dup_finish): Likewise.
	* tree-ssa.c (is_asan_mark_p): New function.
	(execute_update_addresses_taken): Rewrite local variables
	(identified just by use-after-scope as addressable) into SSA.
2017-01-23  Martin Liska  <mliska@suse.cz>

	* gcc.dg/asan/use-after-scope-3.c: Add additional flags.
	* gcc.dg/asan/use-after-scope-9.c: Likewise and grep for
	sanopt optimization for ASAN_POISON.

From-SVN: r244791
2017-01-23 12:02:13 +00:00
Maxim Ostapenko e3d53f96ed re PR lto/79061 ([LTO][ASAN] LTO plus ASAN fails with "AddressSanitizer: initialization-order-fiasco")
Revert fix for PR lto/79061 due to this regresses compile-time by 100%
on some fortran cases.

From-SVN: r244773
2017-01-23 11:12:29 +02:00
Gerald Pfeifer b99d68f5be install.texi (Specific): opensource.apple.com uses https now.
* doc/install.texi (Specific): opensource.apple.com uses https
	now. Remove trailing slash.

From-SVN: r244764
2017-01-22 20:29:34 +00:00
Gerald Pfeifer 8d86f71798 * README.Portability: Remove note on an Irix compatibility issue.
From-SVN: r244759
2017-01-22 15:52:02 +00:00
Dimitry Andric 6aed7ed0c2 gcov.c (INCLUDE_ALGORITHM): Define.
* gcov.c (INCLUDE_ALGORITHM): Define.
	(INCLUDE_VECTOR): Define.
	No longer include <vector> and <algorithm> directly.

From-SVN: r244758
2017-01-22 15:48:21 +00:00
Gerald Pfeifer e51290d7b8 extend.texi (Thread-Local): Change www.akkadia.org reference to https.
* doc/extend.texi (Thread-Local): Change www.akkadia.org reference
	to https.
	* doc/invoke.texi (Code Gen Options): Ditto.

From-SVN: r244751
2017-01-21 21:53:32 +00:00
Jan Hubicka a6a70dcad2 re PR lto/78407 (LTO breaks separate overriding of symbol aliases)
PR lto/78407
	* cfg.c (update_bb_profile_for_threading): Fix updating of probablity.

From-SVN: r244749
2017-01-21 19:36:01 +00:00
Bernd Schmidt ea9f867b7b re PR rtl-optimization/79125 (ICE in rtl_verify_bb_insns, at cfgrtl.c:2661 (error: flow control insn inside a basic block))
2017-01-21  Bernd Schmidt  <bschmidt@redhat.com>

	rtl-optimization/79125
	* cprop.c (local_cprop_pass): Handle cases where we make an
	unconditional trap.

	PR rtl-optimization/79125
	* gcc.dg/torture/pr79125.c: New test.

From-SVN: r244741
2017-01-21 00:23:47 -07:00
Segher Boessenkool 80b40b8784 rs6000: Small varargs for BE SVR4 (PR61729, PR77850)
The varargs code for SVR4 puts all (integer) arguments in 4-byte slots.
When it then reads an item from there as something not a multiple of 4
bytes, it needs to adjust the address if big endian.  We didn't yet do
that.

This fixes the g++.dg/abi/scoped1.C, gcc.dg/compat/scalar-by-value-4,
and gcc.dg/compat/scalar-return-4 testcases.


	PR target/61729
	PR target/77850
	* config/rs6000/rs6000.c (rs6000_gimplify_va_arg): Adjust address to
	read from, for big endian.

From-SVN: r244740
2017-01-21 04:11:49 +01:00
Jiong Wang a876231c40 [AArch64] Only build & test pauth code for LP64
gcc/
	* config/aarch64/aarch64-builtins.c (aarch64_init_builtins): Register
	register pauth builtins for LP64 only.

libgcc/
	* config/aarch64/aarch64-unwind.h: Empty this file on ILP32.
	* unwind-dw2.c (execute_cfa_program):  Only multiplexing
	DW_CFA_GNU_window_save for AArch64 and LP64.

gcc/testsuite/
	* testsuite/gcc.target/aarch64/return_address_sign_1.c: Enable on LP64
	only.
	* testsuite/gcc.target/aarch64/return_address_sign_2.c: Likewise.
	* testsuite/gcc.target/aarch64/return_address_sign_3.c: Likewise.

From-SVN: r244732
2017-01-20 21:03:41 +00:00
Marek Polacek d2aadab150 re PR c/79152 (-Wimplicit-fallthrough false positive triggered by goto statements)
PR c/79152
	* gimplify.c (should_warn_for_implicit_fallthrough): Handle consecutive
	non-case labels.

	* c-c++-common/Wimplicit-fallthrough-35.c: New test.

From-SVN: r244726
2017-01-20 16:28:16 +00:00
Alexander Monakov 4cea867569 omp-offload: use PROP_gimple_lomp_dev
* omp-expand.c (expand_omp_simd): Clear PROP_gimple_lomp_dev regardless
	of safelen status.
	* omp-offload.c (pass_omp_device_lower::gate): Use PROP_gimple_lomp_dev.
	* passes.c (dump_properties): Handle PROP_gimple_lomp_dev.
	* tree-inline.c (expand_call_inline): Propagate PROP_gimple_lomp_dev.

From-SVN: r244717
2017-01-20 17:38:18 +03:00
Kyrylo Tkachov 8b0fb476f2 [ARM] PR target/71270 fix neon_valid_immediate for big-endian
PR target/71270
	* config/arm/arm.c (neon_valid_immediate): Reject vector constants
	in big-endian mode when they are not a single duplicated value.

From-SVN: r244716
2017-01-20 14:36:57 +00:00
Richard Biener d40036b846 BASE-VER: Bump to 7.0.1.
2017-01-20  Richard Biener  <rguenther@suse.de>

	* BASE-VER: Bump to 7.0.1.

From-SVN: r244714
2017-01-20 14:05:48 +00:00
Alexander Monakov 6943af07e9 omp-low: introduce omplow_simd_context
* omp-low.c (omplow_simd_context): New struct.  Use it...
	(lower_rec_simd_input_clauses): ...here and...
	(lower_rec_input_clauses): ...here to hold common data.  Adjust all
	references to idx, lane, max_vf, is_simt.

From-SVN: r244713
2017-01-20 17:04:06 +03:00
Graham Markall 7b96920e20 arc/nps: Use arclinux_nps linker emulation for nps
gcc/ChangeLog:

	* config/arc/arc.h (LINK_SPEC): Use arclinux_nps emulation when
	mcpu=nps400.

From-SVN: r244712
2017-01-20 13:37:28 +00:00
Martin Jambor 13293add08 [hsa] Rename hsa.[ch] to hsa-common.[ch]
2017-01-20  Martin Jambor  <mjambor@suse.cz>
        
        * hsa.h: Renaed to hsa-common.h.  Adjusted a comment.
        * hsa.c: Renaed to hsa-common.c.  Change include of gt-hsa.h to
        gt-hsa-common.h.
        * Makefile.in (OBJS): Rename hsa.o to hsa-common.o.
        (GTFILES): Rename hsa.c to hsa-common.c.
        * hsa-brig.c: Change include of hsa.h to hsa-common.h.
        * hsa-dump.c: Likewise.
        * hsa-gen.c: Likewise.
        * hsa-regalloc.c: Likewise.
        * ipa-hsa.c: Likewise.
        * omp-expand.c: Likewise.
        * omp-low.c: Likewise.
        * toplev.c: Likewise.

From-SVN: r244711
2017-01-20 14:33:29 +01:00
Marek Polacek 2ebd93e1d7 re PR c/64279 (Warning missing for "(cond) ? A : A" / if(cond) expr1; else expr1; // same expression in if and else branch)
PR c/64279
	* c-common.h (do_warn_duplicated_branches_r): Declare.
	* c-gimplify.c (c_genericize): Walk the function tree calling
	do_warn_duplicated_branches_r.
	* c-warn.c (expr_from_macro_expansion_r): New.
	(do_warn_duplicated_branches): New.
	(do_warn_duplicated_branches_r): New.
	* c.opt (Wduplicated-branches): New option.

	* c-typeck.c (build_conditional_expr): Warn about duplicated branches.

	* call.c (build_conditional_expr_1): Warn about duplicated branches.
	* semantics.c (finish_expr_stmt): Build statement using the proper
	location.

	* doc/invoke.texi: Document -Wduplicated-branches.
	* fold-const.c (operand_equal_p): Handle MODIFY_EXPR, INIT_EXPR,
	COMPOUND_EXPR, PREDECREMENT_EXPR, PREINCREMENT_EXPR,
	POSTDECREMENT_EXPR, POSTINCREMENT_EXPR, CLEANUP_POINT_EXPR, EXPR_STMT,
	STATEMENT_LIST, and RETURN_EXPR.  For non-pure non-const functions
	return 0 only when not OEP_LEXICOGRAPHIC.
	(fold_build_cleanup_point_expr): Use the expression
	location when building CLEANUP_POINT_EXPR.
	* tree-core.h (enum operand_equal_flag): Add OEP_LEXICOGRAPHIC.
	* tree.c (add_expr): Handle error_mark_node.

	* c-c++-common/Wduplicated-branches-1.c: New test.
	* c-c++-common/Wduplicated-branches-10.c: New test.
	* c-c++-common/Wduplicated-branches-11.c: New test.
	* c-c++-common/Wduplicated-branches-12.c: New test.
	* c-c++-common/Wduplicated-branches-2.c: New test.
	* c-c++-common/Wduplicated-branches-3.c: New test.
	* c-c++-common/Wduplicated-branches-4.c: New test.
	* c-c++-common/Wduplicated-branches-5.c: New test.
	* c-c++-common/Wduplicated-branches-6.c: New test.
	* c-c++-common/Wduplicated-branches-7.c: New test.
	* c-c++-common/Wduplicated-branches-8.c: New test.
	* c-c++-common/Wduplicated-branches-9.c: New test.
	* c-c++-common/Wimplicit-fallthrough-7.c: Coalesce dg-warning.
	* g++.dg/cpp0x/lambda/lambda-switch.C: Move dg-warning.
	* g++.dg/ext/builtin-object-size3.C: Likewise.
	* g++.dg/gomp/loop-1.C: Likewise.
	* g++.dg/warn/Wduplicated-branches1.C: New test.
	* g++.dg/warn/Wduplicated-branches2.C: New test.

From-SVN: r244705
2017-01-20 12:02:50 +00:00
Martin Liska 0ce4024a35 Do not declare artificial variables in tree-profile.c to have a definition (PR lto/69188).
2017-01-20  Martin Liska  <mliska@suse.cz>

	PR lto/69188
	* gcc.dg/lto/pr69188_0.c: New test.
	* gcc.dg/lto/pr69188_1.c: New test.
2017-01-20  Martin Liska  <mliska@suse.cz>

	PR lto/69188
	* tree-profile.c (init_ic_make_global_vars): Do not call
	finalize_decl.
	(gimple_init_gcov_profiler): Likewise.

From-SVN: r244692
2017-01-20 09:45:04 +00:00
Martin Liska 2d8d3ae293 Fix IPA CP where it forgot to add a reference in cgraph (PR ipa/71190).
2017-01-20  Martin Liska  <mliska@suse.cz>

	PR ipa/71190
	* cgraph.h (maybe_create_reference): Remove argument and
	update comment.
	* cgraphclones.c (cgraph_node::create_virtual_clone): Remove one
	argument.
	* ipa-cp.c (create_specialized_node): Likewise.
	* symtab.c (symtab_node::maybe_create_reference): Handle
	VAR_DECLs and ADDR_EXPRs and select ipa_ref_use type.

From-SVN: r244687
2017-01-20 08:44:35 +00:00
Martin Liska a809d56440 Fix --enable-gather-detailed-mem-stats
2017-01-20  Martin Liska  <mliska@suse.cz>

	* read-rtl-function.c (function_reader::create_function): Use
	build_decl instread of build_decl_stat.

From-SVN: r244686
2017-01-20 08:41:22 +00:00
Andrew Senkevich d8ea3e7c3c Add AVX512 k-mask intrinsics.
gcc/
	* config/i386/avx512bwintrin.h: Add k-mask registers shift intrinsics.
	* config/i386/avx512dqintrin.h: Ditto.
	* config/i386/avx512fintrin.h: Ditto.
	* config/i386/i386-builtin-types.def: Add new types.
	* gcc/config/i386/i386.c: Handle new types.
	* config/i386/i386-builtin.def (__builtin_ia32_kshiftliqi)
	(__builtin_ia32_kshiftlihi, __builtin_ia32_kshiftlisi)
	(__builtin_ia32_kshiftlidi, __builtin_ia32_kshiftriqi)
	(__builtin_ia32_kshiftrihi, __builtin_ia32_kshiftrisi)
	(__builtin_ia32_kshiftridi): New.
	* config/i386/sse.md (k<code><mode>): Rename *k<code><mode>.

gcc/testsuite/
	* gcc.target/i386/avx512bw-kshiftld-1.c: New test.
	* gcc.target/i386/avx512bw-kshiftlq-1.c: Ditto.
	* gcc.target/i386/avx512dq-kshiftlb-1.c: Ditto.
	* gcc.target/i386/avx512f-kshiftlw-1.c: Ditto.
	* gcc.target/i386/avx512bw-kshiftrd-1.c: Ditto.
	* gcc.target/i386/avx512bw-kshiftrq-1.c: Ditto.
	* gcc.target/i386/avx512dq-kshiftrb-1.c: Ditto.
	* gcc.target/i386/avx512f-kshiftrw-1.c: Ditto.
	* gcc.target/i386/avx512bw-kshiftld-2.c: Ditto.
	* gcc.target/i386/avx512bw-kshiftlq-2.c: Ditto.
	* gcc.target/i386/avx512bw-kshiftrd-2.c: Ditto.
	* gcc.target/i386/avx512bw-kshiftrq-2.c: Ditto.
	* gcc.target/i386/avx512dq-kshiftlb-2.c: Ditto.
	* gcc.target/i386/avx512dq-kshiftrb-2.c: Ditto.
	* gcc.target/i386/avx512f-kshiftlw-2.c: Ditto.
	* gcc.target/i386/avx512f-kshiftrw-2.c: Ditto.
	* gcc.target/i386/avx-1.c: Test new intrinsics.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.

From-SVN: r244685
2017-01-20 08:37:13 +00:00
Segher Boessenkool 01334be4a0 rs6000: Fix the new SSP guard configuration code (PR79140)
I foolishly tested this with r241087 reverted.  After that revision
default_stack_protect_guard is no longer called if the compiler defaults
to using the TLS guard, which of course is the wrong thing to do if
there is some other way to enable the global guard.

This fixes it.


	PR target/78875
	PR target/79140
	* config/rs6000/rs6000.c (TARGET_STACK_PROTECT_GUARD): Unconditionally
	define to rs6000_init_stack_protect_guard.
	(rs6000_init_stack_protect_guard): New function.

From-SVN: r244677
2017-01-20 02:22:27 +01:00
Matthew Fortune d821744c63 config.gcc (supported_defaults): Add madd4.
gcc/
2017-01-19  Matthew Fortune  <matthew.fortune@imgtec.com>
	    Yunqiang Su  <yunqiang.su@imgtec.com>

	* config.gcc (supported_defaults): Add madd4.
	(with_madd4): Add validation.
	(all_defaults): Add madd4.
	* config/mips/mips.opt (mmadd4): New option.
	* gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
	mmadd4.
	(TARGET_CPU_CPP_BUILTINS): Add builtin_define for
	__mips_no_madd4.
	(ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4.
	(ISA_HAS_FUSED_MADD4): Likewise.
	* gcc/doc/invoke.texi (-mmadd4): Document the new option.
	* gcc/doc/install.texi (--with-madd4): Document the new option.

gcc/testsuite/
2017-01-19  Matthew Fortune  <matthew.fortune@imgtec.com>

	* gcc.target/mips/madd4-1.c: New file.
	* gcc.target/mips/madd4-2.c: Likewise.
	* gcc.target/mips/mips.exp (mips_option_groups): Add ghost option
	HAS_MADD4.
	(mips_option_groups): Add -m[no-]madd4.
	(mips-dg-init): Detect default -mno-madd4.
	(mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade.
	* gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option.
	* gcc.target/mips/mips-ps-type-2.c: Likewise.
	* gcc.target/mips/nmadd-1.c: Likewise.
	* gcc.target/mips/nmadd-2.c: Likewise.
	* gcc.target/mips/nmadd-3.c: Likewise.

Co-Authored-By: Yunqiang Su <yunqiang.su@imgtec.com>

From-SVN: r244676
2017-01-19 20:05:25 -05:00
Jiong Wang 312492bd5e [AArch64][3/4] New PAUTH builtins required by libgcc unwinder
gcc/
	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): New
	entries for AARCH64_PAUTH_BUILTIN_XPACLRI,
	AARCH64_PAUTH_BUILTIN_PACIA1716, AARCH64_PAUTH_BUILTIN_AUTIA1716.
	(aarch64_init_pauth_hint_builtins): New.
	(aarch64_init_builtins): Call aarch64_init_pauth_hint_builtins.
	(aarch64_expand_builtin): Expand new builtins.

From-SVN: r244669
2017-01-20 00:10:11 +00:00
Jiong Wang 27169e45d4 [AArch64][2/4] Generate dwarf information for -msign-return-address
gcc/
	* reg-notes.def (CFA_TOGGLE_RA_MANGLE): New reg-note.
	* combine-stack-adj.c (no_unhandled_cfa): Handle
	REG_CFA_TOGGLE_RA_MANGLE.
	* dwarf2cfi.c (dwarf2out_frame_debug): Handle REG_CFA_TOGGLE_RA_MANGLE.
	* config/aarch64/aarch64.c (aarch64_expand_prologue): Generates DWARF
	info for return address signing.
	(aarch64_expand_epilogue): Likewise.

From-SVN: r244667
2017-01-20 00:05:30 +00:00
Jiong Wang db58fd8954 [AArch64][1/4] Support Return address protection on AArch64
gcc/
	* config/aarch64/aarch64-opts.h (aarch64_function_type): New enum.
	* config/aarch64/aarch64-protos.h
	(aarch64_return_address_signing_enabled): New declaration.
	* config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
	New function.
	(aarch64_expand_prologue): Sign return address before it's pushed onto
	stack.
	(aarch64_expand_epilogue): Authenticate return address fetched from
	stack.
	(aarch64_override_options): Sanity check for ILP32 and ISA level.
	(aarch64_attributes): New function attributes for "sign-return-address".
	* config/aarch64/aarch64.md (UNSPEC_AUTI1716, UNSPEC_AUTISP,
	UNSPEC_PACI1716, UNSPEC_PACISP, UNSPEC_XPACLRI): New unspecs.
	("*do_return"): Generate combined instructions according to key index.
	("<pauth_mnem_prefix>sp", "<pauth_mnem_prefix1716", "xpaclri"): New.
	* config/aarch64/iterators.md (PAUTH_LR_SP, PAUTH_17_16): New integer
	iterators.
	(pauth_mnem_prefix, pauth_hint_num_a): New integer attributes.
	* config/aarch64/aarch64.opt (msign-return-address=): New.
	* doc/extend.texi (AArch64 Function Attributes): Documents
	"sign-return-address=".
	* doc/invoke.texi (AArch64 Options): Documents "-msign-return-address=".

gcc/testsuite/
	* gcc.target/aarch64/return_address_sign_1.c: New testcase for no
	combined instructions.
	* gcc.target/aarch64/return_address_sign_2.c: New testcase for combined
	instructions.
	* gcc.target/aarch64/return_address_sign_3.c: New testcase for disable
	of pointer authentication.

From-SVN: r244666
2017-01-20 00:03:20 +00:00
Matthew Fortune c9038c70bd MIPS: Documentation fix for -mlxc1-sxc1
gcc/

	* doc/invoke.texi: Add missing -mlxc1-sxc1 options to
	overall option summary.

From-SVN: r244665
2017-01-19 23:58:10 +00:00
Jiong Wang d766c52b7b [AArch64] Add commandline support for -march=armv8.3-a
gcc/
	* config/aarch64/aarch64-arches.def: New entry for "armv8.3-a".
	* config/aarch64/aarch64.h (AARCH64_FL_V8_3, AARCH64_FL_FOR_ARCH8_3,
	AARCH64_ISA_V8_3, TARGET_ARMV8_3): New.
	* doc/invoke.texi (AArch64 Options): Document "armv8.3-a".

From-SVN: r244663
2017-01-19 23:51:49 +00:00
Michael Meissner bd9cf60b31 rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Enable -mpower9-minmax by default for -mcpu=power9.
[gcc]
2017-01-19  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Enable
	-mpower9-minmax by default for -mcpu=power9.
	(ISA_3_MASKS_IEEE): Require -mvsx-small-integer to enable IEEE
	128-bit floating point.

[gcc/testsuite]
2017-01-19  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/float128-hw.c: Do not require IEEE 128-bit
	floating point hardware to run test.

From-SVN: r244662
2017-01-19 23:31:20 +00:00
Alan Modra 945a01f921 [RS6000] Don't expand strcmp and strncmp inline when -Os
* config/rs6000/rs6000.md (cmpstrnsi, cmpstrsi): Fail if
	optimizing for size.

From-SVN: r244660
2017-01-20 09:51:53 +10:30
Alan Modra 5699b9d115 [RS6000] PR79144, cmpstrnsi optimization breaks glibc
glibc compiled with current gcc-7 fails one test due to strcmp and
strncmp appearing in the PLT.  This is because the inline expansion of
those functions falls back to a function call, but doesn't use the asm
name for the call.

	PR target/79144
	* config/rs6000/rs6000.c (expand_strn_compare): Get the asm name
	for strcmp and strncmp from corresponding builtin decl.

From-SVN: r244659
2017-01-20 09:49:19 +10:30
Uros Bizjak d445d739b9 config.gcc (x86_64-*-rtems*): Use i386/rtemself.h instead of i386/rtems-64.h.
* config.gcc (x86_64-*-rtems*): Use i386/rtemself.h
	instead of i386/rtems-64.h.
	* config/i386/rtems-64.h: Remove.

From-SVN: r244655
2017-01-19 23:00:17 +01:00
Uros Bizjak fa9205536c re PR target/78478 (Compile Error for i386-rtems)
PR target/78478
	Revert:
	2013-11-05  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/rtemself.h (LONG_DOUBLE_TYPE_SIZE): New define.

From-SVN: r244653
2017-01-19 22:38:44 +01:00
Tamar Christina ab014eb3ae aarch64.c (aarch64_simd_gen_const_vector_dup): Change int to HOST_WIDE_INT.
gcc/
2017-01-19  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup):
	Change int to HOST_WIDE_INT.
	* config/aarch64/aarch64-protos.h
	(aarch64_simd_gen_const_vector_dup): Likewise.
	* config/aarch64/aarch64-simd.md: Add copysign<mode>3.

gcc/testsuite/
2017-01-19  Tamar Christina  <tamar.christina@arm.com>

	* gcc/testsuite/lib/target-supports.exp
	(check_effective_target_vect_call_copysignf): Enable for AArch64.

From-SVN: r244649
2017-01-19 18:30:44 +00:00
David Malcolm 8a3a6ab451 Make LTO's implementation of LANG_HOOKS_TYPE_FOR_SIZE the default
gcc/jit/ChangeLog:
	* dummy-frontend.c (jit_langhook_type_for_size): Delete.
	(LANG_HOOKS_TYPE_FOR_SIZE): Don't redefine.

gcc/ChangeLog:
	* langhooks-def.h (lhd_type_for_size): New decl.
	(LANG_HOOKS_TYPE_FOR_SIZE): Define as lhd_type_for_size.
	* langhooks.c (lhd_type_for_size): New function, taken from
	lto_type_for_size.

gcc/lto/ChangeLog:
	* lto-lang.c (builtin_type_for_size): Convert call to
	lto_type_for_size to one through the langhook.
	(lto_type_for_size): Move to langhooks.c and rename to
	lhd_type_for_size.
	(LANG_HOOKS_TYPE_FOR_SIZE): Don't redefine.

From-SVN: r244646
2017-01-19 17:27:54 +00:00
Pat Haugen 86eb502b93 power9.md (power9-alu): Remove 'cmp' type and add define_bypass for CR latency.
* config/rs6000/power9.md (power9-alu): Remove 'cmp' type and add
	define_bypass for CR latency.
	(power9-cracked-alu): Update bypass latency and remove power9-branch.
	(power9-alu2): Add define_bypass for CR latency.
	(power9-cmp): New.
	(power9-mul): Update insn latency.
	(power9-mul-compare): Update insn latency, bypass latency and remove
	power9-branch.

From-SVN: r244645
2017-01-19 17:11:34 +00:00
Kyrylo Tkachov 197d1c095d [AArch64] Purge leftover occurrences of aarch64_nopcrelative_literal_loads
* config/aarch64/aarch64-protos.h (aarch64_nopcrelative_literal_loads):
	Delete.
	* config/aarch64/aarch64.md
	(aarch64_reload_movcp<GPF_TF:mode><P:mode>): Delete reference to
	aarch64_nopcrelative_literal_loads.
	(aarch64_reload_movcp<VALL:mode><P:mode>): Likewise.

From-SVN: r244643
2017-01-19 16:59:43 +00:00
Chenghua Xu cedb7e2c85 MIPS: Make loongson3a use fused madd.d
gcc/
	* config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for
	TARGET_LOONGSON_3A.
	(ISA_HAS_UNFUSED_MADD4): Exclude TARGET_LOONGSON_3A.

From-SVN: r244641
2017-01-19 16:26:32 +00:00
Matthew Fortune ab6b44cb22 MIPS: PR target/78176 add -mlxc1-sxc1.
gcc/

	PR target/78176
	* config.gcc (supported_defaults): Add lxc1-sxc1.
	(with_lxc1_sxc1): Add validation.
	(all_defaults): Add lxc1-sxc1.
	* config/mips/mips.opt (mlxc1-sxc1): New option.
	* gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
	mlxc1-sxc1.
	(TARGET_CPU_CPP_BUILTINS): Add builtin_define for
	__mips_no_lxc1_sxc1.
	(ISA_HAS_LXC1_SXC1): Gate with mips_lxc1_sxc1.
	* gcc/doc/invoke.texi (-mlxc1-sxc1): Document the new option.
	* doc/install.texi (--with-lxc1-sxc1): Document the new option.

gcc/testsuite/

	* gcc.target/mips/lxc1-sxc1-1.c: New file.
	* gcc.target/mips/lxc1-sxc1-2.c: Likewise.
	* gcc.target/mips/mips.exp (mips_option_groups): Add ghost option
	HAS_LXC1.
	(mips_option_groups): Add -m[no-]lxc1-sxc1.
	(mips-dg-init): Detect default -mno-lxc1-sxc1.
	(mips-dg-options): Handle HAS_LXC1 arch upgrade/downgrade.

From-SVN: r244640
2017-01-19 16:05:59 +00:00
Richard Biener ed20a004e1 re PR rtl-optimization/72488 (wrong code (SIGFPE) at -Os and above on x86_64-linux-gnu (in the 64-bit mode))
2017-01-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/72488
	* tree-ssa-sccvn.c (run_scc_vn): When we abort the VN make
	sure to restore SSA info.
	* tree-ssa.c (verify_ssa): Verify SSA info is not shared.

From-SVN: r244623
2017-01-19 12:00:42 +00:00
Richard Earnshaw a57c520e2b [expand] Fix for PR rtl-optimization/79121 incorrect expansion of extend plus left shift
When generating a shift from an extended value moving from one to two
    machine registers, the type of the right shift is for the most
    significant word should be determined by the signedness of the inner
    type, not the signedness of the result type.
    
    gcc:
        PR rtl-optimization/79121
        * expr.c (expand_expr_real_2, case LSHIFT_EXPR): Look at the signedness
        of the inner type when shifting an extended value.
    
    gcc/testsuite:
        * gcc.c-torture/execute/pr79121.c: New test.

From-SVN: r244613
2017-01-19 10:35:38 +00:00
Jan Hubicka ea83dcf68d re PR lto/78407 (LTO breaks separate overriding of symbol aliases)
PR lto/78407
	* symtab.c (symtab_node::equal_address_to): Fix comparing of
	interposable aliases.

From-SVN: r244612
2017-01-19 10:00:56 +00:00
Peter Bergner f457ef94da re PR target/78516 (ICE in lra_assign for e500v2)
PR target/78516
	* config/rs6000/spe.md (mov_si<mode>_e500_subreg0): Fix constraints.
	Use the evmergelohi instruction.
	(mov_si<mode>_e500_subreg4_2_le): Likewise.
	(mov_sitf_e500_subreg8_2_be): Likewise.
	(mov_sitf_e500_subreg12_2_le): Likewise.
	(mov_si<mode>_e500_subreg0_2_le): Fix constraints.
	(mov_si<mode>_e500_subreg4_2_be): Likewise.
	(mov_sitf_e500_subreg8_2_le): Likewise.
	(mov_sitf_e500_subreg12_2_be): Likewise.

From-SVN: r244609
2017-01-18 20:23:35 -06:00
Bill Schmidt 20ca9ae25f altivec.md (altivec_vbpermq): Change "type" attribute from vecsimple to vecperm.
2017-01-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (altivec_vbpermq): Change "type"
	attribute from vecsimple to vecperm.
	(altivec_vbpermq2): Likewise.

From-SVN: r244603
2017-01-18 22:36:39 +00:00
Bill Schmidt 1c8bf56078 re PR target/79040 (vec_cntlz redefined)
2017-01-18  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR target/79040
	* config/rs6000/altivec.h: Fix typo of vec_cntlz to vec_cnttz.

From-SVN: r244602
2017-01-18 22:29:22 +00:00
Aaron Sawdey 0edd264dfc rs6000-protos.h (expand_strn_compare): Add arg.
2017-01-18  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
	* config/rs6000/rs6000-protos.h (expand_strn_compare): Add arg.
	* config/rs6000/rs6000.c (expand_strn_compare): Add ability to expand
	strcmp. Fix bug where comparison didn't stop with zero byte. Fix
	case where N arg is SIZE_MAX.
	* config/rs6000/rs6000.md (cmpstrnsi): Args to expand_strn_compare.
	(cmpstrsi): Add pattern.
2017-01-18  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>
	* gcc.dg/strcmp-1.c: New test.
	* gcc.dg/strncmp-1.c: Add test for a bug that escaped.

From-SVN: r244598
2017-01-18 14:56:16 -06:00
Michael Meissner b7d3a6a6b2 rs6000-c.c (altivec_overloaded_builtins): Add __builtin_vec_revb builtins.
[gcc]
2017-01-18  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
	__builtin_vec_revb builtins.
	* config/rs6000/rs6000-builtins.def (P9V_BUILTIN_XXBRQ_V16QI): Add
	built-in functions to support generation of the ISA 3.0 XXBR<x>
	vector byte reverse instructions.
	(P9V_BUILTIN_XXBRQ_V1TI): Likewise.
	(P9V_BUILTIN_XXBRD_V2DI): Likewise.
	(P9V_BUILTIN_XXBRD_V2DF): Likewise.
	(P9V_BUILTIN_XXBGW_V4SI): Likewise.
	(P9V_BUILTIN_XXBGW_V4SF): Likewise.
	(P9V_BUILTIN_XXBGH_V8HI): Likewise.
	(P9V_BUILTIN_VEC_REVB): Likewise.
	* config/rs6000/vsx.md (p9_xxbrq_v1ti): New insns/expanders to
	generate the ISA 3.0 XXBR<x> vector byte reverse instructions.
	(p9_xxbrq_v16qi): Likewise.
	(p9_xxbrd_<mode>, VSX_D iterator): Likewise.
	(p9_xxbrw_<mode>, VSX_W iterator): Likewise.
	(p9_xxbrh_v8hi): Likewise.
	* config/rs6000/altivec.h (vec_revb): Define if ISA 3.0.
	* doc/extend.texi (RS/6000 Altivec Built-ins): Document the
	vec_revb built-in functions.

[gcc/testsuite]
2017-01-18  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p9-xxbr-1.c: New test.
	* gcc.target/powerpc/p9-xxbr-2.c: Likewise.

From-SVN: r244593
2017-01-18 19:30:38 +00:00
Uros Bizjak a711887ed9 re PR rtl-optimization/78952 (Combine does not convert 8-bit sign-extract to a zero-extract for QImode operations)
PR rtl-optimization/78952
	* config/i386/i386.md (any_extract): New code iterator.
	(*insvqi_2): Use any_extract for source operand.
	(*insvqi_3): Use any_shiftrt for source operand.

testsuite/ChangeLog:

	PR rtl-optimization/78952
	* gcc.target/i386/pr78952-1.c: New test.
	* gcc.target/i386/pr78952-2.c: Ditto.

From-SVN: r244591
2017-01-18 20:24:30 +01:00
Wilco Dijkstra 9bca63d44b SHA1H instructions may be scheduled after a SHA1C instruction that uses the same input register.
SHA1H instructions may be scheduled after a SHA1C instruction
that uses the same input register.  However SHA1C updates its input,
so if SHA1H is scheduled after it, it requires an extra move.
Increase the priority of SHA1H to ensure it gets scheduled
earlier, avoiding the move.

    gcc/
	* config/aarch64/aarch64.c (aarch64_sched_adjust_priority)
	New function.
	(TARGET_SCHED_ADJUST_PRIORITY): Define target hook.

From-SVN: r244586
2017-01-18 18:23:34 +00:00