David Edelsohn
402315aee6
re PR target/69810 (PowerPC64: unrecognizable insn)
...
PR target/69810
* config/rs6000/rs6000.md (EXTQI): Don't allow extension to HImode.
(zero_extendqi<mode>2_dot): Revert earlier conversion from
define_insn_and_split to define_insn.
(zero_extendqi<mode>2_dot2): Same.
(extendqi<mode>2_dot): Same.
(extendqi<mode>2_dot2): Same.
From-SVN: r235646
2016-04-29 13:20:36 -04:00
Chris Gregory
f92ab29ffa
Remove trailing whitespace from libstdc++-v3 files
...
2016-04-29 Chris Gregory <czipperz@gmail.com>
* config/*: Remove trailing whitespace.
* src/*: Likewise.
* testsuite/tr1/*: Likewise.
* testsuite/util/*: Likewise.
From-SVN: r235645
2016-04-29 17:11:43 +01:00
Bin Cheng
8960db3195
re PR tree-optimization/70803 (gcc.dg/vect/pr56625.c FAILs)
...
gcc/testsuite/ChangeLog
PR tree-optimization/70803
* gcc.dg/vect/pr56625.c: Require vect_int_mult.
From-SVN: r235644
2016-04-29 15:13:03 +00:00
Tom Tromey
76fe84ecfe
Add DW_LANG_Rust
...
include/
* dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
DW_LANG_Rust_old>: New constants.
From-SVN: r235643
2016-04-29 15:01:30 +00:00
Uros Bizjak
febaf72616
i386.md (unspec): Add UNSPEC_PROBE_STACK.
...
* config/i386/i386.md (unspec): Add UNSPEC_PROBE_STACK.
(probe_stack): New expander.
(probe_stack_<mode>): New insn pattern.
From-SVN: r235642
2016-04-29 16:43:29 +02:00
Uros Bizjak
b891ade601
i386.md (operations with memory inputs setting flags peephole2): Remove uneeded REG_P checks.
...
* config/i386/i386.md
(operations with memory inputs setting flags peephole2):
Remove uneeded REG_P checks. Cleanup pattern generation.
From-SVN: r235641
2016-04-29 16:31:56 +02:00
Oleg Endo
9129c8cfcd
crt1.S: Remove SH5 support.
...
libgcc/
* config/sh/crt1.S: Remove SH5 support.
* config/sh/crti.S: Likewise.
* config/sh/crtn.S: Likewise.
* config/sh/lib1funcs-4-300.S: Likewise.
* config/sh/lib1funcs-Os-4-200.S: Likewise.
* config/sh/lib1funcs.S: Likewise.
* config/sh/linux-unwind.h: Likewise.
* config/sh/t-sh64: Delete.
From-SVN: r235640
2016-04-29 14:10:26 +00:00
Ilya Enkovich
cca535a4c1
tree-vect-loop.c (vect_transform_loop): Fix nb_iterations_upper_bound computation for vectorized loop.
...
gcc/
* tree-vect-loop.c (vect_transform_loop): Fix
nb_iterations_upper_bound computation for vectorized loop.
gcc/testsuite/
* gcc.target/i386/vect-unpack-2.c (avx512bw_test): Avoid
optimization of vector loop.
* gcc.target/i386/vect-unpack-3.c: New test.
* gcc.dg/vect/vect-nb-iter-ub-1.c: New test.
* gcc.dg/vect/vect-nb-iter-ub-2.c: New test.
* gcc.dg/vect/vect-nb-iter-ub-3.c: New test.
From-SVN: r235639
2016-04-29 13:27:24 +00:00
Marek Polacek
2fff3db89f
re PR c/70852 (ice in warn_for_memset)
...
PR c/70852
* c-common.c (warn_for_memset): Check domain before accessing it.
* gcc.dg/pr70852.c: New test.
From-SVN: r235638
2016-04-29 12:39:25 +00:00
Marek Polacek
500ecf4abd
re PR sanitizer/70342 (g++ -fsanitize=undefined never finishes compiling (>24h) in qtxmlpatterns test suite)
...
PR sanitizer/70342
* fold-const.c (tree_single_nonzero_warnv_p): For TARGET_EXPR, use
TARGET_EXPR_SLOT as a base.
* g++.dg/ubsan/null-7.C: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r235637
2016-04-29 12:32:45 +00:00
Andrew Burgess
a1f7021242
arc.md (*loadqi_update): Replace use of 'rI' constraint with 'rCm2' constraints to limit possible...
...
2016-04-29 Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.md (*loadqi_update): Replace use of 'rI'
constraint with 'rCm2' constraints to limit possible immediate
size.
(*load_zeroextendqisi_update): Likewise.
(*load_signextendqisi_update): Likewise.
(*loadhi_update): Likewise.
(*load_zeroextendhisi_update): Likewise.
(*load_signextendhisi_update): Likewise.
(*loadsi_update): Likewise.
(*loadsf_update): Likewise.
From-SVN: r235636
2016-04-29 13:07:31 +01:00
Uros Bizjak
2ff0cbe5fe
predicates.md (constm1_operand): Fix comparison.
...
* config/i386/predicates.md (constm1_operand): Fix comparison.
From-SVN: r235635
2016-04-29 14:00:48 +02:00
Claudiu Zissulescu
39d5046452
[ARC] Handle FPX NaN within optimized floating point library.
...
gcc/
2016-04-29 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gcc.target/arc/ieee_eq.c: New test.
libgcc/
2016-04-29 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/ieee-754/eqdf2.S: Handle FPX NaN.
From-SVN: r235633
2016-04-29 12:49:26 +02:00
Oleg Endo
af95276348
longlong.h (umul_ppmm): Remove SHMEDIA checks.
...
include/
* longlong.h (umul_ppmm): Remove SHMEDIA checks.
(__umulsidi3, count_leading_zeros): Remove SHMEDIA implementations.
gcc/
* common/config/sh/sh-common.c (sh_option_optimization_table): Remove
remaining SH5 related settings.
* config/sh/sh-protos.h (shmedia_cleanup_truncate,
shmedia_prepare_call_address): Delete.
* config/sh/sh.c (sh_print_operand, output_stack_adjust,
DWARF_CIE_DATA_ALIGNMENT, LOCAL_ALIGNMENT): Update comments.
* config/sh/sh.h (SUBTARGET_ASM_RELAX_SPEC,
UNSUPPORTED_SH2A): Remove m5 checks.
(sh_divide_strategy_e): Remove SH5 division strategies.
(TARGET_PTRMEMFUNC_VBIT_LOCATION): Remove and use default.
* config/sh/sh.md (divsf3): Reinstate define_expand pattern.
From-SVN: r235632
2016-04-29 10:44:57 +00:00
Claudiu Zissulescu
1ab06af64c
[ARC] Fix obsolete constraint.
...
include/
2016-04-29 Claudiu Zissulescu <claziss@synopsys.com>
* longlong.h (add_ssaaaa): Replace obsolete 'J' constraint with
'Cal' constraint.
(sub_ddmmss): Likewise.
From-SVN: r235631
2016-04-29 12:11:25 +02:00
Dominik Vogt
2c2156a714
S/390: Improve documentation of s390_reload_costs.
...
gcc/ChangeLog:
2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com>
* config/s390/s390.c (s390_rtx_costs): Update documentation.
From-SVN: r235630
2016-04-29 09:20:55 +00:00
Dominik Vogt
509063ebd1
PR/69089: C++-11: Ingore "alignas(0)".
...
gcc/c-family/ChangeLog:
2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR/69089
* c-common.c (handle_aligned_attribute): Allow 0 as an argument to the
"aligned" attribute.
gcc/testsuite/ChangeLog:
2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR/69089
* g++.dg/cpp0x/alignas6.C: New test.
From-SVN: r235629
2016-04-29 09:20:06 +00:00
Dominik Vogt
83745c0ddb
Clean up tests where a later dg-do completely overrides another.
...
The attached patch cleans up some (mostly unnecessary) dg-do
directives in the gcc.dg and gcc.target test cases.
gcc/testsuite/ChangeLog:
2016-04-29 Dominik Vogt <vogt@linux.vnet.ibm.com>
* gcc/testsuite/gcc.dg/cpp/mac-dir-2.c: Remove pointless duplicate
dg-do.
* gcc/testsuite/gcc.dg/pr27003.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/cswtch.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-4.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-5.c: Likewise.
* gcc.target/arc/mxy.c: Likewise.
* gcc.target/arc/mswape.c: Likewise.
* gcc.target/arc/mrtsc.c: Likewise.
* gcc.target/arc/mcrc.c: Likewise.
* gcc.target/arc/mdsp-packa.c: Likewise.
* gcc.target/arc/mdvbf.c: Likewise.
* gcc.target/arc/mlock.c: Likewise.
* gcc.target/arc/mmac-24.c: Likewise.
* gcc.dg/spec-options.c: Switch order of the two "dg-do run".
From-SVN: r235628
2016-04-29 09:19:01 +00:00
Andreas Krebbel
ae1c6198f9
S/390: Replace LDER with LDR.
...
For performance reasons it is important to write the full 64 bits of
an FPR target reg even when dealing with 32 bit values. So we chose
lder over ler for 32 bit float register moves. lder zero-extends the
32 bit value from the source reg to 64 bit in the target. However,
since it actually doesn't matter whether we write the upper 32 bits
with zeros or with any other garbage we can also use ldr instead. It
is bit shorter and therefore will do good for I-Cache usage.
gcc/ChangeLog:
2016-04-29 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/2964.md ("z13_unit_fxu", "z13_0"): Remove lder.
* config/s390/s390.md ("movsi_larl", "*movsi_esa", "mov<mode>"):
Change lder to ldr.
* config/s390/vector.md ("mov<mode>"): Likewise.
From-SVN: r235627
2016-04-29 09:17:35 +00:00
Ulrich Weigand
3e4be43f69
S/390: Memory constraint cleanup
...
This fixes an issue with the long displacement memory address
constraints S and T. These were defined to only accept long
displacement addresses. This is wrong since a memory constraint must
not reject an address with a 0 displacement. Reload relies on being
able to turn an invalid memory address into a valid one by reloading
the address into a base register. The S and T constraints would
reject such an address.
This isn't really a problem for the backend since we used the
constraints with that knowledge there but it is a problem for people
writing inline assemblies.
gcc/ChangeLog:
2016-04-29 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/constraints.md ("U", "W"): Invoke
s390_mem_constraint with "ZR" and "ZT".
* config/s390/s390.c (s390_check_qrst_address): Reject invalid
addresses when using LRA. Accept also short displacements for S
and T constraints. Do not check for long displacement target for
S and T constraints.
(s390_mem_constraint): Remove handling of U and W constraints.
* config/s390/s390.md (various patterns): Remove the short
displacement constraints (Q and R) if a long displacement
constraint is present. Add longdisp as required CPU capability.
* config/s390/vector.md: Likewise.
* config/s390/vx-builtins.md: Likewise.
From-SVN: r235626
2016-04-29 09:14:19 +00:00
Bernd Schmidt
849b265de1
avr-related reload fix from Senthil Kumar Selvaraj
...
PR target/60040
* reload1.c (reload): Call finish_spills before
restarting reload loop. Skip select_reload_regs
if update_eliminables_and_spill returns true.
testsuite/
PR target/60040
* gcc.target/avr/pr60040-1.c: New.
* gcc.target/avr/pr60040-2.c: New.
From-SVN: r235625
2016-04-29 08:59:09 +00:00
Richard Biener
1390536b51
pr18589-10.c: Adjust.
...
2016-04-29 Richard Biener <rguenther@suse.de>
* gcc.dg/tree-ssa/pr18589-10.c: Adjust.
From-SVN: r235624
2016-04-29 08:47:34 +00:00
Claudiu Zissulescu
7132ae191b
[ARC] Fix unwanted match for sign extend 16-bit constant.
...
The combine pass may conclude umulhisi3_imm pattern can accept also sign
extended 16-bit constants. This patch prohibits the combine in considering
this pattern as suitable.
gcc/
2016-04-29 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.h (UNSIGNED_INT12, UNSIGNED_INT16): Define.
* config/arc/arc.md (umulhisi3): Use arc_short_operand predicate.
(umulhisi3_imm): Update predicates and constraint letters.
(umulhisi3_reg): Declare instruction as commutative.
* config/arc/constraints.md (J12, J16): New constraints.
* config/arc/predicates.md (short_unsigned_const_operand): New
predicate.
(arc_short_operand): Likewise.
* testsuite/gcc.target/arc/umulsihi3_z.c: New file.
From-SVN: r235623
2016-04-29 10:39:22 +02:00
Richard Biener
98998245d9
re PR tree-optimization/13962 ([tree-ssa] make "fold" use alias information to optimize pointer comparisons)
...
2016-04-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/13962
PR tree-optimization/65686
* tree-ssa-alias.h (ptrs_compare_unequal): Declare.
* tree-ssa-alias.c (ptrs_compare_unequal): New function
using PTA to compare pointers.
* match.pd: Add pattern for pointer equality compare simplification
using ptrs_compare_unequal.
* gcc.dg/uninit-pr65686.c: New testcase.
From-SVN: r235622
2016-04-29 08:36:49 +00:00
Richard Biener
59cf7a415c
stor-layout.c (layout_type): Do not build a pointer-to-element type for arrays.
...
2016-04-29 Richard Biener <rguenther@suse.de>
* stor-layout.c (layout_type): Do not build a pointer-to-element
type for arrays.
From-SVN: r235621
2016-04-29 08:08:45 +00:00
Uros Bizjak
1d338e847d
i386.md (Load+RegOp to Mov+MemOp peephole2): Use SWI mode iterator.
...
* config/i386/i386.md (Load+RegOp to Mov+MemOp peephole2):
Use SWI mode iterator. Use general_reg_operand predicate.
(Load+RegOp to Mov+MemOp peephole2 with vector regs): Split
peephole to MMX and SSE part. Use mmx_reg_operand and sse_reg_operand
predicates.
From-SVN: r235620
2016-04-29 08:12:47 +02:00
GCC Administrator
541703997f
Daily bump.
...
From-SVN: r235619
2016-04-29 00:16:21 +00:00
Jakub Jelinek
8b80cc2131
re PR middle-end/70843 (ICE in add_expr, at tree.c:7913)
...
PR middle-end/70843
* fold-const.c (operand_equal_p): Don't verify hash value equality
if arg0 == arg1.
* tree.c (inchash::add_expr): Handle STATEMENT_LIST. Ignore BLOCK
and OMP_CLAUSE.
* gcc.dg/pr70843.c: New test.
From-SVN: r235615
2016-04-29 00:23:01 +02:00
Andrew MacLeod
9f405ce1b5
c-array-notation.c (fix_builtin_array_notation_fn): Fix final argument to build_modify_expr in two cases.
...
2016-04-28 Andrew MacLeod <amacleod@redhat.com>
* c-array-notation.c (fix_builtin_array_notation_fn): Fix final
argument to build_modify_expr in two cases.
From-SVN: r235614
2016-04-28 16:00:19 -06:00
Ian Lance Taylor
f22693cb96
compiler: Mark concurrent calls.
...
If a call expression is executed in an independent goroutine via
use of a Go statement, mark it as concurrent.
Reviewed-on: https://go-review.googlesource.com/18700
From-SVN: r235608
2016-04-28 19:43:20 +00:00
Jakub Jelinek
6181bc30ab
re PR target/70858 (__builtin_ia32_bextr_u64 ICE with '-m32 -march=core-avx2')
...
PR target/70858
* config/i386/i386.c (bdesc_special_args): Add | OPTION_MASK_ISA_64BIT
to __builtin_ia32_lwpval64 and __builtin_ia32_lwpins64.
(bdesc_args): Add | OPTION_MASK_ISA_64BIT to __builtin_ia32_bextr_u64,
__builtin_ia32_bextri_u64, __builtin_ia32_bzhi_di,
__builtin_ia32_pdep_di and __builtin_ia32_pext_di.
* gcc.target/i386/pr70858.c: New test.
From-SVN: r235607
2016-04-28 21:33:34 +02:00
Segher Boessenkool
77dbb21488
rs6000: Clean up rs6000_stack_info a bit
...
- Rename "info_ptr" to "info", as in all other routines;
- Don't set fields to 0, the whole struct already is set to 0;
- Fix formatting a bit.
* config/rs6000/rs6000.c (compute_save_world_info): Rename info_ptr
to info. Don't initialize separate fields to 0. Clean up
formatting a bit.
From-SVN: r235606
2016-04-28 21:23:55 +02:00
Andrew Burgess
f4cb361287
nps400-1.c: New file.
...
2016-04-28 Andrew Burgess <andrew.burgess@embecosm.com>
* gcc.target/arc/nps400-1.c: New file.
From-SVN: r235603
2016-04-28 20:13:47 +01:00
Ian Lance Taylor
913a9fbb4f
compiler: Export String_index_expression.
...
Exports String_index_expression and adds the getter `string` that
returns the underlying string. This will be used to handle string
indexing different from array indexing in escape analysis.
Reviewed-on: https://go-review.googlesource.com/18545
From-SVN: r235602
2016-04-28 19:12:13 +00:00
Uros Bizjak
9fae9ece6a
i386.md (peephole2s for operations with memory inputs): Use SWI mode iterator.
...
* config/i386/i386.md (peephole2s for operations with memory inputs):
Use SWI mode iterator.
(peephole2s for operations with memory outputs): Ditto.
Do not check for stack checking probe.
(probe_stack): Remove expander.
From-SVN: r235601
2016-04-28 21:11:25 +02:00
Joern Rennecke
8ad9df624c
arc.c (arc_print_operand): Print integer 'H' / 'L'
...
2016-04-28 Joern Rennecke <joern.rennecke@embecosm.com>
Andrew Burgess <andrew.burgess@embecosm.com>
gcc:
* config/arc/arc.c (arc_print_operand): Print integer 'H' / 'L'
gcc/testsuite:
* gcc.target/arc/movh_cl-1.c: New file.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r235600
2016-04-28 20:08:28 +01:00
Jason Merrill
0d1892d2d5
* gdbinit.in: Skip line-map.h.
...
From-SVN: r235598
2016-04-28 15:04:23 -04:00
Jason Merrill
b632761d2c
Implement C++17 [[nodiscard]] attribute.
...
PR c++/38172
PR c++/54379
gcc/c-family/
* c-lex.c (c_common_has_attribute): Handle nodiscard.
gcc/cp/
* parser.c (cp_parser_std_attribute): Handle [[nodiscard]].
* tree.c (handle_nodiscard_attribute): New.
(cxx_attribute_table): Add [[nodiscard]].
* cvt.c (cp_get_fndecl_from_callee, cp_get_callee_fndecl): New.
(maybe_warn_nodiscard): New.
(convert_to_void): Call it.
From-SVN: r235597
2016-04-28 15:01:19 -04:00
Jason Merrill
babaa9df02
cvt.c (cp_get_callee): New.
...
* cvt.c (cp_get_callee): New.
* constexpr.c (get_function_named_in_call): Use it.
* cxx-pretty-print.c (postfix_expression): Use it.
* except.c (check_noexcept_r): Use it.
* method.c (check_nontriv): Use it.
* tree.c (build_aggr_init_expr): Use it.
* cp-tree.h: Declare it.
From-SVN: r235596
2016-04-28 15:01:13 -04:00
Joern Rennecke
ceaaa9fe93
arc.h (SYMBOL_FLAG_CMEM): Define.
...
2016-04-28 Joern Rennecke <joern.rennecke@embecosm.com>
Andrew Burgess <andrew.burgess@embecosm.com>
gcc:
* config/arc/arc.h (SYMBOL_FLAG_CMEM): Define.
(TARGET_NPS_CMEM_DEFAULT): Provide default definition.
* config/arc/arc.c (arc_address_cost): Return 0 for cmem_address.
(arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated.
* config/arc/arc.opt (mcmem): New option.
* config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative,
supply length for r/m alternative.
(*extendqisi2_ac): Likewise.
(*extendhisi2_i): Add r/Uex alternative, supply length for r/m and
r/Uex alternative.
(movqi_insn): Add r/Ucm and Ucm/?Rac alternatives.
(movhi_insn): Likewise.
(movsi_insn): Add r/Ucm,Ucm/w alternatives.
(*zero_extendqihi2_i): Add r/Ucm alternative.
(*zero_extendqisi2_ac): Likewise.
(*zero_extendhisi2_i): Likewise.
* config/arc/constraints.md (Uex): New memory constraint.
(Ucm): New define_constraint.
* config/arc/predicates.md (long_immediate_loadstore_operand):
Return 0 for MEM with cmem_address address.
(cmem_address_0): New predicates.
(cmem_address_1): Likewise.
(cmem_address_2): Likewise.
(cmem_address): Likewise.
gcc/testsuite:
* gcc.target/arc/cmem-1.c: New file.
* gcc.target/arc/cmem-2.c: New file.
* gcc.target/arc/cmem-3.c: New file.
* gcc.target/arc/cmem-4.c: New file.
* gcc.target/arc/cmem-5.c: New file.
* gcc.target/arc/cmem-6.c: New file.
* gcc.target/arc/cmem-7.c: New file.
* gcc.target/arc/cmem-ld.inc: New file.
* gcc.target/arc/cmem-st.inc: New file.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r235595
2016-04-28 19:48:43 +01:00
Segher Boessenkool
dc236a9d78
sbitmap: Remove popcount
...
In r193072 sbitmap_popcount was removed, so we cannot ask for the popcount
of an sbitmap anymore. Nothing calls sbitmap_alloc_with_popcount either.
This patch removes everything else popcount-related from sbitmap.
* cfganal.c (bitmap_intersection_of_succs): Delete assert checking
dst->popcount.
(bitmap_intersection_of_preds): Ditto.
(bitmap_union_of_succs): Ditto.
(bitmap_union_of_preds): Ditto.
* sbitmap.c (do_popcount): Delete.
(BITMAP_DEBUGGING): Delete.
(sbitmap_verify_popcount): Delete.
(sbitmap_alloc): Don't initialize the popcount field.
(sbitmap_alloc_with_popcount): Delete.
(sbitmap_resize): Don't resize the popcount array.
(sbitmap_vector_alloc): Don't initialize the popcount field.
(bitmap_copy): Don't copy the popcount array.
(bitmap_clear): Don't clear the popcount array.
(bitmap_clear): Delete the popcount array handling.
(bitmap_ior_and_compl): Delete the popcount assert.
(bitmap_not): Ditto.
(bitmap_and_compl): Ditto.
(bitmap_and): Delete the popcount array handling.
(bitmap_xor): Ditto.
(bitmap_ior): Ditto.
(bitmap_or_and): Delete the popcount assert.
(bitmap_and_or): Ditto.
(popcount_table): Delete.
(sbitmap_elt_popcount): Delete.
* sbitmap.h (simple_bitmap_def): Delete the popcount field.
(bitmap_set_bit): Delete the popcount assert.
(bitmap_clear_bit): Ditto.
(sbitmap_free): Don't free the popcount array.
(sbitmap_alloc_with_popcount): Delete declaration.
(sbitmap_popcount): Ditto.
From-SVN: r235592
2016-04-28 20:43:12 +02:00
Uros Bizjak
eb74cda0a5
* ChangeLog: Remove duplicate entry.
...
From-SVN: r235591
2016-04-28 20:29:33 +02:00
Joern Rennecke
4d03dc2fdf
arc.h (SYMBOL_FLAG_CMEM): Define.
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2016-04-28 Joern Rennecke <joern.rennecke@embecosm.com>
Andrew Burgess <andrew.burgess@embecosm.com>
gcc:
* config/arc/arc.h (SYMBOL_FLAG_CMEM): Define.
(TARGET_NPS_CMEM_DEFAULT): Provide default definition.
* config/arc/arc.c (arc_address_cost): Return 0 for cmem_address.
(arc_encode_section_info): Set SYMBOL_FLAG_CMEM where indicated.
* config/arc/arc.opt (mcmem): New option.
* config/arc/arc.md (*extendqihi2_i): Add r/Uex alternative,
supply length for r/m alternative.
(*extendqisi2_ac): Likewise.
(*extendhisi2_i): Add r/Uex alternative, supply length for r/m and
r/Uex alternative.
(movqi_insn): Add r/Ucm and Ucm/?Rac alternatives.
(movhi_insn): Likewise.
(movsi_insn): Add r/Ucm,Ucm/w alternatives.
(*zero_extendqihi2_i): Add r/Ucm alternative.
(*zero_extendqisi2_ac): Likewise.
(*zero_extendhisi2_i): Likewise.
* config/arc/constraints.md (Uex): New memory constraint.
(Ucm): New define_constraint.
* config/arc/predicates.md (long_immediate_loadstore_operand):
Return 0 for MEM with cmem_address address.
(cmem_address_0): New predicates.
(cmem_address_1): Likewise.
(cmem_address_2): Likewise.
(cmem_address): Likewise.
gcc/testsuite:
* gcc.target/arc/cmem-1.c: New file.
* gcc.target/arc/cmem-2.c: New file.
* gcc.target/arc/cmem-3.c: New file.
* gcc.target/arc/cmem-4.c: New file.
* gcc.target/arc/cmem-5.c: New file.
* gcc.target/arc/cmem-6.c: New file.
* gcc.target/arc/cmem-7.c: New file.
* gcc.target/arc/cmem-ld.inc: New file.
* gcc.target/arc/cmem-st.inc: New file.
Co-Authored-By: Andrew Burgess <andrew.burgess@embecosm.com>
From-SVN: r235590
2016-04-28 19:21:42 +01:00
Segher Boessenkool
c0b47f4bf9
rs6000: Rename insn_chain_scanned_p to spe_insn_chain_scanned_p
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This makes it clearer this field is only for SPE.
* config/rs6000/rs6000.c (machine_function): Rename
insn_chain_scanned_p to spe_insn_chain_scanned_p.
(rs6000_stack_info): Adjust.
From-SVN: r235588
2016-04-28 19:51:19 +02:00
Andrew Burgess
c20ef9d233
constraints.md (Usd): Convert to define_constraint.
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2016-04-28 Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/constraints.md (Usd): Convert to define_constraint.
(Us<): Likewise.
(Us>): Likewise.
From-SVN: r235587
2016-04-28 18:16:05 +01:00
Jakub Jelinek
81262dad15
re PR target/70821 (x86_64: __atomic_fetch_add/sub() uses XADD rather than DECL in some cases)
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PR target/70821
* config/i386/sync.md (define_peephole2 *atomic_fetch_add_cmp<mode>):
Add new peephole2 where the first insn is *mov<mode>_or instead of
*mov<mode>_internal.
* gcc.target/i386/pr70821.c: New test.
From-SVN: r235586
2016-04-28 19:10:14 +02:00
Segher Boessenkool
7ff75c4966
tracer: Make bb_seen static
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bb_seen is not used outside of tracer.c.
* tracer.c (bb_seen): Make static.
From-SVN: r235585
2016-04-28 19:08:39 +02:00
Andrew Burgess
87c509e078
arc-common.c (arc_handle_option): Add NPS400 support, setup defaults.
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2016-04-28 Andrew Burgess <andrew.burgess@embecosm.com>
* common/config/arc/arc-common.c (arc_handle_option): Add NPS400
support, setup defaults.
* config/arc/arc-opts.h (enum processor_type): Add NPS400.
* config/arc/arc.c (arc_init): Add NPS400 support.
* config/arc/arc.h (CPP_SPEC): Add NPS400 defines.
(TARGET_ARC700): NPS400 is also an ARC700.
* config/arc/arc.opt: Add NPS400 options to -mcpu=.
From-SVN: r235584
2016-04-28 17:59:18 +01:00
Segher Boessenkool
9759608c89
nds32: Fix casesi (PR70668)
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Expanders do not have more elements in the operands array than declared
in the pattern. So, we cannot use operands[5] here. Instead just
declare and use another rtx.
PR target/70668
* config/nds32/nds32.md (casesi): Don't access the operands array
out of bounds.
From-SVN: r235583
2016-04-28 18:50:41 +02:00
Uros Bizjak
e41ebdf1c8
i386.md (zeroing peephole2): Use general_reg_operand.
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* config/i386/i386.md (zeroing peephole2): Use general_reg_operand.
(or $-1,reg peephole2): Ditto.
(strict_low_part zeroing peephole2): Use SWI12 mode iterator.
From-SVN: r235581
2016-04-28 18:35:03 +02:00