Typedefs are streamed by streaming the underlying type, and then
recreating the typedef. But this breaks checking a duplicate is the
same as the original when it is a template alias -- we end up checking
a template alias (eg __void_t) against the underlying type (void).
And those are not the same template alias. This stops pretendig that
the underlying type is the typedef for that checking and tells
is_matching_decl 'you have a typedef', so it knows what to do. (We do
not want to recreate the typedef of the duplicate, because that whole
set of nodes is going to go away.)
PR c++/98770
gcc/cp/
* module.cc (trees_out::decl_value): Swap is_typedef & TYPE_NAME
check order.
(trees_in::decl_value): Do typedef frobbing only when installing
a new typedef, adjust is_matching_decl call. Swap is_typedef
& TYPE_NAME check.
(trees_in::is_matching_decl): Add is_typedef parm. Adjust variable
names and deal with typedef checking.
gcc/testsuite/
* g++.dg/modules/pr98770_a.C: New.
* g++.dg/modules/pr98770_b.C: New.
This patch reimplements the vshrn_high_n* intrinsics that generate the
SHRN2 instruction.
It is a vec_concat of the narrowing shift with the bottom part of the
destination register, so we need a little-endian and a big-endian version and an expander to
pick between them.
gcc/ChangeLog:
* config/aarch64/aarch64-simd-builtins.def (shrn2): Define
builtin.
* config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le):
Define.
(aarch64_shrn2<mode>_insn_be): Likewise.
(aarch64_shrn2<mode>): Likewise.
* config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement
using builtins.
(vshrn_high_n_s32): Likewise.
(vshrn_high_n_s64): Likewise.
(vshrn_high_n_u16): Likewise.
(vshrn_high_n_u32): Likewise.
(vshrn_high_n_u64): Likewise.
This patch reimplements the vshrn_n* intrinsics to use RTL builtins.
These perform a narrowing right shift.
Although the intrinsic generates the half-width mode (e.g. V8HI ->
V8QI), the new pattern generates a full 128-bit mode (V8HI -> V16QI) by representing the
fill-with-zeroes semantics of the SHRN instruction. The narrower (V8QI) result is extracted with a
lowpart subreg.
I found this allows the RTL optimisers to do a better job at optimising
redundant moves away in frequently-occurring SHRN+SRHN2 pairs, like in:
uint8x16_t
foo (uint16x8_t in1, uint16x8_t in2)
{
uint8x8_t tmp = vshrn_n_u16 (in2, 7);
uint8x16_t tmp2 = vshrn_high_n_u16 (tmp, in1, 4);
return tmp2;
}
gcc/ChangeLog:
* config/aarch64/aarch64-simd-builtins.def (shrn): Define
builtin.
* config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le):
Define.
(aarch64_shrn<mode>_insn_be): Likewise.
(aarch64_shrn<mode>): Likewise.
* config/aarch64/arm_neon.h (vshrn_n_s16): Reimplement using
builtins.
(vshrn_n_s32): Likewise.
(vshrn_n_s64): Likewise.
(vshrn_n_u16): Likewise.
(vshrn_n_u32): Likewise.
(vshrn_n_u64): Likewise.
* config/aarch64/iterators.md (vn_mode): New mode attribute.
The latest fix introduced a comparison of executables and this cannot
directly work on Windows because they are timestamped. Moreover nobody
sets $(exeext) at top level, at least on MinGW, so you get weird behavior
because some tools add the implicit .exe suffix and others do not.
contrib/
PR lto/85574
* compare-lto: Deal with PE-COFF executables specifically.
gfc_call_malloc should malloc an area of size 1 if no size given.
gcc/fortran/ChangeLog:
PR fortran/86470
* trans.c (gfc_call_malloc): Allocate area of size 1 if passed
size is NULL (as documented).
gcc/testsuite/ChangeLog:
PR fortran/86470
* gfortran.dg/gomp/pr86470.f90: New test.
I've noticed we still refer to C++20 as draft standard, and there is a pasto
in C++23 description.
2021-01-28 Jakub Jelinek <jakub@redhat.com>
* c.opt (-std=c++2a, -std=c++20, -std=gnu++2a, -std=gnu++20): Remove
draft from description.
(-std=c++2b): Fix a pasto, 2020 -> 2023.
The following avoids repeatedly turning VALUE RTXen into
sth useful and re-applying a constant offset through get_addr
via DSE check_mem_read_rtx. Instead perform this once for
all stores to be visited in check_mem_read_rtx. This avoids
allocating 1.6GB of garbage PLUS RTXen on the PR80960
testcase, fixing the memory usage regression from old GCC.
2021-01-27 Richard Biener <rguenther@suse.de>
PR rtl-optimization/80960
* dse.c (check_mem_read_rtx): Call get_addr on the
offsetted address.
UNSPEC_SI_FROM_SF is not supported when TARGET_DIRECT_MOVE_64BIT
is false for -m32, don't generate VIEW_CONVERT_EXPR(ARRAY_REF) for
variable vector insert. Remove rs6000_expand_vector_set_var helper
function, adjust the p8 and p9 definitions position and make them
static.
The previous commit r11-6858 missed check m32, This patch is tested pass
on P7BE{m32,m64}/P8BE{m32,m64}/P8LE/P9LE with
RUNTESTFLAGS="--target_board =unix'{-m32,-m64}'" for BE targets.
gcc/ChangeLog:
2021-01-27 Xionghu Luo <luoxhu@linux.ibm.com>
David Edelsohn <dje.gcc@gmail.com>
PR target/98799
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Don't generate VIEW_CONVERT_EXPR for fcode ALTIVEC_BUILTIN_VEC_INSERT
when -m32.
* config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
Delete.
* config/rs6000/rs6000.c (rs6000_expand_vector_set): Remove the
wrapper call rs6000_expand_vector_set_var for cleanup. Call
rs6000_expand_vector_set_var_p9 and rs6000_expand_vector_set_var_p8
directly.
(rs6000_expand_vector_set_var): Delete.
(rs6000_expand_vector_set_var_p9): Make static.
(rs6000_expand_vector_set_var_p8): Make static.
gcc/testsuite/ChangeLog:
2021-01-27 Xionghu Luo <luoxhu@linux.ibm.com>
PR target/98827
* gcc.target/powerpc/fold-vec-insert-char-p8.c: Adjust ilp32.
* gcc.target/powerpc/fold-vec-insert-char-p9.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-double.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-float-p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-float-p9.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-int-p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-longlong.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-short-p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-short-p9.c: Likewise.
* gcc.target/powerpc/pr79251.p8.c: Likewise.
* gcc.target/powerpc/pr79251.p9.c: Likewise.
* gcc.target/powerpc/vsx-builtin-7.c: Likewise.
* gcc.target/powerpc/pr79251-run.c: Build and run with vsx
option.
This patch fixes -march option parsing when `p` extension exists,
e.g., -march=rv64imafdcp should produce
.attribute arch, "rv64i2p0_m2p0_a2p0_f2p0_d2p0_c2p0_p"
rather than
.attribute arch, "rv64i2p0_m2p0_a2p0_f2p0_d2p0_c_p"
gcc/ChangeLog:
* common/config/riscv/riscv-common.c
(riscv_subset_list::parsing_subset_version): Fix -march option parsing
when `p` extension exists.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/attribute-18.c: New test.
update_equiv_regs can use reg classes of pseudos and they are set up in
register pressure sensitive scheduling and loop invariant motion and in
live range shrinking. This info can become obsolete if we add new pseudos
since the last set up. Recalculate it again if the new pseudos were
added.
gcc/ChangeLog:
PR rtl-optimization/97684
* ira.c (ira): Call ira_set_pseudo_classes before
update_equiv_regs when it is necessary.
gcc/testsuite/ChangeLog:
PR rtl-optimization/97684
* gcc.target/i386/pr97684.c: New.
The handling of dependent scopes and unsuitable scopes in lookup_using_decl
was a bit convoluted; I tweaked it for a while and then eventually
reorganized much of the function to hopefully be clearer. Along the way I
noticed a couple of ways we were mishandling inherited constructors.
The local binding for a dependent using is the USING_DECL.
Implement instantiation of a dependent USING_DECL at function scope.
gcc/cp/ChangeLog:
PR c++/97874
* name-lookup.c (lookup_using_decl): Clean up handling
of dependency and inherited constructors.
(finish_nonmember_using_decl): Handle DECL_DEPENDENT_P.
* pt.c (tsubst_expr): Handle DECL_DEPENDENT_P.
gcc/testsuite/ChangeLog:
PR c++/97874
* g++.dg/lookup/using4.C: No error in C++20.
* g++.dg/cpp0x/decltype37.C: Adjust message.
* g++.dg/template/crash75.C: Adjust message.
* g++.dg/template/crash76.C: Adjust message.
* g++.dg/cpp0x/inh-ctor36.C: New test.
* g++.dg/cpp1z/inh-ctor39.C: New test.
* g++.dg/cpp2a/using-enum-7.C: New test.
The https://gcc.gnu.org/legacy-ml/gcc-patches/2018-07/msg01895.html
patch that introduced this pattern claimed:
Would generate:
combine_balanced_int:
bfxil w0, w1, 0, 16
uxtw x0, w0
ret
But with this patch generates:
combine_balanced_int:
bfxil w0, w1, 0, 16
ret
and it is indeed what it should generate, but it doesn't do that,
it emits bfxil x0, x1, 0, 16
instead which doesn't zero extend from 32 to 64 bits, but preserves
the bits from the destination register.
2021-01-27 Jakub Jelinek <jakub@redhat.com>
PR target/98853
* config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use
%w0, %w1 and %2 instead of %0, %1 and %2.
* gcc.c-torture/execute/pr98853-1.c: New test.
* gcc.c-torture/execute/pr98853-2.c: New test.
This patch adds the first batch of patterns to support p10 fusion. These
will allow combine to create a single insn for a pair of instructions
that power10 can fuse and execute. These particular fusion pairs have the
requirement that only cr0 can be used when fusing a load with a compare
immediate of -1/0/1 (if signed) or 0/1 (if unsigned), so we want combine
to put that requirement in, and if it doesn't work out the splitter
can change it back into 2 insns so scheduling can move them apart.
The patterns are generated by a script genfusion.pl and live in new file
fusion.md. This script will be expanded to generate more patterns for
fusion.
This also adds option -mpower10-fusion which defaults on for power10 and
will gate all these fusion patterns. In addition I have added an
undocumented option -mpower10-fusion-ld-cmpi (which may be removed later)
that just controls the load+compare-immediate patterns. I have made
these default on for power10 but they are not disallowed for earlier
processors because it is still valid code. This allows us to test the
correctness of fusion code generation by turning it on explicitly.
gcc/ChangeLog:
* config/rs6000/genfusion.pl: New script to generate
define_insn_and_split patterns so combine can arrange fused
instructions next to each other.
* config/rs6000/fusion.md: New file, generated fused instruction
patterns for combine.
* config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
(non_update_memory_operand): New predicate.
* config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
POWERPC_MASKS.
* config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
prototype.
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Automatically set OPTION_MASK_P10_FUSION and
OPTION_MASK_P10_FUSION_LD_CMPI if target is power10.
(rs600_opt_masks): Allow -mpower10-fusion
in function attributes.
(address_is_non_pfx_d_or_x): New function.
* config/rs6000/rs6000.h: Add MASK_P10_FUSION.
* config/rs6000/rs6000.md: Include fusion.md.
* config/rs6000/rs6000.opt: Add -mpower10-fusion
and -mpower10-fusion-ld-cmpi.
* config/rs6000/t-rs6000: Add dependencies involving fusion.md.
Bash and GNU echo do not interpret backslash escapes by default, so use
printf when printing \n or \t in strings.
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/generate_makefile.sh: Use printf
instead of echo when printing escape characters.
Add a new check-simd target to the testsuite. The new target creates a
subdirectory, generates the necessary Makefiles, and spawns submakes to
build and run the tests. Running this testsuite with defaults on my
machine takes half of the time the dejagnu testsuite required to only
determine whether to run tests. Since the simd testsuite integrated in
dejagnu increased the time of the whole libstdc++ testsuite by ~100%
this approach is a compromise for speed while not sacrificing coverage
too much. Since the test driver is invoked individually per test
executable from a Makefile, make's jobserver (-j) trivially parallelizes
testing.
Testing different flags and with simulator (or remote execution) is
possible. E.g. `make check-simd DRIVEROPTS=-q
target_list="unix{-m64,-m32}{-march=sandybridge,-march=skylake-avx512}{,-
ffast-math}"`
runs the testsuite 8 times in different subdirectories, using 8
different combinations of compiler flags, only outputs failing tests
(-q), and prints all summaries at the end. It skips most ABI tags by
default unless --run-expensive is passed to DRIVEROPTS or
GCC_TEST_RUN_EXPENSIVE is not empty.
To use a simulator, the CHECK_SIMD_CONFIG variable needs to point to a
shell script which calls `define_target <name> <flags> <simulator>` and
set target_list as needed. E.g.:
case "$target_triplet" in
x86_64-*)
target_list="unix{-march=sandybridge,-march=skylake-avx512}
;;
powerpc64le-*)
define_target power8 "-static -mcpu=power8" "/usr/bin/qemu-ppc64le -cpu
power8"
define_target power9 -mcpu=power9 "$HOME/bin/run_on_gcc135"
target_list="power8 power9{,-ffast-math}"
;;
esac
libstdc++-v3/ChangeLog:
* scripts/check_simd: New file. This script is called from the
the check-simd target. It determines a set of compiler flags and
simulator setups for calling generate_makefile.sh and passes the
information back to the check-simd target, which recurses to the
generated Makefiles.
* scripts/create_testsuite_files: Remove files below simd/tests/
from testsuite_files and place them in testsuite_files_simd.
* testsuite/Makefile.am: Add testsuite_files_simd. Add
check-simd target.
* testsuite/Makefile.in: Regenerate.
* testsuite/experimental/simd/driver.sh: New file. This script
compiles and runs a given simd test, logging its output and
status. It uses the timeout command to implement compile and
test timeouts.
* testsuite/experimental/simd/generate_makefile.sh: New file.
This script generates a Makefile which uses driver.sh to compile
and run the tests and collect the logs into a single log file.
* testsuite/experimental/simd/tests/abs.cc: New file. Tests
abs(simd).
* testsuite/experimental/simd/tests/algorithms.cc: New file.
Tests min/max(simd, simd).
* testsuite/experimental/simd/tests/bits/conversions.h: New
file. Contains functions to support tests involving conversions.
* testsuite/experimental/simd/tests/bits/make_vec.h: New file.
Support functions make_mask and make_vec.
* testsuite/experimental/simd/tests/bits/mathreference.h: New
file. Support functions to supply precomputed math function
reference data.
* testsuite/experimental/simd/tests/bits/metahelpers.h: New
file. Support code for SFINAE testing.
* testsuite/experimental/simd/tests/bits/simd_view.h: New file.
* testsuite/experimental/simd/tests/bits/test_values.h: New
file. Test functions to easily drive a test with simd objects
initialized from a given list of values and a range of random
values.
* testsuite/experimental/simd/tests/bits/ulp.h: New file.
Support code to determine the ULP distance of simd objects.
* testsuite/experimental/simd/tests/bits/verify.h: New file.
Test framework for COMPARE'ing simd objects and instantiating
the test templates with value_type and ABI tag.
* testsuite/experimental/simd/tests/broadcast.cc: New file. Test
simd broadcasts.
* testsuite/experimental/simd/tests/casts.cc: New file. Test
simd casts.
* testsuite/experimental/simd/tests/fpclassify.cc: New file.
Test floating-point classification functions.
* testsuite/experimental/simd/tests/frexp.cc: New file. Test
frexp(simd).
* testsuite/experimental/simd/tests/generator.cc: New file. Test
simd generator constructor.
* testsuite/experimental/simd/tests/hypot3_fma.cc: New file.
Test 3-arg hypot(simd,simd,simd) and fma(simd,simd,sim).
* testsuite/experimental/simd/tests/integer_operators.cc: New
file. Test integer operators.
* testsuite/experimental/simd/tests/ldexp_scalbn_scalbln_modf.cc:
New file. Test ldexp(simd), scalbn(simd), scalbln(simd), and
modf(simd).
* testsuite/experimental/simd/tests/loadstore.cc: New file. Test
(converting) simd loads and stores.
* testsuite/experimental/simd/tests/logarithm.cc: New file. Test
log*(simd).
* testsuite/experimental/simd/tests/mask_broadcast.cc: New file.
Test simd_mask broadcasts.
* testsuite/experimental/simd/tests/mask_conversions.cc: New
file. Test simd_mask conversions.
* testsuite/experimental/simd/tests/mask_implicit_cvt.cc: New
file. Test simd_mask implicit conversions.
* testsuite/experimental/simd/tests/mask_loadstore.cc: New file.
Test simd_mask loads and stores.
* testsuite/experimental/simd/tests/mask_operator_cvt.cc: New
file. Test simd_mask operators convert as specified.
* testsuite/experimental/simd/tests/mask_operators.cc: New file.
Test simd_mask compares, subscripts, and negation.
* testsuite/experimental/simd/tests/mask_reductions.cc: New
file. Test simd_mask reductions.
* testsuite/experimental/simd/tests/math_1arg.cc: New file. Test
1-arg math functions on simd.
* testsuite/experimental/simd/tests/math_2arg.cc: New file. Test
2-arg math functions on simd.
* testsuite/experimental/simd/tests/operator_cvt.cc: New file.
Test implicit conversions on simd binary operators behave as
specified.
* testsuite/experimental/simd/tests/operators.cc: New file. Test
simd compares, subscripts, not, unary minus, plus, minus,
multiplies, divides, increment, and decrement.
* testsuite/experimental/simd/tests/reductions.cc: New file.
Test reduce(simd).
* testsuite/experimental/simd/tests/remqo.cc: New file. Test
remqo(simd).
* testsuite/experimental/simd/tests/simd.cc: New file. Basic
sanity checks of simd types.
* testsuite/experimental/simd/tests/sincos.cc: New file. Test
sin(simd) and cos(simd).
* testsuite/experimental/simd/tests/split_concat.cc: New file.
Test split(simd) and concat(simd, simd).
* testsuite/experimental/simd/tests/splits.cc: New file. Test
split(simd_mask).
* testsuite/experimental/simd/tests/trigonometric.cc: New file.
Test remaining trigonometric functions on simd.
* testsuite/experimental/simd/tests/trunc_ceil_floor.cc: New
file. Test trunc(simd), ceil(simd), and floor(simd).
* testsuite/experimental/simd/tests/where.cc: New file. Test
masked operations using where.
Adds <experimental/simd>.
This implements the simd and simd_mask class templates via
[[gnu::vector_size(N)]] data members. It implements overloads for all of
<cmath> for simd. Explicit vectorization of the <cmath> functions is not
finished.
The majority of functions are marked as [[gnu::always_inline]] to enable
quasi-ODR-conforming linking of TUs with different -m flags.
Performance optimization was done for x86_64. ARM, Aarch64, and POWER
rely on the compiler to recognize reduction, conversion, and shuffle
patterns.
Besides verification using many different machine flages, the code was
also verified with different fast-math flags.
libstdc++-v3/ChangeLog:
* doc/xml/manual/status_cxx2017.xml: Add implementation status
of the Parallelism TS 2. Document implementation-defined types
and behavior.
* include/Makefile.am: Add new headers.
* include/Makefile.in: Regenerate.
* include/experimental/simd: New file. New header for
Parallelism TS 2.
* include/experimental/bits/numeric_traits.h: New file.
Implementation of P1841R1 using internal naming. Addition of
missing IEC559 functionality query.
* include/experimental/bits/simd.h: New file. Definition of the
public simd interfaces and general implementation helpers.
* include/experimental/bits/simd_builtin.h: New file.
Implementation of the _VecBuiltin simd_abi.
* include/experimental/bits/simd_converter.h: New file. Generic
simd conversions.
* include/experimental/bits/simd_detail.h: New file. Internal
macros for the simd implementation.
* include/experimental/bits/simd_fixed_size.h: New file. Simd
fixed_size ABI specific implementations.
* include/experimental/bits/simd_math.h: New file. Math
overloads for simd.
* include/experimental/bits/simd_neon.h: New file. Simd NEON
specific implementations.
* include/experimental/bits/simd_ppc.h: New file. Implement bit
shifts to avoid invalid results for integral types smaller than
int.
* include/experimental/bits/simd_scalar.h: New file. Simd scalar
ABI specific implementations.
* include/experimental/bits/simd_x86.h: New file. Simd x86
specific implementations.
* include/experimental/bits/simd_x86_conversions.h: New file.
x86 specific conversion optimizations. The conversion patterns
work around missing conversion patterns in the compiler and
should be removed as soon as PR85048 is resolved.
* testsuite/experimental/simd/standard_abi_usable.cc: New file.
Test that all (not all fixed_size<N>, though) standard simd and
simd_mask types are usable.
* testsuite/experimental/simd/standard_abi_usable_2.cc: New
file. As above but with -ffast-math.
* testsuite/libstdc++-dg/conformance.exp: Don't build simd tests
from the standard test loop. Instead use
check_vect_support_and_set_flags to build simd tests with the
relevant machine flags.
This avoids cases of PHI node vectorization that just causes us
to insert vector CTORs inside loops for values only required
outside of the loop.
2021-01-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/98854
* tree-vect-slp.c (vect_build_slp_tree_2): Also build
PHIs from scalars when the number of CTORs matches the
number of children.
* gcc.dg/vect/bb-slp-pr98854.c: New testcase.
This reuses the code from std::string::find, which was improved by
r244225, but string_view was not changed to match.
libstdc++-v3/ChangeLog:
PR libstdc++/66414
* include/bits/string_view.tcc
(basic_string_view::find(const CharT*, size_type, size_type)):
Optimize.
This implements WG21 P1679R3, adding contains member functions to
basic_string_view and basic_string.
libstdc++-v3/ChangeLog:
* include/bits/basic_string.h (basic_string::contains): New
member functions.
* include/std/string_view (basic_string_view::contains):
Likewise.
* include/std/version (__cpp_lib_string_contains): Define.
* testsuite/21_strings/basic_string/operations/starts_with/char/1.cc:
Remove trailing whitespace.
* testsuite/21_strings/basic_string/operations/starts_with/wchar_t/1.cc:
Likewise.
* testsuite/21_strings/basic_string/operations/contains/char/1.cc: New test.
* testsuite/21_strings/basic_string/operations/contains/wchar_t/1.cc: New test.
* testsuite/21_strings/basic_string_view/operations/contains/char/1.cc: New test.
* testsuite/21_strings/basic_string_view/operations/contains/char/2.cc: New test.
* testsuite/21_strings/basic_string_view/operations/contains/wchar_t/1.cc: New test.
2021-01-27 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/93924
PR fortran/93925
* trans-expr.c (gfc_conv_procedure_call): Suppress the call to
gfc_conv_intrinsic_to_class for unlimited polymorphic procedure
pointers.
(gfc_trans_assignment_1): Similarly suppress class assignment
for class valued procedure pointers.
gcc/testsuite/
PR fortran/93924
PR fortran/93925
* gfortran.dg/proc_ptr_52.f90 : New test.
On Linux, GCC emits .note.GNU-stack sections when compiling code to mark
the code as not needing or needing executable stack, missing section means
unknown. But assembly files need to be marked manually. We already
mark various *.S files in libgcc manually, but the
avx_resms64f.o
avx_resms64fx.o
avx_resms64.o
avx_resms64x.o
avx_savms64f.o
avx_savms64.o
sse_resms64f.o
sse_resms64fx.o
sse_resms64.o
sse_resms64x.o
sse_savms64f.o
sse_savms64.o
files aren't marked, so when something links it in, it will require
executable stack. Nothing in the assembly requires executable stack though.
2021-01-27 Jakub Jelinek <jakub@redhat.com>
* config/i386/savms64.h: Add .note.GNU-stack section on Linux.
* config/i386/savms64f.h: Likewise.
* config/i386/resms64.h: Likewise.
* config/i386/resms64f.h: Likewise.
* config/i386/resms64x.h: Likewise.
* config/i386/resms64fx.h: Likewise.
This patch drops the no-strict-aliasing hack in m128-check.h and instead
ensures the tests read objects with the right dynamic type.
2021-01-27 Jakub Jelinek <jakub@redhat.com>
* gcc.target/i386/m128-check.h (CHECK_EXP): Remove
optimize ("no-strict-aliasing") attribute.
* gcc.target/i386/sse-andnps-1.c (TEST): Copy e into float[4]
array to avoid violating TBAA.
* gcc.target/i386/sse2-andpd-1.c (TEST): Copy e.d into double[2]
array to avoid violating TBAA.
* gcc.target/i386/sse-andps-1.c (TEST): Copy e.f into float[4]
array to avoid violating TBAA.
* gcc.target/i386/sse2-andnpd-1.c (TEST): Copy e into double[2]
array to avoid violating TBAA.
2021-01-27 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/98472
* trans-array.c (gfc_conv_expr_descriptor): Include elemental
procedure pointers in the assert under the comment 'elemental
function' and eliminate the second, spurious assert.
gcc/testsuite/
PR fortran/98472
* gfortran.dg/elemental_function_5.f90 : New test.
PROP_trees actually means GIMPLE IL, rather than GENERIC, so better
not to confuse users.
2021-01-27 Jakub Jelinek <jakub@redhat.com>
* tree-pass.h (PROP_trees): Rename to ...
(PROP_gimple): ... this.
* cfgexpand.c (pass_data_expand): Replace PROP_trees with PROP_gimple.
* passes.c (execute_function_dump, execute_function_todo,
execute_one_ipa_transform_pass, execute_one_pass): Likewise.
* varpool.c (ctor_for_folding): Likewise.
In 4.8 and earlier we used to fold the following to 0 during GENERIC folding,
but we don't do that anymore because ctor_for_folding etc. has been turned into a
GIMPLE centric API, but as the testcase shows, it is invoked even during
GENERIC folding and there the automatic vars still should have meaningful
initializers. I've verified that the C++ FE drops TREE_READONLY on
automatic vars with const qualified types if they require non-constant
(runtime) initialization.
2021-01-27 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/97260
* varpool.c: Include tree-pass.h.
(ctor_for_folding): In GENERIC return DECL_INITIAL for TREE_READONLY
non-TREE_SIDE_EFFECTS automatic variables.
* gcc.dg/tree-ssa/pr97260.c: New test.
Derived from the changes that added C++2a support in 2017.
r8-3237-g026a79f70cf33f836ea5275eda72d4870a3041e5
No C++23 features are added here.
Use of -std=c++23 sets __cplusplus to 202100L.
$ g++ -std=c++23 -dM -E -x c++ - < /dev/null | grep cplusplus
#define __cplusplus 202100L
gcc/
* doc/cpp.texi (__cplusplus): Document value for -std=c++23
or -std=gnu++23.
* doc/invoke.texi: Document -std=c++23 and -std=gnu++23.
* dwarf2out.c (highest_c_language): Recognise C++20 and C++23.
(gen_compile_unit_die): Recognise C++23.
gcc/c-family/
* c-common.h (cxx_dialect): Add cxx23 as a dialect.
* c.opt: Add options for -std=c++23, std=c++2b, -std=gnu++23
and -std=gnu++2b
* c-opts.c (set_std_cxx23): New.
(c_common_handle_option): Set options when -std=c++23 is enabled.
(c_common_post_options): Adjust comments.
(set_std_cxx20): Likewise.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_c++2a):
Check for C++2a or C++23.
(check_effective_target_c++20_down): New.
(check_effective_target_c++23_only): New.
(check_effective_target_c++23): New.
* g++.dg/cpp23/cplusplus.C: New.
libcpp/
* include/cpplib.h (c_lang): Add CXX23 and GNUCXX23.
* init.c (lang_defaults): Add rows for CXX23 and GNUCXX23.
(cpp_init_builtins): Set __cplusplus to 202100L for C++23.
In this testcase, we refer to the a parameter through a reference in its own
member, which we asserted couldn't happen by marking the parameter as
'restrict'. This assumption could also be broken if the address escapes
from the constructor.
gcc/cp/ChangeLog:
PR c++/97474
* call.c (type_passed_as): Don't mark invisiref restrict.
gcc/testsuite/ChangeLog:
PR c++/97474
* g++.dg/torture/pr97474.C: New test.
In the discussion of PR98463, Jakub pointed out that in C++17 and up,
cxx_fold_indirect_ref_1 could use the field we build for an empty base. I
tried implementing that, but it broke one of the tuple tests, so I did some
more digging.
To start with, I generalized the PR98463 patch to handle the case where we
do have a field, for an empty base or [[no_unique_address]] member. This is
enough also for the no-field case because the member of the empty base must
itself be an empty field; if it weren't, the base would not be empty.
I looked for related PRs and found 97566, which was also fixed by the patch.
After some poking around to figure out why, I noticed that the testcase had
been breaking because E, though an empty class, has an ABI nvsize of one
byte, and we were giving the [[no_unique_address]] FIELD_DECL that
DECL_SIZE, whereas in build_base_field_1 empty base fields always get
DECL_SIZE zero, and various places were relying on that to recognize empty
fields. So I adjusted both the size and the checking. When I adjusted
check_bases I wondered if we were correctly handling bases with only empty
data members, but it appears we do.
I'm deferring the cxx_fold_indirect_ref_1 change until stage 1, as I don't
think it actually fixes anything.
gcc/cp/ChangeLog:
PR c++/97566
PR c++/98463
* class.c (layout_class_type): An empty field gets size 0.
(is_empty_field): New.
(check_bases): Check it.
* cp-tree.h (is_empty_field): Declare it.
* constexpr.c (cxx_eval_store_expression): Check it.
(cx_check_missing_mem_inits): Likewise.
* init.c (perform_member_init): Likewise.
* typeck2.c (process_init_constructor_record): Likewise.
gcc/testsuite/ChangeLog:
PR c++/97566
* g++.dg/cpp2a/no_unique_address10.C: New test.
* g++.dg/cpp2a/no_unique_address9.C: New test.
This patch drops the no-strict-aliasing hack in m128-check.h and instead
ensures the tests read objects with the right dynamic type.
2021-01-26 Jakub Jelinek <jakub@redhat.com>
* gcc.target/powerpc/m128-check.h (CHECK_EXP): Remove
optimize ("no-strict-aliasing") attribute.
* gcc.target/powerpc/sse-andnps-1.c (TEST): Copy e into float[4]
array to avoid violating TBAA.
* gcc.target/powerpc/sse2-andpd-1.c (TEST): Copy e.d into double[2]
array to avoid violating TBAA.
* gcc.target/powerpc/sse-andps-1.c (TEST): Copy e.f into float[4]
array to avoid violating TBAA.
* gcc.target/powerpc/sse2-andnpd-1.c (TEST): Copy e into double[2]
array to avoid violating TBAA.
This is the profiled bootstrap failure for s390x/Linux on the mainline,
which has been introduced by the modref pass but actually exposing an
existing issue in the maybe_pad_type function that is visible on s390x.
The issue is too weak a test for the addressability of the inner component.
gcc/ada/
Marius Hillenbrand <mhillen@linux.ibm.com>
PR ada/98228
* gcc-interface/utils.c (maybe_pad_type): Test the size of the new
packable type instead of its alignment for addressability's sake.
My recent dwarf2asm.c patch broke powerpc*-*-* bootstrap, while most target
define POINTER_SIZE to (cond ? cst1 : cst2) or constant, rs6000 defines
it to a variable, and the arbitrarily chosen type of that variable determines
whether we get warnings on comparison of that against signed or unsigned
ints.
Fixed by adding a cast.
2021-01-26 Jakub Jelinek <jakub@redhat.com>
PR bootstrap/98839
* dwarf2asm.c (dw2_assemble_integer): Cast DWARF2_ADDR_SIZE to int
in comparison.
The testcase in the patch doesn't assemble, because the instruction requires
that the penultimate operand (lsb) range is [0, 32] (or [0, 64]) and the last
operand's range is [1, 32 - lsb] (or [1, 64 - lsb]).
The INTVAL (shft_amnt) < GET_MODE_BITSIZE (mode) will accept the lsb operand
to be in range [MIN, 32] (or [MIN, 64]) and then we invoke UB in the
compiler and sometimes it will make it through.
The patch changes all the INTVAL uses in that function to UINTVAL,
which isn't strictly necessary, but can be done (e.g. after the
UINTVAL (shft_amnt) < GET_MODE_BITSIZE (mode) check we know it is not
negative and thus INTVAL (shft_amnt) and UINTVAL (shft_amnt) then behave the
same. But, I had to add INTVAL (mask) > 0 check in that case, otherwise we
risk (hypothetically) emitting instruction that doesn't assemble.
The problem is with masks that have the MSB bit set, while the instruction
can handle those, e.g.
ubfiz w1, w0, 13, 19
will do
(w0 << 13) & 0xffffe000
in RTL we represent SImode constants with MSB set as negative HOST_WIDE_INT,
so it will actually be HOST_WIDE_INT_C (0xffffffffffffe000), and
the instruction uses %P3 to print the last operand, which calls
asm_fprintf (f, "%u", popcount_hwi (INTVAL (x)))
to print that. But that will not print 19, but 51 instead, will include
there also all the copies of the sign bit.
Not supporting those masks with MSB set isn't a big loss though, they really
shouldn't appear normally, as both GIMPLE and RTL optimizations should
optimize those away (one isn't masking any bits off with such masks, so
just w0 << 13 will do too).
2021-01-26 Jakub Jelinek <jakub@redhat.com>
PR target/98681
* config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt)
and INTVAL (mask). Add && INTVAL (mask) > 0 condition.
* gcc.c-torture/execute/pr98681.c: New test.
This avoids dumping them as <<< ??? >>>.
2021-01-26 Richard Biener <rguenther@suse.de>
* gimple-pretty-print.c (dump_binary_rhs): Handle
VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR.
This fixes VECTOR_CST element access with POLY_INT elements and
allows to produce dump files of the PR98726 testcase without
ICEing.
2021-01-26 Richard Biener <rguenther@suse.de>
PR middle-end/98726
* tree.h (vector_cst_int_elt): Remove.
* tree.c (vector_cst_int_elt): Use poly_wide_int for computations,
make static.
libgcc/ChangeLog:
PR gcov-profile/98739
* libgcov.h (gcov_topn_add_value): Do not train when
we have a merged profile with a negative number of total
value.
