2017-07-29 00:46:05 +02:00
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# See docs/devel/tracing.txt for syntax documentation.
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2016-06-16 10:39:59 +02:00
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2020-03-11 23:18:42 +01:00
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# allwinner-cpucfg.c
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allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32
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allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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2020-03-11 23:18:43 +01:00
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# allwinner-sid.c
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allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32
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2020-03-11 23:18:42 +01:00
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2019-03-14 19:09:26 +01:00
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# eccmemctl.c
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 18:01:35 +02:00
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ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x"
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ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x"
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ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x"
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ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x"
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ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x"
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ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x"
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ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x"
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ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x"
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ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x"
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ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x"
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ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x"
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ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x"
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ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x"
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ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x"
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ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x"
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ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x"
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ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x"
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ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x"
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2016-06-16 10:39:59 +02:00
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2019-03-14 19:09:26 +01:00
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# slavio_misc.c
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2016-06-16 10:39:59 +02:00
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slavio_misc_update_irq_raise(void) "Raise IRQ"
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slavio_misc_update_irq_lower(void) "Lower IRQ"
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slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 18:01:35 +02:00
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slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x"
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slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x"
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slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x"
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slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x"
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slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x"
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slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x"
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slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x"
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slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x"
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slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x"
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slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x"
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apc_mem_writeb(uint32_t val) "Write power management 0x%02x"
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apc_mem_readb(uint32_t ret) "Read power management 0x%02x"
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slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x"
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slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x"
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slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x"
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slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x"
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2016-06-16 10:39:59 +02:00
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2019-03-14 19:09:26 +01:00
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# milkymist-hpdmc.c
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 18:01:35 +02:00
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milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
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milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x"
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2016-06-16 10:39:59 +02:00
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2019-03-14 19:09:26 +01:00
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# milkymist-pfpu.c
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trace-events: fix code style: print 0x before hex numbers
The only exception are groups of numers separated by symbols
'.', ' ', ':', '/', like 'ab.09.7d'.
This patch is made by the following:
> find . -name trace-events | xargs python script.py
where script.py is the following python script:
=========================
#!/usr/bin/env python
import sys
import re
import fileinput
rhex = '%[-+ *.0-9]*(?:[hljztL]|ll|hh)?(?:x|X|"\s*PRI[xX][^"]*"?)'
rgroup = re.compile('((?:' + rhex + '[.:/ ])+' + rhex + ')')
rbad = re.compile('(?<!0x)' + rhex)
files = sys.argv[1:]
for fname in files:
for line in fileinput.input(fname, inplace=True):
arr = re.split(rgroup, line)
for i in range(0, len(arr), 2):
arr[i] = re.sub(rbad, '0x\g<0>', arr[i])
sys.stdout.write(''.join(arr))
=========================
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Message-id: 20170731160135.12101-5-vsementsov@virtuozzo.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-31 18:01:35 +02:00
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milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
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milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x"
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2016-06-16 10:39:59 +02:00
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milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
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2016-06-27 16:37:33 +02:00
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2019-03-14 19:09:26 +01:00
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# aspeed_scu.c
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2016-06-27 16:37:33 +02:00
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aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32
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2017-07-17 14:36:08 +02:00
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2019-03-14 19:09:29 +01:00
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# mps2-scc.c
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2017-07-17 14:36:08 +02:00
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mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_scc_reset(void) "MPS2 SCC: reset"
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mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c"
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mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32
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mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32
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2017-09-20 22:17:34 +02:00
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2019-03-14 19:09:29 +01:00
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# mps2-fpgaio.c
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2018-03-02 11:45:39 +01:00
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mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset"
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mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c"
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2019-03-14 19:09:26 +01:00
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# msf2-sysreg.c
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2018-03-06 14:44:02 +01:00
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msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32
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msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32
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2017-09-20 22:17:34 +02:00
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msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register"
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2018-02-09 11:40:30 +01:00
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2019-03-14 19:09:26 +01:00
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# imx7_gpr.c
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2018-03-06 14:44:02 +01:00
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imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64
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imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64
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2018-02-09 19:51:39 +01:00
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2019-03-14 19:09:26 +01:00
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# mos6522.c
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2018-02-09 19:51:39 +01:00
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mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d"
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mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64
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mos6522_set_sr_int(void) "set sr_int"
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mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64
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mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x"
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2018-03-02 11:45:39 +01:00
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2020-01-17 15:09:29 +01:00
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# stm32f4xx_syscfg
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stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d"
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stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d"
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stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
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stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
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2020-01-17 15:09:29 +01:00
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# stm32f4xx_exti
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stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d"
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stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " "
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stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 ""
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2019-03-14 19:09:26 +01:00
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# tz-mpc.c
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2018-06-22 14:28:39 +02:00
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tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u"
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tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u"
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tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d"
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tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d"
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tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s"
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2018-06-22 14:28:40 +02:00
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tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64
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2018-06-22 14:28:39 +02:00
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2019-03-14 19:09:26 +01:00
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# tz-msc.c
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2018-08-24 14:17:43 +02:00
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tz_msc_reset(void) "TZ MSC: reset"
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tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d"
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tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d"
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tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d"
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tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d"
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tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked"
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2019-03-14 19:09:26 +01:00
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# tz-ppc.c
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2018-03-02 11:45:39 +01:00
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tz_ppc_reset(void) "TZ PPC: reset"
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tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d"
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tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d"
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tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d"
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tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d"
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tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d"
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tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d"
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2018-03-06 14:43:17 +01:00
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tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked"
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tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked"
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2018-03-02 11:45:39 +01:00
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2019-03-14 19:09:26 +01:00
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# iotkit-secctl.c
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2018-03-02 11:45:39 +01:00
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iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u"
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iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u"
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iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u"
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iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u"
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2018-08-16 15:05:28 +02:00
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2019-03-14 19:09:26 +01:00
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# imx6ul_ccm.c
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2019-09-16 11:51:20 +02:00
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ccm_entry(void) ""
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ccm_freq(uint32_t freq) "freq = %d"
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ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d"
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ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32
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ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32
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2018-08-24 14:17:42 +02:00
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2019-03-14 19:09:29 +01:00
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# iotkit-sysinfo.c
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2018-08-24 14:17:42 +02:00
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iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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2019-03-14 19:09:29 +01:00
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# iotkit-sysctl.c
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2018-08-24 14:17:42 +02:00
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iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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iotkit_sysctl_reset(void) "IoTKit SysCtl: reset"
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2019-02-01 15:55:43 +01:00
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2019-03-14 19:09:26 +01:00
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# armsse-cpuid.c
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2019-02-01 15:55:43 +01:00
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armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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2019-02-28 11:55:15 +01:00
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2019-03-14 19:09:26 +01:00
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# armsse-mhu.c
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2019-02-28 11:55:15 +01:00
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armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"
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2019-07-01 18:26:18 +02:00
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# aspeed_xdma.c
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aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64
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2019-09-26 19:34:15 +02:00
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# bcm2835_mbox.c
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bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
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bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64
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bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u"
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bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu"
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2019-12-19 21:14:38 +01:00
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# mac_via.c
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via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x"
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via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x"
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via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x"
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via1_rtc_internal_cmd(int cmd) "cmd=0x%02x"
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via1_rtc_cmd_invalid(int value) "value=0x%02x"
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via1_rtc_internal_time(uint32_t time) "time=0x%08x"
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via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x"
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via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x"
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via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u"
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via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x"
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via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x"
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via1_rtc_cmd_test_write(int value) "value=0x%02x"
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via1_rtc_cmd_wprotect_write(int value) "value=0x%02x"
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via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x"
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via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x"
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via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
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via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x"
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