Commit Graph

82 Commits

Author SHA1 Message Date
Richard Henderson
4a09d0bb34 target/openrisc: Rename the cpu from or32 to or1k
This is in keeping with the toolchain and or1ksim.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-02-14 08:14:58 +11:00
Max Filippov
8b912ff033 target/xtensa: tests: clean up interrupt tests
Don't use hardcoded software interrupt masks, use XCHAL macros.
Mask off timer interrupt bits that are not checked for.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:36:09 -08:00
Max Filippov
255d254382 target/xtensa: tests: add memctl test
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:01:56 -08:00
Max Filippov
0a362d0768 target/xtensa: tests: add ccount write tests
Check that CCOUNT SR is writable and that CCOMPARE timers are updated
when CCOUNT is written to.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:01:56 -08:00
Max Filippov
4f89b41c28 target/xtensa: tests: replace hardcoded interrupt masks
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:01:56 -08:00
Max Filippov
72b3b8f24a target/xtensa: tests: fix timer tests
Don't expect that CCOUNT increments are equal to the number of executed
instructions. Verify that timer interrupt does not fire before the
programmed CCOMPARE value and does fire after.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:01:56 -08:00
Max Filippov
122d302053 target/xtensa: tests: run tests with icount
Timer tests expect certain determinism in CCOUNT updates and timer
interrupts firing. Run QEMU with -icount to get deterministic results.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-01-15 13:01:56 -08:00
Thomas Huth
fcf5ef2ab5 Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part]
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part]
Acked-by: Michael Walle <michael@walle.cc> [lm32 part]
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part]
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part]
Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part]
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part]
Acked-by: Richard Henderson <rth@twiddle.net> [alpha part]
Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part]
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part]
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-12-20 21:52:12 +01:00
Paolo Bonzini
03514ac25c test-i386: fix bitrot for 64-bit
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-24 15:27:19 +02:00
Paolo Bonzini
72bd94c578 qemu-tech: move TCG test documentation to tests/tcg/README
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-10-07 10:05:30 +02:00
Rabin Vincent
4a58f35b79 tests: cris: add v17 ADDC test
Add a test for the newly implemented ADDC instruction in the v17 CRIS
CPU.

Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Rabin Vincent <rabinv@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-09-28 11:32:06 +02:00
Rabin Vincent
85b3ed1db5 tests: cris: remove check_time1
This test, borrowed from the GDB simulator test suite, checks that every
syscall increments the time returned by gettimeofday() by exactly 1 ms.
This is not guaranteed or even desirable on QEMU so remove this test.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Rabin Vincent <rabinv@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-09-28 10:48:07 +02:00
Rabin Vincent
d10a0102b3 tests: cris: remove openpf4 test
This test, borrowed from the GDB simulator test suite, is meant to test
the GDB simulator's --sysroot feature and always fails in QEMU.  Remove
it.  openpf3 tests the same sequence of system calls (without assuming
the precence of --sysroot).

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Rabin Vincent <rabinv@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-09-28 10:48:01 +02:00
Rabin Vincent
f278d5cbe5 tests: cris: fix syscall inline asm
Add the appropriate register constraints for the inline asm for the
write and exit system calls.  Without the correct constraints for the
write() function, correct failure messages are not printed succesfully
on newer version of GCC.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Rabin Vincent <rabinv@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-09-28 10:47:21 +02:00
Rabin Vincent
21ce148c7e tests: cris: force inlining
The CRIS tests expect that functions marked inline are always inline.
With newer versions of GCC, building them results warnings like the
following and spurious failures when they are run.

In file included from tests/tcg/cris/check_moveq.c:5:0:
tests/tcg/cris/crisutils.h:66:20: warning: inlining failed in call to
'cris_tst_cc.constprop.0': call is unlikely and code size would grow [-Winline]
tests/tcg/cris/check_moveq.c:28:13: warning: called from here [-Winline]

Use the always_inline attribute when building them to fix this.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Rabin Vincent <rabinv@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-09-28 10:45:44 +02:00
Markus Armbruster
a9c94277f0 Use #include "..." for our own headers, <...> for others
Tracked down with an ugly, brittle and probably buggy Perl script.

Also move includes converted to <...> up so they get included before
ours where that's obviously okay.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Tested-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12 16:19:16 +02:00
Stefan Weil
cb8d4c8f54 Fix some typos found by codespell
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-05-18 15:04:27 +03:00
Veronia Bahaa
f348b6d1a5 util: move declarations out of qemu-common.h
Move declarations out of qemu-common.h for functions declared in
utils/ files: e.g. include/qemu/path.h for utils/path.c.
Move inline functions out of qemu-common.h and into new files (e.g.
include/qemu/bcd.h)

Signed-off-by: Veronia Bahaa <veroniabahaa@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-22 22:20:17 +01:00
Markus Armbruster
c80f6e9caa Clean up includes some more
Manually drop redundant includes that scripts/clean-includes misses,
e.g. because they're hidden in generator programs, or they use the
wrong kind of delimiter.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-22 22:20:16 +01:00
Daniel P. Berrange
1618d2ae7f maint: remove unused include for signal.h
A number of files were including signal.h but not using any
of the functions it provides

Signed-off-by: Daniel P. Berrange <berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-11 10:21:38 +03:00
Max Filippov
85d36377e4 target-xtensa: test cross-page opcode
Alter cross-page TB test to also test cross-page opcode.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-12-17 05:49:32 +03:00
Max Filippov
09c7fbef76 target-xtensa: add entry overflow test
Check that entry instruction raises window overflow exception when
PS.CALLINC points to live registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-11-10 17:59:13 +03:00
Max Filippov
20303e42d4 target-xtensa: tests: pre-process tests linker script
Xtensa cores have configurable interrupt vectors and endiannes. This
information is needed to link executable images correctly for a specific
core configuration. Instead of hard-coding dc232 defaults pull endianness,
number of high-priority interrupts and location of vectors from the core
configuration and pass it through the C preprocessor.

While at it clean up tabs and align the initial stack on 16 bytes.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-11-03 00:51:43 +03:00
Peter Maydell
adbfc34103 Xtensa fixes queue 2014-05-26:
- fix cross-page jumps/calls at the end of TB;
 - add tests for TBs and instructions crossing page boundary.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJTgv1TAAoJEFH5zJH4P6BEiqkQAJMYDOMjp0b8tPMfo1STNLD+
 1QwPEGM55wE8poIYIAiop6xXGEkBihQD9G02xjWJrBgqxQUBgejysfgY7yv+k4Wz
 X5jf518EmLSwv27fuVRy8d05l2WXF+jIe6PzxRBX7o/YZQyjwC6w3KaDbVPr4JiX
 M5rgz0OQev8N0bJ7sKI50wCDSKdV38kfecMGfvz28CoOqh7aSonnpbJv3Eod8zQH
 +CRZnPc9i4gA+J97EhJiSbJ31SDTR4WjyHpCOahoyvIvtF+ilbVyGZzkdu892IJ2
 pRsNDiJIe3bNY+dcMvr/fv5zTdEGWwwEFXLmSyvcHjM/SE4d2q1wGg7HFodQh+4p
 hZtMW8BgLXeIkZXNWoZEVEDdqkYIO/guA/r75HuwrRFTmzWGJdz9dxIJ+nLCFgru
 KPF9+nesE47UMDtaJJsUa/jhaVrnzb+RHQAgc7sf2F8vgGiSdQdTyv/Cl7H2Djqf
 lUGOpfE9pVIOcomMcRUjx83l1zacmJjmH5/vkVwACBUieZ4zQOZn8/RfaJtCqrNa
 Hj/BXyWcrUi62/O8RAIcW2De7I0CrO8joN8EHeddCIvNsJRK/OFPXtRWJLliwpF8
 oQKNqMQXxf46pjoIV633zShLaS6fhgnSulcugYfEZDfpGLc/pGzJO6kJBoVbt0U8
 NKlrnc9x2wlqQejzHm6l
 =4dqX
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/xtensa/tags/20140526-xtensa' into staging

Xtensa fixes queue 2014-05-26:
- fix cross-page jumps/calls at the end of TB;
- add tests for TBs and instructions crossing page boundary.

# gpg: Signature made Mon 26 May 2014 09:37:39 BST using RSA key ID F83FA044
# gpg: Can't check signature: public key not found

* remotes/xtensa/tags/20140526-xtensa:
  target-xtensa: add tests for cross-page TB
  target-xtensa: completely clean TLB between MMU tests
  target-xtensa: fix cross-page jumps/calls at the end of TB

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-28 14:47:35 +01:00
Max Filippov
57a740514d target-xtensa: add tests for cross-page TB
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-05-26 12:33:54 +04:00
Max Filippov
ca3164df4d target-xtensa: completely clean TLB between MMU tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-05-26 12:33:54 +04:00
Michael Walle
4e7d30a22a test: lm32: use semihosting for testing
Instead of the lm32-sys device, use semihosting to print to the host
console and exit the test.

Signed-off-by: Michael Walle <michael@walle.cc>
2014-05-24 19:42:29 +02:00
Michael Walle
a946ce8020 test: lm32: make test cases independent
Make test cases independent from from each other. Eg. if a test case needs
a specific value in register A, don't rely on the fact that it is already
set by the preceding test case.

Signed-off-by: Michael Walle <michael@walle.cc>
2014-05-24 19:42:29 +02:00
Peter Maydell
ad0a118fa3 tests/tcg: Fix compilation of test_path
The test_path binary is (unlike the other test binaries in tests/tcg)
actually intended to be compiled with the same compiler used to build
the main QEMU executables. It actually #includes a number of the
QEMU source files in an attempt to unit-test the util/path.c functions,
and so if it is not compiled with the same compiler used by configure
to set CONFIG_ settings then it is liable to fail to build.
Fix the makefile to build it with the default C compiler rules, not
CC_I386, and fix the test itself not to include a lot of unnecessary
trace related source files which cause the build to fail if the trace
backend is anything other than 'simple'.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-05-07 21:00:43 +04:00
Stefan Weil
6d4adef48d tests: Fix 'make test' for i686 hosts (build regression)
'make test' is broken at least since commit
baacf04799. Several source files were moved
to util/, and some of them there split, so add the missing prefix and new
files to fix the compiler and linker errors.

There remain more issues, but these changes allow running the test on a
Linux i686 host.

Cc: qemu-stable@nongnu.org
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-03-15 13:54:18 +04:00
Max Filippov
2c09eee112 target-xtensa: add basic tests for cache opcodes
Test that non-locking prefetch operations don't cause exceptions on
missing TLB and that other 'hit' cache operations do.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24 04:47:02 +04:00
Max Filippov
a2e67072b7 target-xtensa: allow using core configuration in tests
Add path to the core configuration directory to test build command and
replace .include asm directive with #include to enable preprocessing.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24 04:47:01 +04:00
Max Filippov
d0fa1f0df3 target-xtensa: add overridable test_init macro
Some test suites, like MMU, need per-test initialization. Don't make them
redefine test macro, add test_init for that purpose.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-02-24 04:47:01 +04:00
Michael Walle
f40c49ac9f tests: lm32: new rule for single test cases
Introduce new target "check_%" to run individual test caes, eg.
  make check_mmu

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-04 19:34:29 +01:00
Sebastian Macke
14a650ec25 target-openrisc: Correct carry flag check of l.addc and l.addic test cases
The test cases did not correctly test for the carry flag.

Signed-off-by: Sebastian Macke <sebastian@macke.de>
Reviewed-by: Jia Liu <proljc@gmail.com>
Signed-off-by: Jia Liu <proljc@gmail.com>
2013-11-20 21:47:46 +08:00
Anthony Liguori
64160cd2a3 xtensa queue 2013-07-29
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.13 (GNU/Linux)
 
 iQIcBAABAgAGBQJR9oJeAAoJEFH5zJH4P6BEqzQQAIdlk2X1s6xrPhxiuC0xQmK6
 eHoYVVqVy8wQiXXY+NgbTK6VsbEI/2B58lngFKkUiXQggWHIDUytYpcwymZqVSRS
 9r+VEwy/sa6R/hAGkl7Igs++bsPEkwQqH2b0kDwX+Mi0sCYXZ6Ihe+kqGBkIjzUO
 QXvk3LIVF+ESCeroFUOifgAYncMVDN6er8THJnNHUvfP2lAobkYbh4jbBhmOyKJ6
 kjh0I/rndEyyF0gVfhzPJpdb5whXBlIwjN1CjvoER3Ax24rnfJcBTuDvhV/vtuZY
 dPEOiN/ZDyCeowIMuFDxbtdA5oH2nc6Sm2mqk6iB669ki87vn5vLI6nSAp2C5zAY
 CMPP9JNkhWsBcvjPQOMws/aloru5G2g7ljp7Drd4Ij/gwvlEpAozFtzjhc7QbcMc
 6h7spZ01pRqqICimgUHVf6hYZNeRvhQvzybTA9ccIa0yhyTKTpzQwhNWl+6a2O0x
 4w6SV3RJ9Z+eftS3MOlMpe7raJMg0F5rJQak73hkc07jDB8iaUsJk/8ZAPzT3Y8x
 HwbCE6bGU/ipO8xcGpPC4Lc+vY0+CQXJWRq/x/AiY8SAR6QwRvb9h+Sw0T/5/nYg
 0D12NV5C33ou5RACXdp76Mpxig2rnusWsAj+XSEU8QLB2/TrJ2hMGIdCXUyajCGy
 pr3+BwxWdZkKH7N3oi61
 =JPm8
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'filippov/tags/20130729-xtensa' into staging

xtensa queue 2013-07-29

* filippov/tags/20130729-xtensa:
  target-xtensa: check register window inline
  target-xtensa: don't generate dead code to access invalid SRs
  tests/tcg/xtensa: Fix out-of-tree build
  target-xtensa: avoid double-stopping at breakpoints
  target-xtensa: add fallthrough markers
  target-xtensa: add extui unit test

Conflicts:
	configure

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-08-05 08:06:25 -05:00
Petar Jovanovic
beb3faaa00 target-mips: correct the values in the DSP tests
Five tests files for DSP instructions had wrong expected values in the tests.
This change fixes this, and this has been cross-checked by running the same
test binaries on Malta 74K board.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-30 17:48:24 +02:00
Andreas Färber
aaa2ebc567 tests/tcg/xtensa: Fix out-of-tree build
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-07-29 18:35:45 +04:00
Max Filippov
7be9d0e6d1 target-xtensa: add extui unit test
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2013-07-29 18:24:26 +04:00
Petar Jovanovic
b6a9f4682e target-mips: fix mipsdsp_mul_q31_q31
Multiplication of two fractional word elements is not correct when sign
extension/promotion is needed. This change fixes it by adding correct
casts from unsigned to signed values.
In addition, the tests (dpaq_sa_l_w.c and dpsq_sa_l_w.c) have been extended
to trigger the current issue.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29 07:48:17 +02:00
Petar Jovanovic
d36c231f4b target-mips: fix mipsdsp_trunc16_sat16_round
This change corrects rounding and saturation of Q31 fractional value in
mipsdsp_trunc16_sat16_round(). Overflow detection was incorrect for the
corner case for PRECRQ_RS.PH, and this test case is also part of the change.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29 00:27:36 +02:00
Petar Jovanovic
4877866ee4 target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15
Multiplication of Q15 fractional halfword vectors was incorrect in the
previous implementation of mipsdsp_rndq15_mul_q15_q15. It failed to take
element signs into account. This change fixes it, and it adds a test case
for it.

The change also removes unnecessary cast in the function
mipsdsp_mul_q15_q15_overflowflag21().

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Reviewed-by: Richard Henderson  <rth@twiddle.net> 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28 18:26:36 +02:00
Anthony Liguori
95de21a430 Merge remote-tracking branch 'mjt/trivial-patches' into staging
# By Christophe Lyon (1) and others
# Via Michael Tokarev
* mjt/trivial-patches:
  target-moxie: replace target_phys_addr_t with hwaddr
  Rename hexdump to avoid FreeBSD libutil conflict
  remove some double-includes
  translate: remove redundantly included qemu/timer.h
  Remove twice include of qemu-common.h
  fix /proc/self/maps output

Message-id: 51977B44.1000302@msgid.tls.msk.ru
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-05-22 08:22:36 -05:00
Petar Jovanovic
0ba365f4a9 target-mips: fix EXTPDP and setting up pos field in the DSPControl reg
This change makes sure that modifications of pos field in the DSPControl
register do not trash other bits in the register. This bug can be triggered
with the additional test case in mips32-dsp/extpdp.c in this commit.

In addition to this, this change corrects incorrect calculation of the mask
for EXTPDP.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-19 15:10:51 +02:00
Michael Tokarev
997aba8e25 remove some double-includes
Some source files #include the same header more than
once for no good reason.  Remove second #includes in
such cases.

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-05-18 16:35:12 +04:00
Petar Jovanovic
489ed4bbae target-mips: fix incorrect behaviour for EXTP
The mask for EXTP instruction when size=31 has not been correctly
calculated.

The test (mips32-dsp/extp.c) has been extended to include the case that
triggers the issue.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-17 19:29:40 +02:00
Petar Jovanovic
c0f5f9ce86 target-mips: fix incorrect behaviour for INSV
Corner case for INSV instruction when size=32 has not been correctly
implemented. The mask for size should be one bit wider, and preparing the
filter variable should be aware of this case too.

The test for INSV has been extended to include the case that triggers the
bug.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-08 18:46:38 +02:00
Petar Jovanovic
29851ee7c8 target-mips: fix calculation of overflow for SHLL.PH and SHLL.QB
This change corrects and simplifies how discard is calculated for shift
left logical vector instructions. It is used to detect overflow and set bit
22 in the DSPControl register.

The existing tests (shll_ph.c, shll_qb.c) are extended with the corner cases
that expose incorrectness in the previous implementation.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-03 11:50:49 +02:00
Petar Jovanovic
b1ca31d7ce target-mips: fix mipsdsp_mul_q15_q15 and tests for MAQ_SA_W_PHL/PHR
The operands for MAQ_SA_W.PHL/MAQ_SA_W.PHR must in specified format.
Otherwise, the results are unpredictable. Once the operands were corrected
in the tests (part of this change), a bug in mipsdsp_mul_q15_q15 became
visible.

This change corrects the tests for MAQ_SA_W.PHL/MAQ_SA_W.PHR and fixes
sign-related issue in mipsdsp_mul_q15_q15. It also removes unnecessary
comment.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
2013-04-15 16:07:57 +02:00
Michael Walle
6036e9d87e tests: tcg: lm32: add more test cases
Esp. for testing zero/sign extend in compare operations.

Signed-off-by: Michael Walle <michael@walle.cc>
2013-03-18 19:40:34 +01:00