Commit Graph

442 Commits

Author SHA1 Message Date
Paul Brook
1ad2134f91 Hardware convenience library
The only target dependency for most hardware is sizeof(target_phys_addr_t).
Build these files into a convenience library, and use that instead of
building for every target.

Remove and poison various target specific macros to avoid bogus target
dependencies creeping back in.

Big/Little endian is not handled because devices should not know or care
about this to start with.

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-19 16:17:58 +01:00
Paul Brook
5561650587 Include assert.h from qemu-common.h
Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-13 20:54:26 +01:00
Blue Swirl
001faf3269 Replace gcc variadic macro extension with C99 version
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-13 17:53:17 +00:00
Blue Swirl
d084469ca0 Convert mulscc
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:43:21 +00:00
Blue Swirl
6c78ea32e1 Convert udiv/sdiv
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:42:54 +00:00
Blue Swirl
3b2d1e9286 Convert tagged ops
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:35 +03:00
Blue Swirl
2ca1d92b07 Convert subx
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
Blue Swirl
d4b0d46898 Convert sub
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
Blue Swirl
38482a77f0 Convert logical operations and umul/smul
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
Blue Swirl
789c91ef39 Convert addx
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:22 +00:00
Blue Swirl
bdf9f35dad Convert add
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:17 +00:00
Blue Swirl
8393617c1a Use dynamical computation for condition codes
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:11 +00:00
Blue Swirl
719f66a770 Optimize cmp x, 0 case
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:27 +00:00
Blue Swirl
dc1a6971e3 Reindent
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:22 +00:00
Blue Swirl
b89e94af1d Improve instruction name comments for easier searching
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 20:19:46 +00:00
Blue Swirl
7ab463cb52 Clarify: dmmuregs[1] is not a typo
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 22:52:32 +03:00
Blue Swirl
41d728522b Optimize operations with immediate parameters 2009-05-02 19:14:05 +00:00
Blue Swirl
67526b2056 Fix Sparc64 sign extension problems
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 18:58:57 +00:00
Igor Kovalenko
417728d875 sparc64 fix context value for ITLB fault
Revert previous change to get_physical_address_code:
I/D MMU context register is shared, so using dmmuregs[1] is correct

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
2009-04-28 15:59:51 +00:00
Igor Kovalenko
82f2cfc31b sparc64 fix TLB match code
TLB match code must respect page size, otherwise 4M page mappings may
be not found.

Also correct a typo in get_physical_address_code which should use IMMU
registers.

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>

--
Kind regards,
Igor V. Kovalenko
2009-04-27 19:14:40 +00:00
Blue Swirl
9c22a62396 Fix a warning in sparc64-linux-user build 2009-04-25 16:28:27 +00:00
Igor Kovalenko
697a77e6e7 sparc64 support TSB related MMU registers
Posting updated patch to the list...

>>> On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
>>>  >
>>>  > Nice, though I didn't notice any visible improvement in my tests.
>>>
>>> This early in boot process there is not much to output; and I test
>>>  recent kernel which may use different startup sequence.
>>>  I modified openbios cif handler to output arguments and I now can see
>>>  visible difference.
>>>
>>>
>>>  >
>>>  > About the patch, there are a few problems:
>>>  > - it breaks Sparc32
>>>
>>> You mean it stops working?
>>
>> Does not even build.

Fixed now.

>>>  > - commented out code is ugly
>>>  > - if and else should be on the same line as '{' or '}'
>>>  > - long lines should be wrapped
>>>  > - in the line:
>>>  > +    return (((tag_access_register & 0x1fff)<<48)|(tag_access_register >> 22));
>>>  >  there should be white space between ) and << and 48.
>>>  >
>>>

>>
>> Also the ")|(" in between is crowded.
>>
>> Maybe the coding style does not describe this well enough.

BTW Supplying indent template would be great.

Please see the updated patch qemu-sparc64-tsb-asi-2.patch attached.

--
Kind regards,
Igor V. Kovalenko
2009-04-25 18:17:19 +03:00
aliguori
0bf46a40a1 qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:41 +00:00
aliguori
6a4955a813 qemu: per-arch cpu_has_work (Marcelo Tosatti)
Blue Swirl: fix Sparc32 breakage

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:20 +00:00
aurel32
1b530a6dfc Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
blueswir1
d78f399542 Delete some unused macros detected with -Wp,-Wunused-macros use
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-16 16:33:01 +00:00
pbrook
c276471991 The _exit syscall is used for both thread termination in NPTL applications,
and process termination in legacy applications.  Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.


Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-07 15:24:59 +00:00
blueswir1
415fc90618 Turn MMUs and caches off on reset
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6636 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-21 11:13:51 +00:00
aliguori
0d0266a53b targets: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 22:06:11 +00:00
aliguori
eca1bdf415 Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added more
archs.

This patch introduces a flag to log CPU resets. Useful for tracing
unexpected resets (such as those triggered by x86 triple faults).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6452 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-26 19:54:31 +00:00
aliguori
8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
aurel32
72d239ed26 Get rid of user_mode_only
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6305 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-14 19:40:27 +00:00
blueswir1
afdf8109e3 Fix TLB access (Jakub Jermar)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6274 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-12 21:12:22 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
blueswir1
4017190e2d Add SuperSPARC MMU breakpoint registers (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23 15:30:50 +00:00
blueswir1
963262debc Better SuperSPARC emulation (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23 15:06:35 +00:00
blueswir1
8fa211e881 Implement tick interrupt disable bits
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6122 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-23 08:47:26 +00:00
malc
b1503cda1e Use the ARRAY_SIZE() macro where appropriate.
Change from v1:
  Avoid changing the existing coding style in certain files.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22 20:33:55 +00:00
blueswir1
1d6198c3b0 Remove unnecessary trailing newlines
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-13 09:32:43 +00:00
blueswir1
f4a5a5ba92 Add missing "static"
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5977 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-11 17:29:00 +00:00
aurel32
2cbd949d7a Common cpu_loop_exit prototype
All archs use the same cpu_loop_exit, so move the prototype in a common
header. i386 was carrying a __hidden attribute, but that was empty for
this arch anyway.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5820 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-30 16:23:09 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
aliguori
6b9175478e Refactor translation block CPU state handling (Jan Kiszka)
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:46:41 +00:00
aliguori
622ed3605b Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)
as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 19:36:03 +00:00
pbrook
a7812ae412 TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00
blueswir1
2576d836af Use TCG not op
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5663 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:52:36 +00:00
blueswir1
81b5b816e2 Use andc, orc, nor and nand
Also fix which argument gets negated in fandnot[12] and fornot[12]


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-09 19:50:37 +00:00
blueswir1
527067d892 Fix TCGv size mismatches
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5593 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-01 13:44:52 +00:00
blueswir1
797d5db002 Add static (spotted by sparse)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5439 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 19:12:13 +00:00
blueswir1
c55bda30f6 Fix error in fexpand (spotted by sparse)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5438 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-07 18:54:35 +00:00
blueswir1
e18231a3ff Show size for unassigned accesses (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-06 18:46:28 +00:00
blueswir1
f4b1a842d7 Rearrange tick functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:04:42 +00:00
blueswir1
48585ec51d Fix missing prototype warnings by moving declarations
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5407 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-03 19:02:42 +00:00
blueswir1
9827e450e4 Fix MXCC printf warning (based on patch by Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-02 18:06:50 +00:00
blueswir1
cc6747f4c9 Add mmu tlb demap support (Igor Kovalenko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-27 19:43:18 +00:00
blueswir1
e87231d426 Add a generic Niagara machine
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5329 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 19:48:58 +00:00
blueswir1
c99657d303 Implement some UA2007 block ASIs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:07:24 +00:00
blueswir1
b158a785d2 Implement UA2005 hypervisor traps
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:05:23 +00:00
blueswir1
d81fd7220e Move also DEBUG_PCALL (see r5085)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-26 18:02:48 +00:00
blueswir1
9d92659858 Add software and timer interrupt support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 19:50:28 +00:00
blueswir1
1121f87961 Fix arguments used in cas/casx, thanks to Igor Kovalenko for spotting
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-22 16:52:28 +00:00
blueswir1
ab508019a1 Use the new concat_tl_i64 op for std and stda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 18:43:17 +00:00
blueswir1
a7ec422912 Use the new concat_i32_i64 op for std and stda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-21 14:49:09 +00:00
blueswir1
f0d5e47183 Move signal handler prototype back to cpu.h
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5276 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-20 09:05:49 +00:00
blueswir1
9f4576f08b Fix array subscript above array bounds error
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-14 19:16:21 +00:00
blueswir1
72ccba795b Fix mulscc with high bits set in either src1 or src2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-13 17:20:52 +00:00
blueswir1
5068cbd9e9 Write zeros to high bits of y, based on patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-11 16:01:02 +00:00
blueswir1
d84763bc17 Convert rest of ops using float32 to TCG, remove FT0 and FT1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:09:22 +00:00
blueswir1
c5d04e99f3 Partially convert float128 conversion ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 20:00:18 +00:00
blueswir1
e2ea21b396 Convert basic 64 bit VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:35 +00:00
blueswir1
1d01299d29 Convert basic 32 bit VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:57:13 +00:00
blueswir1
714547bbc7 Convert basic float32 ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-10 19:54:51 +00:00
blueswir1
3a3b925d47 Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-09 19:02:49 +00:00
blueswir1
510aba20f0 Fix a typo in fpsub32
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5177 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:54:01 +00:00
blueswir1
255e1fcb5a Convert most env fields to TCG registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5176 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:51:43 +00:00
blueswir1
47ad35f16a Silence gcc warning about constant overflow
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-06 17:50:16 +00:00
blueswir1
e83ce55068 Implement no-fault loads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 17:32:10 +00:00
blueswir1
b991c38519 Fix sign extension problems with smul and umul (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:33:23 +00:00
blueswir1
105a1f04b5 Fix y register loads and stores
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 19:35:29 +00:00
blueswir1
c8f9349ad9 Remove memcpy32() prototype leftover from r5109
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:22:10 +00:00
blueswir1
ba6a9d8cda Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 21:03:31 +00:00
blueswir1
91736d378b Fix Sparc64 boot on i386 host:
- move do_interrupt() back to op_helper.c
 - move non-helper prototypes from helper.h to exec.h
 - move some prototypes from cpu.h to exec.h
 - do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
   but instead provide inline functions


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 20:50:21 +00:00
blueswir1
7621a90da8 Fix udiv and sdiv on Sparc64 (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-25 19:43:53 +00:00
blueswir1
c93e7817ee Fix wrwim masking (Luis Pureza)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5043 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:34:42 +00:00
blueswir1
5578ceab94 Use initial CPU definition structure for some CPU fields instead of copying
them around, based on patch by Luis Pureza.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 17:33:42 +00:00
blueswir1
2ae72bce02 Correct 32bit carry flag for add instruction (Igor Kovalenko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 08:33:47 +00:00
blueswir1
06057e6f6c Fix faligndata (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4992 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 19:50:16 +00:00
blueswir1
43e9e742b9 Fix I/D MMU tag reads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:16:08 +00:00
blueswir1
01b1fa6d16 Fix Sparc64 shifts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 18:13:54 +00:00
blueswir1
95f9397c75 Fix offset handling for ASI loads and stores (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-06 15:28:20 +00:00
blueswir1
a7a044f29e Handle wrapped registers correctly when saving
Fix typo
Save and load interrupt_index and pil_in
Original patch by Luis Pureza


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4980 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-01 15:13:58 +00:00
blueswir1
dd5e6304aa Fix cmp/subcc/addcc op bugs reported by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 18:11:20 +00:00
blueswir1
c19148bd8f Make MAXTL dynamic, bounds check tl when indexing
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-25 07:42:14 +00:00
blueswir1
0b8f1b102b Sparc32: save/load all MMU registers, Sparc64: add CPU save/load
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4938 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 11:28:51 +00:00
blueswir1
c7ba218da1 Add T1 and T2 CPUs, add a Sun4v machine
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-22 07:07:34 +00:00
blueswir1
74b9decc47 Use MMU globals for some MMU traps
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4918 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 18:43:32 +00:00
blueswir1
8eba209e33 Fix reset vector
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4917 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-21 11:17:23 +00:00
blueswir1
f76981b113 Print default and available CPU features separately
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4912 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-20 18:23:50 +00:00