Commit Graph

103568 Commits

Author SHA1 Message Date
Song Gao
4972565967
target/loongarch: Implement vabsd
This patch includes:
- VABSD.{B/H/W/D}[U].

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-12-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
39e9b0a741
target/loongarch: Implement vavg/vavgr
This patch includes:
- VAVG.{B/H/W/D}[U];
- VAVGR.{B/H/W/D}[U].

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-11-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
2d5f950c05
target/loongarch: Implement vaddw/vsubw
This patch includes:
- VADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- VSUBW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- VADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-10-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
c037fbc97d
target/loongarch: Implement vhaddw/vhsubw
This patch includes:
- VHADDW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU};
- VHSUBW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-9-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
a94cb91107
target/loongarch: Implement vsadd/vssub
This patch includes:
- VSADD.{B/H/W/D}[U];
- VSSUB.{B/H/W/D}[U].

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-8-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
be9ec55758
target/loongarch: Implement vneg
This patch includes;
- VNEG.{B/H/W/D}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-7-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
d8be64c1c5
target/loongarch: Implement vaddi/vsubi
This patch includes:
- VADDI.{B/H/W/D}U;
- VSUBI.{B/H/W/D}U.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-6-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
57b4f1ac18
target/loongarch: Implement vadd/vsub
This patch includes:
- VADD.{B/H/W/D/Q};
- VSUB.{B/H/W/D/Q}.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-5-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
a3f3db5cda
target/loongarch: Add CHECK_SXE maccro for check LSX enable
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-4-gaosong@loongson.cn>
2023-05-06 11:19:45 +08:00
Song Gao
a0c9400a5b
target/loongarch: meson.build support build LSX
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-3-gaosong@loongson.cn>
2023-05-06 11:19:44 +08:00
Song Gao
16f5396cec
target/loongarch: Add LSX data type VReg
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-2-gaosong@loongson.cn>
2023-05-06 11:19:42 +08:00
Richard Henderson
47d3878422 softfloat: Fix the incorrect computation in float32_exp2
tcg: Remove compatability helpers for qemu ld/st
 target/alpha: Remove TARGET_ALIGNED_ONLY
 target/hppa: Remove TARGET_ALIGNED_ONLY
 target/sparc: Remove TARGET_ALIGNED_ONLY
 tcg: Cleanups preparing to unify calls to qemu_ld/st helpers
 -----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRVc9UdHHJpY2hhcmQu
 aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9OiAgAgwc6wFOzFtSnYrvH
 b9YgcJLPX8urgx9g1Exv553hbVtt2J0lsLAhlgwKpms3Os4p6znKhUWcGosHFixO
 eBQFqcS22Cu/ZM2s6299GOGDpxCpjx0/bX7JJTjW805SdSgDAuEUIbKe0ZqQT5tx
 ++F9is2+plp95/BeQz2+hbkbbpdktUkkk288Adoz3KRHqt/zd8cer0WrqR2uVAuX
 swpEluwtCfaewc0iPcNjlp9rLzO882wCFm0RG1EC2j9NHtq8O8xyamM9PPEaRXLv
 MiMA2nB6hsGMz33Wuec8cZTMaCLB+Oqhbq7eYPbCA4SmJBE3V9Rgc7GL4B7yCsyI
 OXSK+Q==
 =GIXd
 -----END PGP SIGNATURE-----

Merge tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu into staging

softfloat: Fix the incorrect computation in float32_exp2
tcg: Remove compatability helpers for qemu ld/st
target/alpha: Remove TARGET_ALIGNED_ONLY
target/hppa: Remove TARGET_ALIGNED_ONLY
target/sparc: Remove TARGET_ALIGNED_ONLY
tcg: Cleanups preparing to unify calls to qemu_ld/st helpers

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmRVc9UdHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9OiAgAgwc6wFOzFtSnYrvH
# b9YgcJLPX8urgx9g1Exv553hbVtt2J0lsLAhlgwKpms3Os4p6znKhUWcGosHFixO
# eBQFqcS22Cu/ZM2s6299GOGDpxCpjx0/bX7JJTjW805SdSgDAuEUIbKe0ZqQT5tx
# ++F9is2+plp95/BeQz2+hbkbbpdktUkkk288Adoz3KRHqt/zd8cer0WrqR2uVAuX
# swpEluwtCfaewc0iPcNjlp9rLzO882wCFm0RG1EC2j9NHtq8O8xyamM9PPEaRXLv
# MiMA2nB6hsGMz33Wuec8cZTMaCLB+Oqhbq7eYPbCA4SmJBE3V9Rgc7GL4B7yCsyI
# OXSK+Q==
# =GIXd
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 May 2023 10:23:33 PM BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230505' of https://gitlab.com/rth7680/qemu: (42 commits)
  tcg: Widen helper_*_st[bw]_mmu val arguments
  tcg: Introduce arg_slot_stk_ofs
  tcg: Replace REG_P with arg_loc_reg_p
  tcg: Move TCGLabelQemuLdst to tcg.c
  tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st}
  tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return
  tcg/s390x: Introduce HostAddress
  tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}
  tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/riscv: Require TCG_TARGET_REG_BITS == 64
  tcg/ppc: Introduce HostAddress
  tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/loongarch64: Introduce HostAddress
  tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/arm: Introduce HostAddress
  tcg/arm: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/aarch64: Introduce HostAddress
  tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st}
  tcg/i386: Introduce tcg_out_testi
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 22:29:28 +01:00
Richard Henderson
2149a21b2f ppc patch queue for 2023-05-05:
This queue includes fixes for ppc and spapr emulation, a build fix for
 the pseries machine and a new reviewer for ppc/spapr.
 
 We're also carrying a Coverity fix for the sm501 display.
 -----BEGIN PGP SIGNATURE-----
 
 iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCZFUuGBYcZGFuaWVsaGI0
 MTNAZ21haWwuY29tAAoJEDzZypbeAzFk3X8A/33+EoBXO4ol5J+BxlQXLRdJkzxA
 ok5zsm69K8VYl9eyAPkBlqqT0W7DyNP4eUU+cMi2vvQop5wt2iV1C2LbnaE2AA==
 =iwNT
 -----END PGP SIGNATURE-----

Merge tag 'pull-ppc-20230505' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2023-05-05:

This queue includes fixes for ppc and spapr emulation, a build fix for
the pseries machine and a new reviewer for ppc/spapr.

We're also carrying a Coverity fix for the sm501 display.

# -----BEGIN PGP SIGNATURE-----
#
# iIwEABYKADQWIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCZFUuGBYcZGFuaWVsaGI0
# MTNAZ21haWwuY29tAAoJEDzZypbeAzFk3X8A/33+EoBXO4ol5J+BxlQXLRdJkzxA
# ok5zsm69K8VYl9eyAPkBlqqT0W7DyNP4eUU+cMi2vvQop5wt2iV1C2LbnaE2AA==
# =iwNT
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 May 2023 05:26:00 PM BST
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg:                issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164

* tag 'pull-ppc-20230505' of https://gitlab.com/danielhb/qemu:
  hw/ppc/Kconfig: NVDIMM is a hard requirement for the pseries machine
  tests: tcg: ppc64: Add tests for Vector Extract Mask Instructions
  tcg: ppc64: Fix mask generation for vextractdm
  MAINTAINERS: Adding myself in the list for ppc/spapr
  ppc: spapr: cleanup cr get/set with helpers.
  hw/display/sm501: Remove unneeded increment from loop

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 22:28:48 +01:00
Richard Henderson
eb5c3932a3 Add PipeWire audio backend
-----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmRU6nccHG1hcmNhbmRy
 ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5dDeD/9zoDh0crm3svtJZTCy
 zFsLUjhVaUX0hG3Tb33fCV/FZVgpH1wYupBsx3WfyRy9601r6SEc9obkBWpiCdjd
 pLRtuyZI5QZ4bRkNZihJn8Q2jvZIwoaVyaFoDWD9NZA5iy7eBRrmd1jPI4BVGnOy
 7HkFJne/bH2Qq8mufq2Ehzb1ePdXiIFMAnEwue6jqlNO1WegCFgR/xox2+1cXOvB
 K0f2Nvreb1MNS5epG2f/iHxEkBomDAXufFbO6oPsZ/i7r3DghGOOdZIbTQq1HC6b
 AnyfukG2vsshTfEVk9+wOeMs8rP0zerUlZPEMoGgpr0ySXzxcubveH0T2RXMQa+5
 Ib7ItoBhRnqj9BJkoE4R4eIHMV1sR8iT7DGuqZD7CT2UAGwI2k6S7u5+4sqfRKxo
 vqLtbUUJcVT31Mt7YI3nX3MUIl3pj5KeRSvhA7dHoAbtz7K1gM1Lb4MU1bnNT6Ih
 7le0lWDHTFCOYpAN3bqozZGLtOmSTK813LkI/u6hvIzxK6ib1Dl0/k7qSoVgmWU9
 HZ1xJlvvZVRy3Zfk89R+Zq+i1oHbZx1qiOcQb4QTUc24ovMVFcXif3g6QlDU5Y2Q
 cNKl2WFretB/kG/lRJm2QmMMLDDVPwssFpCGXZaOTwBzAWlyLbK+NNFwnYaOhMv9
 R9/DzZwGG/aUoDpyjgH3Et1vjw==
 =BJEu
 -----END PGP SIGNATURE-----

Merge tag 'pw-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging

Add PipeWire audio backend

# -----BEGIN PGP SIGNATURE-----
#
# iQJQBAABCAA6FiEEh6m9kz+HxgbSdvYt2ujhCXWWnOUFAmRU6nccHG1hcmNhbmRy
# ZS5sdXJlYXVAcmVkaGF0LmNvbQAKCRDa6OEJdZac5dDeD/9zoDh0crm3svtJZTCy
# zFsLUjhVaUX0hG3Tb33fCV/FZVgpH1wYupBsx3WfyRy9601r6SEc9obkBWpiCdjd
# pLRtuyZI5QZ4bRkNZihJn8Q2jvZIwoaVyaFoDWD9NZA5iy7eBRrmd1jPI4BVGnOy
# 7HkFJne/bH2Qq8mufq2Ehzb1ePdXiIFMAnEwue6jqlNO1WegCFgR/xox2+1cXOvB
# K0f2Nvreb1MNS5epG2f/iHxEkBomDAXufFbO6oPsZ/i7r3DghGOOdZIbTQq1HC6b
# AnyfukG2vsshTfEVk9+wOeMs8rP0zerUlZPEMoGgpr0ySXzxcubveH0T2RXMQa+5
# Ib7ItoBhRnqj9BJkoE4R4eIHMV1sR8iT7DGuqZD7CT2UAGwI2k6S7u5+4sqfRKxo
# vqLtbUUJcVT31Mt7YI3nX3MUIl3pj5KeRSvhA7dHoAbtz7K1gM1Lb4MU1bnNT6Ih
# 7le0lWDHTFCOYpAN3bqozZGLtOmSTK813LkI/u6hvIzxK6ib1Dl0/k7qSoVgmWU9
# HZ1xJlvvZVRy3Zfk89R+Zq+i1oHbZx1qiOcQb4QTUc24ovMVFcXif3g6QlDU5Y2Q
# cNKl2WFretB/kG/lRJm2QmMMLDDVPwssFpCGXZaOTwBzAWlyLbK+NNFwnYaOhMv9
# R9/DzZwGG/aUoDpyjgH3Et1vjw==
# =BJEu
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 May 2023 12:37:27 PM BST
# gpg:                using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg:                issuer "marcandre.lureau@redhat.com"
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]

* tag 'pw-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
  audio/pwaudio.c: Add Pipewire audio backend for QEMU

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 19:18:05 +01:00
Richard Henderson
8ad8256ac4 Migration Pull request (20230505 edition)
In this series:
 - fix block_bitmap_mapping (juan)
 - RDMA cleanup (juan)
 - qemu file cleanup (juan)
 
 Please apply.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEGJn/jt6/WMzuA0uC9IfvGFhy1yMFAmRUUhUACgkQ9IfvGFhy
 1yMxkRAAk1jfunLx/0lfN9R2W3IDwOOPrcOOOd6e7zKb7GzccObKPlqb/eQyvjCe
 FjOenJ8qgh90sW3m99ZBEla3BKekJlCB88olTjHX6FzWz7HUXMv0ip9Xx/Hg3KA/
 gW8AJhHDI+dKpevmKdhWc3sDG+TvMF6YE3hrSm5TtZ0XdHCH+McvwQm6w6O5/CN0
 HjSqV2veweNFctBRaDk9KNvQ5o9/1UYp98N3FjoRGAuxdTeilBZ2dcSmGXrRj789
 nKSCkNxEAjM0cawuo5EqZ5TCy/hFCqWA+W9hFcz63i9bZAwDu/KF7KyR62kKEh5q
 X1JNKqlyuVNutM3Pn8kbTausoWUxEUgbeGI7ID/iQYmP6V36AyyYlASFlLDwPyQs
 lgHdEAzPFmQlHMDior4TKE7+9ZtAE6/g5yYaIuGh04pwhlBzwJ/rgyi7Y5sP1Yqr
 Y5n+y6Ku7wj+gSswZK5iLQ3OFrJfwFQHIfHtW+22oR7oc9Vg0n+1Xsp1cHdJBrWu
 TzdWjX3KnSMTN9x40dJW/7wkt5+XCZcfPcTP/828dGmk0FN8TJMuCvfh79te8tUj
 TQ3NDjV4TO8jZBNB3p1ZZfMmwKHvDCBLRr0aj3MVZSvAcoHPlR6yjMENhsm4ERDA
 Xtsbqt3mIIq0fIvmQHgXDiUvy2FQw/w3Zhrdb9GbBFdYB/T+iFU=
 =79n1
 -----END PGP SIGNATURE-----

Merge tag 'migration-20230505-pull-request' of https://gitlab.com/juan.quintela/qemu into staging

Migration Pull request (20230505 edition)

In this series:
- fix block_bitmap_mapping (juan)
- RDMA cleanup (juan)
- qemu file cleanup (juan)

Please apply.

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEGJn/jt6/WMzuA0uC9IfvGFhy1yMFAmRUUhUACgkQ9IfvGFhy
# 1yMxkRAAk1jfunLx/0lfN9R2W3IDwOOPrcOOOd6e7zKb7GzccObKPlqb/eQyvjCe
# FjOenJ8qgh90sW3m99ZBEla3BKekJlCB88olTjHX6FzWz7HUXMv0ip9Xx/Hg3KA/
# gW8AJhHDI+dKpevmKdhWc3sDG+TvMF6YE3hrSm5TtZ0XdHCH+McvwQm6w6O5/CN0
# HjSqV2veweNFctBRaDk9KNvQ5o9/1UYp98N3FjoRGAuxdTeilBZ2dcSmGXrRj789
# nKSCkNxEAjM0cawuo5EqZ5TCy/hFCqWA+W9hFcz63i9bZAwDu/KF7KyR62kKEh5q
# X1JNKqlyuVNutM3Pn8kbTausoWUxEUgbeGI7ID/iQYmP6V36AyyYlASFlLDwPyQs
# lgHdEAzPFmQlHMDior4TKE7+9ZtAE6/g5yYaIuGh04pwhlBzwJ/rgyi7Y5sP1Yqr
# Y5n+y6Ku7wj+gSswZK5iLQ3OFrJfwFQHIfHtW+22oR7oc9Vg0n+1Xsp1cHdJBrWu
# TzdWjX3KnSMTN9x40dJW/7wkt5+XCZcfPcTP/828dGmk0FN8TJMuCvfh79te8tUj
# TQ3NDjV4TO8jZBNB3p1ZZfMmwKHvDCBLRr0aj3MVZSvAcoHPlR6yjMENhsm4ERDA
# Xtsbqt3mIIq0fIvmQHgXDiUvy2FQw/w3Zhrdb9GbBFdYB/T+iFU=
# =79n1
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 05 May 2023 01:47:17 AM BST
# gpg:                using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723
# gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [undefined]
# gpg:                 aka "Juan Quintela <quintela@trasno.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1899 FF8E DEBF 58CC EE03  4B82 F487 EF18 5872 D723

* tag 'migration-20230505-pull-request' of https://gitlab.com/juan.quintela/qemu:
  qemu-file: Make ram_control_save_page() use accessors for rate_limit
  qemu-file: Make total_transferred an uint64_t
  qemu-file: remove shutdown member
  qemu-file: No need to check for shutdown in qemu_file_rate_limit
  migration: qemu_file_total_transferred() function is monotonic
  migration: max_postcopy_bandwidth is a size parameter
  migration/rdma: Check for postcopy sooner
  migration/rdma: It makes no sense to recive that flag without RDMA
  migration/rdma: We can calculate the rioc from the QEMUFile
  migration/rdma: simplify ram_control_load_hook()
  migration: Make RAM_SAVE_FLAG_HOOK a normal case entry
  migration: Rename xbzrle_enabled xbzrle_started
  migration: Put zero_pages in alphabetical order
  migration: Document all migration_stats
  migration/rdma: Don't pass the QIOChannelRDMA as an opaque
  migration: Fix block_bitmap_mapping migration

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 19:17:44 +01:00
Richard Henderson
35a0bd63b4 tcg: Widen helper_*_st[bw]_mmu val arguments
While the old type was correct in the ideal sense, some ABIs require
the argument to be zero-extended.  Using uint32_t for all such values
is a decent compromise.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
d78e4a4f7b tcg: Introduce arg_slot_stk_ofs
Unify all computation of argument stack offset in one function.
This requires that we adjust ref_slot to be in the same units,
by adding max_reg_slots during init_call_layout.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
338b61e9e9 tcg: Replace REG_P with arg_loc_reg_p
An inline function is safer than a macro, and REG_P
was rather too generic.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
2528f771f8 tcg: Move TCGLabelQemuLdst to tcg.c
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
e2adae3f6f tcg/sparc64: Pass TCGType to tcg_out_qemu_{ld,st}
We need to set this in TCGLabelQemuLdst, so plumb this
all the way through from tcg_out_op.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
acfe94910e tcg/sparc64: Drop is_64 test from tcg_out_qemu_ld data return
In tcg_canonicalize_memop, we remove MO_SIGN from MO_32 operations
with TCG_TYPE_I32.  Thus this is never set.  We already have an
identical test just above which does not include is_64

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
036547487b tcg/s390x: Introduce HostAddress
Collect the 3 potential parts of the host address into a struct.
Reorg tcg_out_qemu_{ld,st}_direct to use it.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
01a3b5dead tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}
We need to set this in TCGLabelQemuLdst, so plumb this
all the way through from tcg_out_op.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
f7041977a6 tcg/riscv: Rationalize args to tcg_out_qemu_{ld,st}
Interpret the variable argument placement in the caller.  Pass data_type
instead of is64 -- there are several places where we already convert back
from bool to type.  Clean things up by using type throughout.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
aeb6326ec5 tcg/riscv: Require TCG_TARGET_REG_BITS == 64
The port currently does not support "oversize" guests, which
means riscv32 can only target 32-bit guests.  We will soon be
building TCG once for all guests.  This implies that we can
only support riscv64.

Since all Linux distributions target riscv64 not riscv32,
this is not much of a restriction and simplifies the code.

The brcond2 and setcond2 opcodes are exclusive to 32-bit hosts,
so we can and should remove the stubs.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
e3867bad0d tcg/ppc: Introduce HostAddress
Collect the parts of the host address into a struct.
Reorg tcg_out_qemu_{ld,st} to use it.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
6073988eef tcg/ppc: Rationalize args to tcg_out_qemu_{ld,st}
Interpret the variable argument placement in the caller.  Pass data_type
instead of is64 -- there are several places where we already convert back
from bool to type.  Clean things up by using type throughout.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:21:03 +01:00
Richard Henderson
eb664d0c52 tcg/mips: Rationalize args to tcg_out_qemu_{ld,st}
Interpret the variable argument placement in the caller.  There are
several places where we already convert back from bool to type.
Clean things up by using type throughout.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
9a2027b7a2 tcg/loongarch64: Introduce HostAddress
Collect the 2 parts of the host address into a struct.
Reorg tcg_out_qemu_{ld,st}_direct to use it.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
7f67e58236 tcg/loongarch64: Rationalize args to tcg_out_qemu_{ld,st}
Interpret the variable argument placement in the caller.  Shift some
code around slightly to share more between softmmu and user-only.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
1df6d611bd tcg/arm: Introduce HostAddress
Collect the parts of the host address, and condition, into a struct.
Merge tcg_out_qemu_*_{index,direct} and use it.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
737fb471ed tcg/arm: Rationalize args to tcg_out_qemu_{ld,st}
Interpret the variable argument placement in the caller.
Pass data_type instead of is_64.  We need to set this in
TCGLabelQemuLdst, so plumb this all the way through from tcg_out_op.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
7f65be51b6 tcg/aarch64: Introduce HostAddress
Collect the 3 potential parts of the host address into a struct.
Reorg tcg_out_qemu_{ld,st}_direct to use it.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
ff0cc85ef3 tcg/aarch64: Rationalize args to tcg_out_qemu_{ld,st}
Rename the 'ext' parameter 'data_type' to make the use clearer;
pass it to tcg_out_qemu_st as well to even out the interfaces.
Rename the 'otype' local 'addr_type' to make the use clearer.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:20:01 +01:00
Richard Henderson
a48f1c7415 tcg/i386: Introduce tcg_out_testi
Split out a helper for choosing testb vs testl.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:10:59 +01:00
Richard Henderson
3c2c35e23e tcg/i386: Drop r0+r1 local variables from tcg_out_tlb_load
Use TCG_REG_L[01] constants directly.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:10:59 +01:00
Richard Henderson
61713c29a9 tcg/i386: Introduce HostAddress
Collect the 4 potential parts of the host address into a struct.
Reorg tcg_out_qemu_{ld,st}_direct to use it.
Reorg guest_base handling to use it.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:10:59 +01:00
Richard Henderson
3174941fe0 tcg/i386: Generalize multi-part load overlap test
Test for both base and index; use datahi as a temporary, overwritten
by the final load.  Always perform the loads in ascending order, so
that any (user-only) fault sees the correct address.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:10:59 +01:00
Richard Henderson
bf12e2240d tcg/i386: Rationalize args to tcg_out_qemu_{ld,st}
Interpret the variable argument placement in the caller.  Pass data_type
instead of is64 -- there are several places where we already convert back
from bool to type.  Clean things up by using type throughout.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:10:59 +01:00
Richard Henderson
3ed8d2d4c8 target/sparc: Remove TARGET_ALIGNED_ONLY
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:09:47 +01:00
Richard Henderson
60abd45224 target/sparc: Use cpu_ld*_code_mmu
This passes on the memop as given as argument to
helper_ld_asi to the ultimate load primitive.

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:09:47 +01:00
Richard Henderson
316b6783f1 target/sparc: Use MO_ALIGN where required
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:09:47 +01:00
Richard Henderson
0bd447ee64 target/hppa: Remove TARGET_ALIGNED_ONLY
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:05:58 +01:00
Richard Henderson
2d4afb03e4 target/hppa: Use MO_ALIGN for system UNALIGN()
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:05:58 +01:00
Richard Henderson
e10e98bdb0 target/alpha: Remove TARGET_ALIGNED_ONLY
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:05:58 +01:00
Richard Henderson
33948b68a7 target/alpha: Use MO_ALIGN where required
Mark all memory operations that are not already marked with UNALIGN.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:05:58 +01:00
Richard Henderson
6ffaac9ca0 target/alpha: Use MO_ALIGN for system UNALIGN()
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-05-05 17:05:58 +01:00
Richard Henderson
5fa7c0882d tcg: Remove compatability helpers for qemu ld/st
Remove the old interfaces with the implicit MemOp argument.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230502135741.1158035-10-richard.henderson@linaro.org>
2023-05-05 17:05:29 +01:00
Richard Henderson
f0aca2a912 target/xtensa: Finish conversion to tcg_gen_qemu_{ld, st}_*
Convert away from the old interface with the implicit
MemOp argument.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Message-Id: <20230502135741.1158035-9-richard.henderson@linaro.org>
2023-05-05 17:05:29 +01:00
Richard Henderson
0814911883 target/sparc: Finish conversion to tcg_gen_qemu_{ld, st}_*
Convert away from the old interface with the implicit
MemOp argument.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230502135741.1158035-8-richard.henderson@linaro.org>
2023-05-05 17:05:28 +01:00