blueswir1
|
b158a785d2
|
Implement UA2005 hypervisor traps
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-26 18:05:23 +00:00 |
|
blueswir1
|
9d92659858
|
Add software and timer interrupt support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-22 19:50:28 +00:00 |
|
blueswir1
|
ab508019a1
|
Use the new concat_tl_i64 op for std and stda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5283 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-21 18:43:17 +00:00 |
|
blueswir1
|
a7ec422912
|
Use the new concat_i32_i64 op for std and stda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-21 14:49:09 +00:00 |
|
blueswir1
|
72ccba795b
|
Fix mulscc with high bits set in either src1 or src2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5201 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-13 17:20:52 +00:00 |
|
blueswir1
|
5068cbd9e9
|
Write zeros to high bits of y, based on patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5196 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-11 16:01:02 +00:00 |
|
blueswir1
|
d84763bc17
|
Convert rest of ops using float32 to TCG, remove FT0 and FT1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-10 20:09:22 +00:00 |
|
blueswir1
|
c5d04e99f3
|
Partially convert float128 conversion ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-10 20:00:18 +00:00 |
|
blueswir1
|
e2ea21b396
|
Convert basic 64 bit VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-10 19:57:35 +00:00 |
|
blueswir1
|
1d01299d29
|
Convert basic 32 bit VIS ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-10 19:57:13 +00:00 |
|
blueswir1
|
714547bbc7
|
Convert basic float32 ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-10 19:54:51 +00:00 |
|
blueswir1
|
3a3b925d47
|
Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-09 19:02:49 +00:00 |
|
blueswir1
|
510aba20f0
|
Fix a typo in fpsub32
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5177 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-06 17:54:01 +00:00 |
|
blueswir1
|
255e1fcb5a
|
Convert most env fields to TCG registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5176 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-06 17:51:43 +00:00 |
|
blueswir1
|
47ad35f16a
|
Silence gcc warning about constant overflow
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5175 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-06 17:50:16 +00:00 |
|
blueswir1
|
b991c38519
|
Fix sign extension problems with smul and umul (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-02 16:33:23 +00:00 |
|
blueswir1
|
105a1f04b5
|
Fix y register loads and stores
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-09-01 19:35:29 +00:00 |
|
blueswir1
|
ba6a9d8cda
|
Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-08-29 21:03:31 +00:00 |
|
blueswir1
|
c93e7817ee
|
Fix wrwim masking (Luis Pureza)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5043 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-08-21 17:34:42 +00:00 |
|
blueswir1
|
5578ceab94
|
Use initial CPU definition structure for some CPU fields instead of copying
them around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-08-21 17:33:42 +00:00 |
|
blueswir1
|
2ae72bce02
|
Correct 32bit carry flag for add instruction (Igor Kovalenko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-08-17 08:33:47 +00:00 |
|
blueswir1
|
01b1fa6d16
|
Fix Sparc64 shifts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-08-06 18:13:54 +00:00 |
|
blueswir1
|
95f9397c75
|
Fix offset handling for ASI loads and stores (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-08-06 15:28:20 +00:00 |
|
blueswir1
|
dd5e6304aa
|
Fix cmp/subcc/addcc op bugs reported by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-29 18:11:20 +00:00 |
|
blueswir1
|
fb79ceb91a
|
Make UA200x features selectable, add MMU types
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-20 18:22:16 +00:00 |
|
blueswir1
|
db166940e2
|
Implement nucleus quad ldda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-19 13:25:28 +00:00 |
ths
|
2cfc5f17d3
|
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-18 18:01:29 +00:00 |
|
blueswir1
|
8d7d8c4bb1
|
wrhpr hstick_cmpr is a store, not a load
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4887 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-18 10:26:07 +00:00 |
|
blueswir1
|
2cade6a3f6
|
Support for address masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-17 12:53:05 +00:00 |
|
blueswir1
|
c5f2f66835
|
Flushw can generate exceptions, so save PC & NPC
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4876 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-16 11:51:15 +00:00 |
|
blueswir1
|
71817e4898
|
Really fix cas
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-07-15 14:52:09 +00:00 |
pbrook
|
2e70f6efa8
|
Add instruction counter.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-29 01:03:05 +00:00 |
|
blueswir1
|
d987963aa9
|
Eliminate cpu_T[0]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-22 10:58:57 +00:00 |
|
blueswir1
|
3f0436fe85
|
Eliminate cpu_T[1]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4775 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-22 08:52:58 +00:00 |
|
blueswir1
|
ece43b8d06
|
Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-21 19:50:10 +00:00 |
|
blueswir1
|
5c6a0628b7
|
Avoid brcond problems, use temps for cpu_src1 & cpu_src2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4771 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-21 19:46:48 +00:00 |
|
blueswir1
|
07bf2857b8
|
Avoid temporary variable use across basic blocks for udivx
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4744 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-15 18:06:39 +00:00 |
|
blueswir1
|
1a14026e11
|
Allow NWINDOWS selection (CPU feature with model specific defaults)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-06-07 08:07:37 +00:00 |
|
blueswir1
|
e30b467893
|
MicroSparc I didn't have fsmuld op
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-29 18:20:36 +00:00 |
|
blueswir1
|
2ea815cac7
|
Free temps
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4591 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-27 19:39:12 +00:00 |
|
blueswir1
|
8d96d20941
|
More TCG type fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4589 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-26 19:42:42 +00:00 |
|
blueswir1
|
ef28fd8673
|
Fix cas on i386
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4587 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-26 17:53:41 +00:00 |
bellard
|
4f7de37327
|
remove absolete function
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4579 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-25 18:01:40 +00:00 |
|
blueswir1
|
a8c768c069
|
Nicer debug output
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4573 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-25 11:17:46 +00:00 |
|
pbrook
|
bcb0126ff4
|
More TCGv type fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-24 02:24:25 +00:00 |
|
pbrook
|
cb63669a54
|
Fix ARM conditional branch bug.
Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-24 02:22:00 +00:00 |
|
pbrook
|
455f900486
|
Fix helper operand type mismatch.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4551 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-24 02:12:32 +00:00 |
|
blueswir1
|
c9e03d8f68
|
Register op helpers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4534 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-22 18:16:25 +00:00 |
|
blueswir1
|
e35298cd1f
|
Generate better code for Sparc32 shifts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4467 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-17 09:43:12 +00:00 |
|
blueswir1
|
77f193daa8
|
Wrap long lines
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-05-12 16:13:33 +00:00 |