OpenE2K/qemu-e2k
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qemu-e2k/target/riscv
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Daniel Henrique Barboza 09631441e5
target/riscv/cpu.c: error out if EPMP is enabled without PMP 
Instead of silently ignoring the EPMP setting if there is no PMP
available, error out informing the user that EPMP depends on PMP
support:

$ ./qemu-system-riscv64 -cpu rv64,pmp=false,x-epmp=true
qemu-system-riscv64: Invalid configuration: EPMP requires PMP support

This will force users to pick saner options in the QEMU command line.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-ID: <20230222185205.355361-6-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-03-01 13:47:11 -08:00
..
insn_trans
target/riscv: fix ctzw behavior
2023-02-07 08:19:23 +10:00
arch_dump.c
dump: Replace opaque DumpState pointer with a typed one
2022-10-06 19:30:43 +04:00
bitmanip_helper.c
target/riscv: rvk: add support for zbkx extension
2022-04-29 10:47:45 +10:00
common-semi-target.h
semihosting: Split out common-semi-target.h
2022-06-28 04:35:07 +05:30
cpu_bits.h
target/riscv: Add smstateen support
2023-01-06 10:42:55 +10:00
cpu_helper.c
target/riscv: remove RISCV_FEATURE_DEBUG
2023-03-01 13:47:10 -08:00
cpu_user.h
…
cpu_vendorid.h
RISC-V: Add initial support for T-Head C906
2023-02-07 08:19:23 +10:00
cpu-param.h
Normalize header guard symbol definition
2022-05-11 16:50:26 +02:00
cpu.c
target/riscv/cpu.c: error out if EPMP is enabled without PMP
2023-03-01 13:47:11 -08:00
cpu.h
target/riscv: remove RISCV_FEATURE_DEBUG
2023-03-01 13:47:10 -08:00
crypto_helper.c
target/riscv: rvk: add support for zksed/zksh extension
2022-04-29 10:47:45 +10:00
csr.c
target/riscv: remove RISCV_FEATURE_DEBUG
2023-03-01 13:47:10 -08:00
debug.c
target/riscv: set tval for triggered watchpoints
2023-02-07 08:19:23 +10:00
debug.h
target/riscv: Add itrigger support when icount is enabled
2023-01-06 10:42:55 +10:00
fpu_helper.c
target/riscv: Remove helper_set_rod_rounding_mode
2023-01-20 10:14:14 +10:00
gdbstub.c
target/riscv: Check the correct exception cause in vector GDB stub
2022-09-27 07:04:38 +10:00
helper.h
RISC-V: Adding XTheadSync ISA extension
2023-02-07 08:19:23 +10:00
insn16.decode
target/riscv: fix shifts shamt value for rv128c
2022-09-07 09:18:32 +02:00
insn32.decode
RISC-V: Add Zawrs ISA extension support
2023-01-06 10:42:55 +10:00
instmap.h
target/riscv: Update [m|h]tinst CSR in riscv_cpu_do_interrupt()
2022-09-07 09:18:32 +02:00
internals.h
target/riscv: rvv: Add mask agnostic for vv instructions
2022-09-07 09:18:32 +02:00
Kconfig
…
kvm_riscv.h
target/riscv: Support setting external interrupt by KVM
2022-01-21 15:52:56 +10:00
kvm-stub.c
target/riscv: Support setting external interrupt by KVM
2022-01-21 15:52:56 +10:00
kvm.c
target/riscv: fix SBI getchar handler for KVM
2023-02-07 08:19:23 +10:00
m128_helper.c
target/riscv: support for 128-bit M extension
2022-01-08 15:46:10 +10:00
machine.c
target/riscv: remove RISCV_FEATURE_DEBUG
2023-03-01 13:47:10 -08:00
meson.build
RISC-V: Adding XTheadCmo ISA extension
2023-02-07 08:19:23 +10:00
monitor.c
bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
2023-01-18 11:14:34 +01:00
op_helper.c
RISC-V: Adding XTheadSync ISA extension
2023-02-07 08:19:23 +10:00
pmp.c
target/riscv: Smepmp: Skip applying default rules when address matches
2023-02-23 14:21:32 -08:00
pmp.h
target/riscv: Fix PMP propagation for tlb
2023-01-06 10:42:55 +10:00
pmu.c
hw/riscv: virt: Add PMU DT node to the device tree
2022-09-07 09:19:15 +02:00
pmu.h
riscv: Clean up includes
2023-02-08 07:28:05 +01:00
sbi_ecall_interface.h
Clean up ill-advised or unusual header guards
2022-05-11 16:50:01 +02:00
time_helper.c
target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
2023-02-07 08:19:23 +10:00
time_helper.h
target/riscv: Add stimecmp support
2022-09-07 09:19:15 +02:00
trace-events
…
trace.h
…
translate.c
target/riscv: fix for virtual instr exception
2023-02-07 08:19:23 +10:00
vector_helper.c
target/riscv: Fix vslide1up.vf and vslide1down.vf
2023-02-23 14:21:34 -08:00
xthead.decode
RISC-V: Adding XTheadFmv ISA extension
2023-02-07 08:19:23 +10:00
XVentanaCondOps.decode
target/riscv: Add XVentanaCondOps custom extension
2022-02-16 12:24:18 +10:00