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insn_trans
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target/riscv: Simplify the check for Zfhmin and Zhinxmin
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2023-03-01 14:57:32 -08:00 |
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arch_dump.c
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dump: Replace opaque DumpState pointer with a typed one
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2022-10-06 19:30:43 +04:00 |
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bitmanip_helper.c
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target/riscv: rvk: add support for zbkx extension
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2022-04-29 10:47:45 +10:00 |
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common-semi-target.h
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semihosting: Split out common-semi-target.h
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2022-06-28 04:35:07 +05:30 |
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cpu_bits.h
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target/riscv: Add smstateen support
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2023-01-06 10:42:55 +10:00 |
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cpu_helper.c
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target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()
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2023-02-23 14:21:33 -08:00 |
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cpu_user.h
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Supply missing header guards
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2019-06-12 13:20:21 +02:00 |
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cpu_vendorid.h
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RISC-V: Add initial support for T-Head C906
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2023-02-07 08:19:23 +10:00 |
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cpu-param.h
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Normalize header guard symbol definition
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2022-05-11 16:50:26 +02:00 |
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cpu.c
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target/riscv: Fix the relationship between Zhinxmin and Zhinx
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2023-03-01 14:57:23 -08:00 |
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cpu.h
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target/riscv: Add cfg properties for Zv* extensions
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2023-03-01 14:59:24 -08:00 |
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crypto_helper.c
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target/riscv: rvk: add support for zksed/zksh extension
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2022-04-29 10:47:45 +10:00 |
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csr.c
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target/riscv: Remove privileged spec version restriction for RVV
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2023-02-23 14:21:31 -08:00 |
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debug.c
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target/riscv: set tval for triggered watchpoints
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2023-02-07 08:19:23 +10:00 |
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debug.h
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target/riscv: Add itrigger support when icount is enabled
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2023-01-06 10:42:55 +10:00 |
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fpu_helper.c
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target/riscv: Remove helper_set_rod_rounding_mode
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2023-01-20 10:14:14 +10:00 |
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gdbstub.c
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target/riscv: Check the correct exception cause in vector GDB stub
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2022-09-27 07:04:38 +10:00 |
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helper.h
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RISC-V: Adding XTheadSync ISA extension
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2023-02-07 08:19:23 +10:00 |
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insn16.decode
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target/riscv: fix shifts shamt value for rv128c
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2022-09-07 09:18:32 +02:00 |
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insn32.decode
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RISC-V: Add Zawrs ISA extension support
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2023-01-06 10:42:55 +10:00 |
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instmap.h
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target/riscv: Update [m|h]tinst CSR in riscv_cpu_do_interrupt()
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2022-09-07 09:18:32 +02:00 |
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internals.h
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target/riscv: rvv: Add mask agnostic for vv instructions
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2022-09-07 09:18:32 +02:00 |
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Kconfig
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meson: Introduce target-specific Kconfig
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2021-07-09 18:21:34 +02:00 |
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kvm_riscv.h
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target/riscv: Support setting external interrupt by KVM
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2022-01-21 15:52:56 +10:00 |
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kvm-stub.c
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target/riscv: Support setting external interrupt by KVM
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2022-01-21 15:52:56 +10:00 |
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kvm.c
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target/riscv: fix SBI getchar handler for KVM
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2023-02-07 08:19:23 +10:00 |
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m128_helper.c
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target/riscv: support for 128-bit M extension
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2022-01-08 15:46:10 +10:00 |
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machine.c
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hw/char: riscv_htif: Move registers from CPUArchState to HTIFState
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2023-01-20 10:14:13 +10:00 |
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meson.build
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RISC-V: Adding XTheadCmo ISA extension
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2023-02-07 08:19:23 +10:00 |
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monitor.c
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bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx
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2023-01-18 11:14:34 +01:00 |
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op_helper.c
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RISC-V: Adding XTheadSync ISA extension
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2023-02-07 08:19:23 +10:00 |
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pmp.c
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target/riscv: Smepmp: Skip applying default rules when address matches
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2023-02-23 14:21:32 -08:00 |
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pmp.h
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target/riscv: Fix PMP propagation for tlb
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2023-01-06 10:42:55 +10:00 |
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pmu.c
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hw/riscv: virt: Add PMU DT node to the device tree
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2022-09-07 09:19:15 +02:00 |
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pmu.h
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riscv: Clean up includes
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2023-02-08 07:28:05 +01:00 |
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sbi_ecall_interface.h
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Clean up ill-advised or unusual header guards
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2022-05-11 16:50:01 +02:00 |
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time_helper.c
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target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX
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2023-02-07 08:19:23 +10:00 |
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time_helper.h
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target/riscv: Add stimecmp support
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2022-09-07 09:19:15 +02:00 |
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trace-events
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target/riscv: Add ePMP CSR access functions
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2021-05-11 20:02:06 +10:00 |
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trace.h
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trace: switch position of headers to what Meson requires
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2020-08-21 06:18:24 -04:00 |
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translate.c
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target/riscv: fix for virtual instr exception
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2023-02-07 08:19:23 +10:00 |
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vector_helper.c
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target/riscv: Fix vslide1up.vf and vslide1down.vf
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2023-02-23 14:21:34 -08:00 |
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xthead.decode
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RISC-V: Adding XTheadFmv ISA extension
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2023-02-07 08:19:23 +10:00 |
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XVentanaCondOps.decode
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target/riscv: Add XVentanaCondOps custom extension
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2022-02-16 12:24:18 +10:00 |
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