qemu-e2k/target/riscv
Daniel Henrique Barboza cdfb290569
target/riscv: remove RISCV_FEATURE_DEBUG
RISCV_FEATURE_DEBUG will always follow the value defined by
cpu->cfg.debug flag. Read the flag instead.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-ID: <20230222185205.355361-5-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-03-01 13:47:10 -08:00
..
insn_trans target/riscv: fix ctzw behavior 2023-02-07 08:19:23 +10:00
arch_dump.c
bitmanip_helper.c
common-semi-target.h
cpu_bits.h target/riscv: Add smstateen support 2023-01-06 10:42:55 +10:00
cpu_helper.c target/riscv: remove RISCV_FEATURE_DEBUG 2023-03-01 13:47:10 -08:00
cpu_user.h
cpu_vendorid.h RISC-V: Add initial support for T-Head C906 2023-02-07 08:19:23 +10:00
cpu-param.h
cpu.c target/riscv: remove RISCV_FEATURE_DEBUG 2023-03-01 13:47:10 -08:00
cpu.h target/riscv: remove RISCV_FEATURE_DEBUG 2023-03-01 13:47:10 -08:00
crypto_helper.c
csr.c target/riscv: remove RISCV_FEATURE_DEBUG 2023-03-01 13:47:10 -08:00
debug.c target/riscv: set tval for triggered watchpoints 2023-02-07 08:19:23 +10:00
debug.h target/riscv: Add itrigger support when icount is enabled 2023-01-06 10:42:55 +10:00
fpu_helper.c target/riscv: Remove helper_set_rod_rounding_mode 2023-01-20 10:14:14 +10:00
gdbstub.c
helper.h RISC-V: Adding XTheadSync ISA extension 2023-02-07 08:19:23 +10:00
insn16.decode
insn32.decode RISC-V: Add Zawrs ISA extension support 2023-01-06 10:42:55 +10:00
instmap.h
internals.h
Kconfig
kvm_riscv.h
kvm-stub.c
kvm.c target/riscv: fix SBI getchar handler for KVM 2023-02-07 08:19:23 +10:00
m128_helper.c
machine.c target/riscv: remove RISCV_FEATURE_DEBUG 2023-03-01 13:47:10 -08:00
meson.build RISC-V: Adding XTheadCmo ISA extension 2023-02-07 08:19:23 +10:00
monitor.c bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx 2023-01-18 11:14:34 +01:00
op_helper.c RISC-V: Adding XTheadSync ISA extension 2023-02-07 08:19:23 +10:00
pmp.c target/riscv: Smepmp: Skip applying default rules when address matches 2023-02-23 14:21:32 -08:00
pmp.h
pmu.c
pmu.h riscv: Clean up includes 2023-02-08 07:28:05 +01:00
sbi_ecall_interface.h
time_helper.c target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX 2023-02-07 08:19:23 +10:00
time_helper.h
trace-events
trace.h
translate.c target/riscv: fix for virtual instr exception 2023-02-07 08:19:23 +10:00
vector_helper.c target/riscv: Fix vslide1up.vf and vslide1down.vf 2023-02-23 14:21:34 -08:00
xthead.decode RISC-V: Adding XTheadFmv ISA extension 2023-02-07 08:19:23 +10:00
XVentanaCondOps.decode