Aurelien Jarno e0bcb9ca36 sh7750: handle MMUCR TI bit
When the MMUCR TI bit is set, all the UTLB and ITLB entries should be
flushed.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-09 21:07:03 +01:00
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