1999-05-03 09:29:11 +02:00
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/* Interface between the opcode library and its callers.
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2001-03-14 03:27:44 +01:00
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2016-01-01 12:25:12 +01:00
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Copyright (C) 1999-2016 Free Software Foundation, Inc.
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2006-02-17 15:36:28 +01:00
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2001-03-14 03:27:44 +01:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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2010-04-15 12:26:09 +02:00
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the Free Software Foundation; either version 3, or (at your option)
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2001-03-14 03:27:44 +01:00
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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2005-05-10 12:21:13 +02:00
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Foundation, Inc., 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA.
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2006-02-17 15:36:28 +01:00
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1999-05-03 09:29:11 +02:00
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Written by Cygnus Support, 1993.
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The opcode library (libopcodes.a) provides instruction decoders for
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a large variety of instruction sets, callable with an identical
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interface, for making instruction-processing programs more independent
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of the instruction set being processed. */
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#ifndef DIS_ASM_H
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#define DIS_ASM_H
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1999-12-16 02:23:39 +01:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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1999-05-03 09:29:11 +02:00
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#include <stdio.h>
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#include "bfd.h"
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2012-07-24 14:56:47 +02:00
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typedef int (*fprintf_ftype) (void *, const char*, ...) ATTRIBUTE_FPTR_PRINTF_2;
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1999-05-03 09:29:11 +02:00
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2006-09-17 01:51:50 +02:00
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enum dis_insn_type
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{
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2009-06-15 13:37:26 +02:00
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dis_noninsn, /* Not a valid instruction. */
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dis_nonbranch, /* Not a branch instruction. */
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dis_branch, /* Unconditional branch. */
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dis_condbranch, /* Conditional branch. */
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dis_jsr, /* Jump to subroutine. */
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dis_condjsr, /* Conditional jump to subroutine. */
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dis_dref, /* Data reference instruction. */
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dis_dref2 /* Two data references in instruction. */
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1999-05-03 09:29:11 +02:00
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};
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2006-02-17 15:36:28 +01:00
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/* This struct is passed into the instruction decoding routine,
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1999-05-03 09:29:11 +02:00
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and is passed back out into each callback. The various fields are used
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for conveying information from your main routine into your callbacks,
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for passing information into the instruction decoders (such as the
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addresses of the callback functions), or for passing information
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back from the instruction decoders to their callers.
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It must be initialized before it is first passed; this can be done
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by hand, or using one of the initialization macros below. */
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2006-09-17 01:51:50 +02:00
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typedef struct disassemble_info
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{
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1999-05-03 09:29:11 +02:00
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fprintf_ftype fprintf_func;
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2003-08-07 04:25:50 +02:00
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void *stream;
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void *application_data;
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1999-05-03 09:29:11 +02:00
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/* Target description. We could replace this with a pointer to the bfd,
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but that would require one. There currently isn't any such requirement
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so to avoid introducing one we record these explicitly. */
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/* The bfd_flavour. This can be bfd_target_unknown_flavour. */
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enum bfd_flavour flavour;
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/* The bfd_arch value. */
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enum bfd_architecture arch;
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/* The bfd_mach value. */
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unsigned long mach;
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/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
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enum bfd_endian endian;
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2008-07-07 20:40:13 +02:00
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/* Endianness of code, for mixed-endian situations such as ARM BE8. */
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enum bfd_endian endian_code;
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2002-02-05 20:40:45 +01:00
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/* An arch/mach-specific bitmask of selected instruction subsets, mainly
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for processors with run-time-switchable instruction sets. The default,
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zero, means that there is no constraint. CGEN-based opcodes ports
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may use ISA_foo masks. */
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2005-10-28 21:41:01 +02:00
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void *insn_sets;
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1999-05-03 09:29:11 +02:00
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2000-12-19 00:19:55 +01:00
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/* Some targets need information about the current section to accurately
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display insns. If this is NULL, the target disassembler function
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will have to make its best guess. */
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asection *section;
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1999-05-03 09:29:11 +02:00
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/* An array of pointers to symbols either at the location being disassembled
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or at the start of the function being disassembled. The array is sorted
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so that the first symbol is intended to be the one used. The others are
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present for any misc. purposes. This is not set reliably, but if it is
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not NULL, it is correct. */
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asymbol **symbols;
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/* Number of symbols in array. */
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int num_symbols;
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2006-10-31 21:21:57 +01:00
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/* Symbol table provided for targets that want to look at it. This is
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used on Arm to find mapping symbols and determine Arm/Thumb code. */
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asymbol **symtab;
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int symtab_pos;
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int symtab_size;
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1999-05-03 09:29:11 +02:00
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/* For use by the disassembler.
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The top 16 bits are reserved for public use (and are documented here).
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The bottom 16 bits are for the internal use of the disassembler. */
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unsigned long flags;
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2009-06-15 13:37:26 +02:00
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/* Set if the disassembler has determined that there are one or more
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relocations associated with the instruction being disassembled. */
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#define INSN_HAS_RELOC (1 << 31)
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/* Set if the user has requested the disassembly of data as well as code. */
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#define DISASSEMBLE_DATA (1 << 30)
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2009-06-18 12:31:21 +02:00
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/* Set if the user has specifically set the machine type encoded in the
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mach field of this structure. */
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#define USER_SPECIFIED_MACHINE_TYPE (1 << 29)
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2009-06-15 13:37:26 +02:00
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/* Use internally by the target specific disassembly code. */
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2003-08-07 04:25:50 +02:00
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void *private_data;
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1999-05-03 09:29:11 +02:00
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/* Function used to get bytes to disassemble. MEMADDR is the
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address of the stuff to be disassembled, MYADDR is the address to
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put the bytes in, and LENGTH is the number of bytes to read.
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INFO is a pointer to this struct.
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Returns an errno value or 0 for success. */
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int (*read_memory_func)
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2003-08-07 04:25:50 +02:00
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(bfd_vma memaddr, bfd_byte *myaddr, unsigned int length,
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2009-12-15 03:02:39 +01:00
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struct disassemble_info *dinfo);
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1999-05-03 09:29:11 +02:00
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/* Function which should be called if we get an error that we can't
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recover from. STATUS is the errno value from read_memory_func and
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MEMADDR is the address that we were trying to read. INFO is a
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pointer to this struct. */
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void (*memory_error_func)
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2009-12-15 03:02:39 +01:00
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(int status, bfd_vma memaddr, struct disassemble_info *dinfo);
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1999-05-03 09:29:11 +02:00
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/* Function called to print ADDR. */
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void (*print_address_func)
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2009-12-15 03:02:39 +01:00
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(bfd_vma addr, struct disassemble_info *dinfo);
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1999-05-03 09:29:11 +02:00
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/* Function called to determine if there is a symbol at the given ADDR.
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If there is, the function returns 1, otherwise it returns 0.
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This is used by ports which support an overlay manager where
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the overlay number is held in the top part of an address. In
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some circumstances we want to include the overlay number in the
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address, (normally because there is a symbol associated with
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that address), but sometimes we want to mask out the overlay bits. */
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int (* symbol_at_address_func)
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2009-12-15 03:02:39 +01:00
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(bfd_vma addr, struct disassemble_info *dinfo);
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1999-05-03 09:29:11 +02:00
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2003-11-14 16:12:44 +01:00
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/* Function called to check if a SYMBOL is can be displayed to the user.
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This is used by some ports that want to hide special symbols when
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displaying debugging outout. */
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bfd_boolean (* symbol_is_valid)
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2009-12-15 03:02:39 +01:00
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(asymbol *, struct disassemble_info *dinfo);
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2006-02-17 15:36:28 +01:00
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1999-05-03 09:29:11 +02:00
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/* These are for buffer_read_memory. */
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bfd_byte *buffer;
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bfd_vma buffer_vma;
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2000-02-21 13:01:27 +01:00
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unsigned int buffer_length;
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1999-05-03 09:29:11 +02:00
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/* This variable may be set by the instruction decoder. It suggests
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the number of bytes objdump should display on a single line. If
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the instruction decoder sets this, it should always set it to
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the same value in order to get reasonable looking output. */
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int bytes_per_line;
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2003-11-14 16:12:44 +01:00
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/* The next two variables control the way objdump displays the raw data. */
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1999-05-03 09:29:11 +02:00
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/* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
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/* output will look like this:
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00: 00000000 00000000
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with the chunks displayed according to "display_endian". */
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int bytes_per_chunk;
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enum bfd_endian display_endian;
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2006-02-17 15:36:28 +01:00
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/* Number of octets per incremented target address
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2001-10-30 16:20:14 +01:00
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Normally one, but some DSPs have byte sizes of 16 or 32 bits. */
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2000-02-21 13:01:27 +01:00
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unsigned int octets_per_byte;
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2000-02-03 19:12:55 +01:00
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2005-01-10 10:54:50 +01:00
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/* The number of zeroes we want to see at the end of a section before we
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start skipping them. */
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unsigned int skip_zeroes;
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/* The number of zeroes to skip at the end of a section. If the number
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of zeroes at the end is between SKIP_ZEROES_AT_END and SKIP_ZEROES,
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they will be disassembled. If there are fewer than
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SKIP_ZEROES_AT_END, they will be skipped. This is a heuristic
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attempt to avoid disassembling zeroes inserted by section
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alignment. */
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unsigned int skip_zeroes_at_end;
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2006-01-17 18:39:20 +01:00
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/* Whether the disassembler always needs the relocations. */
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bfd_boolean disassembler_needs_relocs;
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1999-05-03 09:29:11 +02:00
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/* Results from instruction decoders. Not all decoders yet support
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this information. This info is set each time an instruction is
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decoded, and is only valid for the last such instruction.
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To determine whether this decoder supports this information, set
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insn_info_valid to 0, decode an instruction, then check it. */
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char insn_info_valid; /* Branch info has been set. */
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char branch_delay_insns; /* How many sequential insn's will run before
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a branch takes effect. (0 = normal) */
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char data_size; /* Size of data reference in insn, in bytes */
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enum dis_insn_type insn_type; /* Type of instruction */
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bfd_vma target; /* Target address of branch or dref, if known;
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zero if unknown. */
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bfd_vma target2; /* Second target address for dref2 */
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1999-06-16 04:24:36 +02:00
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/* Command line options specific to the target disassembler. */
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char * disassembler_options;
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2015-06-22 17:53:27 +02:00
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/* If non-zero then try not disassemble beyond this address, even if
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there are values left in the buffer. This address is the address
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of the nearest symbol forwards from the start of the disassembly,
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and it is assumed that it lies on the boundary between instructions.
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If an instruction spans this address then this is an error in the
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file being disassembled. */
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bfd_vma stop_vma;
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1999-05-03 09:29:11 +02:00
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} disassemble_info;
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/* Standard disassemblers. Disassemble one instruction at the given
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2001-11-11 16:45:34 +01:00
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target address. Return number of octets processed. */
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2003-08-07 04:25:50 +02:00
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typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
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2012-08-13 16:52:54 +02:00
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extern int print_insn_aarch64 (bfd_vma, disassemble_info *);
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2003-08-07 04:25:50 +02:00
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extern int print_insn_alpha (bfd_vma, disassemble_info *);
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extern int print_insn_avr (bfd_vma, disassemble_info *);
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2005-09-30 17:12:52 +02:00
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extern int print_insn_bfin (bfd_vma, disassemble_info *);
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2006-09-17 01:51:50 +02:00
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extern int print_insn_big_arm (bfd_vma, disassemble_info *);
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extern int print_insn_big_mips (bfd_vma, disassemble_info *);
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2013-02-07 00:22:26 +01:00
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extern int print_insn_big_nios2 (bfd_vma, disassemble_info *);
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2006-09-17 01:51:50 +02:00
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extern int print_insn_big_powerpc (bfd_vma, disassemble_info *);
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extern int print_insn_big_score (bfd_vma, disassemble_info *);
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2007-06-29 16:09:34 +02:00
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extern int print_insn_cr16 (bfd_vma, disassemble_info *);
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2006-09-17 01:51:50 +02:00
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extern int print_insn_crx (bfd_vma, disassemble_info *);
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2003-08-07 04:25:50 +02:00
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extern int print_insn_d10v (bfd_vma, disassemble_info *);
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extern int print_insn_d30v (bfd_vma, disassemble_info *);
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extern int print_insn_dlx (bfd_vma, disassemble_info *);
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bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 13:18:16 +02:00
|
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extern int print_insn_epiphany (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_fr30 (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_frv (bfd_vma, disassemble_info *);
|
2015-01-28 06:06:43 +01:00
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extern int print_insn_ft32 (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_h8300 (bfd_vma, disassemble_info *);
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extern int print_insn_h8300h (bfd_vma, disassemble_info *);
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extern int print_insn_h8300s (bfd_vma, disassemble_info *);
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extern int print_insn_h8500 (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_hppa (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_i370 (bfd_vma, disassemble_info *);
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extern int print_insn_i386 (bfd_vma, disassemble_info *);
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extern int print_insn_i386_att (bfd_vma, disassemble_info *);
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extern int print_insn_i386_intel (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_i860 (bfd_vma, disassemble_info *);
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extern int print_insn_i960 (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_ia64 (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
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extern int print_insn_ip2k (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_iq2000 (bfd_vma, disassemble_info *);
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extern int print_insn_little_arm (bfd_vma, disassemble_info *);
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extern int print_insn_little_mips (bfd_vma, disassemble_info *);
|
2013-02-07 00:22:26 +01:00
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extern int print_insn_little_nios2 (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_little_powerpc (bfd_vma, disassemble_info *);
|
2016-11-01 17:45:57 +01:00
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extern int print_insn_riscv (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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|
extern int print_insn_little_score (bfd_vma, disassemble_info *);
|
2008-12-23 20:10:25 +01:00
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|
extern int print_insn_lm32 (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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|
extern int print_insn_m32c (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
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extern int print_insn_m32r (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
|
|
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extern int print_insn_m68hc11 (bfd_vma, disassemble_info *);
|
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extern int print_insn_m68hc12 (bfd_vma, disassemble_info *);
|
2012-05-15 14:55:51 +02:00
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extern int print_insn_m9s12x (bfd_vma, disassemble_info *);
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extern int print_insn_m9s12xg (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
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extern int print_insn_m68k (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_m88k (bfd_vma, disassemble_info *);
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extern int print_insn_mcore (bfd_vma, disassemble_info *);
|
2007-02-05 20:17:10 +01:00
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extern int print_insn_mep (bfd_vma, disassemble_info *);
|
2013-01-10 10:49:22 +01:00
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extern int print_insn_metag (bfd_vma, disassemble_info *);
|
Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 19:38:04 +02:00
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|
extern int print_insn_microblaze (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_mmix (bfd_vma, disassemble_info *);
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extern int print_insn_mn10200 (bfd_vma, disassemble_info *);
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extern int print_insn_mn10300 (bfd_vma, disassemble_info *);
|
2009-04-16 17:39:48 +02:00
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extern int print_insn_moxie (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_msp430 (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
|
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|
extern int print_insn_mt (bfd_vma, disassemble_info *);
|
2013-12-13 12:52:32 +01:00
|
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|
extern int print_insn_nds32 (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
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extern int print_insn_ns32k (bfd_vma, disassemble_info *);
|
2014-04-22 16:57:47 +02:00
|
|
|
|
extern int print_insn_or1k (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
|
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|
extern int print_insn_pdp11 (bfd_vma, disassemble_info *);
|
|
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|
|
extern int print_insn_pj (bfd_vma, disassemble_info *);
|
2016-12-30 11:39:46 +01:00
|
|
|
|
extern int print_insn_pru (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
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|
extern int print_insn_rs6000 (bfd_vma, disassemble_info *);
|
2006-02-17 15:36:28 +01:00
|
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|
extern int print_insn_s390 (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
|
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|
extern int print_insn_sh (bfd_vma, disassemble_info *);
|
2006-09-17 01:51:50 +02:00
|
|
|
|
extern int print_insn_sh64 (bfd_vma, disassemble_info *);
|
|
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|
extern int print_insn_sh64x_media (bfd_vma, disassemble_info *);
|
|
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|
extern int print_insn_sparc (bfd_vma, disassemble_info *);
|
2006-10-25 08:49:21 +02:00
|
|
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|
extern int print_insn_spu (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
|
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|
extern int print_insn_tic30 (bfd_vma, disassemble_info *);
|
|
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|
extern int print_insn_tic4x (bfd_vma, disassemble_info *);
|
|
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|
extern int print_insn_tic54x (bfd_vma, disassemble_info *);
|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
(BFD32_BACKENDS): Add elf32-tic6x.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
* Makefile.in: Regenerate.
* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
(bfd_archures_list): Update.
* config.bfd (tic6x-*-elf): New.
* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
New.
* configure: Regenerate.
* cpu-tic6x.c, elf32-tic6x.c: New.
* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
(_bfd_target_vector): Update.
* bfd-in2.h, libbfd.h: Regenerate.
binutils:
* MAINTAINERS: Add self as TI C6X maintainer.
* NEWS: Add news entry for TI C6X support.
* readelf.c: Include elf/tic6x.h.
(guess_is_rela): Handle EM_TI_C6000.
(dump_relocations): Likewise.
(get_tic6x_dynamic_type): New.
(get_dynamic_type): Call it.
(get_machine_flags): Handle EF_C6000_REL.
(get_osabi_name): Handle machine-specific values only for relevant
machines. Handle C6X values.
(get_tic6x_segment_type): New.
(get_segment_type): Call it.
(get_tic6x_section_type_name): New.
(get_section_type_name): Call it.
(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
EM_TI_C6000.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
* Makefile.in: Regenerate.
* NEWS: Add news entry for TI C6X support.
* app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle
TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in
operands if TC_KEEP_OPERAND_SPACES.
* configure.tgt (tic6x-*-*): New.
* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
TC_PREDICATE_END_CHAR): Define.
* config/tc-tic6x.c, config/tc-tic6x.h: New.
* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TIC6X): Define.
* doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi.
* doc/c-tic6x.texi: New.
gas/testsuite:
* gas/tic6x: New directory and testcases.
include:
* dis-asm.h (print_insn_tic6x): Declare.
include/elf:
* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
* tic6x.h: New.
include/opcode:
* tic6x-control-registers.h, tic6x-insn-formats.h,
tic6x-opcode-table.h, tic6x.h: New.
ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
eelf32_tic6x_le.o.
(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
* NEWS: Add news entry for TI C6X support.
* configure.tgt (tic6x-*-*): New.
* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.
ld/testsuite:
* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
* ld-tic6x: New directory and testcases.
opcodes:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
* Makefile.in: Regenerate.
* configure.in (bfd_tic6x_arch): New.
* configure: Regenerate.
* disassemble.c (ARCH_tic6x): Define if ARCH_all.
(disassembler): Handle TI C6X.
* tic6x-dis.c: New.
2010-03-25 22:12:36 +01:00
|
|
|
|
extern int print_insn_tic6x (bfd_vma, disassemble_info *);
|
2003-08-07 04:25:50 +02:00
|
|
|
|
extern int print_insn_tic80 (bfd_vma, disassemble_info *);
|
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 17:18:54 +02:00
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extern int print_insn_tilegx (bfd_vma, disassemble_info *);
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extern int print_insn_tilepro (bfd_vma, disassemble_info *);
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2003-08-07 04:25:50 +02:00
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extern int print_insn_v850 (bfd_vma, disassemble_info *);
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extern int print_insn_vax (bfd_vma, disassemble_info *);
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2014-12-06 16:25:55 +01:00
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extern int print_insn_visium (bfd_vma, disassemble_info *);
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2003-08-07 04:25:50 +02:00
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extern int print_insn_w65 (bfd_vma, disassemble_info *);
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2006-09-17 01:51:50 +02:00
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extern int print_insn_xc16x (bfd_vma, disassemble_info *);
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2012-05-03 15:12:08 +02:00
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extern int print_insn_xgate (bfd_vma, disassemble_info *);
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2003-08-07 04:25:50 +02:00
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extern int print_insn_xstormy16 (bfd_vma, disassemble_info *);
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extern int print_insn_xtensa (bfd_vma, disassemble_info *);
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2006-09-17 01:51:50 +02:00
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extern int print_insn_z80 (bfd_vma, disassemble_info *);
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extern int print_insn_z8001 (bfd_vma, disassemble_info *);
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extern int print_insn_z8002 (bfd_vma, disassemble_info *);
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2009-09-29 16:17:19 +02:00
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extern int print_insn_rx (bfd_vma, disassemble_info *);
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2011-11-02 04:09:11 +01:00
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extern int print_insn_rl78 (bfd_vma, disassemble_info *);
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2015-04-30 21:25:49 +02:00
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extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *);
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extern int print_insn_rl78_g13 (bfd_vma, disassemble_info *);
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extern int print_insn_rl78_g14 (bfd_vma, disassemble_info *);
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2003-08-07 04:25:50 +02:00
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2015-10-07 15:20:19 +02:00
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extern disassembler_ftype arc_get_disassembler (bfd *);
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2003-08-07 04:25:50 +02:00
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extern disassembler_ftype cris_get_disassembler (bfd *);
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2015-04-30 21:25:49 +02:00
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extern disassembler_ftype rl78_get_disassembler (bfd *);
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2003-08-07 04:25:50 +02:00
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2012-08-13 16:52:54 +02:00
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extern void print_aarch64_disassembler_options (FILE *);
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2007-02-02 16:27:04 +01:00
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extern void print_i386_disassembler_options (FILE *);
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2003-08-07 04:25:50 +02:00
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extern void print_mips_disassembler_options (FILE *);
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extern void print_ppc_disassembler_options (FILE *);
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2016-11-01 17:45:57 +01:00
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extern void print_riscv_disassembler_options (FILE *);
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2003-08-07 04:25:50 +02:00
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extern void print_arm_disassembler_options (FILE *);
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2016-07-20 18:08:07 +02:00
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extern void print_arc_disassembler_options (FILE *);
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2003-08-07 04:25:50 +02:00
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extern void parse_arm_disassembler_option (char *);
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2008-04-10 15:36:43 +02:00
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extern void print_s390_disassembler_options (FILE *);
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2006-09-17 01:51:50 +02:00
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extern int get_arm_regname_num_options (void);
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extern int set_arm_regname_option (int);
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extern int get_arm_regnames (int, const char **, const char **, const char *const **);
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2012-08-13 16:52:54 +02:00
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extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
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2003-11-14 16:12:44 +01:00
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extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
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2012-03-15 13:58:48 +01:00
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extern void disassemble_init_powerpc (struct disassemble_info *);
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1999-06-16 04:24:36 +02:00
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1999-05-03 09:29:11 +02:00
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/* Fetch the disassembler for a given BFD, if that support is available. */
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2003-08-07 04:25:50 +02:00
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extern disassembler_ftype disassembler (bfd *);
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1999-05-03 09:29:11 +02:00
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2003-11-14 16:12:44 +01:00
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/* Amend the disassemble_info structure as necessary for the target architecture.
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Should only be called after initialising the info->arch field. */
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2009-12-15 03:02:39 +01:00
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extern void disassemble_init_for_target (struct disassemble_info * dinfo);
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2003-11-14 16:12:44 +01:00
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2000-01-27 22:44:26 +01:00
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/* Document any target specific options available from the disassembler. */
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2003-08-07 04:25:50 +02:00
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extern void disassembler_usage (FILE *);
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2000-01-27 22:44:26 +01:00
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1999-05-03 09:29:11 +02:00
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/* This block of definitions is for particular callers who read instructions
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into a buffer before calling the instruction decoder. */
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/* Here is a function which callers may wish to use for read_memory_func.
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It gets bytes from a buffer. */
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extern int buffer_read_memory
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2003-08-07 04:25:50 +02:00
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(bfd_vma, bfd_byte *, unsigned int, struct disassemble_info *);
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1999-05-03 09:29:11 +02:00
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/* This function goes with buffer_read_memory.
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It prints a message using info->fprintf_func and info->stream. */
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2003-08-07 04:25:50 +02:00
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extern void perror_memory (int, bfd_vma, struct disassemble_info *);
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1999-05-03 09:29:11 +02:00
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/* Just print the address in hex. This is included for completeness even
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though both GDB and objdump provide their own (to print symbolic
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addresses). */
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extern void generic_print_address
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2003-08-07 04:25:50 +02:00
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(bfd_vma, struct disassemble_info *);
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1999-05-03 09:29:11 +02:00
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/* Always true. */
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extern int generic_symbol_at_address
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2003-08-07 04:25:50 +02:00
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(bfd_vma, struct disassemble_info *);
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1999-05-03 09:29:11 +02:00
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2006-02-17 15:36:28 +01:00
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/* Also always true. */
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2003-11-14 16:12:44 +01:00
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extern bfd_boolean generic_symbol_is_valid
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(asymbol *, struct disassemble_info *);
|
2006-02-17 15:36:28 +01:00
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2003-09-04 01:43:18 +02:00
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/* Method to initialize a disassemble_info struct. This should be
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called by all applications creating such a struct. */
|
2009-12-15 03:02:39 +01:00
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extern void init_disassemble_info (struct disassemble_info *dinfo, void *stream,
|
2003-09-04 01:43:18 +02:00
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fprintf_ftype fprintf_func);
|
1999-05-03 09:29:11 +02:00
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2003-09-04 01:43:18 +02:00
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/* For compatibility with existing code. */
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#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
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init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
|
1999-05-03 09:29:11 +02:00
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#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
|
2003-09-04 01:43:18 +02:00
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init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
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1999-05-03 09:29:11 +02:00
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1999-12-16 02:23:39 +01:00
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#ifdef __cplusplus
|
2002-09-19 17:48:16 +02:00
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}
|
1999-12-16 02:23:39 +01:00
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#endif
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1999-05-03 09:29:11 +02:00
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#endif /* ! defined (DIS_ASM_H) */
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