binutils-gdb/bfd/archures.c

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/* BFD library support routines for architectures.
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Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
2000, 2001, 2002, 2003, 2004, 2005
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
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Free Software Foundation, Inc.
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Hacked by John Gilmore and Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
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This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
#include "safe-ctype.h"
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/*
SECTION
Architectures
BFD keeps one atom in a BFD describing the
architecture of the data attached to the BFD: a pointer to a
<<bfd_arch_info_type>>.
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Pointers to structures can be requested independently of a BFD
so that an architecture's information can be interrogated
without access to an open BFD.
The architecture information is provided by each architecture package.
The set of default architectures is selected by the macro
<<SELECT_ARCHITECTURES>>. This is normally set up in the
@file{config/@var{target}.mt} file of your choice. If the name is not
defined, then all the architectures supported are included.
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When BFD starts up, all the architectures are called with an
initialize method. It is up to the architecture back end to
insert as many items into the list of architectures as it wants to;
generally this would be one for each machine and one for the
default case (an item with a machine field of 0).
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BFD's idea of an architecture is implemented in @file{archures.c}.
*/
/*
SUBSECTION
bfd_architecture
DESCRIPTION
This enum gives the object file's CPU architecture, in a
global sense---i.e., what processor family does it belong to?
Another field indicates which processor within
the family is in use. The machine gives a number which
distinguishes different versions of the architecture,
containing, for example, 2 and 3 for Intel i960 KA and i960 KB,
and 68020 and 68030 for Motorola 68020 and 68030.
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.enum bfd_architecture
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.{
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. bfd_arch_unknown, {* File arch not known. *}
. bfd_arch_obscure, {* Arch known, not one of these. *}
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. bfd_arch_m68k, {* Motorola 68xxx *}
.#define bfd_mach_m68000 1
.#define bfd_mach_m68008 2
.#define bfd_mach_m68010 3
.#define bfd_mach_m68020 4
.#define bfd_mach_m68030 5
.#define bfd_mach_m68040 6
.#define bfd_mach_m68060 7
.#define bfd_mach_cpu32 8
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.#define bfd_mach_mcf5200 9
.#define bfd_mach_mcf5206e 10
.#define bfd_mach_mcf5307 11
.#define bfd_mach_mcf5407 12
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.#define bfd_mach_mcf528x 13
.#define bfd_mach_mcfv4e 14
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.#define bfd_mach_mcf521x 15
.#define bfd_mach_mcf5249 16
.#define bfd_mach_mcf547x 17
.#define bfd_mach_mcf548x 18
. bfd_arch_vax, {* DEC Vax *}
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. bfd_arch_i960, {* Intel 960 *}
. {* The order of the following is important.
. lower number indicates a machine type that
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. only accepts a subset of the instructions
. available to machines with higher numbers.
. The exception is the "ca", which is
. incompatible with all other machines except
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. "core". *}
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.
.#define bfd_mach_i960_core 1
.#define bfd_mach_i960_ka_sa 2
.#define bfd_mach_i960_kb_sb 3
.#define bfd_mach_i960_mc 4
.#define bfd_mach_i960_xa 5
.#define bfd_mach_i960_ca 6
.#define bfd_mach_i960_jx 7
.#define bfd_mach_i960_hx 8
.
. bfd_arch_or32, {* OpenRISC 32 *}
.
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. bfd_arch_a29k, {* AMD 29000 *}
. bfd_arch_sparc, {* SPARC *}
.#define bfd_mach_sparc 1
.{* The difference between v8plus and v9 is that v9 is a true 64 bit env. *}
.#define bfd_mach_sparc_sparclet 2
.#define bfd_mach_sparc_sparclite 3
.#define bfd_mach_sparc_v8plus 4
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.#define bfd_mach_sparc_v8plusa 5 {* with ultrasparc add'ns. *}
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.#define bfd_mach_sparc_sparclite_le 6
.#define bfd_mach_sparc_v9 7
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.#define bfd_mach_sparc_v9a 8 {* with ultrasparc add'ns. *}
.#define bfd_mach_sparc_v8plusb 9 {* with cheetah add'ns. *}
.#define bfd_mach_sparc_v9b 10 {* with cheetah add'ns. *}
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.{* Nonzero if MACH has the v9 instruction set. *}
.#define bfd_mach_sparc_v9_p(mach) \
. ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
. && (mach) != bfd_mach_sparc_sparclite_le)
.{* Nonzero if MACH is a 64 bit sparc architecture. *}
.#define bfd_mach_sparc_64bit_p(mach) \
. ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
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. bfd_arch_mips, {* MIPS Rxxxx *}
.#define bfd_mach_mips3000 3000
.#define bfd_mach_mips3900 3900
.#define bfd_mach_mips4000 4000
.#define bfd_mach_mips4010 4010
.#define bfd_mach_mips4100 4100
.#define bfd_mach_mips4111 4111
.#define bfd_mach_mips4120 4120
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.#define bfd_mach_mips4300 4300
.#define bfd_mach_mips4400 4400
.#define bfd_mach_mips4600 4600
.#define bfd_mach_mips4650 4650
.#define bfd_mach_mips5000 5000
.#define bfd_mach_mips5400 5400
.#define bfd_mach_mips5500 5500
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.#define bfd_mach_mips6000 6000
.#define bfd_mach_mips7000 7000
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.#define bfd_mach_mips8000 8000
.#define bfd_mach_mips9000 9000
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.#define bfd_mach_mips10000 10000
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.#define bfd_mach_mips12000 12000
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.#define bfd_mach_mips16 16
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.#define bfd_mach_mips5 5
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.#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *}
.#define bfd_mach_mipsisa32 32
[ bfd/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
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.#define bfd_mach_mipsisa32r2 33
.#define bfd_mach_mipsisa64 64
[ bfd/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
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.#define bfd_mach_mipsisa64r2 65
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. bfd_arch_i386, {* Intel 386 *}
.#define bfd_mach_i386_i386 1
.#define bfd_mach_i386_i8086 2
.#define bfd_mach_i386_i386_intel_syntax 3
.#define bfd_mach_x86_64 64
.#define bfd_mach_x86_64_intel_syntax 65
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. bfd_arch_we32k, {* AT&T WE32xxx *}
. bfd_arch_tahoe, {* CCI/Harris Tahoe *}
. bfd_arch_i860, {* Intel 860 *}
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. bfd_arch_i370, {* IBM 360/370 Mainframes *}
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. bfd_arch_romp, {* IBM ROMP PC/RT *}
. bfd_arch_alliant, {* Alliant *}
. bfd_arch_convex, {* Convex *}
. bfd_arch_m88k, {* Motorola 88xxx *}
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. bfd_arch_m98k, {* Motorola 98xxx *}
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. bfd_arch_pyramid, {* Pyramid Technology *}
. bfd_arch_h8300, {* Renesas H8/300 (formerly Hitachi H8/300) *}
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.#define bfd_mach_h8300 1
.#define bfd_mach_h8300h 2
.#define bfd_mach_h8300s 3
.#define bfd_mach_h8300hn 4
.#define bfd_mach_h8300sn 5
.#define bfd_mach_h8300sx 6
.#define bfd_mach_h8300sxn 7
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. bfd_arch_pdp11, {* DEC PDP-11 *}
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. bfd_arch_powerpc, {* PowerPC *}
.#define bfd_mach_ppc 32
.#define bfd_mach_ppc64 64
.#define bfd_mach_ppc_403 403
.#define bfd_mach_ppc_403gc 4030
.#define bfd_mach_ppc_505 505
.#define bfd_mach_ppc_601 601
.#define bfd_mach_ppc_602 602
.#define bfd_mach_ppc_603 603
.#define bfd_mach_ppc_ec603e 6031
.#define bfd_mach_ppc_604 604
.#define bfd_mach_ppc_620 620
.#define bfd_mach_ppc_630 630
.#define bfd_mach_ppc_750 750
.#define bfd_mach_ppc_860 860
.#define bfd_mach_ppc_a35 35
.#define bfd_mach_ppc_rs64ii 642
.#define bfd_mach_ppc_rs64iii 643
.#define bfd_mach_ppc_7400 7400
.#define bfd_mach_ppc_e500 500
1999-05-03 09:29:11 +02:00
. bfd_arch_rs6000, {* IBM RS/6000 *}
.#define bfd_mach_rs6k 6000
.#define bfd_mach_rs6k_rs1 6001
.#define bfd_mach_rs6k_rsc 6003
.#define bfd_mach_rs6k_rs2 6002
1999-05-03 09:29:11 +02:00
. bfd_arch_hppa, {* HP PA RISC *}
.#define bfd_mach_hppa10 10
.#define bfd_mach_hppa11 11
.#define bfd_mach_hppa20 20
.#define bfd_mach_hppa20w 25
1999-05-03 09:29:11 +02:00
. bfd_arch_d10v, {* Mitsubishi D10V *}
.#define bfd_mach_d10v 1
1999-10-25 15:57:39 +02:00
.#define bfd_mach_d10v_ts2 2
.#define bfd_mach_d10v_ts3 3
1999-05-03 09:29:11 +02:00
. bfd_arch_d30v, {* Mitsubishi D30V *}
2002-05-28 16:08:47 +02:00
. bfd_arch_dlx, {* DLX *}
. bfd_arch_m68hc11, {* Motorola 68HC11 *}
. bfd_arch_m68hc12, {* Motorola 68HC12 *}
.#define bfd_mach_m6812_default 0
.#define bfd_mach_m6812 1
.#define bfd_mach_m6812s 2
1999-05-03 09:29:11 +02:00
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1
.#define bfd_mach_z8002 2
. bfd_arch_h8500, {* Renesas H8/500 (formerly Hitachi H8/500) *}
. bfd_arch_sh, {* Renesas / SuperH SH (formerly Hitachi SH) *}
.#define bfd_mach_sh 1
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 01:33:36 +01:00
.#define bfd_mach_sh2 0x20
.#define bfd_mach_sh_dsp 0x2d
include/elf/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh.h (EF_SH2A_NOFPU): New. 2003-12-01 Michael Snyder <msnyder@redhat.com> * sh.h (EF_SH2A): New. bfd/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * archures.c (bfd_mach_sh2a_nofpu): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH2A_NOFPU_NEXT): New. (arch_info_struct): Add sh2a_nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu. 2003-12-29 DJ Delorie <dj@redhat.com> * reloc.c: Add relocs for sh2a. * bfd-in2.h: Regenerate. * libbfd.hh: Regenerate. 2003-12-01 Michael Snyder <msnyder@redhat.com> * archures.c (bfd_mach_sh2a): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums. (SH2A_NEXT): New. (arch_info_struct): Add sh2a. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a. binutils/ChangeLog: * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and EF_SH2A_NOFPU. gas/ChangeLog: Introduce SH2a support. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (get_specific): Change arch_sh2a_up to arch_sh2a_nofpu_up. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition to end of conditional expression. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c: Add sh2a-nofpu support. 2003-12-29 DJ Delorie <dj@redhat.com> * tc-sh.c: Add sh2a support. (parse_reg): Add tbr. (parse_at): Support @@(disp,tbr). (get_specific): Support sh2a opcodes. (insert4): New, for 4 byte relocs. (build_Mytes): Support sh2a opcodes. (md_apply_fix3_Mytes): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * config/tc-sh.c (md_parse_option): Handle sh2a. (sh_elf_final_processing): Ditto. gas/testsuite/ChangeLog: 2003-12-30 DJ Delorie <dj@redhat.com> * gas/sh/sh2a.s: New. * gas/sh/sh2a.d: New. * gas/sh/basic.exp: Add it.
2004-07-29 07:17:41 +02:00
.#define bfd_mach_sh2a 0x2a
.#define bfd_mach_sh2a_nofpu 0x2b
.#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
.#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
.#define bfd_mach_sh2a_or_sh4 0x2a3
.#define bfd_mach_sh2a_or_sh3e 0x2a4
2003-01-23 19:50:57 +01:00
.#define bfd_mach_sh2e 0x2e
1999-05-03 09:29:11 +02:00
.#define bfd_mach_sh3 0x30
2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> bfd: * Makefile.am: Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh3_nommu . * bfd-in2.h: Regenerate. * cpu-sh.c: Add sh3-nommu architecture. (bfd_to_arch_table): Create new table. (sh_get_arch_from_bfd_mach): Create new function. (sh_get_arch_up_from_bfd_mach): Create new function. (sh_merge_bfd_arch): Create new function. * elf32-sh.c (sh_ef_bfd_table): Add table. (sh_elf_check_relocs): Replace switch statement with use of sh_ef_bfd_table . (sh_elf_get_flags_from_mach): Add new function. (sh_find_elf_flags): Likewise. (sh_elf_copy_private_data): Replace most of non-elf contents with a call to sh_merge_bfd_arch() . gas: * Makefile.am: Regenerate dependecies. * Makefile.in: Regenerate. * config/tc-sh.c (valid_arch): Make unsigned. (preset_target_arch): Likewise. (md_begin): Use new architecture flags system. (get_specific): Likewise. (assemble_ppi): Likewise. (md_assemble): Likewise. Also fix error check for bad opcodes. (md_parse_option): Likewise. Also generate -isa values according to the table in bfd/cpu-sh.c instead of just constants. Also allow <arch>-up ISA variants. (sh_elf_final_processing): Replace if-else chain with a call to sh_find_elf_flags(). * testsuite/gas/sh/arch: New directory. * testsuite/gas/sh/arch/arch.exp: New test script. * testsuite/gas/sh/arch/arch_expected.txt: New file. * testsuite/gas/sh/arch/sh.s: New file. * testsuite/gas/sh/arch/sh2.s: New file. * testsuite/gas/sh/arch/sh-dsp.s: New file. * testsuite/gas/sh/arch/sh2e.s: New file. * testsuite/gas/sh/arch/sh3-nommu.s: New file. * testsuite/gas/sh/arch/sh3.s: New file. * testsuite/gas/sh/arch/sh3-dsp.s: New file. * testsuite/gas/sh/arch/sh3e.s: New file. * testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file. * testsuite/gas/sh/arch/sh4-nofpu.s: New file. * testsuite/gas/sh/arch/sh4.s: New file. * testsuite/gas/sh/arch/sh4a-nofpu.s: New file. * testsuite/gas/sh/arch/sh4al-dsp.s: New file. * testsuite/gas/sh/arch/sh4a.s: New file. include/elf: * sh.h (EF_SH_HAS_DSP): Remove. (EF_SH_HAS_FP): Remove. (EF_SH_MERGE_MACH): Remove. (EF_SH4_NOFPU): Convert to decimal. (EF_SH4A_NOFPU): Likewise. (EF_SH4_NOMMU_NOFPU): Likewise. (EF_SH3_NOMMU): Add new macro. (EF_SH_BFD_TABLE): Likewise. (sh_find_elf_flags): Add prototype. (sh_elf_get_flags_from_mach): Likewise. opcodes: * sh-dis.c (target_arch): Make unsigned. (print_insn_sh): Replace (most of) switch with a call to sh_get_arch_from_bfd_mach(). Also use new architecture flags system. * sh-opc.h: Redefine architecture flags values. Add sh3-nommu architecture. Reorganise <arch>_up macros so they make more visual sense. (SH_MERGE_ARCH_SET): Define new macro. (SH_VALID_BASE_ARCH_SET): Likewise. (SH_VALID_MMU_ARCH_SET): Likewise. (SH_VALID_CO_ARCH_SET): Likewise. (SH_VALID_ARCH_SET): Likewise. (SH_MERGE_ARCH_SET_VALID): Likewise. (SH_ARCH_SET_HAS_FPU): Likewise. (SH_ARCH_SET_HAS_DSP): Likewise. (SH_ARCH_UNKNOWN_ARCH): Likewise. (sh_get_arch_from_bfd_mach): Add prototype. (sh_get_arch_up_from_bfd_mach): Likewise. (sh_get_bfd_mach_from_arch_set): Likewise. (sh_merge_bfd_arc): Likewise. ld: * testsuite/ld-sh/arch/arch.exp: New test script. * testsuite/ld-sh/arch/arch_expected.txt: New file. * testsuite/ld-sh/arch/sh.s: New file. * testsuite/ld-sh/arch/sh2.s: New file. * testsuite/ld-sh/arch/sh-dsp.s: New file. * testsuite/ld-sh/arch/sh2e.s: New file. * testsuite/ld-sh/arch/sh3-nommu.s: New file. * testsuite/ld-sh/arch/sh3.s: New file. * testsuite/ld-sh/arch/sh3-dsp.s: New file. * testsuite/ld-sh/arch/sh3e.s: New file. * testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file. * testsuite/ld-sh/arch/sh4-nofpu.s: New file. * testsuite/ld-sh/arch/sh4.s: New file. * testsuite/ld-sh/arch/sh4a-nofpu.s: New file. * testsuite/ld-sh/arch/sh4al-dsp.s: New file. * testsuite/ld-sh/arch/sh4a.s: New file.
2004-05-28 14:32:10 +02:00
.#define bfd_mach_sh3_nommu 0x31
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 01:33:36 +01:00
.#define bfd_mach_sh3_dsp 0x3d
1999-05-03 09:29:11 +02:00
.#define bfd_mach_sh3e 0x3e
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 01:33:36 +01:00
.#define bfd_mach_sh4 0x40
.#define bfd_mach_sh4_nofpu 0x41
.#define bfd_mach_sh4_nommu_nofpu 0x42
.#define bfd_mach_sh4a 0x4a
.#define bfd_mach_sh4a_nofpu 0x4b
.#define bfd_mach_sh4al_dsp 0x4d
Contribute sh64-elf. 2002-01-23 Alexandre Oliva <aoliva@redhat.com> * reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16, R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16, R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16, R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16, R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16, R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16, R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16, R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8, R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64): New relocs. * libbfd.h, bfd-in2.h: Rebuilt. * elf32-sh.c (sh_elf_howto_table): Define new relocs. (sh_reloc_map): Map them. (PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le, elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry, elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset, elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset, movi_shori_putval) [INCLUDE_SHMEDIA]: New. (elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add datalabel_got_offset. (sh_elf_link_hash_newfunc): Initialize it. (sh_elf_relocate_section): Augment the scope of seen_stt_datalabel. Introduce GOTPLT support. Extend GOTPC, PLT, GOT and GOTOFF handling to new SHmedia relocation types. Support GOT_BIAS. (sh_elf_check_relocs): Likewise. (sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in PLT entries using movi_shori_putval. Support GOT_BIAS. (sh_elf_finish_dynamic_sections): Likewise. * elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to relocation, it's now done by the caller. (GOT_BIAS): New. * elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt, elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset, elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset, elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER, elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry, elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse, sh64_elf64_hash_table): New. (sh_elf64_howto_table): Introduce new relocs. (sh_elf64_info_to_howto): Accept new PIC relocs. (sh_elf64_relocate_section): Augment the scope of seen_stt_datalabel. Support new PIC relocs. (sh_elf64_check_relocs): Support new PIC relocs. (elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le, elf_sh64_plt_entry_be, elf_sh64_plt_entry_le, elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le, elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry, sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create, movi_shori_putval, movi_3shori_putval, sh64_elf64_create_dynamic_sections, sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies, sh64_elf64_size_dynamic_sections, sh64_elf64_finish_dynamic_symbol, sh64_elf64_finish_dynamic_sections): New. (elf_backend_create_dynamic-sections, bfd_elf64_bfd_link_hash_table_create, elf_backend_adjust_dynamic_symbol, elf_backend_size_dynamic_sections, elf_backend_finish_dynamic_symbol, elf_backend_finish_dynamic_sections, elf_backend_want_got_plt, elf_backend_plt_readonly, elf_backend_want_plt_sym, elf_backend_got_header_size, elf_backend_plt_header_size): Define. 2001-05-16 Alexandre Oliva <aoliva@redhat.com> * elf32-sh.c: Renumbered and renamed some SH5 relocations to match official numbers and names; moved unmaching ones to the range 0xf2-0xff. * elf32-sh64.c, elf64-sh64.c: Likewise. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia sections. 2001-03-12 DJ Delorie <dj@redhat.com> * elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must be aligned. * elf64-sh64.c (sh_elf64_relocate_section): Ditto. 2001-01-14 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define. (sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a .cranges section with SEC_SORT_ENTRIES set. (sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an incoming sorted .cranges section. (sh64_bfd_elf_copy_private_section_data): New. (sh64_elf_final_write_processing): Only sort .cranges and modify start address if called by linker. 2001-01-08 Ben Elliston <bje@redhat.com> * elf32-sh64.c (sh64_elf_final_write_processing): Activate Hans-Peter Nilsson's set bit 0 patch from 2001-01-06. * elf64-sh64.c (sh64_elf64_final_write_processing): Ditto. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh_elf64_howto_table): No open brace at start of line. Add comments before all entries. <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing comment. (sh_elf64_reloc): Correct head comment. (sh_elf64_relocate_section): Correct spacing. <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. <case R_SH_SHMEDIA_CODE>: New case. (sh_elf64_gc_mark_hook): Correct spacing. (sh_elf64_check_relocs): Ditto. * elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>: New case. * elf32-sh.c: Correct #endif comments for #ifndef-wrapped functions. (sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct, clarify describing comment. Add comments before all entries. (sh_elf_relocate_section) <relocating for a local symbol>: Do not honour STO_SH5_ISA32; instead call reloc_dangerous callback. 2001-01-06 Hans-Peter Nilsson <hpn@cygnus.com> Sort .cranges section in final link. Prepare to set bit 0 on entry address. * elf32-sh64.c (struct sh64_find_section_vma_data): New. (sh64_elf_link_output_symbol_hook): Fix typo in prototype. (sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming .cranges section. (sh64_backend_section_from_shdr): New, to recognize SHT_SH5_CR_SORTED on incoming .cranges section. (elf_backend_section_from_shdr): Define. (sh64_elf_final_write_processing): Sort outgoing .cranges section. (New, temporarily disabled:) Set bit 0 on entry address according to ISA type. (sh64_find_section_for_address): New. (crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb, crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c. (sh64_address_in_cranges): Move here from opcodes/sh64-dis.c. Use bfd_malloc, not xmalloc. (sh64_get_contents_type): Move here from opcodes/sh64-dis.c. Make global. * elf32-sh64.c (sh64_elf64_final_write_processing): New, (but temporarily disabled) setting bit 0 on entry address. (elf_backend_final_write_processing): Define. 2001-01-05 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to be a proper relocation for PTA and PTB rather than a marker. <R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2, R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16, R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>: Zero src_mask. * elf64-sh64.c: Ditto. (sh_elf64_relocate_section) <case R_SH_PT_16>: New case. * elf32-sh64.c: Include opcodes/sh64-opc.h (shmedia_prepare_reloc): Take a bfd_link_info pointer as first argument. Drop const qualifiers from "bfd *" and "bfd_byte *" parameters. No unused parameters. Caller changed. <case R_SH_PT_16>: New case. * Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h. * Makefile.in: Regenerate. 2000-12-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for all code sections. (sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh64_elf_merge_private_data): Ditto. * elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data to access stored section flags. (sh64_elf_final_write_processing): Return immediately unless called by linker. Use sh64_elf_section_data (cranges) to get size of linker-generated cranges entries. (sh64_elf_copy_private_data): Add missing "return true". (sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5. (sh_elf64_merge_private_data): Ditto. 2000-12-19 Hans-Peter Nilsson <hpn@cygnus.com> * elf64-sh64.c (sh64_elf64_fake_sections): New, copy of elf64-sh64.c:sh64_elf_fake_sections. (elf_backend_fake_sections): Define as sh64_elf64_fake_sections. 2000-12-18 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete. (sh64_elf_final_write_processing): New. (elf_backend_final_write_processing): Define. (sh64_elf_fake_sections): Get header flags from tdata field. (sh64_elf_copy_private_data): Do not call sh64_elf_copy_private_data_internal, just copy e_flags field. (sh64_elf_merge_private_data): Do not call sh64_elf_copy_private_data_internal. 2000-12-12 Hans-Peter Nilsson <hpn@cygnus.com> Remove EF_SH64_ABI64, let ELF size make difference. Remove SH64-specific BFD section flag. * elf32-sh64.c (sh64_elf_fake_sections): Recognize section as containing SHmedia through elf_section_data (asect)->tdata non-zero, not using a BFD section flag. (sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64. (sh64_elf_merge_private_data): Similar. (elf_backend_section_flags): Don't define. (sh64_elf_backend_section_flags): Delete. * elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64, not EF_SH64_ABI64. (sh_elf64_merge_private_data): Similar. * section.c (Section flags definitions): Don't define SEC_SH_ISA_SHMEDIA. (bfd-in2.h): Regenerate. 2000-12-09 Hans-Peter Nilsson <hpn@cygnus.com> Make DataLabel references work with partial linking. * elf32-sh64.c: Fix formatting. (sh64_elf_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf_link_output_symbol_hook. (sh64_elf_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. * elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New. (elf_backend_link_output_symbol_hook): Define to sh64_elf64_link_output_symbol_hook. (sh64_elf64_add_symbol_hook): Make DataLabel symbol just global undefined if partial linking. Adjust sanity check. 2000-12-07 Hans-Peter Nilsson <hpn@cygnus.com> Implement semantics for inter-file DataLabel references. * elf64-sh64.c (DATALABEL_SUFFIX): Define. (sh64_elf64_add_symbol_hook): New. (sh_elf64_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. (elf_backend_add_symbol_hook): Define to sh64_elf64_add_symbol_hook. * elf64-sh32.c: Tweak comments. (DATALABEL_SUFFIX): Define. (sh64_elf_add_symbol_hook): New. (elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook. * elf32-sh.c (sh_elf_relocate_section): If passing an indirect symbol with st_type STT_DATALABEL on the way to a symbol with st_other STO_SH5_ISA32, do not bitor 1 to the relocation. 2000-12-05 Hans-Peter Nilsson <hpn@cygnus.com> Pass through STT_DATALABEL. * elf32-sh64.c (sh64_elf_get_symbol_type): New. (elf_backend_get_symbol_type): Define. * elf64-sh64.c (sh64_elf64_get_symbol_type): New. (elf_backend_get_symbol_type): Define. 2000-11-30 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c: Tweak comments. (sh64_elf_copy_private_data_internal): Add prototype. (bfd_elf32_bfd_set_private_flags): Define. (sh64_elf_copy_private_data_internal): Compare machine name, not textual BFD target name, to check whether to copy section flag SHF_SH5_ISA32. (sh64_elf_merge_private_data): Validize bfd_get_arch_size. Tweak section-contents-type-mismatch message. (shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers. Validize reloc-types. * elf64-sh64.c: New file. * targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare. * Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo. (BFD64_BACKENDS_CFILES): Add elf64-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure.in: Handle bfd_elf64_sh64_vec and bfd_elf64_sh64l_vec. * configure: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. 2000-11-29 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize anything else but EF_SH64 and EF_SH64_ABI64. (sh64_elf_merge_private_data): Emit error for anything else but EF_SH64 and EF_SH64_ABI64. * config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec from targ_selvecs. * configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec as a temporary measure. * configure: Regenerate. 2000-11-27 Hans-Peter Nilsson <hpn@cygnus.com> * cpu-sh.c (arch_info_struct): Include sh5 item unconditionalized. * config.bfd (sh64-*-elf*): Do not set targ_cflags. Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec, bfd_elf32_shblin_vec and bfd_elf32_shlin_vec. * elf32-sh64.c: Tweak comments. (sh64_elf_set_mach_from_flags): Recognize all machine flags that are proper subsets of SH64 as bfd_mach_sh5. Add EF_SH64_ABI64. (sh64_elf_copy_private_data_internal): Wrap long line. (sh64_elf_merge_private_data): Rewrite to allow objects from SH64 subsets to be linked together. (INCLUDE_SHMEDIA): Define. * elf32-sh.c (sh_elf_relocate_section) <local symbol>: Parenthesize plus-expression inside or-expression. <global symbol>: Ditto. (sh_elf_set_mach_from_flags): Remove code refusing deleted EF_SH64_32BIT_ABI flag. 2000-11-26 Hans-Peter Nilsson <hpn@cygnus.com> * elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL, R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true. (sh_elf_relocate_section) <local symbol>: Or 1 in calculation of relocation if sym->st_other & STO_SH5_ISA32. <global symbol>: Ditto if h->other & STO_SH5_ISA32. * elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to relocation. 2000-11-24 Hans-Peter Nilsson <hpn@cygnus.com> * Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo. (BFD32_BACKENDS_CFILES): Add elf32-sh64.c. Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh5. * config.bfd: Map targ_cpu sh* to bfd_sh_arch. Handle sh64-*-elf*. Set targ_cflags to -DINCLUDE_SHMEDIA. * configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec. * configure: Regenerate. * reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5, BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6, BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2, BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8, BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16, BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16, BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16, BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16, BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations. * cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link in item for SH5. * elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs. [INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call shmedia_prepare_reloc, goto final_link_relocate if it returns non-zero, else fail as before. (sh_elf_set_mach_from_flags): Provide function only if not defined as macro. Do not recognize objects with EF_SH64_32BIT_ABI set. (sh_elf_set_private_flags): Provide function only if not defined as a macro. (sh_elf_copy_private_data): Similar. (sh_elf_merge_private_data): Similar. * section.c (SEC_SH_ISA_SHMEDIA): New. * targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare. * elf32-sh64.c: New file. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. * po/POTFILES.in: Regenerate. * po/bfd.pot: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate.
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.#define bfd_mach_sh5 0x50
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. bfd_arch_alpha, {* Dec Alpha *}
.#define bfd_mach_alpha_ev4 0x10
.#define bfd_mach_alpha_ev5 0x20
.#define bfd_mach_alpha_ev6 0x30
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. bfd_arch_arm, {* Advanced Risc Machines ARM. *}
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.#define bfd_mach_arm_unknown 0
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.#define bfd_mach_arm_2 1
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.#define bfd_mach_arm_2a 2
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.#define bfd_mach_arm_3 3
.#define bfd_mach_arm_3M 4
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.#define bfd_mach_arm_4 5
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.#define bfd_mach_arm_4T 6
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.#define bfd_mach_arm_5 7
.#define bfd_mach_arm_5T 8
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.#define bfd_mach_arm_5TE 9
.#define bfd_mach_arm_XScale 10
.#define bfd_mach_arm_ep9312 11
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.#define bfd_mach_arm_iWMMXt 12
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. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. bfd_arch_tic30, {* Texas Instruments TMS320C30 *}
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. bfd_arch_tic4x, {* Texas Instruments TMS320C3X/4X *}
.#define bfd_mach_tic3x 30
.#define bfd_mach_tic4x 40
. bfd_arch_tic54x, {* Texas Instruments TMS320C54X *}
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. bfd_arch_tic80, {* TI TMS320c80 (MVP) *}
. bfd_arch_v850, {* NEC V850 *}
.#define bfd_mach_v850 1
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.#define bfd_mach_v850e 'E'
.#define bfd_mach_v850e1 '1'
. bfd_arch_arc, {* ARC Cores *}
.#define bfd_mach_arc_5 5
.#define bfd_mach_arc_6 6
.#define bfd_mach_arc_7 7
.#define bfd_mach_arc_8 8
. bfd_arch_m32r, {* Renesas M32R (formerly Mitsubishi M32R/D) *}
.#define bfd_mach_m32r 1 {* For backwards compatibility. *}
.#define bfd_mach_m32rx 'x'
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.#define bfd_mach_m32r2 '2'
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. bfd_arch_mn10200, {* Matsushita MN10200 *}
. bfd_arch_mn10300, {* Matsushita MN10300 *}
.#define bfd_mach_mn10300 300
.#define bfd_mach_am33 330
.#define bfd_mach_am33_2 332
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. bfd_arch_fr30,
.#define bfd_mach_fr30 0x46523330
. bfd_arch_frv,
.#define bfd_mach_frv 1
.#define bfd_mach_frvsimple 2
.#define bfd_mach_fr300 300
.#define bfd_mach_fr400 400
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.#define bfd_mach_fr450 450
.#define bfd_mach_frvtomcat 499 {* fr500 prototype *}
.#define bfd_mach_fr500 500
.#define bfd_mach_fr550 550
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. bfd_arch_mcore,
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. bfd_arch_ia64, {* HP/Intel ia64 *}
.#define bfd_mach_ia64_elf64 64
.#define bfd_mach_ia64_elf32 32
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. bfd_arch_ip2k, {* Ubicom IP2K microcontrollers. *}
.#define bfd_mach_ip2022 1
.#define bfd_mach_ip2022ext 2
. bfd_arch_iq2000, {* Vitesse IQ2000. *}
.#define bfd_mach_iq2000 1
.#define bfd_mach_iq10 2
. bfd_arch_pj,
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. bfd_arch_avr, {* Atmel AVR microcontrollers. *}
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.#define bfd_mach_avr1 1
.#define bfd_mach_avr2 2
.#define bfd_mach_avr3 3
.#define bfd_mach_avr4 4
.#define bfd_mach_avr5 5
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
.#define bfd_mach_cr16c 1
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. bfd_arch_crx, {* National Semiconductor CRX. *}
.#define bfd_mach_crx 1
. bfd_arch_cris, {* Axis CRIS *}
* config.bfd: Support crisv32-*-* like cris-*-*. * archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32) (bfd_mach_cris_v10_v32): New macros. * cpu-cris.c: Tweak formatting. (get_compatible): New function. (N): New macro. (bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New bfd_arch_info_type:s. (bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach, get_compatible for member compatible and link bfd_cris_arch_v32 as next. * elf32-cris.c (cris_elf_pcrel_reloc) (cris_elf_set_mach_from_flags): New functions. (cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL> <R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc. (cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct numbers for bfd_mach_cris_v32. (PLT_ENTRY_SIZE_V32): New macro. (elf_cris_plt0_entry): Drop last comma in initializer. (elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32) (elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New PLT initializers. (cris_elf_relocate_section): Change all "%B(%A)" messages to "%B, section %A". (elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries. (elf_cris_finish_dynamic_sections): Similar. (elf_cris_adjust_dynamic_symbol): Similar. (cris_elf_check_relocs): Change all "%B(%A)" messages to "%B, section %A". <switch with PIC relocs>: Emit error and return FALSE for bfd_mach_cris_v10_v32. <case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>: Emit warning when generating textrel reloc. (cris_elf_object_p): Call cris_elf_set_mach_from_flags. (cris_elf_final_write_processing): Set flags according to mach. (cris_elf_print_private_bfd_data): Display EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32. (cris_elf_merge_private_bfd_data): Drop variables old_flags, new_flags. Don't call cris_elf_final_write_processing. Don't look at the actual elf header flags at all; use bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference in bfd_get_mach for ibfd and obfd and handle merging of compatible objects. (bfd_elf32_bfd_copy_private_bfd_data): Define. * reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8) (BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16) (BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs. * bfd-in2.h, libbfd.h: Regenerate.
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.#define bfd_mach_cris_v0_v10 255
.#define bfd_mach_cris_v32 32
.#define bfd_mach_cris_v10_v32 1032
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. bfd_arch_s390, {* IBM s390 *}
.#define bfd_mach_s390_31 31
.#define bfd_mach_s390_64 64
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. bfd_arch_openrisc, {* OpenRISC *}
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. bfd_arch_mmix, {* Donald Knuth's educational processor. *}
Index: bfd/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> Corinna Vinschen <vinschen@redhat.com> * Makefile.am: Add support for xstormy16. * archures.c: Add support for xstormy16. * config.bfd: Add support for xstormy16. * configure.in: Add support for xstormy16. * reloc.c: Add support for xstormy16. * targets.c: Add support for xstormy16. * cpu-xstormy16.c: New file. * elf32-xstormy16.c: New file. * Makefile.in: Regenerated. * bfd-in2.h: Regenerated. * configure: Regenerated. * libbfd.h: Regenerated. Index: binutils/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * readelf.c (guess_is_rela): Add support for stormy16. (dump_relocations): Likewise. (get_machine_name): Likewise. Index: gas/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * configure.in: Add support for xstormy16. * configure: Regenerated. * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerated. * config/tc-xstormy16.c: New file. * config/tc-xstormy16.h: New file. Index: gas/testsuite/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> matthew green <mrg@redhat.com> * gas/xstormy16/allinsn.d: New file. * gas/xstormy16/allinsn.exp: New file. * gas/xstormy16/allinsn.s: New file. * gas/xstormy16/allinsn.sh: New file. * gas/xstormy16/gcc.d: New file. * gas/xstormy16/gcc.s: New file. * gas/xstormy16/gcc.sh: New file. * gas/xstormy16/reloc-1.d: New file. * gas/xstormy16/reloc-1.s: New file. * gas/xstormy16/reloc-2.d: New file. * gas/xstormy16/reloc-2.s: New file. Index: ld/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * Makefile.am: Add support for xstormy16. * configure.tgt: Add support for xstormy16. * Makefile.in: Regenerate. * emulparams/elf32xstormy16.sh: New file. * scripttempl/xstormy16.sc: New file. Index: opcodes/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerate. * configure.in: Add support for xstormy16. * configure: Regenerate. * disassemble.c: Add support for xstormy16. * xstormy16-asm.c: New generated file. * xstormy16-desc.c: New generated file. * xstormy16-desc.h: New generated file. * xstormy16-dis.c: New generated file. * xstormy16-ibld.c: New generated file. * xstormy16-opc.c: New generated file. * xstormy16-opc.h: New generated file. Index: include/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * dis-asm.h (print_insn_xstormy16): Declare. Index: include/elf/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * common.h (EM_XSTORMY16): Define. * xstormy16.h: New file.
2001-12-08 04:46:03 +01:00
. bfd_arch_xstormy16,
.#define bfd_mach_xstormy16 1
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. bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
.#define bfd_mach_msp11 11
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.#define bfd_mach_msp110 110
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.#define bfd_mach_msp12 12
.#define bfd_mach_msp13 13
.#define bfd_mach_msp14 14
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.#define bfd_mach_msp15 15
.#define bfd_mach_msp16 16
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.#define bfd_mach_msp31 31
.#define bfd_mach_msp32 32
.#define bfd_mach_msp33 33
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.#define bfd_mach_msp41 41
.#define bfd_mach_msp42 42
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.#define bfd_mach_msp43 43
.#define bfd_mach_msp44 44
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. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
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. bfd_arch_maxq, {* Dallas MAXQ 10/20 *}
.#define bfd_mach_maxq10 10
.#define bfd_mach_maxq20 20
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. bfd_arch_last
. };
*/
/*
SUBSECTION
bfd_arch_info
DESCRIPTION
This structure contains information on architectures for use
within BFD.
.
.typedef struct bfd_arch_info
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.{
. int bits_per_word;
. int bits_per_address;
. int bits_per_byte;
. enum bfd_architecture arch;
. unsigned long mach;
. const char *arch_name;
. const char *printable_name;
. unsigned int section_align_power;
. {* TRUE if this is the default machine for the architecture.
. The default arch should be the first entry for an arch so that
. all the entries for that arch can be accessed via <<next>>. *}
. bfd_boolean the_default;
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. const struct bfd_arch_info * (*compatible)
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. (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
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.
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. bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
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.
. const struct bfd_arch_info *next;
.}
.bfd_arch_info_type;
.
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*/
extern const bfd_arch_info_type bfd_a29k_arch;
extern const bfd_arch_info_type bfd_alpha_arch;
extern const bfd_arch_info_type bfd_arc_arch;
extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_avr_arch;
extern const bfd_arch_info_type bfd_cr16c_arch;
extern const bfd_arch_info_type bfd_cris_arch;
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extern const bfd_arch_info_type bfd_crx_arch;
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extern const bfd_arch_info_type bfd_d10v_arch;
extern const bfd_arch_info_type bfd_d30v_arch;
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extern const bfd_arch_info_type bfd_dlx_arch;
extern const bfd_arch_info_type bfd_fr30_arch;
extern const bfd_arch_info_type bfd_frv_arch;
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extern const bfd_arch_info_type bfd_h8300_arch;
extern const bfd_arch_info_type bfd_h8500_arch;
extern const bfd_arch_info_type bfd_hppa_arch;
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extern const bfd_arch_info_type bfd_i370_arch;
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extern const bfd_arch_info_type bfd_i386_arch;
extern const bfd_arch_info_type bfd_i860_arch;
extern const bfd_arch_info_type bfd_i960_arch;
extern const bfd_arch_info_type bfd_ia64_arch;
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extern const bfd_arch_info_type bfd_ip2k_arch;
extern const bfd_arch_info_type bfd_iq2000_arch;
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extern const bfd_arch_info_type bfd_m32r_arch;
extern const bfd_arch_info_type bfd_m68hc11_arch;
extern const bfd_arch_info_type bfd_m68hc12_arch;
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extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
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extern const bfd_arch_info_type bfd_maxq_arch;
extern const bfd_arch_info_type bfd_mcore_arch;
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extern const bfd_arch_info_type bfd_mips_arch;
extern const bfd_arch_info_type bfd_mmix_arch;
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extern const bfd_arch_info_type bfd_mn10200_arch;
extern const bfd_arch_info_type bfd_mn10300_arch;
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extern const bfd_arch_info_type bfd_msp430_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
extern const bfd_arch_info_type bfd_openrisc_arch;
extern const bfd_arch_info_type bfd_or32_arch;
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extern const bfd_arch_info_type bfd_pdp11_arch;
extern const bfd_arch_info_type bfd_pj_arch;
extern const bfd_arch_info_type bfd_powerpc_archs[];
#define bfd_powerpc_arch bfd_powerpc_archs[0]
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extern const bfd_arch_info_type bfd_rs6000_arch;
extern const bfd_arch_info_type bfd_s390_arch;
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extern const bfd_arch_info_type bfd_sh_arch;
extern const bfd_arch_info_type bfd_sparc_arch;
extern const bfd_arch_info_type bfd_tic30_arch;
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extern const bfd_arch_info_type bfd_tic4x_arch;
extern const bfd_arch_info_type bfd_tic54x_arch;
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extern const bfd_arch_info_type bfd_tic80_arch;
extern const bfd_arch_info_type bfd_v850_arch;
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extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_w65_arch;
Index: bfd/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> Corinna Vinschen <vinschen@redhat.com> * Makefile.am: Add support for xstormy16. * archures.c: Add support for xstormy16. * config.bfd: Add support for xstormy16. * configure.in: Add support for xstormy16. * reloc.c: Add support for xstormy16. * targets.c: Add support for xstormy16. * cpu-xstormy16.c: New file. * elf32-xstormy16.c: New file. * Makefile.in: Regenerated. * bfd-in2.h: Regenerated. * configure: Regenerated. * libbfd.h: Regenerated. Index: binutils/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * readelf.c (guess_is_rela): Add support for stormy16. (dump_relocations): Likewise. (get_machine_name): Likewise. Index: gas/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * configure.in: Add support for xstormy16. * configure: Regenerated. * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerated. * config/tc-xstormy16.c: New file. * config/tc-xstormy16.h: New file. Index: gas/testsuite/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> matthew green <mrg@redhat.com> * gas/xstormy16/allinsn.d: New file. * gas/xstormy16/allinsn.exp: New file. * gas/xstormy16/allinsn.s: New file. * gas/xstormy16/allinsn.sh: New file. * gas/xstormy16/gcc.d: New file. * gas/xstormy16/gcc.s: New file. * gas/xstormy16/gcc.sh: New file. * gas/xstormy16/reloc-1.d: New file. * gas/xstormy16/reloc-1.s: New file. * gas/xstormy16/reloc-2.d: New file. * gas/xstormy16/reloc-2.s: New file. Index: ld/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * Makefile.am: Add support for xstormy16. * configure.tgt: Add support for xstormy16. * Makefile.in: Regenerate. * emulparams/elf32xstormy16.sh: New file. * scripttempl/xstormy16.sc: New file. Index: opcodes/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * Makefile.am: Add support for xstormy16. * Makefile.in: Regenerate. * configure.in: Add support for xstormy16. * configure: Regenerate. * disassemble.c: Add support for xstormy16. * xstormy16-asm.c: New generated file. * xstormy16-desc.c: New generated file. * xstormy16-desc.h: New generated file. * xstormy16-dis.c: New generated file. * xstormy16-ibld.c: New generated file. * xstormy16-opc.c: New generated file. * xstormy16-opc.h: New generated file. Index: include/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> * dis-asm.h (print_insn_xstormy16): Declare. Index: include/elf/ChangeLog 2001-12-07 Geoffrey Keating <geoffk@redhat.com> Richard Henderson <rth@redhat.com> * common.h (EM_XSTORMY16): Define. * xstormy16.h: New file.
2001-12-08 04:46:03 +01:00
extern const bfd_arch_info_type bfd_xstormy16_arch;
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extern const bfd_arch_info_type bfd_xtensa_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
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static const bfd_arch_info_type * const bfd_archures_list[] =
{
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#ifdef SELECT_ARCHITECTURES
SELECT_ARCHITECTURES,
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#else
&bfd_a29k_arch,
&bfd_alpha_arch,
&bfd_arc_arch,
&bfd_arm_arch,
&bfd_avr_arch,
&bfd_cr16c_arch,
&bfd_cris_arch,
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&bfd_crx_arch,
&bfd_d10v_arch,
&bfd_d30v_arch,
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&bfd_dlx_arch,
&bfd_fr30_arch,
&bfd_frv_arch,
&bfd_h8300_arch,
&bfd_h8500_arch,
&bfd_hppa_arch,
&bfd_i370_arch,
&bfd_i386_arch,
&bfd_i860_arch,
&bfd_i960_arch,
&bfd_ia64_arch,
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&bfd_ip2k_arch,
&bfd_iq2000_arch,
&bfd_m32r_arch,
&bfd_m68hc11_arch,
&bfd_m68hc12_arch,
&bfd_m68k_arch,
&bfd_m88k_arch,
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&bfd_maxq_arch,
&bfd_mcore_arch,
&bfd_mips_arch,
&bfd_mmix_arch,
&bfd_mn10200_arch,
&bfd_mn10300_arch,
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&bfd_msp430_arch,
&bfd_ns32k_arch,
&bfd_openrisc_arch,
&bfd_or32_arch,
&bfd_pdp11_arch,
&bfd_powerpc_arch,
&bfd_rs6000_arch,
&bfd_s390_arch,
&bfd_sh_arch,
&bfd_sparc_arch,
&bfd_tic30_arch,
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&bfd_tic4x_arch,
&bfd_tic54x_arch,
&bfd_tic80_arch,
&bfd_v850_arch,
&bfd_vax_arch,
&bfd_w65_arch,
&bfd_we32k_arch,
&bfd_xstormy16_arch,
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&bfd_xtensa_arch,
&bfd_z8k_arch,
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#endif
0
};
/*
FUNCTION
bfd_printable_name
SYNOPSIS
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const char *bfd_printable_name (bfd *abfd);
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DESCRIPTION
Return a printable string representing the architecture and machine
from the pointer to the architecture info structure.
*/
const char *
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bfd_printable_name (bfd *abfd)
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{
return abfd->arch_info->printable_name;
}
/*
FUNCTION
bfd_scan_arch
SYNOPSIS
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const bfd_arch_info_type *bfd_scan_arch (const char *string);
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DESCRIPTION
Figure out if BFD supports any cpu which could be described with
the name @var{string}. Return a pointer to an <<arch_info>>
structure if a machine is found, otherwise NULL.
*/
const bfd_arch_info_type *
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bfd_scan_arch (const char *string)
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{
const bfd_arch_info_type * const *app, *ap;
/* Look through all the installed architectures. */
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for (app = bfd_archures_list; *app != NULL; app++)
{
for (ap = *app; ap != NULL; ap = ap->next)
{
if (ap->scan (ap, string))
return ap;
}
}
return NULL;
}
/*
FUNCTION
bfd_arch_list
SYNOPSIS
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const char **bfd_arch_list (void);
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DESCRIPTION
Return a freshly malloced NULL-terminated vector of the names
of all the valid BFD architectures. Do not modify the names.
*/
const char **
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bfd_arch_list (void)
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{
int vec_length = 0;
const char **name_ptr;
const char **name_list;
const bfd_arch_info_type * const *app;
bfd_size_type amt;
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/* Determine the number of architectures. */
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vec_length = 0;
for (app = bfd_archures_list; *app != NULL; app++)
{
const bfd_arch_info_type *ap;
for (ap = *app; ap != NULL; ap = ap->next)
{
vec_length++;
}
}
amt = (vec_length + 1) * sizeof (char **);
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name_list = bfd_malloc (amt);
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if (name_list == NULL)
return NULL;
/* Point the list at each of the names. */
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name_ptr = name_list;
for (app = bfd_archures_list; *app != NULL; app++)
{
const bfd_arch_info_type *ap;
for (ap = *app; ap != NULL; ap = ap->next)
{
*name_ptr = ap->printable_name;
name_ptr++;
}
}
*name_ptr = NULL;
return name_list;
}
/*
FUNCTION
bfd_arch_get_compatible
SYNOPSIS
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const bfd_arch_info_type *bfd_arch_get_compatible
(const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
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DESCRIPTION
Determine whether two BFDs' architectures and machine types
are compatible. Calculates the lowest common denominator
between the two architectures and machine types implied by
the BFDs and returns a pointer to an <<arch_info>> structure
describing the compatible machine.
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*/
const bfd_arch_info_type *
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bfd_arch_get_compatible (const bfd *abfd,
const bfd *bbfd,
bfd_boolean accept_unknowns)
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{
const bfd * ubfd = NULL;
/* Look for an unknown architecture. */
if (((ubfd = abfd) && ubfd->arch_info->arch == bfd_arch_unknown)
|| ((ubfd = bbfd) && ubfd->arch_info->arch == bfd_arch_unknown))
{
/* We can allow an unknown architecture if accept_unknowns
is true, or if the target is the "binary" format, which
has an unknown architecture. Since the binary format can
only be set by explicit request from the user, it is safe
to assume that they know what they are doing. */
if (accept_unknowns
|| strcmp (bfd_get_target (ubfd), "binary") == 0)
return ubfd->arch_info;
return NULL;
}
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/* Otherwise architecture-specific code has to decide. */
return abfd->arch_info->compatible (abfd->arch_info, bbfd->arch_info);
}
/*
INTERNAL_DEFINITION
bfd_default_arch_struct
DESCRIPTION
The <<bfd_default_arch_struct>> is an item of
<<bfd_arch_info_type>> which has been initialized to a fairly
generic state. A BFD starts life by pointing to this
structure, until the correct back end has determined the real
architecture of the file.
.extern const bfd_arch_info_type bfd_default_arch_struct;
*/
const bfd_arch_info_type bfd_default_arch_struct = {
32, 32, 8, bfd_arch_unknown, 0, "unknown", "unknown", 2, TRUE,
bfd_default_compatible,
bfd_default_scan,
0,
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};
/*
FUNCTION
bfd_set_arch_info
SYNOPSIS
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void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
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DESCRIPTION
Set the architecture info of @var{abfd} to @var{arg}.
*/
void
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bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg)
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{
abfd->arch_info = arg;
}
/*
INTERNAL_FUNCTION
bfd_default_set_arch_mach
SYNOPSIS
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bfd_boolean bfd_default_set_arch_mach
(bfd *abfd, enum bfd_architecture arch, unsigned long mach);
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DESCRIPTION
Set the architecture and machine type in BFD @var{abfd}
to @var{arch} and @var{mach}. Find the correct
pointer to a structure and insert it into the <<arch_info>>
pointer.
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*/
bfd_boolean
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bfd_default_set_arch_mach (bfd *abfd,
enum bfd_architecture arch,
unsigned long mach)
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{
abfd->arch_info = bfd_lookup_arch (arch, mach);
if (abfd->arch_info != NULL)
return TRUE;
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abfd->arch_info = &bfd_default_arch_struct;
bfd_set_error (bfd_error_bad_value);
return FALSE;
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}
/*
FUNCTION
bfd_get_arch
SYNOPSIS
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enum bfd_architecture bfd_get_arch (bfd *abfd);
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DESCRIPTION
Return the enumerated type which describes the BFD @var{abfd}'s
architecture.
*/
enum bfd_architecture
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bfd_get_arch (bfd *abfd)
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{
return abfd->arch_info->arch;
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}
/*
FUNCTION
bfd_get_mach
SYNOPSIS
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unsigned long bfd_get_mach (bfd *abfd);
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DESCRIPTION
Return the long type which describes the BFD @var{abfd}'s
machine.
*/
unsigned long
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bfd_get_mach (bfd *abfd)
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{
return abfd->arch_info->mach;
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}
/*
FUNCTION
bfd_arch_bits_per_byte
SYNOPSIS
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unsigned int bfd_arch_bits_per_byte (bfd *abfd);
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DESCRIPTION
Return the number of bits in one of the BFD @var{abfd}'s
architecture's bytes.
*/
unsigned int
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bfd_arch_bits_per_byte (bfd *abfd)
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{
return abfd->arch_info->bits_per_byte;
}
/*
FUNCTION
bfd_arch_bits_per_address
SYNOPSIS
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unsigned int bfd_arch_bits_per_address (bfd *abfd);
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DESCRIPTION
Return the number of bits in one of the BFD @var{abfd}'s
architecture's addresses.
*/
unsigned int
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bfd_arch_bits_per_address (bfd *abfd)
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{
return abfd->arch_info->bits_per_address;
}
/*
INTERNAL_FUNCTION
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bfd_default_compatible
SYNOPSIS
const bfd_arch_info_type *bfd_default_compatible
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(const bfd_arch_info_type *a, const bfd_arch_info_type *b);
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DESCRIPTION
The default function for testing for compatibility.
*/
const bfd_arch_info_type *
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bfd_default_compatible (const bfd_arch_info_type *a,
const bfd_arch_info_type *b)
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{
if (a->arch != b->arch)
return NULL;
if (a->bits_per_word != b->bits_per_word)
return NULL;
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if (a->mach > b->mach)
return a;
if (b->mach > a->mach)
return b;
return a;
}
/*
INTERNAL_FUNCTION
bfd_default_scan
SYNOPSIS
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bfd_boolean bfd_default_scan
(const struct bfd_arch_info *info, const char *string);
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DESCRIPTION
The default function for working out whether this is an
architecture hit and a machine hit.
*/
bfd_boolean
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bfd_default_scan (const bfd_arch_info_type *info, const char *string)
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{
const char *ptr_src;
const char *ptr_tst;
unsigned long number;
enum bfd_architecture arch;
const char *printable_name_colon;
/* Exact match of the architecture name (ARCH_NAME) and also the
default architecture? */
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if (strcasecmp (string, info->arch_name) == 0
&& info->the_default)
return TRUE;
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/* Exact match of the machine name (PRINTABLE_NAME)? */
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if (strcasecmp (string, info->printable_name) == 0)
return TRUE;
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/* Given that printable_name contains no colon, attempt to match:
ARCH_NAME [ ":" ] PRINTABLE_NAME? */
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printable_name_colon = strchr (info->printable_name, ':');
if (printable_name_colon == NULL)
{
size_t strlen_arch_name = strlen (info->arch_name);
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if (strncasecmp (string, info->arch_name, strlen_arch_name) == 0)
{
if (string[strlen_arch_name] == ':')
{
if (strcasecmp (string + strlen_arch_name + 1,
info->printable_name) == 0)
return TRUE;
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}
else
{
if (strcasecmp (string + strlen_arch_name,
info->printable_name) == 0)
return TRUE;
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}
}
}
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>;
Attempt to match: <arch> <mach>? */
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if (printable_name_colon != NULL)
{
size_t colon_index = printable_name_colon - info->printable_name;
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if (strncasecmp (string, info->printable_name, colon_index) == 0
&& strcasecmp (string + colon_index,
info->printable_name + colon_index + 1) == 0)
return TRUE;
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}
/* Given that PRINTABLE_NAME has the form: <arch> ":" <mach>; Do not
attempt to match just <mach>, it could be ambiguous. This test
is left until later. */
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/* NOTE: The below is retained for compatibility only. Please do
not add to this code. */
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/* See how much of the supplied string matches with the
architecture, eg the string m68k:68020 would match the 68k entry
up to the :, then we get left with the machine number. */
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for (ptr_src = string, ptr_tst = info->arch_name;
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*ptr_src && *ptr_tst;
ptr_src++, ptr_tst++)
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{
if (*ptr_src != *ptr_tst)
break;
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}
/* Chewed up as much of the architecture as will match, skip any
colons. */
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if (*ptr_src == ':')
ptr_src++;
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if (*ptr_src == 0)
{
/* Nothing more, then only keep this one if it is the default
machine for this architecture. */
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return info->the_default;
}
number = 0;
while (ISDIGIT (*ptr_src))
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{
number = number * 10 + *ptr_src - '0';
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ptr_src++;
}
/* NOTE: The below is retained for compatibility only.
PLEASE DO NOT ADD TO THIS CODE. */
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switch (number)
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{
/* FIXME: These are needed to parse IEEE objects. */
/* The following seven case's are here only for compatibility with
older binutils (at least IEEE objects from binutils 2.9.1 require
them). */
case bfd_mach_m68000:
case bfd_mach_m68010:
case bfd_mach_m68020:
case bfd_mach_m68030:
case bfd_mach_m68040:
case bfd_mach_m68060:
case bfd_mach_cpu32:
arch = bfd_arch_m68k;
break;
case 68000:
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arch = bfd_arch_m68k;
number = bfd_mach_m68000;
break;
case 68010:
arch = bfd_arch_m68k;
number = bfd_mach_m68010;
break;
case 68020:
arch = bfd_arch_m68k;
number = bfd_mach_m68020;
break;
case 68030:
arch = bfd_arch_m68k;
number = bfd_mach_m68030;
break;
case 68040:
arch = bfd_arch_m68k;
number = bfd_mach_m68040;
break;
case 68060:
arch = bfd_arch_m68k;
number = bfd_mach_m68060;
break;
case 68332:
arch = bfd_arch_m68k;
number = bfd_mach_cpu32;
break;
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case 5200:
arch = bfd_arch_m68k;
number = bfd_mach_mcf5200;
break;
case 5206:
arch = bfd_arch_m68k;
number = bfd_mach_mcf5206e;
break;
case 5307:
arch = bfd_arch_m68k;
number = bfd_mach_mcf5307;
break;
case 5407:
arch = bfd_arch_m68k;
number = bfd_mach_mcf5407;
break;
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case 5282:
arch = bfd_arch_m68k;
number = bfd_mach_mcf528x;
break;
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case 32000:
arch = bfd_arch_we32k;
break;
case 3000:
arch = bfd_arch_mips;
number = bfd_mach_mips3000;
break;
case 4000:
arch = bfd_arch_mips;
number = bfd_mach_mips4000;
break;
case 6000:
arch = bfd_arch_rs6000;
break;
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 01:33:36 +01:00
case 7410:
arch = bfd_arch_sh;
number = bfd_mach_sh_dsp;
break;
case 7708:
arch = bfd_arch_sh;
number = bfd_mach_sh3;
break;
case 7729:
arch = bfd_arch_sh;
number = bfd_mach_sh3_dsp;
break;
case 7750:
arch = bfd_arch_sh;
number = bfd_mach_sh4;
break;
default:
return FALSE;
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}
if (arch != info->arch)
return FALSE;
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if (number != info->mach)
return FALSE;
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return TRUE;
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}
/*
FUNCTION
bfd_get_arch_info
SYNOPSIS
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const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
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DESCRIPTION
Return the architecture info struct in @var{abfd}.
*/
const bfd_arch_info_type *
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bfd_get_arch_info (bfd *abfd)
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{
return abfd->arch_info;
}
/*
FUNCTION
bfd_lookup_arch
SYNOPSIS
const bfd_arch_info_type *bfd_lookup_arch
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(enum bfd_architecture arch, unsigned long machine);
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DESCRIPTION
Look for the architecture info structure which matches the
1999-05-03 09:29:11 +02:00
arguments @var{arch} and @var{machine}. A machine of 0 matches the
machine/architecture structure which marks itself as the
default.
1999-05-03 09:29:11 +02:00
*/
const bfd_arch_info_type *
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bfd_lookup_arch (enum bfd_architecture arch, unsigned long machine)
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{
const bfd_arch_info_type * const *app, *ap;
for (app = bfd_archures_list; *app != NULL; app++)
{
for (ap = *app; ap != NULL; ap = ap->next)
{
if (ap->arch == arch
&& (ap->mach == machine
|| (machine == 0 && ap->the_default)))
return ap;
}
}
return NULL;
}
/*
FUNCTION
bfd_printable_arch_mach
SYNOPSIS
const char *bfd_printable_arch_mach
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(enum bfd_architecture arch, unsigned long machine);
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DESCRIPTION
Return a printable string representing the architecture and
machine type.
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This routine is depreciated.
*/
const char *
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bfd_printable_arch_mach (enum bfd_architecture arch, unsigned long machine)
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{
const bfd_arch_info_type *ap = bfd_lookup_arch (arch, machine);
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if (ap)
return ap->printable_name;
return "UNKNOWN!";
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}
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/*
FUNCTION
bfd_octets_per_byte
SYNOPSIS
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unsigned int bfd_octets_per_byte (bfd *abfd);
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DESCRIPTION
Return the number of octets (8-bit quantities) per target byte
(minimum addressable unit). In most cases, this will be one, but some
DSP targets have 16, 32, or even 48 bits per byte.
*/
unsigned int
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bfd_octets_per_byte (bfd *abfd)
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{
return bfd_arch_mach_octets_per_byte (bfd_get_arch (abfd),
bfd_get_mach (abfd));
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}
/*
FUNCTION
bfd_arch_mach_octets_per_byte
SYNOPSIS
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unsigned int bfd_arch_mach_octets_per_byte
(enum bfd_architecture arch, unsigned long machine);
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DESCRIPTION
See bfd_octets_per_byte.
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This routine is provided for those cases where a bfd * is not
available
*/
unsigned int
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bfd_arch_mach_octets_per_byte (enum bfd_architecture arch,
unsigned long mach)
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{
const bfd_arch_info_type *ap = bfd_lookup_arch (arch, mach);
if (ap)
return ap->bits_per_byte / 8;
return 1;
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}