binutils-gdb/include/dis-asm.h

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/* Interface between the opcode library and its callers.
Copyright (C) 1999-2019 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA.
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Written by Cygnus Support, 1993.
The opcode library (libopcodes.a) provides instruction decoders for
a large variety of instruction sets, callable with an identical
interface, for making instruction-processing programs more independent
of the instruction set being processed. */
#ifndef DIS_ASM_H
#define DIS_ASM_H
#ifdef __cplusplus
extern "C" {
#endif
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#include <stdio.h>
#include <string.h>
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#include "bfd.h"
typedef int (*fprintf_ftype) (void *, const char*, ...) ATTRIBUTE_FPTR_PRINTF_2;
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enum dis_insn_type
{
dis_noninsn, /* Not a valid instruction. */
dis_nonbranch, /* Not a branch instruction. */
dis_branch, /* Unconditional branch. */
dis_condbranch, /* Conditional branch. */
dis_jsr, /* Jump to subroutine. */
dis_condjsr, /* Conditional jump to subroutine. */
dis_dref, /* Data reference instruction. */
dis_dref2 /* Two data references in instruction. */
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};
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/* This struct is passed into the instruction decoding routine,
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and is passed back out into each callback. The various fields are used
for conveying information from your main routine into your callbacks,
for passing information into the instruction decoders (such as the
addresses of the callback functions), or for passing information
back from the instruction decoders to their callers.
It must be initialized before it is first passed; this can be done
by hand, or using one of the initialization macros below. */
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typedef struct disassemble_info
{
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fprintf_ftype fprintf_func;
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void *stream;
void *application_data;
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/* Target description. We could replace this with a pointer to the bfd,
but that would require one. There currently isn't any such requirement
so to avoid introducing one we record these explicitly. */
/* The bfd_flavour. This can be bfd_target_unknown_flavour. */
enum bfd_flavour flavour;
/* The bfd_arch value. */
enum bfd_architecture arch;
/* The bfd_mach value. */
unsigned long mach;
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
enum bfd_endian endian;
/* Endianness of code, for mixed-endian situations such as ARM BE8. */
enum bfd_endian endian_code;
/* An arch/mach-specific bitmask of selected instruction subsets, mainly
for processors with run-time-switchable instruction sets. The default,
zero, means that there is no constraint. CGEN-based opcodes ports
may use ISA_foo masks. */
void *insn_sets;
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/* Some targets need information about the current section to accurately
display insns. If this is NULL, the target disassembler function
will have to make its best guess. */
asection *section;
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/* An array of pointers to symbols either at the location being disassembled
or at the start of the function being disassembled. The array is sorted
so that the first symbol is intended to be the one used. The others are
present for any misc. purposes. This is not set reliably, but if it is
not NULL, it is correct. */
asymbol **symbols;
/* Number of symbols in array. */
int num_symbols;
/* Symbol table provided for targets that want to look at it. This is
used on Arm to find mapping symbols and determine Arm/Thumb code. */
asymbol **symtab;
int symtab_pos;
int symtab_size;
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/* For use by the disassembler.
The top 16 bits are reserved for public use (and are documented here).
The bottom 16 bits are for the internal use of the disassembler. */
unsigned long flags;
/* Set if the disassembler has determined that there are one or more
relocations associated with the instruction being disassembled. */
#define INSN_HAS_RELOC (1 << 31)
/* Set if the user has requested the disassembly of data as well as code. */
#define DISASSEMBLE_DATA (1 << 30)
/* Set if the user has specifically set the machine type encoded in the
mach field of this structure. */
#define USER_SPECIFIED_MACHINE_TYPE (1 << 29)
/* Use internally by the target specific disassembly code. */
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void *private_data;
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/* Function used to get bytes to disassemble. MEMADDR is the
address of the stuff to be disassembled, MYADDR is the address to
put the bytes in, and LENGTH is the number of bytes to read.
INFO is a pointer to this struct.
Returns an errno value or 0 for success. */
int (*read_memory_func)
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(bfd_vma memaddr, bfd_byte *myaddr, unsigned int length,
struct disassemble_info *dinfo);
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/* Function which should be called if we get an error that we can't
recover from. STATUS is the errno value from read_memory_func and
MEMADDR is the address that we were trying to read. INFO is a
pointer to this struct. */
void (*memory_error_func)
(int status, bfd_vma memaddr, struct disassemble_info *dinfo);
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/* Function called to print ADDR. */
void (*print_address_func)
(bfd_vma addr, struct disassemble_info *dinfo);
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/* Function called to determine if there is a symbol at the given ADDR.
If there is, the function returns 1, otherwise it returns 0.
This is used by ports which support an overlay manager where
the overlay number is held in the top part of an address. In
some circumstances we want to include the overlay number in the
address, (normally because there is a symbol associated with
that address), but sometimes we want to mask out the overlay bits. */
int (* symbol_at_address_func)
(bfd_vma addr, struct disassemble_info *dinfo);
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/* Function called to check if a SYMBOL is can be displayed to the user.
This is used by some ports that want to hide special symbols when
displaying debugging outout. */
bfd_boolean (* symbol_is_valid)
(asymbol *, struct disassemble_info *dinfo);
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/* These are for buffer_read_memory. */
bfd_byte *buffer;
bfd_vma buffer_vma;
size_t buffer_length;
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/* This variable may be set by the instruction decoder. It suggests
the number of bytes objdump should display on a single line. If
the instruction decoder sets this, it should always set it to
the same value in order to get reasonable looking output. */
int bytes_per_line;
/* The next two variables control the way objdump displays the raw data. */
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/* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
/* output will look like this:
00: 00000000 00000000
with the chunks displayed according to "display_endian". */
int bytes_per_chunk;
enum bfd_endian display_endian;
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/* Number of octets per incremented target address
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Normally one, but some DSPs have byte sizes of 16 or 32 bits. */
unsigned int octets_per_byte;
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/* The number of zeroes we want to see at the end of a section before we
start skipping them. */
unsigned int skip_zeroes;
/* The number of zeroes to skip at the end of a section. If the number
of zeroes at the end is between SKIP_ZEROES_AT_END and SKIP_ZEROES,
they will be disassembled. If there are fewer than
SKIP_ZEROES_AT_END, they will be skipped. This is a heuristic
attempt to avoid disassembling zeroes inserted by section
alignment. */
unsigned int skip_zeroes_at_end;
/* Whether the disassembler always needs the relocations. */
bfd_boolean disassembler_needs_relocs;
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/* Results from instruction decoders. Not all decoders yet support
this information. This info is set each time an instruction is
decoded, and is only valid for the last such instruction.
To determine whether this decoder supports this information, set
insn_info_valid to 0, decode an instruction, then check it. */
char insn_info_valid; /* Branch info has been set. */
char branch_delay_insns; /* How many sequential insn's will run before
a branch takes effect. (0 = normal) */
char data_size; /* Size of data reference in insn, in bytes */
enum dis_insn_type insn_type; /* Type of instruction */
bfd_vma target; /* Target address of branch or dref, if known;
zero if unknown. */
bfd_vma target2; /* Second target address for dref2 */
/* Command line options specific to the target disassembler. */
const char *disassembler_options;
/* If non-zero then try not disassemble beyond this address, even if
there are values left in the buffer. This address is the address
of the nearest symbol forwards from the start of the disassembly,
and it is assumed that it lies on the boundary between instructions.
If an instruction spans this address then this is an error in the
file being disassembled. */
bfd_vma stop_vma;
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} disassemble_info;
GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' Implement MIPS target support for passing options to the disassembler, complementing commit 65b48a81404c ("GDB: Add support for the new set/show disassembler-options commands."). This includes options that expect an argument, so adjust the generic code and data structures used so as to handle such options. So as to give backends syntax flexibility no specific delimiter has been defined to separate options from their respective arguments, so it has to be included as the last character of the option name. Completion code however has not been adjusted and consequently option arguments cannot be completed at this time. Also the MIPS target has non-empty defaults for the options, so that ABI names for the general-purpose registers respect our `set mips abi ...' setting rather than always being determined from the ELF headers of the binary file selected. Handle these defaults as implicit options, never shown to the user and always prepended to the user-specified options, so that the latters can override the defaults. The resulting output for the MIPS target is as follows: (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: no-aliases Use canonical instruction forms. msa Recognize MSA instructions. virt Recognize the virtualization ASE instructions. xpa Recognize the eXtended Physical Address (XPA) ASE instructions. ginv Recognize the Global INValidate (GINV) ASE instructions. gpr-names=ABI Print GPR names according to specified ABI. Default: based on binary being disassembled. fpr-names=ABI Print FPR names according to specified ABI. Default: numeric. cp0-names=ARCH Print CP0 register names according to specified architecture. Default: based on binary being disassembled. hwr-names=ARCH Print HWR names according to specified architecture. Default: based on binary being disassembled. reg-names=ABI Print GPR and FPR names according to specified ABI. reg-names=ARCH Print CP0 register and HWR names according to specified architecture. For the options above, the following values are supported for "ABI": numeric 32 n32 64 For the options above, the following values are supported for "ARCH": numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600 r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000 r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64 mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp (gdb) which corresponds to what `objdump --help' used to print for the MIPS target, with minor formatting changes, most notably option argument lists being wrapped, but also the amount of white space separating options from the respective descriptions. The relevant part the new code is now also used by `objdump --help', which means these formatting changes apply to both outputs, except for argument list wrapping, which is GDB-specific. This also adds a separating new line between the heading and option lists where descriptions are provided, hence: (gdb) set architecture s390:31-bit (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: esa Disassemble in ESA architecture mode zarch Disassemble in z/Architecture mode insnlength Print unknown instructions according to length from first two bits (gdb) but: (gdb) set architecture powerpc:common (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: 403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl, 821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300, e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5, power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge, ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe, spe2, titan, vle, vsx (gdb) Existing affected target backends have been adjusted accordingly. This has been verified manually with: (gdb) set architecture arm (gdb) set architecture powerpc:common (gdb) set architecture s390:31-bit to cause no issues with the `show disassembler-options' and `set disassembler-options' commands. A test case for the MIPS target has also been provided, covering the default settings with ABI overrides as well as disassembler option overrides. 2018-07-02 Maciej W. Rozycki <macro@mips.com> Simon Marchi <simon.marchi@polymtl.ca> include/ PR tdep/8282 * dis-asm.h (disasm_option_arg_t): New typedef. (disasm_options_and_args_t): Likewise. (disasm_options_t): Add `arg' member, document members. (disassembler_options_mips): New prototype. (disassembler_options_arm, disassembler_options_powerpc) (disassembler_options_s390): Update prototypes. opcodes/ PR tdep/8282 * mips-dis.c (mips_option_arg_t): New enumeration. (mips_options): New variable. (disassembler_options_mips): New function. (print_mips_disassembler_options): Reimplement in terms of `disassembler_options_mips'. * arm-dis.c (disassembler_options_arm): Adapt to using the `disasm_options_and_args_t' structure. * ppc-dis.c (disassembler_options_powerpc): Likewise. * s390-dis.c (disassembler_options_s390): Likewise. gdb/ PR tdep/8282 * disasm.h (gdb_disassembler): Add `m_disassembler_options_holder'. member * disasm.c (get_all_disassembler_options): New function. (gdb_disassembler::gdb_disassembler): Use it. (gdb_buffered_insn_length_init_dis): Likewise. (gdb_buffered_insn_length): Adjust accordingly. (set_disassembler_options): Handle options with arguments. (show_disassembler_options_sfunc): Likewise. Add a leading new line if showing options with descriptions. (disassembler_options_completer): Adapt to using the `disasm_options_and_args_t' structure. * mips-tdep.c (mips_disassembler_options): New variable. (mips_disassembler_options_o32): Likewise. (mips_disassembler_options_n32): Likewise. (mips_disassembler_options_n64): Likewise. (gdb_print_insn_mips): Don't set `disassembler_options'. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove functions. (mips_gdbarch_init): Always set `gdbarch_print_insn' to `gdb_print_insn_mips'. Set `gdbarch_disassembler_options', `gdbarch_disassembler_options_implicit' and `gdbarch_valid_disassembler_options'. * arm-tdep.c (_initialize_arm_tdep): Adapt to using the `disasm_options_and_args_t' structure. * gdbarch.sh (disassembler_options_implicit): New `gdbarch' method. (valid_disassembler_options): Switch from `disasm_options_t' to the `disasm_options_and_args_t' structure. * NEWS: Document `set disassembler-options' support for the MIPS target. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. gdb/doc/ PR tdep/8282 * gdb.texinfo (Source and Machine Code): Document `set disassembler-options' support for the MIPS target. gdb/testsuite/ PR tdep/8282 * gdb.arch/mips-disassembler-options.exp: New test. * gdb.arch/mips-disassembler-options.s: New test source.
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/* This struct is used to pass information about valid disassembler
option arguments from the target to the generic GDB functions
that set and display them. */
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
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typedef struct
{
GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' Implement MIPS target support for passing options to the disassembler, complementing commit 65b48a81404c ("GDB: Add support for the new set/show disassembler-options commands."). This includes options that expect an argument, so adjust the generic code and data structures used so as to handle such options. So as to give backends syntax flexibility no specific delimiter has been defined to separate options from their respective arguments, so it has to be included as the last character of the option name. Completion code however has not been adjusted and consequently option arguments cannot be completed at this time. Also the MIPS target has non-empty defaults for the options, so that ABI names for the general-purpose registers respect our `set mips abi ...' setting rather than always being determined from the ELF headers of the binary file selected. Handle these defaults as implicit options, never shown to the user and always prepended to the user-specified options, so that the latters can override the defaults. The resulting output for the MIPS target is as follows: (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: no-aliases Use canonical instruction forms. msa Recognize MSA instructions. virt Recognize the virtualization ASE instructions. xpa Recognize the eXtended Physical Address (XPA) ASE instructions. ginv Recognize the Global INValidate (GINV) ASE instructions. gpr-names=ABI Print GPR names according to specified ABI. Default: based on binary being disassembled. fpr-names=ABI Print FPR names according to specified ABI. Default: numeric. cp0-names=ARCH Print CP0 register names according to specified architecture. Default: based on binary being disassembled. hwr-names=ARCH Print HWR names according to specified architecture. Default: based on binary being disassembled. reg-names=ABI Print GPR and FPR names according to specified ABI. reg-names=ARCH Print CP0 register and HWR names according to specified architecture. For the options above, the following values are supported for "ABI": numeric 32 n32 64 For the options above, the following values are supported for "ARCH": numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600 r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000 r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64 mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp (gdb) which corresponds to what `objdump --help' used to print for the MIPS target, with minor formatting changes, most notably option argument lists being wrapped, but also the amount of white space separating options from the respective descriptions. The relevant part the new code is now also used by `objdump --help', which means these formatting changes apply to both outputs, except for argument list wrapping, which is GDB-specific. This also adds a separating new line between the heading and option lists where descriptions are provided, hence: (gdb) set architecture s390:31-bit (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: esa Disassemble in ESA architecture mode zarch Disassemble in z/Architecture mode insnlength Print unknown instructions according to length from first two bits (gdb) but: (gdb) set architecture powerpc:common (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: 403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl, 821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300, e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5, power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge, ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe, spe2, titan, vle, vsx (gdb) Existing affected target backends have been adjusted accordingly. This has been verified manually with: (gdb) set architecture arm (gdb) set architecture powerpc:common (gdb) set architecture s390:31-bit to cause no issues with the `show disassembler-options' and `set disassembler-options' commands. A test case for the MIPS target has also been provided, covering the default settings with ABI overrides as well as disassembler option overrides. 2018-07-02 Maciej W. Rozycki <macro@mips.com> Simon Marchi <simon.marchi@polymtl.ca> include/ PR tdep/8282 * dis-asm.h (disasm_option_arg_t): New typedef. (disasm_options_and_args_t): Likewise. (disasm_options_t): Add `arg' member, document members. (disassembler_options_mips): New prototype. (disassembler_options_arm, disassembler_options_powerpc) (disassembler_options_s390): Update prototypes. opcodes/ PR tdep/8282 * mips-dis.c (mips_option_arg_t): New enumeration. (mips_options): New variable. (disassembler_options_mips): New function. (print_mips_disassembler_options): Reimplement in terms of `disassembler_options_mips'. * arm-dis.c (disassembler_options_arm): Adapt to using the `disasm_options_and_args_t' structure. * ppc-dis.c (disassembler_options_powerpc): Likewise. * s390-dis.c (disassembler_options_s390): Likewise. gdb/ PR tdep/8282 * disasm.h (gdb_disassembler): Add `m_disassembler_options_holder'. member * disasm.c (get_all_disassembler_options): New function. (gdb_disassembler::gdb_disassembler): Use it. (gdb_buffered_insn_length_init_dis): Likewise. (gdb_buffered_insn_length): Adjust accordingly. (set_disassembler_options): Handle options with arguments. (show_disassembler_options_sfunc): Likewise. Add a leading new line if showing options with descriptions. (disassembler_options_completer): Adapt to using the `disasm_options_and_args_t' structure. * mips-tdep.c (mips_disassembler_options): New variable. (mips_disassembler_options_o32): Likewise. (mips_disassembler_options_n32): Likewise. (mips_disassembler_options_n64): Likewise. (gdb_print_insn_mips): Don't set `disassembler_options'. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove functions. (mips_gdbarch_init): Always set `gdbarch_print_insn' to `gdb_print_insn_mips'. Set `gdbarch_disassembler_options', `gdbarch_disassembler_options_implicit' and `gdbarch_valid_disassembler_options'. * arm-tdep.c (_initialize_arm_tdep): Adapt to using the `disasm_options_and_args_t' structure. * gdbarch.sh (disassembler_options_implicit): New `gdbarch' method. (valid_disassembler_options): Switch from `disasm_options_t' to the `disasm_options_and_args_t' structure. * NEWS: Document `set disassembler-options' support for the MIPS target. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. gdb/doc/ PR tdep/8282 * gdb.texinfo (Source and Machine Code): Document `set disassembler-options' support for the MIPS target. gdb/testsuite/ PR tdep/8282 * gdb.arch/mips-disassembler-options.exp: New test. * gdb.arch/mips-disassembler-options.s: New test source.
2018-07-03 00:57:21 +02:00
/* Option argument name to use in descriptions. */
const char *name;
/* Vector of acceptable option argument values, NULL-terminated. */
const char **values;
} disasm_option_arg_t;
/* This struct is used to pass information about valid disassembler
options, their descriptions and arguments from the target to the
generic GDB functions that set and display them. Options are
defined by tuples of vector entries at each index. */
typedef struct
{
/* Vector of option names, NULL-terminated. */
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
const char **name;
GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' Implement MIPS target support for passing options to the disassembler, complementing commit 65b48a81404c ("GDB: Add support for the new set/show disassembler-options commands."). This includes options that expect an argument, so adjust the generic code and data structures used so as to handle such options. So as to give backends syntax flexibility no specific delimiter has been defined to separate options from their respective arguments, so it has to be included as the last character of the option name. Completion code however has not been adjusted and consequently option arguments cannot be completed at this time. Also the MIPS target has non-empty defaults for the options, so that ABI names for the general-purpose registers respect our `set mips abi ...' setting rather than always being determined from the ELF headers of the binary file selected. Handle these defaults as implicit options, never shown to the user and always prepended to the user-specified options, so that the latters can override the defaults. The resulting output for the MIPS target is as follows: (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: no-aliases Use canonical instruction forms. msa Recognize MSA instructions. virt Recognize the virtualization ASE instructions. xpa Recognize the eXtended Physical Address (XPA) ASE instructions. ginv Recognize the Global INValidate (GINV) ASE instructions. gpr-names=ABI Print GPR names according to specified ABI. Default: based on binary being disassembled. fpr-names=ABI Print FPR names according to specified ABI. Default: numeric. cp0-names=ARCH Print CP0 register names according to specified architecture. Default: based on binary being disassembled. hwr-names=ARCH Print HWR names according to specified architecture. Default: based on binary being disassembled. reg-names=ABI Print GPR and FPR names according to specified ABI. reg-names=ARCH Print CP0 register and HWR names according to specified architecture. For the options above, the following values are supported for "ABI": numeric 32 n32 64 For the options above, the following values are supported for "ARCH": numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600 r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000 r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64 mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp (gdb) which corresponds to what `objdump --help' used to print for the MIPS target, with minor formatting changes, most notably option argument lists being wrapped, but also the amount of white space separating options from the respective descriptions. The relevant part the new code is now also used by `objdump --help', which means these formatting changes apply to both outputs, except for argument list wrapping, which is GDB-specific. This also adds a separating new line between the heading and option lists where descriptions are provided, hence: (gdb) set architecture s390:31-bit (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: esa Disassemble in ESA architecture mode zarch Disassemble in z/Architecture mode insnlength Print unknown instructions according to length from first two bits (gdb) but: (gdb) set architecture powerpc:common (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: 403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl, 821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300, e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5, power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge, ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe, spe2, titan, vle, vsx (gdb) Existing affected target backends have been adjusted accordingly. This has been verified manually with: (gdb) set architecture arm (gdb) set architecture powerpc:common (gdb) set architecture s390:31-bit to cause no issues with the `show disassembler-options' and `set disassembler-options' commands. A test case for the MIPS target has also been provided, covering the default settings with ABI overrides as well as disassembler option overrides. 2018-07-02 Maciej W. Rozycki <macro@mips.com> Simon Marchi <simon.marchi@polymtl.ca> include/ PR tdep/8282 * dis-asm.h (disasm_option_arg_t): New typedef. (disasm_options_and_args_t): Likewise. (disasm_options_t): Add `arg' member, document members. (disassembler_options_mips): New prototype. (disassembler_options_arm, disassembler_options_powerpc) (disassembler_options_s390): Update prototypes. opcodes/ PR tdep/8282 * mips-dis.c (mips_option_arg_t): New enumeration. (mips_options): New variable. (disassembler_options_mips): New function. (print_mips_disassembler_options): Reimplement in terms of `disassembler_options_mips'. * arm-dis.c (disassembler_options_arm): Adapt to using the `disasm_options_and_args_t' structure. * ppc-dis.c (disassembler_options_powerpc): Likewise. * s390-dis.c (disassembler_options_s390): Likewise. gdb/ PR tdep/8282 * disasm.h (gdb_disassembler): Add `m_disassembler_options_holder'. member * disasm.c (get_all_disassembler_options): New function. (gdb_disassembler::gdb_disassembler): Use it. (gdb_buffered_insn_length_init_dis): Likewise. (gdb_buffered_insn_length): Adjust accordingly. (set_disassembler_options): Handle options with arguments. (show_disassembler_options_sfunc): Likewise. Add a leading new line if showing options with descriptions. (disassembler_options_completer): Adapt to using the `disasm_options_and_args_t' structure. * mips-tdep.c (mips_disassembler_options): New variable. (mips_disassembler_options_o32): Likewise. (mips_disassembler_options_n32): Likewise. (mips_disassembler_options_n64): Likewise. (gdb_print_insn_mips): Don't set `disassembler_options'. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove functions. (mips_gdbarch_init): Always set `gdbarch_print_insn' to `gdb_print_insn_mips'. Set `gdbarch_disassembler_options', `gdbarch_disassembler_options_implicit' and `gdbarch_valid_disassembler_options'. * arm-tdep.c (_initialize_arm_tdep): Adapt to using the `disasm_options_and_args_t' structure. * gdbarch.sh (disassembler_options_implicit): New `gdbarch' method. (valid_disassembler_options): Switch from `disasm_options_t' to the `disasm_options_and_args_t' structure. * NEWS: Document `set disassembler-options' support for the MIPS target. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. gdb/doc/ PR tdep/8282 * gdb.texinfo (Source and Machine Code): Document `set disassembler-options' support for the MIPS target. gdb/testsuite/ PR tdep/8282 * gdb.arch/mips-disassembler-options.exp: New test. * gdb.arch/mips-disassembler-options.s: New test source.
2018-07-03 00:57:21 +02:00
/* Vector of option descriptions or NULL if none to be shown. */
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
const char **description;
GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' Implement MIPS target support for passing options to the disassembler, complementing commit 65b48a81404c ("GDB: Add support for the new set/show disassembler-options commands."). This includes options that expect an argument, so adjust the generic code and data structures used so as to handle such options. So as to give backends syntax flexibility no specific delimiter has been defined to separate options from their respective arguments, so it has to be included as the last character of the option name. Completion code however has not been adjusted and consequently option arguments cannot be completed at this time. Also the MIPS target has non-empty defaults for the options, so that ABI names for the general-purpose registers respect our `set mips abi ...' setting rather than always being determined from the ELF headers of the binary file selected. Handle these defaults as implicit options, never shown to the user and always prepended to the user-specified options, so that the latters can override the defaults. The resulting output for the MIPS target is as follows: (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: no-aliases Use canonical instruction forms. msa Recognize MSA instructions. virt Recognize the virtualization ASE instructions. xpa Recognize the eXtended Physical Address (XPA) ASE instructions. ginv Recognize the Global INValidate (GINV) ASE instructions. gpr-names=ABI Print GPR names according to specified ABI. Default: based on binary being disassembled. fpr-names=ABI Print FPR names according to specified ABI. Default: numeric. cp0-names=ARCH Print CP0 register names according to specified architecture. Default: based on binary being disassembled. hwr-names=ARCH Print HWR names according to specified architecture. Default: based on binary being disassembled. reg-names=ABI Print GPR and FPR names according to specified ABI. reg-names=ARCH Print CP0 register and HWR names according to specified architecture. For the options above, the following values are supported for "ABI": numeric 32 n32 64 For the options above, the following values are supported for "ARCH": numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600 r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000 r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64 mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp (gdb) which corresponds to what `objdump --help' used to print for the MIPS target, with minor formatting changes, most notably option argument lists being wrapped, but also the amount of white space separating options from the respective descriptions. The relevant part the new code is now also used by `objdump --help', which means these formatting changes apply to both outputs, except for argument list wrapping, which is GDB-specific. This also adds a separating new line between the heading and option lists where descriptions are provided, hence: (gdb) set architecture s390:31-bit (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: esa Disassemble in ESA architecture mode zarch Disassemble in z/Architecture mode insnlength Print unknown instructions according to length from first two bits (gdb) but: (gdb) set architecture powerpc:common (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: 403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl, 821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300, e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5, power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge, ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe, spe2, titan, vle, vsx (gdb) Existing affected target backends have been adjusted accordingly. This has been verified manually with: (gdb) set architecture arm (gdb) set architecture powerpc:common (gdb) set architecture s390:31-bit to cause no issues with the `show disassembler-options' and `set disassembler-options' commands. A test case for the MIPS target has also been provided, covering the default settings with ABI overrides as well as disassembler option overrides. 2018-07-02 Maciej W. Rozycki <macro@mips.com> Simon Marchi <simon.marchi@polymtl.ca> include/ PR tdep/8282 * dis-asm.h (disasm_option_arg_t): New typedef. (disasm_options_and_args_t): Likewise. (disasm_options_t): Add `arg' member, document members. (disassembler_options_mips): New prototype. (disassembler_options_arm, disassembler_options_powerpc) (disassembler_options_s390): Update prototypes. opcodes/ PR tdep/8282 * mips-dis.c (mips_option_arg_t): New enumeration. (mips_options): New variable. (disassembler_options_mips): New function. (print_mips_disassembler_options): Reimplement in terms of `disassembler_options_mips'. * arm-dis.c (disassembler_options_arm): Adapt to using the `disasm_options_and_args_t' structure. * ppc-dis.c (disassembler_options_powerpc): Likewise. * s390-dis.c (disassembler_options_s390): Likewise. gdb/ PR tdep/8282 * disasm.h (gdb_disassembler): Add `m_disassembler_options_holder'. member * disasm.c (get_all_disassembler_options): New function. (gdb_disassembler::gdb_disassembler): Use it. (gdb_buffered_insn_length_init_dis): Likewise. (gdb_buffered_insn_length): Adjust accordingly. (set_disassembler_options): Handle options with arguments. (show_disassembler_options_sfunc): Likewise. Add a leading new line if showing options with descriptions. (disassembler_options_completer): Adapt to using the `disasm_options_and_args_t' structure. * mips-tdep.c (mips_disassembler_options): New variable. (mips_disassembler_options_o32): Likewise. (mips_disassembler_options_n32): Likewise. (mips_disassembler_options_n64): Likewise. (gdb_print_insn_mips): Don't set `disassembler_options'. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove functions. (mips_gdbarch_init): Always set `gdbarch_print_insn' to `gdb_print_insn_mips'. Set `gdbarch_disassembler_options', `gdbarch_disassembler_options_implicit' and `gdbarch_valid_disassembler_options'. * arm-tdep.c (_initialize_arm_tdep): Adapt to using the `disasm_options_and_args_t' structure. * gdbarch.sh (disassembler_options_implicit): New `gdbarch' method. (valid_disassembler_options): Switch from `disasm_options_t' to the `disasm_options_and_args_t' structure. * NEWS: Document `set disassembler-options' support for the MIPS target. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. gdb/doc/ PR tdep/8282 * gdb.texinfo (Source and Machine Code): Document `set disassembler-options' support for the MIPS target. gdb/testsuite/ PR tdep/8282 * gdb.arch/mips-disassembler-options.exp: New test. * gdb.arch/mips-disassembler-options.s: New test source.
2018-07-03 00:57:21 +02:00
/* Vector of option argument information pointers or NULL if no
option accepts an argument. NULL entries denote individual
options that accept no argument. */
const disasm_option_arg_t **arg;
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
} disasm_options_t;
GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' Implement MIPS target support for passing options to the disassembler, complementing commit 65b48a81404c ("GDB: Add support for the new set/show disassembler-options commands."). This includes options that expect an argument, so adjust the generic code and data structures used so as to handle such options. So as to give backends syntax flexibility no specific delimiter has been defined to separate options from their respective arguments, so it has to be included as the last character of the option name. Completion code however has not been adjusted and consequently option arguments cannot be completed at this time. Also the MIPS target has non-empty defaults for the options, so that ABI names for the general-purpose registers respect our `set mips abi ...' setting rather than always being determined from the ELF headers of the binary file selected. Handle these defaults as implicit options, never shown to the user and always prepended to the user-specified options, so that the latters can override the defaults. The resulting output for the MIPS target is as follows: (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: no-aliases Use canonical instruction forms. msa Recognize MSA instructions. virt Recognize the virtualization ASE instructions. xpa Recognize the eXtended Physical Address (XPA) ASE instructions. ginv Recognize the Global INValidate (GINV) ASE instructions. gpr-names=ABI Print GPR names according to specified ABI. Default: based on binary being disassembled. fpr-names=ABI Print FPR names according to specified ABI. Default: numeric. cp0-names=ARCH Print CP0 register names according to specified architecture. Default: based on binary being disassembled. hwr-names=ARCH Print HWR names according to specified architecture. Default: based on binary being disassembled. reg-names=ABI Print GPR and FPR names according to specified ABI. reg-names=ARCH Print CP0 register and HWR names according to specified architecture. For the options above, the following values are supported for "ABI": numeric 32 n32 64 For the options above, the following values are supported for "ARCH": numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600 r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000 r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64 mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp (gdb) which corresponds to what `objdump --help' used to print for the MIPS target, with minor formatting changes, most notably option argument lists being wrapped, but also the amount of white space separating options from the respective descriptions. The relevant part the new code is now also used by `objdump --help', which means these formatting changes apply to both outputs, except for argument list wrapping, which is GDB-specific. This also adds a separating new line between the heading and option lists where descriptions are provided, hence: (gdb) set architecture s390:31-bit (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: esa Disassemble in ESA architecture mode zarch Disassemble in z/Architecture mode insnlength Print unknown instructions according to length from first two bits (gdb) but: (gdb) set architecture powerpc:common (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: 403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl, 821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300, e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5, power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge, ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe, spe2, titan, vle, vsx (gdb) Existing affected target backends have been adjusted accordingly. This has been verified manually with: (gdb) set architecture arm (gdb) set architecture powerpc:common (gdb) set architecture s390:31-bit to cause no issues with the `show disassembler-options' and `set disassembler-options' commands. A test case for the MIPS target has also been provided, covering the default settings with ABI overrides as well as disassembler option overrides. 2018-07-02 Maciej W. Rozycki <macro@mips.com> Simon Marchi <simon.marchi@polymtl.ca> include/ PR tdep/8282 * dis-asm.h (disasm_option_arg_t): New typedef. (disasm_options_and_args_t): Likewise. (disasm_options_t): Add `arg' member, document members. (disassembler_options_mips): New prototype. (disassembler_options_arm, disassembler_options_powerpc) (disassembler_options_s390): Update prototypes. opcodes/ PR tdep/8282 * mips-dis.c (mips_option_arg_t): New enumeration. (mips_options): New variable. (disassembler_options_mips): New function. (print_mips_disassembler_options): Reimplement in terms of `disassembler_options_mips'. * arm-dis.c (disassembler_options_arm): Adapt to using the `disasm_options_and_args_t' structure. * ppc-dis.c (disassembler_options_powerpc): Likewise. * s390-dis.c (disassembler_options_s390): Likewise. gdb/ PR tdep/8282 * disasm.h (gdb_disassembler): Add `m_disassembler_options_holder'. member * disasm.c (get_all_disassembler_options): New function. (gdb_disassembler::gdb_disassembler): Use it. (gdb_buffered_insn_length_init_dis): Likewise. (gdb_buffered_insn_length): Adjust accordingly. (set_disassembler_options): Handle options with arguments. (show_disassembler_options_sfunc): Likewise. Add a leading new line if showing options with descriptions. (disassembler_options_completer): Adapt to using the `disasm_options_and_args_t' structure. * mips-tdep.c (mips_disassembler_options): New variable. (mips_disassembler_options_o32): Likewise. (mips_disassembler_options_n32): Likewise. (mips_disassembler_options_n64): Likewise. (gdb_print_insn_mips): Don't set `disassembler_options'. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove functions. (mips_gdbarch_init): Always set `gdbarch_print_insn' to `gdb_print_insn_mips'. Set `gdbarch_disassembler_options', `gdbarch_disassembler_options_implicit' and `gdbarch_valid_disassembler_options'. * arm-tdep.c (_initialize_arm_tdep): Adapt to using the `disasm_options_and_args_t' structure. * gdbarch.sh (disassembler_options_implicit): New `gdbarch' method. (valid_disassembler_options): Switch from `disasm_options_t' to the `disasm_options_and_args_t' structure. * NEWS: Document `set disassembler-options' support for the MIPS target. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. gdb/doc/ PR tdep/8282 * gdb.texinfo (Source and Machine Code): Document `set disassembler-options' support for the MIPS target. gdb/testsuite/ PR tdep/8282 * gdb.arch/mips-disassembler-options.exp: New test. * gdb.arch/mips-disassembler-options.s: New test source.
2018-07-03 00:57:21 +02:00
/* This struct is used to pass information about valid disassembler
options and arguments from the target to the generic GDB functions
that set and display them. */
typedef struct
{
/* Valid disassembler options. Individual options that support
an argument will refer to entries in the ARGS vector. */
disasm_options_t options;
/* Vector of acceptable option arguments, NULL-terminated. This
collects all possible option argument choices, some of which
may be shared by different options from the OPTIONS member. */
disasm_option_arg_t *args;
} disasm_options_and_args_t;
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/* Standard disassemblers. Disassemble one instruction at the given
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target address. Return number of octets processed. */
2003-08-07 04:25:50 +02:00
typedef int (*disassembler_ftype) (bfd_vma, disassemble_info *);
Move print_insn_XXX to an opcodes internal header With the changes done in previous patches, print_insn_XXX functions don't have to be external visible out of opcodes, because both gdb and objdump select disassemblers through a single interface. This patch moves these print_insn_XXX declarations from include/dis-asm.h to opcodes/disassemble.h, which is a new header added by this patch. include: 2017-05-24 Yao Qi <yao.qi@linaro.org> * dis-asm.h: Move some function declarations to opcodes/disassemble.h. opcodes: 2017-05-24 Yao Qi <yao.qi@linaro.org> * alpha-dis.c: Include disassemble.h, don't include dis-asm.h. * avr-dis.c, bfin-dis.c, cr16-dis.c: Likewise. * crx-dis.c, d10v-dis.c, d30v-dis.c: Likewise. * disassemble.c, dlx-dis.c, epiphany-dis.c: Likewise. * fr30-dis.c, ft32-dis.c, h8300-dis.c, h8500-dis.c: Likewise. * hppa-dis.c, i370-dis.c, i386-dis.c: Likewise. * i860-dis.c, i960-dis.c, ip2k-dis.c: Likewise. * iq2000-dis.c, lm32-dis.c, m10200-dis.c: Likewise. * m10300-dis.c, m32r-dis.c, m68hc11-dis.c: Likewise. * m68k-dis.c, m88k-dis.c, mcore-dis.c: Likewise. * metag-dis.c, microblaze-dis.c, mmix-dis.c: Likewise. * moxie-dis.c, msp430-dis.c, mt-dis.c: * nds32-dis.c, nios2-dis.c, ns32k-dis.c: Likewise. * or1k-dis.c, pdp11-dis.c, pj-dis.c: Likewise. * ppc-dis.c, pru-dis.c, riscv-dis.c: Likewise. * rl78-dis.c, s390-dis.c, score-dis.c: Likewise. * sh-dis.c, sh64-dis.c, tic30-dis.c: Likewise. * tic4x-dis.c, tic54x-dis.c, tic6x-dis.c: Likewise. * tic80-dis.c, tilegx-dis.c, tilepro-dis.c: Likewise. * v850-dis.c, vax-dis.c, visium-dis.c: Likewise. * w65-dis.c, wasm32-dis.c, xc16x-dis.c: Likewise. * xgate-dis.c, xstormy16-dis.c, xtensa-dis.c: Likewise. * z80-dis.c, z8k-dis.c: Likewise. * disassemble.h: New file.
2017-05-24 18:23:52 +02:00
/* Disassemblers used out side of opcodes library. */
extern int print_insn_m32c (bfd_vma, disassemble_info *);
extern int print_insn_mep (bfd_vma, disassemble_info *);
extern int print_insn_s12z (bfd_vma, disassemble_info *);
2003-08-07 04:25:50 +02:00
extern int print_insn_sh (bfd_vma, disassemble_info *);
2006-09-17 01:51:50 +02:00
extern int print_insn_sparc (bfd_vma, disassemble_info *);
bfd * Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-29 16:17:19 +02:00
extern int print_insn_rx (bfd_vma, disassemble_info *);
[.] * configure.ac (rl78-*-*) New case. * configure: Regenerate. [bfd] * Makefile.am (ALL_MACHINES): Add cpu-rl78.lo. (ALL_MACHINES_CFILES): Add cpu-rl78.c. (BFD32_BACKENDS): Add elf32-rl78.lo. (BFD32_BACKENDS_CFILES): Add elf32-rl78.c. (Makefile.in): Regenerate. * archures.c (bfd_architecture): Define bfd_arch_rl78. (bfd_archures_list): Add bfd_rl78_arch. * config.bfd: Add rl78-*-elf. * configure.in: Add bfd_elf32_rl78_vec. * reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations. * targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rl78.c: New file. * elf32-rl78.c: New file. [binutils] * readelf.c: Include elf/rl78.h (guess_is_rela): Handle EM_RL78. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. * NEWS: Mention addition of RL78 support. * MAINTAINERS: Add myself as RL78 port maintainer. [gas] * Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c. (TARGET_CPU_HFILES): Add rc-rl78.h. (EXTRA_DIST): Add rl78-parse.c and rl78-parse.y. (rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules. * Makefile.in: Regenerate. * configure.in: Add rl78 case. * configure: Regenerate. * configure.tgt: Add rl78 case. * config/rl78-defs.h: New file. * config/rl78-parse.y: New file. * config/tc-rl78.c: New file. * config/tc-rl78.h: New file. * NEWS: Add Renesas RL78. * doc/Makefile.am (c-rl78.texi): New. * doc/Makefile.in: Likewise. * doc/all.texi: Enable it. * doc/as.texi: Add it. [include] * dis-asm.h (print_insn_rl78): Declare. [include/elf] * common.h (EM_RL78, EM_78K0R): New. * rl78.h: New. [include/opcode] * rl78.h: New file. [ld] * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c. (+eelf32rl78.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Add rl78-*-* case. * emulparams/elf32rl78.sh: New file. * NEWS: Mention addition of Renesas RL78 support. [opcodes] * Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and rl78-dis.c. (MAINTAINERCLEANFILES): Add rl78-decode.c. (rl78-decode.c): New rule, built from rl78-decode.opc and opc2c. * Makefile.in: Regenerate. * configure.in: Add bfd_rl78_arch case. * configure: Regenerate. * disassemble.c: Define ARCH_rl78. (disassembler): Add ARCH_rl78 case. * rl78-decode.c: New file. * rl78-decode.opc: New file. * rl78-dis.c: New file.
2011-11-02 04:09:11 +01:00
extern int print_insn_rl78 (bfd_vma, disassemble_info *);
extern int print_insn_rl78_g10 (bfd_vma, disassemble_info *);
extern int print_insn_rl78_g13 (bfd_vma, disassemble_info *);
extern int print_insn_rl78_g14 (bfd_vma, disassemble_info *);
2003-08-07 04:25:50 +02:00
New ARC implementation. bfd * archures.c: Remove support for older ARC. Added support for new ARC cpus (ARC600, ARC601, ARC700, ARCV2). * bfd-in2.h: Likewise. * config.bfd: Likewise. * cpu-arc.c: Likewise. * elf32-arc.c: Totally changed file with a refactored inplementation of the ARC port. * libbfd.h: Added ARC specific relocation types. * reloc.c: Likewise. gas * config/tc-arc.c: Revamped file for ARC support. * config/tc-arc.h: Likewise. * doc/as.texinfo: Add new ARC options. * doc/c-arc.texi: Likewise. ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*. * emulparams/arcebelf_prof.sh: New file * emulparams/arcebelf.sh: Likewise. * emulparams/arceblinux_prof.sh: Likewise. * emulparams/arceblinux.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emultempl/arclinux.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise * Makefile.am: Add new ARC emulations. * Makefile.in: Regenerate. * NEWS: Mention the new feature. opcodes * arc-dis.c: Revamped file for ARC support * arc-dis.h: Likewise. * arc-ext.c: Likewise. * arc-ext.h: Likewise. * arc-opc.c: Likewise. * arc-fxi.h: New file. * arc-regs.h: Likewise. * arc-tbl.h: Likewise. binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact and ARCv2. (get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Likewise. * NEWS: Mention the new feature. include * dis-asm.h (arc_get_disassembler): Correct declaration. * arc-reloc.def: Macro file with definition of all relocation types. * arc.h: Changed macros for the newly supported ARC cpus. Altered enum defining the supported relocations. * common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added macro for EM_ARC_COMPACT2. * arc-func.h: New file. * arc.h: Likewise.
2015-10-07 15:20:19 +02:00
extern disassembler_ftype arc_get_disassembler (bfd *);
2003-08-07 04:25:50 +02:00
extern disassembler_ftype cris_get_disassembler (bfd *);
extern void print_aarch64_disassembler_options (FILE *);
extern void print_i386_disassembler_options (FILE *);
2003-08-07 04:25:50 +02:00
extern void print_mips_disassembler_options (FILE *);
This patch adds support to objdump for disassembly of NFP (Netronome Flow Processor) ELF files (.nffw) as well as some basic readelf support. bfd * Makefile.am: Added NFP files to build. * archures.c: Added bfd_arch_nfp * config.bfd: Added NFP support. * configure.ac: Added NFP support. * cpu-nfp.c: New, for NFP support. * elf-bfd.h: Added elf_section_info() * elf64-nfp.c: New, for NFP support. * po/SRC-POTFILES.in: Added NFP source files. * targets.c: Added nfp_elf64_vec * bfd-in2.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. binutils* readelf.c: Very basic support for EM_NFP and its section types. * testsuite/binutils-all/nfp: New directory. * testsuite/binutils-all/nfp/objdump.exp: New file. Run new tests. * testsuite/binutils-all/nfp/test2_ctx8.d: New file. * testsuite/binutils-all/nfp/test2_no-pc_ctx4.d: New file. * testsuite/binutils-all/nfp/test1.d: New file. * testsuite/binutils-all/nfp/nfp6000.nffw: New file. * testsuite/binutils-all/nfp/test2_nfp6000.nffw: New file. * NEWS: Mention the new support. include * dis-asm.h: Added print_nfp_disassembler_options prototype. * elf/common.h: Added EM_NFP, officially assigned. See Google Group Generic System V Application Binary Interface. * elf/nfp.h: New, for NFP support. * opcode/nfp.h: New, for NFP support. opcodes Makefile.am: Added nfp-dis.c. configure.ac: Added bfd_nfp_arch. disassemble.h: Added print_insn_nfp prototype. disassemble.c: Added ARCH_nfp and call to print_insn_nfp nfp-dis.c: New, for NFP support. po/POTFILES.in: Added nfp-dis.c to the list. Makefile.in: Regenerate. configure: Regenerate.
2018-04-30 18:02:59 +02:00
extern void print_nfp_disassembler_options (FILE *);
2003-08-07 04:25:50 +02:00
extern void print_ppc_disassembler_options (FILE *);
Add support for RISC-V architecture. bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf. * config.bdf: Likewise. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * archures.c: Add bfd_riscv_arch. * reloc.c: Add riscv relocs. * targets.c: Add riscv_elf32_vec and riscv_elf64_vec. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id. * elfnn-riscv.c: New file. * elfxx-riscv.c: New file. * elfxx-riscv.h: New file. binutils* readelf.c (guess_is_rela): Add EM_RISCV. (get_machine_name): Likewise. (dump_relocations): Add support for riscv relocations. (get_machine_flags): Add support for riscv flags. (is_32bit_abs_reloc): Add R_RISCV_32. (is_64bit_abs_reloc): Add R_RISCV_64. (is_none_reloc): Add R_RISCV_NONE. * testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv. Expect the debug_ranges test to fail. gas * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this architecture. * configure.in: Define a default architecture. * configure: Regenerate. * configure.tgt: Add entries for riscv. * doc/as.texinfo: Likewise. * testsuite/gas/all/gas.exp: Expect the redef tests to fail. * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. * config/tc-riscv.c: New file. * config/tc-riscv.h: New file. * doc/c-riscv.texi: New file. * testsuite/gas/riscv: New directory. * testsuite/gas/riscv/riscv.exp: New file. * testsuite/gas/riscv/t_insns.d: New file. * testsuite/gas/riscv/t_insns.s: New file. ld * Makefile.am: Add riscv files. * Makefile.in: Regenerate. * NEWS: Mention the support for this target. * configure.tgt: Add riscv entries. * emulparams/elf32lriscv-defs.sh: New file. * emulparams/elf32lriscv.sh: New file. * emulparams/elf64lriscv-defs.sh: New file. * emulparams/elf64lriscv.sh: New file. * emultempl/riscvelf.em: New file. opcodes * configure.ac: Add entry for bfd_riscv_arch. * configure: Regenerate. * disassemble.c (disassembler): Add support for riscv. (disassembler_usage): Likewise. * riscv-dis.c: New file. * riscv-opc.c: New file. include * dis-asm.h: Add prototypes for print_insn_riscv and print_riscv_disassembler_options. * elf/riscv.h: New file. * opcode/riscv-opc.h: New file. * opcode/riscv.h: New file.
2016-11-01 17:45:57 +01:00
extern void print_riscv_disassembler_options (FILE *);
2003-08-07 04:25:50 +02:00
extern void print_arm_disassembler_options (FILE *);
extern void print_arc_disassembler_options (FILE *);
extern void print_s390_disassembler_options (FILE *);
extern void print_wasm32_disassembler_options (FILE *);
extern bfd_boolean aarch64_symbol_is_valid (asymbol *, struct disassemble_info *);
extern bfd_boolean arm_symbol_is_valid (asymbol *, struct disassemble_info *);
Add support for the C_SKY series of processors. This patch series is a new binutils port for C-SKY processors, including support for both the V1 and V2 processor variants. V1 is derived from the MCore architecture while V2 is substantially different, with mixed 16- and 32-bit instructions, a larger register set, a different (but overlapping) ABI, etc. There is support for bare-metal ELF targets and Linux with both glibc and uClibc. This code is being contributed jointly by C-SKY Microsystems and Mentor Graphics. C-SKY is responsible for the technical content and has proposed Lifang Xia and Yunhai Shang as port maintainers. (Note that C-SKY does have a corporate copyright assignment on file with the FSF.) Mentor Graphics' role has been cleaning up the code, adding documentation and additional test cases, etc, to address issues we anticipated reviewers would complain about. bfd * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add C-SKY. (BFD32_BACKENDS, BFD_BACKENDS_CFILES): Likewise. * Makefile.in: Regenerated. * archures.c (enum bfd_architecture): Add bfd_arch_csky and related bfd_mach defines. (bfd_csky_arch): Declare. (bfd_archures_list): Add C-SKY. * bfd-in.h (elf32_csky_build_stubs): Declare. (elf32_csky_size_stubs): Declare. (elf32_csky_next_input_section: Declare. (elf32_csky_setup_section_lists): Declare. * bfd-in2.h: Regenerated. * config.bfd: Add C-SKY. * configure.ac: Likewise. * configure: Regenerated. * cpu-csky.c: New file. * elf-bfd.h (enum elf_target_id): Add C-SKY. * elf32-csky.c: New file. * libbfd.h: Regenerated. * reloc.c: Add C-SKY relocations. * targets.c (csky_elf32_be_vec, csky_elf32_le_vec): Declare. (_bfd_target_vector): Add C-SKY target vector entries. binutils* readelf.c: Include elf/csky.h. (guess_is_rela): Handle EM_CSKY. (dump_relocations): Likewise. (get_machine_name): Likewise. (is_32bit_abs_reloc): Likewise. include * dis-asm.h (csky_symbol_is_valid): Declare. * opcode/csky.h: New file. opcodes * Makefile.am (TARGET_LIBOPCODES_CFILES): Add csky-dis.c. * Makefile.in: Regenerated. * configure.ac: Add C-SKY. * configure: Regenerated. * csky-dis.c: New file. * csky-opc.h: New file. * disassemble.c (ARCH_csky): Define. (disassembler, disassemble_init_for_target): Add case for ARCH_csky. * disassemble.h (print_insn_csky, csky_get_disassembler): Declare. gas * Makefile.am (TARGET_CPU_CFILES): Add entry for C-SKY. (TARGET_CPU_HFILES, TARGET_ENV_HFILES): Likewise. * Makefile.in: Regenerated. * config/tc-csky.c: New file. * config/tc-csky.h: New file. * config/te-csky_abiv1.h: New file. * config/te-csky_abiv1_linux.h: New file. * config/te-csky_abiv2.h: New file. * config/te-csky_abiv2_linux.h: New file. * configure.tgt: Add C-SKY. * doc/Makefile.am (CPU_DOCS): Add entry for C-SKY. * doc/Makefile.in: Regenerated. * doc/all.texi: Set CSKY feature. * doc/as.texi (Overview): Add C-SKY options. (Machine Dependencies): Likewise. * doc/c-csky.texi: New file. * testsuite/gas/csky/*: New test cases. ld * Makefile.am (ALL_EMULATION_SOURCES): Add C-SKY emulations. (ecskyelf.c, ecskyelf_linux.c): New rules. * Makefile.in: Regenerated. * configure.tgt: Add C-SKY. * emulparams/cskyelf.sh: New file. * emulparams/cskyelf_linux.sh: New file. * emultempl/cskyelf.em: New file. * gen-doc.texi: Add C-SKY. * ld.texi: Likewise. (Options specific to C-SKY targets): New section. * testsuite/ld-csky/*: New tests.
2018-07-30 13:24:14 +02:00
extern bfd_boolean csky_symbol_is_valid (asymbol *, struct disassemble_info *);
opcodes/riscv: Hide '.L0 ' fake symbols The RISC-V assembler generates fake labels with the name '.L0 ' as part of the debug information (see gas/config/tc-riscv.h:FAKE_LABEL_NAME). The problem is that currently, when disassembling an object file, the output looks like this (this is an example from the GDB testsuite, but is pretty representative of anything with debug information): 000000000000001e <main>: 1e: 7179 addi sp,sp,-48 20: f406 sd ra,40(sp) 22: f022 sd s0,32(sp) 24: 1800 addi s0,sp,48 0000000000000026 <.L0 >: 26: 87aa mv a5,a0 28: feb43023 sd a1,-32(s0) 2c: fcc43c23 sd a2,-40(s0) 30: fef42623 sw a5,-20(s0) 0000000000000034 <.L0 >: 34: fec42783 lw a5,-20(s0) 38: 0007871b sext.w a4,a5 3c: 678d lui a5,0x3 3e: 03978793 addi a5,a5,57 # 3039 <.LASF30+0x2a9d> 42: 02f71463 bne a4,a5,6a <.L0 > 0000000000000046 <.L0 >: 46: 000007b7 lui a5,0x0 4a: 0007b783 ld a5,0(a5) # 0 <need_malloc> 4e: 6f9c ld a5,24(a5) 0000000000000050 <.L0 >: 50: 86be mv a3,a5 52: 466d li a2,27 54: 4585 li a1,1 56: 000007b7 lui a5,0x0 5a: 00078513 mv a0,a5 5e: 00000097 auipc ra,0x0 62: 000080e7 jalr ra # 5e <.L0 +0xe> 0000000000000066 <.L0 >: 66: 4785 li a5,1 68: a869 j 102 <.L0 > 000000000000006a <.L0 >: 6a: 000007b7 lui a5,0x0 6e: 00078513 mv a0,a5 72: 00000097 auipc ra,0x0 76: 000080e7 jalr ra # 72 <.L0 +0x8> The frequent repeated '.L0 ' labels are pointless, as they are non-unique there's no way to match a use of '.L0 ' to its appearence in the output, so we'd be better off just not printing it at all. That's what this patch does by defining a 'symbol_is_valid' method for RISC-V. With this commit, the same disassembly now looks like this: 000000000000001e <main>: 1e: 7179 addi sp,sp,-48 20: f406 sd ra,40(sp) 22: f022 sd s0,32(sp) 24: 1800 addi s0,sp,48 26: 87aa mv a5,a0 28: feb43023 sd a1,-32(s0) 2c: fcc43c23 sd a2,-40(s0) 30: fef42623 sw a5,-20(s0) 34: fec42783 lw a5,-20(s0) 38: 0007871b sext.w a4,a5 3c: 678d lui a5,0x3 3e: 03978793 addi a5,a5,57 # 3039 <.LASF30+0x2a9d> 42: 02f71463 bne a4,a5,6a <.L4> 46: 000007b7 lui a5,0x0 4a: 0007b783 ld a5,0(a5) # 0 <need_malloc> 4e: 6f9c ld a5,24(a5) 50: 86be mv a3,a5 52: 466d li a2,27 54: 4585 li a1,1 56: 000007b7 lui a5,0x0 5a: 00078513 mv a0,a5 5e: 00000097 auipc ra,0x0 62: 000080e7 jalr ra # 5e <main+0x40> 66: 4785 li a5,1 68: a869 j 102 <.L5> 000000000000006a <.L4>: 6a: 000007b7 lui a5,0x0 6e: 00078513 mv a0,a5 72: 00000097 auipc ra,0x0 76: 000080e7 jalr ra # 72 <.L4+0x8> In order to share the fake label between the assembler and the libopcodes library, I've added some new defines RISCV_FAKE_LABEL_NAME and RISCV_FAKE_LABEL_CHAR in include/opcode/riscv.h. I could have just moved FAKE_LABEL_NAME to the include file, however, I thnk this would be confusing, someone working on the assembler would likely not expect to find FAKE_LABEL_NAME defined outside of the assembler source tree. By introducing the RISCV_FAKE_LABEL_* defines I can leave the assembler standard FAKE_LABEL_ defines in the assembler source, but still share the RISCV_FAKE_LABEL_* with libopcodes. gas/ChangeLog: * config/tc-riscv.h (FAKE_LABEL_NAME): Define as RISCV_FAKE_LABEL_NAME. (FAKE_LABEL_CHAR): Define as RISCV_FAKE_LABEL_CHAR. include/ChangeLog: * dis-asm.h (riscv_symbol_is_valid): Declare. * opcode/riscv.h (RISCV_FAKE_LABEL_NAME): Define. (RISCV_FAKE_LABEL_CHAR): Define. opcodes/ChangeLog: * disassembler.c (disassemble_init_for_target): Add RISC-V initialisation. * riscv-dis.c (riscv_symbol_is_valid): New function.
2018-12-03 15:46:18 +01:00
extern bfd_boolean riscv_symbol_is_valid (asymbol *, struct disassemble_info *);
extern void disassemble_init_powerpc (struct disassemble_info *);
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
extern void disassemble_init_s390 (struct disassemble_info *);
extern void disassemble_init_wasm32 (struct disassemble_info *);
Andes Technology has good news for you, we plan to update the nds32 port of binutils on upstream! We have not only removed all unsupported and obsolete code, but also supported lost of new features, including better link-time relaxations and TLS implementations. Besides, the files generated by the newly assembler and linker usually get higher performance and more optimized code size. ld * emultempl/nds32elf.em (hyper_relax): New variable. (nds32_elf_create_output_section_statements): the parameters of bfd_elf32_nds32_set_target_option (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Add new option --mhyper-relax. * emultempl/nds32elf.em (nds32_elf_after_open): Updated. * emultempl/nds32elf.em (tls_desc_trampoline): New variable. * (nds32_elf_create_output_section_statements): Updated. * (nds32_elf_after_parse): Disable relaxations when PIC is enable. * (PARSE_AND_LIST_PROLOGUE, PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Add new option --m[no-]tlsdesc-trampoline. include * elf/nds32.h: Remove the unused target features. * dis-asm.h (disassemble_init_nds32): Declared. * elf/nds32.h (E_NDS32_NULL): Removed. (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New. * opcode/nds32.h: Ident. (N32_SUB6, INSN_LW): New macros. (enum n32_opcodes): Updated. * elf/nds32.h: Doc fixes. * elf/nds32.h: Add R_NDS32_LSI. * elf/nds32.h: Add new relocations for TLS. gas * config/tc-nds32.c: Remove the unused target features. (nds32_relax_relocs, md_pseudo_table, nds32_elf_record_fixup_exp, nds32_set_elf_flags_by_insn, nds32_insert_relax_entry, nds32_apply_fix): Likewise. (nds32_no_ex9_begin): Removed. * config/tc-nds32.c (add_mapping_symbol_for_align, make_mapping_symbol, add_mapping_symbol): New functions. * config/tc-nds32.h (enum mstate): New. (nds32_segment_info_type): Likewise. * configure.ac (--enable-dsp-ext, --enable-zol-ext): New options. * config.in: Regenerated. * configure: Regenerated. * config/tc-nds32.c (nds32_dx_regs): Set the value according to the configuration. (nds32_perf_ext, nds32_perf_ext2, nds32_string_ext, nds32_audio_ext): Likewise. (nds32_dsp_ext): New variable. Set the value according to the configuration. (nds32_zol_ext): Likewise. (asm_desc, nds32_pseudo_opcode_table): Make them static. (nds32_set_elf_flags_by_insn): Updated. (nds32_check_insn_available): Updated. (nds32_str_tolower): New function. * config/tc-nds32.c (relax_table): Updated. (md_begin): Updated. (md_assemble): Use XNEW macro to allocate space for `insn.info', and then remember to free it. (md_section_align): Cast (-1) to ValueT. (nds32_get_align): Cast (~0U) to addressT. (nds32_relax_branch_instructions): Updated. (md_convert_frag): Add new local variable `final_r_type'. (invalid_prev_frag): Add new bfd_boolean parameter `relax'. All callers changed. * config/tc-nds32.c (struct nds32_relocs_pattern): Add `insn' field. (struct nds32_hint_map): Add `option_list' field. (struct suffix_name, suffix_table): Remove the unused `pic' field. (do_pseudo_b, do_pseudo_bal): Remove the suffix checking. (do_pseudo_la_internal, do_pseudo_pushpopm): Indent. (relax_hint_bias, relax_hint_id_current): New static variables. (reset_bias, relax_hint_begin): New variables. (nds_itoa): New function. (CLEAN_REG, GET_OPCODE): New macros. (struct relax_hint_id): New. (nds32_relax_hint): For .relax_hint directive, we can use `begin' and `end' to mark the relax pattern without giving exactly id number. (nds32_elf_append_relax_relocs): Handle the case that the .relax_hint directives are attached to pseudo instruction. (nds32_elf_save_pseudo_pattern): Change the second parameter from instruction's opcode to byte code. (nds32_elf_build_relax_relation): Add new bfd_boolean parameter `pseudo_hint'. (nds32_lookup_pseudo_opcode): Fix the overflow issue. (enum nds32_insn_type): Add N32_RELAX_ALU1 and N32_RELAX_16BIT. (nds32_elf_record_fixup_exp, relax_ls_table, hint_map, nds32_find_reloc_table, nds32_match_hint_insn, nds32_parse_name): Updated. * config/tc-nds32.h (MAX_RELAX_NUM): Extend it to 6. (enum nds32_relax_hint_type): Merge NDS32_RELAX_HINT_LA and NDS32_RELAX_HINT_LS into NDS32_RELAX_HINT_LALS. Add NDS32_RELAX_HINT_LA_PLT, NDS32_RELAX_HINT_LA_GOT and NDS32_RELAX_HINT_LA_GOTOFF. * config/tc-nds32.h (relax_ls_table): Add floating load/store to gp relax pattern. (hint_map, nds32_find_reloc_table): Likewise. * configure.ac: Define NDS32_LINUX_TOOLCHAIN. * configure: Regenerated. * config.in: Regenerated. * config/tc-nds32.h (enum nds32_ramp): Updated. (enum nds32_relax_hint_type): Likewise. * config/tc-nds32.c: Include "errno.h" and "limits.h". (relax_ls_table): Add TLS relax patterns. (nds32_elf_append_relax_relocs): Attach BFD_RELOC_NDS32_GROUP on each instructions of TLS patterns. (nds32_elf_record_fixup_exp): Updated. (nds32_apply_fix): Likewise. (suffix_table): Add TLSDESC suffix. binutils* testsuite/binutils-all/objcopy.exp: Set the unsupported reloc number from 215 to 255 for NDS32. bfd * elf32-nds32.c (nds32_elf_relax_loadstore): Remove the unused target features. (bfd_elf32_nds32_set_target_option): Remove the unused parameters. (nds32_elf_relax_piclo12, nds32_elf_relax_letlslo12, nds32_elf_relax_letlsadd, nds32_elf_relax_letlsls, nds32_elf_relax_pltgot_suff, nds32_elf_relax_got_suff nds32_elf_relax_gotoff_suff, calculate_plt_memory_address, calculate_plt_offset, calculate_got_memory_address, nds32_elf_check_dup_relocs): Removed. All callers changed. * elf32-nds32.h: Remove the unused macros and defines. (elf_nds32_link_hash_table): Remove the unused variable. (bfd_elf32_nds32_set_target_option): Update prototype. (nds32_elf_ex9_init): Removed. * elf32-nds32.c (nds32_convert_32_to_16): Updated. * elf32-nds32.c (HOWTO2, HOWTO3): Define new HOWTO macros to initialize array nds32_elf_howto_table in any order without lots of EMPTY_HOWTO. (nds32_reloc_map): Updated. * reloc.c: Add BFD_RELOC_NDS32_LSI. * bfd-in2.h: Regenerated. * bfd/libbfd.h: Regenerated. * elf32-nds32.c (nds32_elf_relax_howto_table): Add R_NDS32_LSI. (nds32_reloc_map): Likewise. (nds32_elf_relax_flsi): New function. (nds32_elf_relax_section): Support floating load/store relaxation. * elf32-nds32.c (NDS32_GUARD_SEC_P, elf32_nds32_local_gp_offset): New macro. (struct elf_nds32_link_hash_entry): New `offset_to_gp' field. (struct elf_nds32_obj_tdata): New `offset_to_gp' and `hdr_size' fields. (elf32_nds32_allocate_local_sym_info, nds32_elf_relax_guard, nds32_elf_is_target_special_symbol, nds32_elf_maybe_function_sym): New functions. (nds32_info_to_howto_rel): Add BFD_ASSERT. (bfd_elf32_bfd_reloc_type_table_lookup, nds32_elf_link_hash_newfunc, nds32_elf_link_hash_table_create, nds32_elf_relocate_section, nds32_elf_relax_loadstore, nds32_elf_relax_lo12, nds32_relax_adjust_label, bfd_elf32_nds32_set_target_option, nds32_fag_mark_relax): Updated. (nds32_elf_final_sda_base): Improve it to find the better gp value. (insert_nds32_elf_blank): Must consider `len' when inserting blanks. * elf32-nds32.h (bfd_elf32_nds32_set_target_option): Update prototype. (struct elf_nds32_link_hash_table): Add new variable `hyper_relax'. * elf32-nds32.c (elf32_nds32_allocate_dynrelocs): New function. (create_got_section): Likewise. (allocate_dynrelocs, nds32_elf_size_dynamic_sections, nds32_elf_relocate_section, nds32_elf_finish_dynamic_symbol): Updated. (nds32_elf_check_relocs): Fix the issue that the shared library may has TEXTREL entry in the dynamic section. (nds32_elf_create_dynamic_sections): Enable to call readonly_dynrelocs since the TEXTREL issue is fixed in the nds32_elf_check_relocs. (nds32_elf_finish_dynamic_sections): Update and add DT_RELASZ dynamic entry. (calculate_offset): Remove the unused parameter `pic_ext_target' and related codes. All callers changed. (elf_backend_dtrel_excludes_plt): Disable it temporarily since it will cause some errors for our test cases. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Allow to link the generic object. * reloc.c: Add TLS relocations. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. * elf32-nds32.h (struct section_id_list_t): New. (elf32_nds32_lookup_section_id, elf32_nds32_check_relax_group, elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New prototypes. (elf32_nds32_compute_jump_table_size, elf32_nds32_local_tlsdesc_gotent): New macro. (nds32_insertion_sort, bfd_elf32_nds32_set_target_option, elf_nds32_link_hash_table): Updated. * elf32-nds32.c (enum elf_nds32_tls_type): New. (struct elf32_nds32_relax_group_t, struct relax_group_list_t): New. (elf32_nds32_add_dynreloc, patch_tls_desc_to_ie, get_tls_type, fls, ones32, list_insert, list_insert_sibling, dump_chain, elf32_nds32_check_relax_group, elf32_nds32_lookup_section_id, elf32_nds32_unify_relax_group, nds32_elf_unify_tls_model): New functions. (elf_nds32_obj_tdata): Add new fields. (elf32_nds32_relax_group_ptr, nds32_elf_local_tlsdesc_gotent): New macros. (nds32_elf_howto_table): Add TLS relocations. (nds32_reloc_map): Likewise. (nds32_elf_copy_indirect_symbol, nds32_elf_size_dynamic_sections, nds32_elf_finish_dynamic_symbol, elf32_nds32_allocate_local_sym_info, nds32_elf_relocate_section, bfd_elf32_nds32_set_target_option, nds32_elf_check_relocs, allocate_dynrelocs): Updated. (nds32_elf_relax_section): Call nds32_elf_unify_tls_model. (dtpoff_base): Rename it to `gottpof' and then update it. opcodes * nds32-asm.c (operand_fields): Remove the unused fields. (nds32_opcodes): Remove the unused instructions. * nds32-dis.c (nds32_ex9_info): Removed. (nds32_parse_opcode): Updated. (print_insn_nds32): Likewise. * nds32-asm.c (config.h, stdlib.h, string.h): New includes. (LEX_SET_FIELD, LEX_GET_FIELD): Update defines. (nds32_asm_init, build_operand_hash_table, build_keyword_hash_table, build_opcode_hash_table): New functions. (nds32_keyword_table, nds32_keyword_count_table, nds32_field_table, nds32_opcode_table): New. (hw_ktabs): Declare it to a pointer rather than an array. (build_hash_table): Removed. * nds32-asm.h (enum): Add SYN_INPUT, SYN_OUTPUT, SYN_LOPT, SYN_ROPT and upadte HW_GPR and HW_INT. * nds32-dis.c (keywords): Remove const. (match_field): New function. (nds32_parse_opcode): Updated. * disassemble.c (disassemble_init_for_target): Add disassemble_init_nds32. * nds32-dis.c (eum map_type): New. (nds32_private_data): Likewise. (get_mapping_symbol_type, is_mapping_symbol, nds32_symbol_is_valid, nds32_add_opcode_hash_table, disassemble_init_nds32): New functions. (print_insn_nds32): Updated. * nds32-asm.c (parse_aext_reg): Add new parameter. (parse_re, parse_re2, parse_aext_reg): Only reduced registers are allowed to use. All callers changed. * nds32-asm.c (keyword_usr, keyword_sr): Updated. (operand_fields): Add new fields. (nds32_opcodes): Add new instructions. (keyword_aridxi_mx): New keyword. * nds32-asm.h (enum): Add NASM_ATTR_DSP_ISAEXT, HW_AEXT_ARIDXI_MX and NASM_ATTR_ZOL. (ALU2_1, ALU2_2, ALU2_3): New macros. * nds32-dis.c (nds32_filter_unknown_insn): Updated.
2018-09-20 14:27:31 +02:00
extern void disassemble_init_nds32 (struct disassemble_info *);
GDB PR tdep/8282: MIPS: Wire in `set disassembler-options' Implement MIPS target support for passing options to the disassembler, complementing commit 65b48a81404c ("GDB: Add support for the new set/show disassembler-options commands."). This includes options that expect an argument, so adjust the generic code and data structures used so as to handle such options. So as to give backends syntax flexibility no specific delimiter has been defined to separate options from their respective arguments, so it has to be included as the last character of the option name. Completion code however has not been adjusted and consequently option arguments cannot be completed at this time. Also the MIPS target has non-empty defaults for the options, so that ABI names for the general-purpose registers respect our `set mips abi ...' setting rather than always being determined from the ELF headers of the binary file selected. Handle these defaults as implicit options, never shown to the user and always prepended to the user-specified options, so that the latters can override the defaults. The resulting output for the MIPS target is as follows: (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: no-aliases Use canonical instruction forms. msa Recognize MSA instructions. virt Recognize the virtualization ASE instructions. xpa Recognize the eXtended Physical Address (XPA) ASE instructions. ginv Recognize the Global INValidate (GINV) ASE instructions. gpr-names=ABI Print GPR names according to specified ABI. Default: based on binary being disassembled. fpr-names=ABI Print FPR names according to specified ABI. Default: numeric. cp0-names=ARCH Print CP0 register names according to specified architecture. Default: based on binary being disassembled. hwr-names=ARCH Print HWR names according to specified architecture. Default: based on binary being disassembled. reg-names=ABI Print GPR and FPR names according to specified ABI. reg-names=ARCH Print CP0 register and HWR names according to specified architecture. For the options above, the following values are supported for "ABI": numeric 32 n32 64 For the options above, the following values are supported for "ARCH": numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600 r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000 r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64 mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp (gdb) which corresponds to what `objdump --help' used to print for the MIPS target, with minor formatting changes, most notably option argument lists being wrapped, but also the amount of white space separating options from the respective descriptions. The relevant part the new code is now also used by `objdump --help', which means these formatting changes apply to both outputs, except for argument list wrapping, which is GDB-specific. This also adds a separating new line between the heading and option lists where descriptions are provided, hence: (gdb) set architecture s390:31-bit (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: esa Disassemble in ESA architecture mode zarch Disassemble in z/Architecture mode insnlength Print unknown instructions according to length from first two bits (gdb) but: (gdb) set architecture powerpc:common (gdb) show disassembler-options The current disassembler options are '' The following disassembler options are supported for use with the 'set disassembler-options <option>[,<option>...]' command: 403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl, 821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300, e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5, power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge, ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe, spe2, titan, vle, vsx (gdb) Existing affected target backends have been adjusted accordingly. This has been verified manually with: (gdb) set architecture arm (gdb) set architecture powerpc:common (gdb) set architecture s390:31-bit to cause no issues with the `show disassembler-options' and `set disassembler-options' commands. A test case for the MIPS target has also been provided, covering the default settings with ABI overrides as well as disassembler option overrides. 2018-07-02 Maciej W. Rozycki <macro@mips.com> Simon Marchi <simon.marchi@polymtl.ca> include/ PR tdep/8282 * dis-asm.h (disasm_option_arg_t): New typedef. (disasm_options_and_args_t): Likewise. (disasm_options_t): Add `arg' member, document members. (disassembler_options_mips): New prototype. (disassembler_options_arm, disassembler_options_powerpc) (disassembler_options_s390): Update prototypes. opcodes/ PR tdep/8282 * mips-dis.c (mips_option_arg_t): New enumeration. (mips_options): New variable. (disassembler_options_mips): New function. (print_mips_disassembler_options): Reimplement in terms of `disassembler_options_mips'. * arm-dis.c (disassembler_options_arm): Adapt to using the `disasm_options_and_args_t' structure. * ppc-dis.c (disassembler_options_powerpc): Likewise. * s390-dis.c (disassembler_options_s390): Likewise. gdb/ PR tdep/8282 * disasm.h (gdb_disassembler): Add `m_disassembler_options_holder'. member * disasm.c (get_all_disassembler_options): New function. (gdb_disassembler::gdb_disassembler): Use it. (gdb_buffered_insn_length_init_dis): Likewise. (gdb_buffered_insn_length): Adjust accordingly. (set_disassembler_options): Handle options with arguments. (show_disassembler_options_sfunc): Likewise. Add a leading new line if showing options with descriptions. (disassembler_options_completer): Adapt to using the `disasm_options_and_args_t' structure. * mips-tdep.c (mips_disassembler_options): New variable. (mips_disassembler_options_o32): Likewise. (mips_disassembler_options_n32): Likewise. (mips_disassembler_options_n64): Likewise. (gdb_print_insn_mips): Don't set `disassembler_options'. (gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove functions. (mips_gdbarch_init): Always set `gdbarch_print_insn' to `gdb_print_insn_mips'. Set `gdbarch_disassembler_options', `gdbarch_disassembler_options_implicit' and `gdbarch_valid_disassembler_options'. * arm-tdep.c (_initialize_arm_tdep): Adapt to using the `disasm_options_and_args_t' structure. * gdbarch.sh (disassembler_options_implicit): New `gdbarch' method. (valid_disassembler_options): Switch from `disasm_options_t' to the `disasm_options_and_args_t' structure. * NEWS: Document `set disassembler-options' support for the MIPS target. * gdbarch.h: Regenerate. * gdbarch.c: Regenerate. gdb/doc/ PR tdep/8282 * gdb.texinfo (Source and Machine Code): Document `set disassembler-options' support for the MIPS target. gdb/testsuite/ PR tdep/8282 * gdb.arch/mips-disassembler-options.exp: New test. * gdb.arch/mips-disassembler-options.s: New test source.
2018-07-03 00:57:21 +02:00
extern const disasm_options_and_args_t *disassembler_options_arm (void);
extern const disasm_options_and_args_t *disassembler_options_mips (void);
extern const disasm_options_and_args_t *disassembler_options_powerpc (void);
extern const disasm_options_and_args_t *disassembler_options_s390 (void);
/* Fetch the disassembler for a given architecture ARC, endianess (big
endian if BIG is true), bfd_mach value MACH, and ABFD, if that support
is available. ABFD may be NULL. */
extern disassembler_ftype disassembler (enum bfd_architecture arc,
bfd_boolean big, unsigned long mach,
bfd *abfd);
1999-05-03 09:29:11 +02:00
/* Amend the disassemble_info structure as necessary for the target architecture.
Should only be called after initialising the info->arch field. */
extern void disassemble_init_for_target (struct disassemble_info * dinfo);
/* Document any target specific options available from the disassembler. */
2003-08-07 04:25:50 +02:00
extern void disassembler_usage (FILE *);
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
/* Remove whitespace and consecutive commas. */
extern char *remove_whitespace_and_extra_commas (char *);
/* Like STRCMP, but treat ',' the same as '\0' so that we match
strings like "foobar" against "foobar,xxyyzz,...". */
extern int disassembler_options_cmp (const char *, const char *);
/* A helper function for FOR_EACH_DISASSEMBLER_OPTION. */
static inline const char *
next_disassembler_option (const char *options)
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
2017-02-28 19:32:07 +01:00
{
const char *opt = strchr (options, ',');
GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise.
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if (opt != NULL)
opt++;
return opt;
}
/* A macro for iterating over each comma separated option in OPTIONS. */
#define FOR_EACH_DISASSEMBLER_OPTION(OPT, OPTIONS) \
for ((OPT) = (OPTIONS); \
(OPT) != NULL; \
(OPT) = next_disassembler_option (OPT))
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/* This block of definitions is for particular callers who read instructions
into a buffer before calling the instruction decoder. */
/* Here is a function which callers may wish to use for read_memory_func.
It gets bytes from a buffer. */
extern int buffer_read_memory
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(bfd_vma, bfd_byte *, unsigned int, struct disassemble_info *);
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/* This function goes with buffer_read_memory.
It prints a message using info->fprintf_func and info->stream. */
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extern void perror_memory (int, bfd_vma, struct disassemble_info *);
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/* Just print the address in hex. This is included for completeness even
though both GDB and objdump provide their own (to print symbolic
addresses). */
extern void generic_print_address
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(bfd_vma, struct disassemble_info *);
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/* Always true. */
extern int generic_symbol_at_address
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(bfd_vma, struct disassemble_info *);
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/* Also always true. */
extern bfd_boolean generic_symbol_is_valid
(asymbol *, struct disassemble_info *);
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/* Method to initialize a disassemble_info struct. This should be
called by all applications creating such a struct. */
extern void init_disassemble_info (struct disassemble_info *dinfo, void *stream,
fprintf_ftype fprintf_func);
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/* For compatibility with existing code. */
#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
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#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
init_disassemble_info (&(INFO), (STREAM), (fprintf_ftype) (FPRINTF_FUNC))
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#ifdef __cplusplus
}
#endif
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#endif /* ! defined (DIS_ASM_H) */