fixp's. Don't relax overflow checking for partial_inplace relocations.
Use the actual relocation type in combined relocs, not just the type
of the first one.
(macro_build_jalr): Use actual relocation size for new fix.
(s_cpsetup, s_gpdword): Likewise.
Alexandre Oliva <aoliva@redhat.com>
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Adjust
pic tests, change to warning.
(_bfd_mips_elf_final_link): Remove EF_MIPS_CPIC flag setting.
2003-05-07 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (mips_abicalls): New variable.
(md_parse_option): Use.
(s_option): Ditto.
(s_abicalls): Ditto.
(mips_elf_final_processing): Set EF_MIPS_PIC and
EF_MIPS_CPIC dependent on above.
* gas/i860/bitwise.{s,d}: New files.
* gas/i860/bte.{s,d}: New files.
* gas/i860/fldst01.{s,d}: New files.
* gas/i860/fldst02.{s,d}: New files.
* gas/i860/fldst03.{s,d}: New files.
* gas/i860/fldst04.{s,d}: New files.
* gas/i860/fldst05.{s,d}: New files.
* gas/i860/fldst06.{s,d}: New files.
* gas/i860/fldst07.{s,d}: New files.
* gas/i860/fldst08.{s,d}: New files.
* gas/i860/float01.{s,d}: New files.
* gas/i860/float02.{s,d}: New files.
* gas/i860/float03.{s,d}: New files.
* gas/i860/float04.{s,d}: New files.
* gas/i860/form.{s,d}: New files.
* gas/i860/iarith.{s,d}: New files.
* gas/i860/ldst01.{s,d}: New files.
* gas/i860/ldst02.{s,d}: New files.
* gas/i860/ldst03.{s,d}: New files.
* gas/i860/ldst04.{s,d}: New files.
* gas/i860/ldst05.{s,d}: New files.
* gas/i860/ldst06.{s,d}: New files.
* gas/i860/pfam.{s,d}: New files.
* gas/i860/pfmam.{s,d}: New files.
* gas/i860/pfmsm.{s,d}: New files.
* gas/i860/pfsm.{s,d}: New files.
* gas/i860/regress01.{s,d}: New files.
* gas/i860/shift.{s,d}: New files.
* gas/i860/simd.{s,d}: New files.
(read_a_source_file): Delete label contin.
<handling #APP/#NO_APP>: Use an "sb" to push #APP expansion into
input as with macros, instead of in separate old_* variables.
Zero-terminate string being scrubbed.
* config/tc-i860.c (MAX_FIXUPS): Define.
(struct i860_fi fi[]): New struct.
(struct i860_it the_insn): Add above as member and move fields
exp, reloc, pcrel and fup into i860_fi.
(md_assemble): Replace all instances of exp, reloc, pcrel
and fup with fi[].exp, fi[].reloc, fi[].pcrel, fi[].fup.
Add a loop to possibly emit multiple fix-ups for each insn.
(i860_process_insn): Likewise.
(i860_get_expression): Likewise.
(md_apply_fix3): Use a bitwise check for OP_IMM_U5, not equality.
2003-05-03 H.J. Lu <hjl@gnu.org>
* config/obj-elf.c (obj_elf_parse_section_letters): Make it a
fatal error for unknown section attribute.
* config/tc-alpha.c (alpha_elf_section_letter): Return -1 for
unknown section attribute.
* config/tc-ia64.c (ia64_elf_section_letter): Likewise.
* config/tc-ppc.c (ppc_section_letter): Likewise.
* config/tc-ia64.c (ia64_elf_section_letter): Handle 'o'.
(ia64_elf_section_type): Accept "unwind".
gas/testsuite/
2003-05-03 H.J. Lu <hjl@gnu.org>
* gas/ia64/ia64.exp: Add unwind.
* gas/ia64/unwind.s: New. Test the new section attribute 'o'
and the new section type "unwind".
* gas/ia64/unwind.d: Likewise.
2003-05-01 H.J. Lu <hjl@gnu.org>
* config/tc-ia64.h (tc_canonicalize_section_name): New.
* config/obj-elf.c (obj_elf_section_name): Call
tc_canonicalize_section_name if it is defined.
gas/testsuite/
2003-05-01 H.J. Lu <hjl@gnu.org>
* gas/ia64/ia64.exp: Add secname.
* gas/ia64/secname.s: New. Test the trailing '#' in section
name.
* gas/ia64/secname.d: Likewise.
* config/tc-z8k.c: Add 2003 to copyright message.
Fold s_segm() and s_unseg() into one function s_segm(parm) which
decides by the parameter.
(md_begin): Don't set linkrelax. Only set Z8002 default if no
command line argument was given to select the intended
architecure.
(get_interrupt_operand): Warn if NOP type code is emitted.
(newfix): New parameter 'size', forward it to 'fix_new_exp'.
(apply_fix): Call newfix with additional 'size' parameter.
(build_bytes): Remove unused variable 'nib'. Detect overflow in
4 bit immediate arguments.
(md_longopts): Add 'linkrelax' option.
(md_parse_option): Adapt to new s_segm function. Set 'linkrelax'
variable when 'linkrelax' command line option is specified.
(md_show_usage): Display 'linkrelax' option.
(md_apply_fix3): Fix cases R_IMM4L, R_JR, and R_IMM8. Add cases
R_CALLR and R_REL16.
* config/tc-z8k.h: Undef WARN_SIGNED_OVERFLOW_WORD.
* config/tc-z8k.c: Add 2003 to copyright message.
Fold s_segm() and s_unseg() into one function s_segm(parm) which
decides by the parameter.
(md_begin): Don't set linkrelax. Only set Z8002 default if no
command line argument was given to select the intended
architecure.
(get_interrupt_operand): Warn if NOP type code is emitted.
(newfix): New parameter 'size', forward it to 'fix_new_exp'.
(apply_fix): Call newfix with additional 'size' parameter.
(build_bytes): Remove unused variable 'nib'. Detect overflow in
4 bit immediate arguments.
(md_longopts): Add 'linkrelax' option.
(md_parse_option): Adapt to new s_segm function. Set 'linkrelax'
variable when 'linkrelax' command line option is specified.
(md_show_usage): Display 'linkrelax' option.
(md_apply_fix3): Fix cases R_IMM4L, R_JR, and R_IMM8. Add cases
R_CALLR and R_REL16.
* config/tc-z8k.h: Undef WARN_SIGNED_OVERFLOW_WORD.
2003-04-30 H.J. Lu <hjl@gnu.org>
* config/tc-ia64.c (ia64_number_to_chars): New function pointer.
(ia64_float_to_chars): Likewise.
(dot_byteorder): Set target_big_endian, ia64_number_to_chars
and ia64_float_to_chars by tc_segment_info_data.endian from
the current segment if byteorder == -1.
(md_begin): Call dot_byteorder to set target_big_endian.
(md_atof): Call ia64_float_to_chars to convert floating point.
(ia64_float_to_chars_bigendian): New function.
(ia64_float_to_chars_littleendian): Likewise.
(ia64_elf_section_change_hook): Likewise.
* config/tc-ia64.h (ia64_number_to_chars): New.
(md_number_to_chars): Changed to (*ia64_number_to_chars)
(ia64_elf_section_change_hook): New.
(md_elf_section_change_hook): Defined.
(ia64_segment_info_type): New struct.
(TC_SEGMENT_INFO_TYPE): Defined.
gas/testsuite/
2003-04-30 H.J. Lu <hjl@gnu.org>
* gas/ia64/ia64.exp: Add order.
* gas/ia64/order.s: New file.
* gas/ia64/order.d: Likewise.
* config/tc-mips.c: Use signed add for n32 address arithmetic.
(append_insn): When filling delay slots with instructions
that have fixups that tc_gen_reloc might consider modifyable
in variant frags, start a new frag.
(load_address): Generate GOT_DISP with of without offset
depending on whether symbol is local. For -xgot, use
GOT_PAGE/GOT_OFST or GOT_HI16/GOT_LO16.
(macro) <M_DLA_AB, M_LA_AB>: Likewise.
<M_JAL_A>: In NewABI, use CALL16 or GOT_DISP for small got,
CALL_HI16/CALL_LO16 or GOT_PAGE/GOT_OFST for big got.
<ld_st>: In NewABI with small got, always use
GOT_PAGE/GOT_OFST, with the latter in the load/store
instruction. With big got, use GOT_HI16/GOT_LO16 or
GOT_PAGE/GOT_OFST.
(tc_gen_reloc): Adjust variant frags with GOT_DISP in NewABI.
Add tc_frag_data.tc_fr_offset to addends. Decay CALL16,
GOT_OFST and GOT_DISP to GOT_DISP in NewABI.
(md_convert_frag): Use memmove for safe copying of overlapping
regions.
-mlong, -mshort-double and -mlong-double options; use table @code.
(M68HC11-Syntax): Update to document 68HC12 operands.
(M68HC11-Modifiers): New section for operand modifiers.
(M68HC11-Directives): New section for specific assembler directives.
(M68HC11-Branch): Fix Overfull hbox error.
constant address that Alexandre took out by accident. Reject
64-bit addresses that are not sign extensions of 32 bits only if
we don't support 64-bit address constants.
* cgen.c (gas_cgen_begin): New function. If flag_signed_overflow_ok is set
call cgen_set_signed_overflow_ok otherwise call cgen_clear_signed_overflow_ok.
* cgen.h: Prototype gas_cgen_begin.
* testsuite/gas/m32r/m32r.exp: Run signed-relocs test.
* testsuite/gas/m32r/signed-relocs.s: New file: Test signed relocs.
* testsuite/gas/m32r/signed-relocs.d: New file: Expected results
* ia64-asmtab.c: Regenerate.
* gas/ia64/dependency-1.s: New file: Test read before write dependency.
* gas/ia64/dependency-1.d: New file: Expected assembly results.
* gas/ia64/ia64.exp: Run the new test.
(M6811_OP_PAGE_ADDR): New internal define.
(get_operand): New modifier %page and %addr to obtain page and
address part of a far-function.
(fixup8): Use BFD_RELOC_M68HC11_PAGE for a %page modifier; don't
complain on overflow for the BFD_RELOC_M68HC11_PAGE and truncation
relocs.
(fixup16): Use BFD_RELOC_M68HC11_LO16 for a %addr modifier.
(find_opcode): Add comment.
(md_estimate_size_before_relax): Force relocation of
STATE_UNDEXED_OFFSET types when the symbol is not absolute.
(tc_m68hc11_fix_adjustable): Check for BFD_RELOC_M68HC11_LO16
instead of BFD_RELOC_LO16; temporarily make the BFD_RELOC_32
on the symbol itself so that DWARF2 strings are merged correctly.
* gas/mips/mips5.d: New test.
* gas/mips/mips5.l: New test stderr listing.
* gas/mips/mips5.s: New test source file.
* gas/mips/mips.exp: Run the mips5 test.
2003-04-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (macro2): Adjust implementation of
M_ULH, M_ULHU, M_ULW, and M_ULD so that they work properly
in the case where the source and destination registers
are the same.
[ gas/testsuite/ChangeLog ]
2003-04-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/ulh.d: Adjust for ulh and ulhu macro assembly changes.
* gas/mips/mips.exp: Define new "gpr_ilocks" architecture
property, and add it to mips2 (and later) chips and r3900.
* gas/mips/uld2.s: New test source file.
* gas/mips/ulh2.s: Likewise.
* gas/mips/ulw2.s: Likewise.
* gas/mips/uld2.l: New test stderr listing.
* gas/mips/ulh2.l: Likewise.
* gas/mips/ulw2.l: Likewise.
* gas/mips/uld2-eb.d: New test.
* gas/mips/uld2-el.d: Likewise.
* gas/mips/ulh2-eb.d: Likewise.
* gas/mips/ulh2-el.d: Likewise.
* gas/mips/ulw2-eb-ilocks.d: Likewise.
* gas/mips/ulw2-eb.d: Likewise.
* gas/mips/ulw2-el-ilocks.d: Likewise.
* gas/mips/ulw2-el.d: Likewise.
* gas/mips/mips.exp: Run new tests for appropriate architectures.
(current_arch_mask): Rename to current_mode_mask.
(current_arch_requested): Remove variable.
(current_cpu): New variable.
(init_default_arch): Set defaults values for s390_arch_size,
current_mode_mask and current_cpu.
(md_parse_option): New options -mesa, -mzarch and -march={g5,g6,z900}.
(md_begin): Replace current_arch_mask by current_cpu.
(md_assemble): Adapt check and error message to current_mode_mask and
current_cpu.
gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
* config/tc-mips.c (reloc_needs_lo_p): New function.
(fixup_has_matching_lo_p): New function.
(append_insn): Use reloc_needs_lo_p to check whether a relocation
might need a matching %lo(). Reuse the head of mips_hi_fixup_list
if that fixup already has a matching %lo(). Don't call frag_wane here.
(macro): Call frag_wane here if the last unmatched hi was in the
current frag.
(pic_need_relax): New function, split out from...
(md_estimate_size_before_relax): ...here.
(mips_frob_file): Use reloc_needs_lo_p. Use pic_need_relax to test
whether BFD_RELOC_MIPS_GOT16 fixups refer to global symbols.
gas/testsuite/
* gas/mips/rel12.[sd], gas/mips/rel13.[sd]: New tests.
* gas/mips/mips.exp: Run them.
(ppc_elf_suffix): Don't warn for x+off@got when ppc64 and don't
accept x@got+off etc.
(md_assemble): Handle TLS relocs.
(ppc_force_relocation): Force for all TLS relocs.
(ppc_fix_adjustable): Likewise.
(md_apply_fix3): Handle TLS relocs.
* config/tc-mips.c (enum small_ex_type): Remove.
(imm_unmatched_hi): Remove.
(md_assemble): Remove use of imm_unmatched_hi. Remove the last
argument from calls to append_insn.
(append_insn): Remove unmatched_hi parameter; check reloc_type[0]
instead.
(macro_build): Update append_insn calls.
(mips16_macro_build, macro_build_lui): Likewise.
(mips_ip): Rework handling of small expressions. Move explicit
relocation handling into my_getSmallExpression. Assume that the
value of 'o' operands is zero if there is only one bracketed
expression left.
(percent_op): Make constant. Record the BFD relocation code
associated with each operator.
(my_getSmallParser, my_getPercentOp): Remove.
(parse_relocation): New function.
(my_getSamllExpression): Rework. Fill in relocations here
rather than in mips_ip.
gas/testsuite
* gas/mips/elf-rel8.[sd], gas/mips/elf-rel9.[sd],
gas/mips/elf-rel10.[sd], gas/mips/elf-rel11.[sd]: New tests.
* gas/mips/mips.exp: Run elf-rel8 and elf-rel9 for all elf
targets. Run elf-rel10 and elf-rel11 for NewABI targets.
* configure: Rebuilt.
* config/te-irix.h: New file.
* config/tc-mips.c (mips_dwarf2_format): Use TE_IRIX to decide
whether to use Irix-specific 64-bit format.
gotplt and pltoff relocations.
(s390_elf_suffix): Add suffix strings for gotoff, gotplt and pltoff.
(s390_elf_cons): Map new lenght/elf suffix combinations for gotoff,
gotplt and pltoff to bfd relocations.
(md_gather_operands): Map new instruction operand/elf suffix
combinations to bfd relocations.
(tc_s390_fix_adjustable): Add new gotoff, gotplt and pltoff relocations
to the list of unadjustable relocations.
(tc_s390_force_relocation): Always emit relocations for gotoff, gotplt
and pltoff relocations.
(md_apply_fix3): Add the new relocations.
(md_parse_option): Recognize -m68hcs12.
(m68hc11_elf_final_processing): Set EF_M68HCS12_MACH flag to identify
HCS12.
* doc/as.texinfo (Overview): Document new option -m68hcs12.
self_dtpmod_done and self_dtpmod_offset.
(allocate_global_data_got): Only use one got entry for all
dtpmod relocs against local symbols.
(allocate_dynrel_entries): Only need .rela.got entry for
dtpmod against global symbol.
(elfNN_ia64_size_dynamic_sections): Initialize self_dtpmod_offset.
Reserve space in .rela.got for the local dtpmod entry.
(set_got_entry): Initialize the common local dtpmod .got entry.
(elfNN_ia64_relocate_section): Handle R_IA_64_DTPREL64LSB
and R_IA_64_DTPREL64MSB.
* config/tc-ia64.c (ia64_cons_fix_new): Handle @dtprel() in data.
* ld-ia64/ia64.exp: New.
* ld-ia64/tlsbin.dd: New test.
* ld-ia64/tlsbinpic.s: New test.
* ld-ia64/tlsbin.rd: New test.
* ld-ia64/tlsbin.s: New test.
* ld-ia64/tlsbin.sd: New test.
* ld-ia64/tlsbin.td: New test.
* ld-ia64/tlsg.s: New test.
* ld-ia64/tlsg.sd: New test.
* ld-ia64/tlslib.s: New test.
* ld-ia64/tlspic1.s: New test.
* ld-ia64/tlspic2.s: New test.
* ld-ia64/tlspic.dd: New test.
* ld-ia64/tlspic.rd: New test.
* ld-ia64/tlspic.sd: New test.
* ld-ia64/tlspic.td: New test.
(get_absolute_expression): ..here.
* read.h (get_absolute_expr): Declare.
* config/obj-elf.c (elf_common): Use offsetT for "temp" and "size".
Trim size to arch bits_per_address, and test for negative input
via get_absolute_expr.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
the "+D" operand, which will be used only by the disassembler.
[ gas/testsuite/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test.
* gas/mips/cp0sel-names-mips32r2.d: New test.
* gas/mips/cp0sel-names-mips64.d: New test.
* gas/mips/cp0sel-names-numeric.d: New test.
* gas/mips/cp0sel-names-sb1.d: New test.
* gas/mips/cp0sel-names.s: New test source file.
* gas/mips/mips.exp: Run new tests.
[ include/opcode/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
[ opcodes/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips1.d: New test.
* gas/mips/elf_arch_mips2.d: New test.
* gas/mips/elf_arch_mips3.d: New test.
* gas/mips/elf_arch_mips4.d: New test.
* gas/mips/elf_arch_mips5.d: New test.
* gas/mips/elf_arch_mips32.d: New test.
* gas/mips/elf_arch_mips32r2.d: New test.
* gas/mips/elf_arch_mips64.d: New test.
* gas/mips/empty.s: New test source file.
* gas/mips/mips.exp: Run new tests.
* gas/mips/elf_ase_mips16.d: Change to use empty.s
* gas/mips/elf_ase_mips16.s: Remove.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
* gas/mips/mips.exp: Define the notion of an "architecture data
array," add comments indicating how to add a new architecture and
suggestions for adding new tests. Populate the architecture data
array with many known architectures and convert many tests to
be run for multiple architectures.
(mips_arches): New global array.
(mips_arch_create, mips_arch_list_all, mips_arch_data)
(mips_arch_displayname, mips_arch_properties)
(mips_arch_as_flags, mips_arch_objdump_flags, mips_arch_matches)
(mips_arch_list_matching): New functions to operate on mips_arches.
(run_dump_test_arch, run_dump_test_arches, run_list_test_arch)
(run_list_test_arches): New functions.
(run_list_test): Document and add an optional "test name" argument.
* gas/mips/abs.d: Remove CPU-specific assembler and objdump flags,
and CPU names from test names.
* gas/mips/add.d: Likewise.
* gas/mips/and.d: Likewise.
* gas/mips/dli.d: Likewise.
* gas/mips/jal-empic-elf-2.d: Likewise.
* gas/mips/jal-empic-elf-3.d: Likewise.
* gas/mips/jal-empic-elf.d: Likewise.
* gas/mips/lb-svr4pic.d: Likewise.
* gas/mips/lb.d: Likewise.
* gas/mips/mips32.d: Likewise.
* gas/mips/mips4.d: Likewise.
* gas/mips/mips64.d: Likewise.
* gas/mips/rol-hw.d: Likewise.
* gas/mips/rol.d: Likewise.
* gas/mips/rol64-hw.d: Likewise.
* gas/mips/rol64.d: Likewise.
* gas/mips/elf-jal.d: Likewise. Also, indicate ELF in test name.
* gas/mips/mips64-mdmx.d: Tweak printed name to indicate that this
test uses the -mdmx flag.
* gas/mips/mips64-mips3d.d: Tweak printed name to indicate that
this test uses the -mips3d flag.
* gas/mips/mips64-mips3d-incl.d: New file.
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
"dror" entries, and reorder the remaining "dror" and "ror" entries.
[ gas/ChangeLog ]
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR,
use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I,
M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and
arrange not to issue warnings about use of AT when AT is not
actually used.
[ gas/testsuite/ChangeLog ]
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/rol.s: Add ".set noat" and some new instructions to test.
* gas/mips/rol64.s: Likewise.
* gas/mips/rol.l: New file.
* gas/mips/rol.d: Adjust to use rol.l and for rol.s changes.
* gas/mips/rol64.l: New file.
* gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes.
* gas/mips/rol-hw.d: New file.
* gas/mips/rol-hw.l: New file.
* gas/mips/rol64-hw.d: New file.
* gas/mips/rol64-hw.l: New file.
* gas/mips/mips.exp: Run rol-hw and rol64-hw tests.
(Create_VMS_Object_File): Fix creat call for sane unix systems.
(Object_Record_Offset): Make it a size_t.
(Flush_VMS_Object_Record_Buffer): Fix signed/unsigned warning.
(VMS_TBT_Routine_End <Size>): Make var unsigned long.
(VMS_Fix_Indirect_Reference <Offset>): Make arg addressT.
(synthesize_data_segment <data_size>): Remove ATTRIBUTE_UNUSED.
(vms_fixup_data_section <data_size>): Add here instead.
* config/e-criself.c: Fix typo in last change.
Adjust callers.
(RELAX_BRANCH_RELOC_S2): Delete.
(append_insn): Use only BFD_RELOC_16_PCREL_S2 for branches.
Do not handle BFD_RELOC_16_PCREL.
(macro_build, mips_ip): Likewise.
(md_pcrel_from): Return 4 for undefined symbols regardless of
mips_pic.
(md_apply_fix3): Use only BFD_RELOC_16_PCREL_S2 for branches.
Don't dereference howto if no such relocation is available.
Do not apply hack for in-place zero addend in NEWABI.
(md_convert_frag): Use only BFD_RELOC_16_PCREL_S2 for branches.
(gas_m68hc11_warning): New function.
(gas_m68hc11_message): New function.
(top): New tests for assembler errors.
(gas_m68hc11_opcode_list): New function.
(top): New tests for opcode list.
(md_relax_table): Define specific relax for PC-rel offsets.
(build_indexed_byte): Use a STATE_INDEXED_PCREL relax code.
(m68hc11_relax_frag): Handle the new relax code.
(md_convert_frag): Likewise.
(md_estimate_size_before_relax): Likewise.
(ia64_gen_real_reloc_type): Handle it.
(pseudo_func): Add @ltoffx.
(md_begin): Build .<ltoffx>.
(ia64_force_relocation): True for LTOFF22X and LDXMOV.
* gas/ia64/ltoff22x-1.[ds]: New.
* gas/ia64/ia64.exp: Run it.
Move OBJ_COFF TC_FORCE_RELOCATION code here so that COFF handles
ARM_IMMEDIATE and ARM_ADRL_IMMEDIATE relocs as for ELF.
* config/tc-arm.h (TC_FORCE_RELOCATION): Define for both ELF and
COFF to call arm_force_relocation.
can find the real symbol and not a gas internal debug symbol.
* gas/m68hc11/insns.d: Update.
* gas/m68hc11/insns-dwarf2.d: Update.
* gas/m68hc11/insns12.d: Update.
* gas/m68hc11/opers12.s (min5b, min9b): Use 16 and -256 for the min.
* gas/m68hc11/opers12.d: Update after indexed offset operand fixes.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
can find the real symbol and not a gas internal debug symbol.
* gas/m68hc11/insns.d: Update.
* gas/m68hc11/insns-dwarf2.d: Update.
* gas/m68hc11/insns12.d: Update.
* gas/m68hc11/opers12.s (min5b, min9b): Use 16 and -256 for the min.
* gas/m68hc11/opers12.d: Update after indexed offset operand fixes.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
* config/tc-m68hc11.h (md_relax_frag): Define to support relaxations
that are not pc-relative.
(m68hc11_relax_frag): Declare.
* config/tc-m68hc11.c (build_indexed_byte): Use a frag_var to handle
the offsetable indexed addressing modes (n,r).
(build_insn): Cleanup some locals.
(m68hc11_relax_frag): New function imported from tc-cris.c to handle
relaxation of difference between two symbols of same section.
(md_convert_frag): For INDEXED_OFFSET relaxs, use the displacement
only when this is a PC-relative operand and the offset is not absolute.
(md_estimate_size_before_relax): Convert the INDEXED_OFFSET,UNDEF frag
to INDEXED_OFFSET,STATE_BITS5 when the symbol is absolute; this will
be handled by m68hc11_relax_frag.
(32-bit int, 64-bit double).
(md_longopts): New options -mshort, -mlong, -mshort-double and
-mlong-double to control the ABI.
(md_show_usage): Update.
(md_parse_option): Handle new options.
* doc/as.texinfo (Overview): Document new options for HC11/HC12.
Richard Earnshaw
Thiemo Seufer
Nick Clifton
Eric Christopher
Dave Anglin
Jason Eckhardt
Michal Ludvig
Alan Modra
Svein Seldal
Hans-Peter Nilsson
Martin Schwidefsky
H.J. Lu
Alexandre Oliva
Daniel Jacobowitz
Chris Demetriou
Michael Snyder
Christian Groessler
Joern Rennecke
Richard Henderson
Jakub Jelinek
Stephane Carrez
Phil Blundell
Andreas Schwab
Richard Sandiford
Jim Wilson
DJ Delorie
Stan Cox
Kazu Hirata
Aldy Hernandez
Kaz Kojima