94d4433aa6
PR gas/14255
...
* config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
Don't skip fixups with fx_subsy non-NULL.
* config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
with fx_subsy non-NULL.
2013-02-05 23:02:54 +00:00
ace9af6f59
Add "@c man" markers to doc/c-metag.texi
...
* doc/c-metag.texi: Add "@c man" markers.
2013-02-04 20:29:21 +00:00
89d67ed9a9
* write.c (fixup_segment): Return void. Delete seg_reloc_count
...
related code.
(TC_ADJUST_RELOC_COUNT): Delete.
* config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
2013-02-04 12:34:17 +00:00
89072bd6eb
* po/POTFILES.in: Regenerate.
2013-02-04 06:03:10 +00:00
f9b2d5449a
* config/tc-metag.c: Make SWAP instruction less permissive with its operands.
...
* gas/metag/metacore21-invalid.s: Add invalid SWAP testcases
* gas/metag/metacore21-invalid.l: Add expected output for invalid SWAP testcases
2013-01-30 13:21:01 +00:00
392ca75208
* config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
...
relocs in .word/.etc statements.
2013-01-29 22:17:53 +00:00
427d0db66d
gas/
...
* config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
immediate value for 8-bit offset" error so it shows line info.
2013-01-29 17:33:22 +00:00
4faf939afe
* config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
...
for 64-bit output.
2013-01-25 02:02:21 +00:00
78c8d46ca4
Add support for V850E3V5 architecture
2013-01-24 11:14:05 +00:00
fb5b750309
PR gas/15039
...
* config/tc-avr.c: Include dwarf2dbg.h.
2013-01-23 12:01:12 +00:00
8ce3d284cb
Support size relocation only for ELF
...
* config/tc-i386.c (reloc): Support size relocation only for ELF.
(tc_i386_fix_adjustable): Likewise.
(lex_got): Likewise.
(tc_gen_reloc): Likewise.
2013-01-18 16:37:08 +00:00
f5555712ba
include/opcode/
...
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64.h (aarch64_op): Remove OP_V_MOVI_B.
opcodes/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI.
* aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): For
AARCH64_MOD_LSL, move the range check on the shift amount before the
alignment check; change to call set_sft_amount_out_of_range_error
instead of set_imm_out_of_range_error.
* aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL.
(aarch64_opcode_table): Remove the OP enumerator from the asimdimm
8-bit MOVI entry; change the 2nd operand from SIMD_IMM to
SIMD_IMM_SFT.
gas/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (output_operand_error_record): Change to output
the out-of-range error message as value-expected message if there is
only one single value in the expected range.
(programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
LSL #0 as a programmer-friendly feature.
gas/testsuite/
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/movi.s: Add tests.
* gas/aarch64/movi.d: Update.
* gas/aarch64/programmer-friendly.s: Add comment.
2013-01-17 16:09:44 +00:00
8fd4256dd0
Add x86 size relocation support to gas
...
gas/
* config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
(tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
BFD_RELOC_64_SIZE relocations.
(lex_got): Support "symbol@SIZE" and don't create GOT symbol
for it.
(tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
relocations against local symbols.
gas/testsuite/
* gas/i386/i386.exp: Run size-1, size-2, size-3, size-4,
x86-64-size-1, x86-64-size-2, x86-64-size-3, x86-64-size-4,
x86-64-size-5 and x86-64-size-inval-1.
* gas/i386/size-1.d: New file.
* gas/i386/size-1.s: Likewise.
* gas/i386/size-2.d: Likewise.
* gas/i386/size-2.s: Likewise.
* gas/i386/size-3.d: Likewise.
* gas/i386/size-3.s: Likewise.
* gas/i386/size-4.d: Likewise.
* gas/i386/size-4.s: Likewise.
* gas/i386/x86-64-size-1.d: Likewise.
* gas/i386/x86-64-size-2.d: Likewise.
* gas/i386/x86-64-size-3.d: Likewise.
* gas/i386/x86-64-size-4.d: Likewise.
* gas/i386/x86-64-size-5.d: Likewise.
* gas/i386/x86-64-size-5.s: Likewise.
* gas/i386/x86-64-size-inval-1.l: Likewise.
* gas/i386/x86-64-size-inval-1.s: Likewise.
* gas/i386/ilp32/x86-64-size-1.d: Likewise.
* gas/i386/ilp32/x86-64-size-2.d: Likewise.
* gas/i386/ilp32/x86-64-size-3.d: Likewise.
* gas/i386/ilp32/x86-64-size-4.d: Likewise.
* gas/i386/ilp32/x86-64-size-5.d: Likewise.
ld/testsuite/
* ld-size/size.exp: New file.
* ld-size/size32-1-i386.d: Likewise.
* ld-size/size32-1-x32.d: Likewise.
* ld-size/size32-1-x86-64.d: Likewise.
* ld-size/size32-1.s: Likewise.
* ld-size/size32-2-i386.d: Likewise.
* ld-size/size32-2-x32.d: Likewise.
* ld-size/size32-2-x86-64.d: Likewise.
* ld-size/size32-2.s: Likewise.
* ld-size/size64-1-x32.d: Likewise.
* ld-size/size64-1-x86-64.d: Likewise.
* ld-size/size64-1.s: Likewise.
* ld-size/size64-2-x32.d: Likewise.
* ld-size/size64-2-x86-64.d: Likewise.
* ld-size/size64-2.s: Likewise.
* ld-size/size-3.c: Likewise.
* ld-size/size-3.out: Likewise.
* ld-size/size-3a.c: Likewise.
* ld-size/size-3b.c: Likewise.
* ld-size/size-3c.c: Likewise.
* ld-size/size-4.out: Likewise.
* ld-size/size-4a.c: Likewise.
* ld-size/size-4b.c: Likewise.
* ld-size/size-5.out: Likewise.
* ld-size/size-5a.c: Likewise.
* ld-size/size-5b.c: Likewise.
* ld-size/size-6.out: Likewise.
* ld-size/size-6a.c: Likewise.
* ld-size/size-6b.c: Likewise.
* ld-size/size-7.rd: Likewise.
* ld-size/size-7a.c: Likewise.
* ld-size/size-7b.c: Likewise.
* ld-size/size-8.rd: Likewise.
* ld-size/size-8a.c: Likewise.
* ld-size/size-8b.c: Likewise.
2013-01-17 04:28:48 +00:00
a5840dce5b
* config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
...
finding some sort of toc syntax error, and break to avoid
compiler uninit warning.
2013-01-16 06:12:46 +00:00
af89796ad5
Increment length by 1 if the relocation token is removed
...
gas/
PR gas/15019
* config/tc-i386.c (lex_got): Increment length by 1 if the
relocation token is removed.
gas/testsuite/
PR gas/15019
* gas/i386/reloc32.s: Add tests for "xtrn@got -/+ 4".
* gas/i386/reloc64.s: Likewise.
* gas/i386/ilp32/reloc64.s: Likewise.
* gas/i386/reloc32.d: Updated.
* gas/i386/reloc64.d: Likewise.
* gas/i386/ilp32/reloc64.d: Likewise.
2013-01-15 20:34:11 +00:00
dd42f06036
* config/tc-v850.c (md_assemble): Allow signed values for
...
V850E_IMMEDIATE.
* gas/v850/basic.exp: Allow for variations in reloc names.
* gas/v850/split-lo16.d: Likewise.
* gas/v850/v850e1.s: Add more tests of the PREPARE insn.
* gas/v850/v850e1.d: Update expected disassembly.
* v850-dis.c (get_operand_value): Sign extend V850E_IMMEDIATE
values.
* v850-opc.c (IMM16LO): Add V850_OPERAND_SIGNED attribute.
2013-01-15 08:45:45 +00:00
464e3686c0
* config/tc-xgate.c (md_begin): Fix mistake made when going from
...
git to cvs.
2013-01-11 21:12:34 +00:00
5817ffd1f8
include/opcode/
...
* ppc.h (PPC_OPCODE_POWER8): New define.
(PPC_OPCODE_HTM): Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries.
* ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK,
XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines.
(SH6): Update.
<"tabort.", "tabortdc.", "tabortdci.", "tabortwc.",
"tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.",
"treclaim.", "tsr.">: Add POWER8 HTM opcodes.
<"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes.
gas/
* doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
* config/tc-ppc.c (md_show_usage): Likewise.
(ppc_handle_align): Handle power8's group ending nop.
gas/testsuite/
* gas/ppc/htm.d: New test.
* gas/ppc/htm.s: Likewise.
* gas/ppc/power8.d: Likewise.
* gas/ppc/power8.s: Likewise.
* gas/ppc/ppc.exp: Run them.
2013-01-11 02:25:36 +00:00
f4b1f6a92b
* config/tc-xgate.c (md_begin): Fix the printing of opcodes so
...
that the assember exits after the opcodes have been printed.
2013-01-10 22:15:05 +00:00
34bca50861
Remove trailing white spaces on gas
...
* app.c: Remove trailing white spaces.
* as.c: Likewise.
* as.h: Likewise.
* cond.c: Likewise.
* dw2gencfi.c: Likewise.
* dwarf2dbg.h: Likewise.
* ecoff.c: Likewise.
* input-file.c: Likewise.
* itbl-lex.h: Likewise.
* output-file.c: Likewise.
* read.c: Likewise.
* sb.c: Likewise.
* subsegs.c: Likewise.
* symbols.c: Likewise.
* write.c: Likewise.
* config/tc-i386.c: Likewise.
* doc/Makefile.am: Likewise.
* doc/Makefile.in: Likewise.
* doc/c-aarch64.texi: Likewise.
* doc/c-alpha.texi: Likewise.
* doc/c-arc.texi: Likewise.
* doc/c-arm.texi: Likewise.
* doc/c-avr.texi: Likewise.
* doc/c-bfin.texi: Likewise.
* doc/c-cr16.texi: Likewise.
* doc/c-d10v.texi: Likewise.
* doc/c-d30v.texi: Likewise.
* doc/c-h8300.texi: Likewise.
* doc/c-hppa.texi: Likewise.
* doc/c-i370.texi: Likewise.
* doc/c-i386.texi: Likewise.
* doc/c-i860.texi: Likewise.
* doc/c-m32c.texi: Likewise.
* doc/c-m32r.texi: Likewise.
* doc/c-m68hc11.texi: Likewise.
* doc/c-m68k.texi: Likewise.
* doc/c-microblaze.texi: Likewise.
* doc/c-mips.texi: Likewise.
* doc/c-msp430.texi: Likewise.
* doc/c-mt.texi: Likewise.
* doc/c-s390.texi: Likewise.
* doc/c-score.texi: Likewise.
* doc/c-sh.texi: Likewise.
* doc/c-sh64.texi: Likewise.
* doc/c-tic54x.texi: Likewise.
* doc/c-tic6x.texi: Likewise.
* doc/c-v850.texi: Likewise.
* doc/c-xc16x.texi: Likewise.
* doc/c-xgate.texi: Likewise.
* doc/c-xtensa.texi: Likewise.
* doc/c-z80.texi: Likewise.
* doc/internals.texi: Likewise.
2013-01-10 19:51:55 +00:00
4c665b71b1
gas/
...
* hash.c (hash_new_sized): Make it global.
* hash.h: Declare it.
* macro.c (define_macro): Use hash_new_sized instead of hash_new,
pass a small size.
2013-01-10 17:11:17 +00:00
a3c629886c
* common.h: Fix case of "Meta".
...
* metag.h: New file.
* dis-asm.h (print_insn_metag): New declaration.
* metag.h: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.in: Add Meta.
* disassemble.c: Add Meta support.
* metag-dis.c: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* archures.c (bfd_mach_metag): New.
* bfd-in2.h: Regenerate.
* config.bfd: Add Meta.
* configure: Regenerate.
* configure.in: Add Meta.
* cpu-metag.c: New file.
* elf-bfd.h: Add Meta.
* elf32-metag.c: New file.
* elf32-metag.h: New file.
* libbfd.h: Regenerate.
* reloc.c: Add Meta relocations.
* targets.c: Add Meta.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* config/tc-metag.c: New file.
* config/tc-metag.h: New file.
* configure.tgt: Add Meta.
* doc/Makefile.am: Add Meta.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add Meta.
* doc/as.texiinfo: Document Meta options.
* doc/c-metag.texi: New file.
* gas/metag/labelarithmetic.d: New file.
* gas/metag/labelarithmetic.s: New file.
* gas/metag/metacore12.d: New file.
* gas/metag/metacore12.s: New file.
* gas/metag/metacore21-invalid.l: New file.
* gas/metag/metacore21-invalid.s: New file.
* gas/metag/metacore21.d: New file.
* gas/metag/metacore21.s: New file.
* gas/metag/metacore21ext.d: New file.
* gas/metag/metacore21ext.s: New file.
* gas/metag/metadsp21-invalid.l: New file.
* gas/metag/metadsp21-invalid.s: New file.
* gas/metag/metadsp21.d: New file.
* gas/metag/metadsp21.s: New file.
* gas/metag/metadsp21ext.d: New file.
* gas/metag/metadsp21ext.s: New file.
* gas/metag/metafpu21.d: New file.
* gas/metag/metafpu21.s: New file.
* gas/metag/metafpu21ext.d: New file.
* gas/metag/metafpu21ext.s: New file.
* gas/metag/metag.exp: New file.
* gas/metag/tls.d: New file.
* gas/metag/tls.s: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure.tgt: Add Meta.
* emulparams/elf32metag.sh: New file.
* emultempl/metagelf.em: New file.
* ld-elf/merge.d: Mark Meta as xfail.
* ld-gc/start.d: Skip this test on Meta.
* ld-gc/personality.d: Skip this test on Meta.
* ld-metag/external.s: New file.
* ld-metag/metag.exp: New file.
* ld-metag/pcrel.d: New file.
* ld-metag/pcrel.s: New file.
* ld-metag/shared.d: New file.
* ld-metag/shared.r: New file.
* ld-metag/shared.s: New file.
* ld-metag/stub.d: New file.
* ld-metag/stub.s: New file.
* ld-metag/stub_pic_app.d: New file.
* ld-metag/stub_pic_app.r: New file.
* ld-metag/stub_pic_app.s: New file.
* ld-metag/stub_pic_shared.d: New file.
* ld-metag/stub_pic_shared.s: New file.
* ld-metag/stub_shared.d: New file.
* ld-metag/stub_shared.r: New file.
* ld-metag/stub_shared.s: New file.
* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
(dump_relocations): Add EM_METAG.
(get_machine_name): Correct case for Meta.
(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
(is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 09:49:22 +00:00
b37df7c42d
2013-01-09 Steve Ellcey <sellcey@mips.com>
...
* config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
calls.
* config/tc-mips.c (internalError): Remove, replace with abort.
2013-01-09 18:31:21 +00:00
a3251895a6
gas/
...
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (parse_operands): Change to compare the result
of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
gas/testsuite/
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/diagnostic.s: Add test.
* gas/aarch64/diagnostic.l: Update.
2013-01-08 18:17:10 +00:00
8ab8155f36
PR gas/14887
...
* config/tc-arm.c (skip_past_char): Skip whitespace before the
anticipated character.
* config/tc-arm.c (parse_address_main): Delete skip of whitespace
here as it is no longer needed.
PR gas/14887
* gas/arm/neon-ldst-es.s: Add more whitespace.
2013-01-07 12:49:12 +00:00
a4ac1c4251
* doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
...
* doc/c-score.texi (SCORE-Opts): Likewise.
* doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2013-01-06 17:50:21 +00:00
e407c74b5b
* archures.c: Add support for MIPS r5900
...
* bfd-in2.h: Add support for MIPS r5900
* config.bfd: Add support for Sony Playstation 2
* cpu-mips.c: Add support for MIPS r5900
* elfxx-mips.c: Add support for MIPS r5900 (extension of r4000)
* config/tc-mips.c: Add support for MIPS r5900
Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq.
* config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot.
* config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900.
* config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
* config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900.
* configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu).
* config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900.
* elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software.
* opcode/mips.h: Add support for r5900 instructions including lq and sq.
* configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk).
* emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32.
* emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32.
* Makefile.am: Add linker scripts for Sony Playstation 2 ELF files.
* opcodes/mips-dis.c: Add names for CP0 registers of r5900.
* opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq.
* opcodes/mips-opc.c: Add support for MIPS r5900 CPU.
Add support for 128 bit MMI (Multimedia Instructions).
Add support for EE instructions (Emotion Engine).
Disable unsupported floating point instructions (64 bit and undefined compare operations).
Enable instructions of MIPS ISA IV which are supported by r5900.
Disable 64 bit co processor instructions.
Disable 64 bit multiplication and division instructions.
Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)).
Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900.
Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04 17:22:53 +00:00
6265840747
Update copyright year to 2013
...
binutils/
2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
* version.c (print_version): Update copyright year to 2013.
gas/
2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
* as.c (parse_args): Update copyright year to 2013.
ld/
2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
* ldver.c (ldversion): Update copyright year to 2013.
opcodes/
2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_copyright): Update copyright year to 2013.
2013-01-02 17:15:38 +00:00
95830fd17d
gas/
...
2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
and "cortex57".
2013-01-02 14:56:30 +00:00
517bb291f2
PR gas/14987
...
* gas/arm/neon-ldst-es.s: Add whitespace test.
* gas/arm/neon-ldst-es.d: Update expected disassembly.
* config/tc-arm.c (parse_address_main): Skip whitespace before a
closing bracket.
2013-01-02 13:38:57 +00:00
d709e4e6c7
2012-12-20 Greta Yorsh <Greta.Yorsh@arm.com>
...
* config/tc-arm.c (rfefa,rfeea,rfeed): Fix encoding.
(rfe,srs,srsea,srsfa,srsed,srsfd): Add missing mnemonics.
* gas/arm/srs-t2.s: Add tests for missing srs modes.
* gas/arm/srs-t2.l: Update expected output.
* gas/arm/srs-arm.s: Add tests for missing srs modes.
* gas/arm/srs-arm.l: Update expected output.
* gas/arm/archv6.s: Add tests for missing rfe modes.
* gas/arm/archv6.d: Update expected output.
2012-12-20 16:19:53 +00:00
5bf135a788
Add copyright notices
2012-12-17 16:56:12 +00:00
69b06cc85f
Microblaze: Add support for handling TLS symbol suffixes and generating
...
TLS relocs for General Dynamic and Local Dynamic models.
bfd/Changelog
* reloc.c: Add new relocations
* bfd-in2.h: Regenerated
* libbfd.h: Regenerated
* elf32-microblaze.c (microblaze_elf_howto_raw):
Add TLS relocations
(microblaze_elf_reloc_type_lookup): Likewise
(elf32_mb_link_hash_entry): define TLS reference types
(elf32_mb_link_hash_table): add TLS Local dynamic GOT entry
#define has_tls_reloc if section has TLS relocs
(dtprel_base), (check_unique_offset): New
(microblaze_elf_output_dynamic_relocation): output simple
dynamic relocation into SRELOC.
(microblaze_elf_relocate_section): Accommodate TLS relocations.
(microblaze_elf_check_relocs): Likewise
(update_local_sym_info): New
(microblaze_elf_copy_indirect_symbol): Add tls_mask.
(allocate_dynrelocs): Handle TLS symbol
(microblaze_elf_size_dynamic_sections): Set size and offset
(microblaze_elf_finish_dynamic_symbol): Use
microblaze_elf_output_dynamic_relocation
gas/Changelog
* config/tc-microblaze.c: Define TLS offsets
(md_relax_table): Add TLS offsets
(imm_types), (match_imm), (get_imm_otype): New to support
TLS offsets.
(tc_microblaze_fix_adjustable): Add TLS relocs.
(md_convert_frag): Support TLS offsets.
(md_apply_fix), (md_estimate_size_before_relax), (tc_gen_reloc):
Add TLS relocs
include/Changelog
* elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
2012-12-11 16:56:53 +00:00
752937aa0c
Add copyright notices
2012-12-10 12:48:03 +00:00
67a324470a
gas/
...
2012-12-06 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (exp_has_bignum_p): Remove.
(my_get_expression): Not get rid of bignums.
(s_ltorg): Increase the range of 'align'.
(programmer_friendly_fixup): Allow bignum expression.
gas/testsuite/
2012-12-06 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/illegal.s: Add test for unaccepted LDR literal.
* gas/aarch64/illegal.l: Update.
* gas/aarch64/programmer-friendly.s: Add tests for LDR literal with
the auto-generation of literal in pool.
* gas/aarch64/programmer-friendly.d: Update.
2012-12-06 15:45:38 +00:00
94dda8b768
opcodes/Changelog:
...
* microblaze-opc.h: Rename INST_TYPE_RD_R1_SPECIAL to
INST_TYPE_R1_R2_SPECIAL
* microblaze-dis.c (print_insn_microblaze): Same.
gas/Changelog
* gas/config/tc-microblaze.c: Rename INST_TYPE_RD_R1_SPECIAL to
INST_TYPE_R1_R2_SPECIAL, don't set RD for wic.
2012-11-29 21:09:01 +00:00
d406f3e430
gas/
...
* config/tc-arm.c (md_apply_fix): Fix conversion of BL to BLX for
local targets in Thumb mode.
gas/testsuite/
* gas/arm/bl-local-2.s: New test.
* gas/arm/bl-local-2.d: New.
2012-11-28 16:53:01 +00:00
776fc41826
include/opcode/
...
* ppc.h (ppc_parse_cpu): Update prototype.
opcodes/
* ppc-dis.c (ppc_parse_cpu): Add "sticky" param. Track bits
set from ppc_opts.sticky in it. Delete "retain_mask".
(powerpc_init_dialect): Choose default dialect from info->mach
before parsing -M options. Handle more bfd_mach_ppc variants.
Update common default to power7.
gas/
* config/tc-ppc.c (sticky): New var.
(md_parse_option, ppc_machine): Update ppc_parse_cpu calls.
gas/testsuite/
* gas/ppc/astest2.d: Pass -Mppc to objdump.
ld/testsuite/
* ld-powerpc/plt1.d: Update for default "at" branch hints.
* ld-powerpc/tlsexe.d: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsopt1.d: Likewise.
* ld-powerpc/tlsopt1_32.d: Likewise.
* ld-powerpc/tlsopt2.d: Likewise.
* ld-powerpc/tlsopt2_32.d: Likewise.
* ld-powerpc/tlsopt4.d: Likewise.
* ld-powerpc/tlsopt4_32.d: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
2012-11-23 03:28:13 +00:00
0db4b3260c
Add stack high register and stack low register for MicroBlaze
...
hardware assisted stack protection, stores stack low / stack high limits
for detecting stack overflow / underflow
binutils/opcodes
* microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
* microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK
binutils/gas
* config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR
binutils/gas
* gas/microblaze/allinsn.s: Test use of SHR, SLR
* gas/microblaze/allinsn.d: Likewise
2012-11-21 17:34:14 +00:00
bacebabc8e
gas/
...
* config/tc-arm.c (arm_symbol_chars): New variable.
* config/tc-arm.h (tc_symbol_chars): New macro, defined to that.
gas/testsuite/
* gas/arm/macro-pld.s: New file.
* gas/arm/macro-pld.d: New file.
2012-11-20 17:53:46 +00:00
9b30cccca9
Fix opcode for 64-bit jecxz
...
gas/testsuite/
PR gas/14859
* gas/i386/x86-64-opcode.s: Add jecxz.
* gas/i386/x86-64-opcode.d: Updated.
opcodes/
PR gas/14859
* i386-opc.tbl: Fix opcode for 64-bit jecxz.
* i386-tbl.h: Regenerated.
2012-11-20 14:21:33 +00:00
3e0baa280f
gas/ChangeLog
...
2012-11-20 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the
local variable "ret".
2012-11-20 10:29:00 +00:00
668b27eacf
Fix sparc bitness overrides in GAS. Noticed by Eric Botcazou.
...
gas/
* config/tc-sparc.c (md_parse_option): Only certain arch
specifications should override the object to be 32-bit
or 64-bit.
2012-11-20 08:37:52 +00:00
d3da77419a
opcodes/
...
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
and increase MAX_OPCODES.
(op_code_struct): add mbar and sleep
* microblaze-opcm.h (microblaze_instr): add mbar
Define IMM_MBAR and IMM5_MBAR_MASK
* microblaze-dis.c: Add get_field_imm5_mbar
(print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
gas/
* config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5
gas/testsuite/
* gas/microblaze/allinsn.s: Add mbar and sleep
* gas/microblaze/allinsn.d: Likewise
2012-11-14 17:05:24 +00:00
46b596ff8c
gas/ChangeLog:
...
* config/tc-ppc.c (md_apply_fix): Leave field zero when emitting
an ELF reloc on data as well.
gas/testsuite/ChangeLog:
* gas/ppc/astest.d: Update for fixup changes.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
2012-11-14 13:44:45 +00:00
8f5846c8af
Correct gas microblaze ChangeLog entry
2012-11-12 16:39:48 +00:00
0420f52b94
* read.h (s_vendor_attribute): Move to...
...
* config/obj-elf.h (obj_elf_vendor_attribute): ... here.
* read.c (potable): Remove "gnu_attribute".
(skip_whitespace, skip_past_char, skip_past_comma): Delete, move
to config/obj-elf.c.
(s_vendor_attribute): Delete, move to obj_elf_vendor_attribute
in config/obj-elf.c.
(s_gnu_attribute): Delete, move to obj_elf_gnu_attribute in
config/obj-elf.c.
* config/obj-elf.c (elf_pseudo_table): Add "gnu_attribute".
(skip_whitespace, skip_past_char, skip_past_comma): New, moved
from read.c.
(obj_elf_vendor_attribute): New, moved from s_vendor_attribute
in read.c.
(obj_elf_gnu_attribute): New, moved from s_gnu_attribute in
read.c.
* config/tc-arm.c (s_arm_eabi_attribute): Rename
s_vendor_attribute to obj_elf_vendor_attribute.
* config/tc-tic6x.c (s_tic6x_c6xabi_attribute): Likewise.
2012-11-09 18:07:10 +00:00
de863c7475
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
* config.bfd: Likewise.
* configure.in: Add bfd_elf32_v850_rh850_vec.
* cpu-v850.c: Update printed description.
* cpu-v850_rh850.c: New file.
* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
relocs.
(v850_elf_perform_relocation): Likewise.
(v850_elf_final_link_relocate): Likewise.
(v850_elf_relocate_section): Likewise.
(v850_elf_relax_section): Likewise.
(v800_elf_howto_table): New.
(v850_elf_object_p): Add support for RH850 ABI values.
(v850_elf_final_write_processing): Likewise.
(v850_elf_merge_private_bfd_data): Likewise.
(v850_elf_print_private_bfd_data): Likewise.
(v800_elf_reloc_map): New.
(v800_elf_reloc_type_lookup): New.
(v800_elf_reloc_name_lookup): New.
(v800_elf_info_to_howto): New.
(bfd_elf32_v850_rh850_vec): New.
(bfd_arch_v850_rh850): New.
* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
(guess_is_rela): Add EM_V800.
(dump_relocations): Likewise.
(get_machine_name): Update EM_V800.
(get_machine_flags): Add support for RH850 ABI flags.
(is_32bit_abs_reloc): Add support for RH850 ABI reloc.
* config/tc-v850.c (v850_target_arch): New.
(v850_target_format): New.
(set_machine): Use v850_target_arch.
(md_begin): Likewise.
(md_show_usage): Document new switches.
(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
-m4byte-align.
* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
(TARGET_FORMAT): Use v850_target_format.
* doc/c-v850.texi: Document new options.
* v850.h: Add RH850 ABI values.
* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
* Makefile.in: Regenerate.
* configure.tgt (v850*-*-*): Make v850_rh850 the default
emulation. Add vanilla v850 as an extra emulation.
* emulparams/v850_rh850.sh: New file.
* scripttempl/v850_rh850.sc: New file.
* configure.in: Add bfd_v850_rh850_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
708e2187a3
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* elf32-rx.c (describe_flags): New function. Returns a buffer
containing a description of the E_FLAG_RX_... values set.
(rx_elf_merge_private_bfd_data): Use it.
(rx_elf_print_private_bfd_data): Likewise.
(elf32_rx_machine): Skip EF_RX_CPU_RX check.
(elf32_rx_special_sections): Define.
(elf_backend_special_sections): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
2012-11-09 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_change_section): Allow init array
sections to have the SHF_EXECINSTR attribute for the RX target.
* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
(md_longopts): Add -mgcc-abi and -mrx-abi.
(md_parse_option): Add support for OPTION_USES_GCC_ABI and
OPTION_USES_RX_ABI.
* doc/as.texinfo (RX Options): Add mention of remaining RX
options.
* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.
2012-11-09 Nick Clifton <nickc@redhat.com>
* rx.h (EF_RX_CPU_RX): Add comment.
(E_FLAG_RX_ABI): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
true.
(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
(PARSE_AND_LIST_ARG_CASES): Add support for
--flag-mismatch-warnings.
2012-11-09 17:00:44 +00:00
f23200ada9
Add microblazeel target support to bfd, gas and ld.
...
binutils/bfd/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* config.bfd: Add microblazeel-*-*
* configure.in: Likewise.
* configure: Regenerate.
* elf32-microblaze.c (microblaze_elf_relocate_section):
Add endian awareness.
(microblaze_elf_merge_private_bfd_data): New.
(microblaze_bfd_write_imm_value_32): New.
(microblaze_bfd_write_imm_value_64): New.
(microblaze_elf_relax_section): Add endian awareness.
(microblaze_elf_add_symbol_hook): Define TARGET_LITTLE_NAME,
TARGET_LITTLE_SYM and bfd_elf32_bfd_merge_private_bfd_data.
* targets.c: Add bfd target bfd_elf32_microblazeel_vec.
binutils/gas/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* tc-microblaze.c (md_longopts): Define OPTION_EB and
OPTION_EL for target.
(md_parse_option): Likewise.
* tc-microblaze.h: Set elf32-microblazeel if not
target_big_endian for TARGET_FORMAT.
* configure.tgt: Add microblazeel and set endian per target.
binutils/gas/testsuite/Changelog
2012-11-09 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze/endian.exp: New file - endian
testcase for microblaze / microblazeel.
* gas/microblaze/endian.s: Likewise.
* gas/microblaze/endian_be.d: Likewise.
* gas/microblaze/endian_le.d: Likewise.
* gas/microblaze/endian_le_elf.d: Likewise.
* gas/microblaze/reloc_sym.d: Update to accept targets
other than elf32-microblaze.
* gas/microblaze/special_reg.d: Likewise.
binutils/ld/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c.
* Makefile.in: Regenerated.
* configure.tgt: Add microblazeel and set endian per target.
* emulparams/elf32mb_linux.sh: Add OUTPUT_FORMAT.
* emulparams/elf32microblaze.sh: Likewise.
* emulparams/elf32mbel_linux.sh: New file.
* emulparams/elf32microblazeel.sh: Likewise.
2012-11-09 16:25:12 +00:00
0570af4ff1
2012-11-07 James Murray <jsm@jsm-net.demon.co.uk>
...
* config/tc-m68hc11.c: Fix R_M68HC12_16B relocation for movb/w
2012-11-09 14:40:27 +00:00
5bb3703f01
Remove trailing redundant `;'
...
bfd/
* aout-tic30.c (MY_final_link_callback): Remove trailing
redundant `;'.
* coff-h8500.c (extra_case): Likewise.
(bfd_coff_reloc16_get_value): Likewise.
* dwarf2.c (_bfd_dwarf2_cleanup_debug_info): Likewise.
* elf.c (_bfd_elf_slurp_version_tables): Likewise.
* elf32-frv.c (elf32_frv_relocate_section): Likewise.
* elf32-v850.c (v850_elf_perform_relocation): Likewise.
* opncls.c (bfd_calc_gnu_debuglink_crc32): Likewise.
* plugin.c (add_symbols): Likewise.
* reloc.c (bfd_check_overflow): Likewise.
* vms-lib.c (_bfd_vms_lib_archive_p): Likewise.
binutils/
* coffgrok.c (coff_grok): Remove trailing redundant `;'.
* resrc.c (open_input_stream): Likewise.
gas/
* config/atof-ieee.c (gen_to_words): Remove trailing redundant
`;'.
* config/atof-vax.c (flonum_gen2vax): Likewise.
* config/tc-d10v.c (write_2_short): Likewise.
* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
* config/tc-s390.c (tc_s390_force_relocation): Likewise.
* config/tc-v850.c (md_parse_option): Likewise.
* config/tc-xtensa.c (find_address_of_next_align_frag): Likewise.
* dwarf2dbg.c (out_header): Likewise.
* symbols.c (dollar_label_name): Likewise.
(fb_label_name): Likewise.
ld/
* testplug.c (record_add_file): Remove trailing redundant `;'.
opcodes/
* aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
* ia64-gen.c (fetch_insn_class): Likewise.
2012-11-09 08:29:34 +00:00
5821951ca6
gas/
...
* config/tc-mips.c (mips_ip) <'u'>: Default to BFD_RELOC_LO16.
gas/testsuite/
* gas/mips/lui.d: New test.
* gas/mips/micromips@lui.d: New test.
* gas/mips/lui-1.l: New list test.
* gas/mips/lui-2.l: New list test.
* gas/mips/lui.s: New test source.
* gas/mips/lui-1.s: New test source.
* gas/mips/lui-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2012-11-08 18:21:25 +00:00
6febeb7413
Regenerate.
2012-11-08 03:03:26 +00:00
34ecb04d42
2012-11-07 David Holsgrove <david.holsgrove@xilinx.com>
...
* config/tc-microblaze.c: Remove special register condition check
for INST_TYPE_RFSL related instructions.
2012-11-07 David Holsgrove <david.holsgrove@xilinx.com>
* testsuite/gas/microblaze/special_reg.exp: Add test case.
* testsuite/gas/microblaze/special_reg.s: Likewise.
* testsuite/gas/microblaze/special_reg.d: Likewise.
2012-11-07 15:36:09 +00:00
234fa27ce0
* config/tc-xgate.c: Make some functions static. Formatting
...
style and whitespace fixes. Wrap overly long lines. Format
help message.
2012-11-06 10:03:32 +00:00
1849850340
bfd/
...
* coff-tic4x.c (tic4x_coff0_vec, tic4x_coff0_beh_vec,
tic4x_coff1_vec, tic4x_coff1_beh_vec, tic4x_coff2_vec,
tic4x_coff2_beh_vec): Allow SEC_CODE and SEC_READONLY in
section flags.
gas/
* config/tc-tic4x.c: Remove alignment TODO comments.
(tic4x_do_align): Enable subseg_text_p test.
2012-11-06 05:51:18 +00:00
a38a07e07c
bfd/
...
* elf64-ppc.c (struct ppc_link_hash_table): Add dot_toc_dot.
(ppc64_elf_size_stubs): Lookup ".TOC.".
(ppc64_elf_relocate_section): Resolve special symbol ".TOC.".
gas/
* config/tc-ppc.c (ppc_elf_adjust_symtab): New function, split out..
(ppc_frob_file_before_adjust): ..from here.
(md_apply_fix): Set BSF_KEEP on .TOC. if not @tocbase.
* config/tc-ppc.h (ppc_elf_adjust_symtab): Declare.
(tc_adjust_symtab): Define.
2012-11-06 05:18:03 +00:00
1ec2d25ebf
* config/tc-ppc.c (md_apply_fix): Fix xcoff build breakage from
...
last patch.
2012-11-06 03:20:31 +00:00
9798e45d7e
* config/tc-xgate.c: Remove bogus use of <fx_pcrel_adjust>.
...
* config/tc-m68hc11.c: Likewise.
2012-11-06 00:49:37 +00:00
d17dce5567
* configure.in: Apply 2012-09-10 change to config.in here.
2012-11-05 10:45:32 +00:00
3b8b57a949
* config/tc-ppc.c (md_chars_to_number): Delete.
...
(ppc_setup_opcodes): Assert num_powerpc_operands fit.
(ppc_is_toc_sym): Move earlier in file.
(md_assemble): Move code setting reloc from md_apply_fix. Combine
non-ELF code setting fixup with ELF code. Stash opindex in
fx_pcrel_adjust. Adjust fixup offset for VLE. Don't set
fx_no_overflow here.
(md_apply_fix): Rewrite to use ppc_insert_operand for all
resolved instruction fields. Leave insn field zero when
emitting an ELF reloc in most cases.
2012-11-05 10:00:12 +00:00
552c607f04
* write.h (struct fix <fx_pcrel_adjust>): Make it a signed char.
...
* config/tc-m68k.c (tc_gen_reloc, md_pcrel_from): Remove explicit
sign extendion of fx_pxrel_adjust.
2012-11-05 07:10:37 +00:00
c06dec1422
* config/tc-mips.c (is_delay_slot_valid): Simplify expression.
2012-11-01 23:03:16 +00:00
ddaf2c4191
gas/
...
* config/tc-mips.c (append_insn): Set fx_no_overflow for 16-bit
microMIPS branch relocations.
gas/testsuite/
* gas/mips/micromips-b16.d: New test.
* gas/mips/micromips-b16.s: New test source.
* gas/mips/mips.exp: Run the new test.
2012-11-01 22:54:11 +00:00
e64af27846
gas/
...
* config/tc-mips.c (is_delay_slot_valid): Don't accept macros
in 16-bit delay slots.
(macro_build_jalr): Emit 32-bit JALR if placed in a 32-bit delay
slot.
(macro) <M_JAL_2>: Likewise
gas/testsuite/
* gas/mips/micromips-branch-delay.l: Update messages for 16-bit
delay slot changes.
* gas/mips/micromips-warn-branch-delay.d: New test.
* gas/mips/micromips-warn-branch-delay.l: Stderr output for the
new test.
* gas/mips/micromips-warn-branch-delay-1.d: New test.
* gas/mips/micromips-warn-branch-delay.s: New test source.
* gas/mips/micromips-warn-branch-delay-1.s: New test source.
* gas/mips/mips.exp: Run the new tests.
2012-11-01 22:49:28 +00:00
28ad2e2dc9
2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
...
* config/tc-microblaze.c: Check for weak symbols before
emitting relocation.
2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze: New.
* gas/microblaze/reloc_sym.exp: Add test case.
* gas/microblaze/reloc_strongsym.s: Likewise.
* gas/microblaze/reloc_weaksym.s: Likewise.
* gas/microblaze/reloc_sym.d: Likewise.
2012-10-31 15:27:37 +00:00
0c5daaa929
* sb.c (sb_check): Use __builtin_clzll when size_t is not the
...
same size as long.
2012-10-29 10:17:52 +00:00
ce23608fa2
binutils/
...
* dlltool.c (INIT_SEC_DATA): Move.
(secdata <DLLTOOL_PPC>): Use here too.
binutils/testsuite/
* binutils-all/copy-3.d: Exclude all cygwin and mingw targets,
and rs6000.
gas/
* config/tc-ppc.c (ppc_znop): Remove unused vars.
ld/
* configure.tgt (powerpcle-pe,winnt,cygwin): Add deffilep.o
and pe-dll.o.
2012-10-29 10:09:34 +00:00
1fe532cf60
PR target/14758
...
bfd/
* elf32-ppc.c (ppc_elf_reloc_type_lookup): Decode ppc64 _DS
bfd_reloc values. Map to corresponding D-form relocs.
(is_insn_ds_form, is_insn_qs_form): New functions.
(ppc_elf_relocate_section): Validate insn with DS-form or DQ-form
fields using D-form reloc.
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Fix comment.
(md_assemble): Translate to _DS relocs for ppc32 as well as ppc64.
(tc_gen_reloc): Handle _DS relocs in ppc32 mode.
2012-10-26 03:40:37 +00:00
ef8e09a081
* as.c (dump_statistics): Compute data size as the delta between
...
current sbrk(0) and start_sbrk.
* (main): Set start_sbrk to sbrk(0) on entry.
2012-10-22 11:13:25 +00:00
c207c2c6cf
* config/obj-coff.c: Add include of struc-symbol.h header.
...
(coff_frob_symbol): Check that function-aux entries are generated for
defined symbols only.
2012-10-18 17:00:56 +00:00
70e0ee1a27
* doc/as.texinfo: Add missing documentation about section flag
...
exclude.
2012-10-18 06:46:51 +00:00
8c57c7995f
* config/tc-hppa.c (pa_get_number): New.
...
(pa_get_absolute_expression): Simplify.
(pa_ip): Use pa_get_number instead of pa_get_absolute_expression
to get SOP, SFU and COPR identifiers.
2012-10-14 23:59:39 +00:00
26cbfa82ad
* config/tc-hppa.c (pa_ip): Reject double floating point stores and
...
loads that reference the right half of a floating point register.
2012-10-14 23:27:38 +00:00
aa7108806b
* config/tc-hppa.c (pa_ip): Limit unit conditions for uxor to those
...
not involving a carry.
2012-10-13 22:15:19 +00:00
b36546d2d5
gas/
...
* doc/as.texinfo (-mpwr4, -mpwr7): Fix option name typos.
2012-10-12 18:03:09 +00:00
56c0a61f59
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
* config/tc-arm.c: Change condition code insertion for
lds[hb] instructions from after the 2nd character to after the 3rd.
(tCM): Remove macro.
(TxCM): Likewise.
(TxCM_): Likewise.
(TCM): Likewise.
2012-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/ldgesb-bad.d: New file.
* gas/arm/ldgesb-bad.l: Likewise.
* gas/arm/ldgesb-bad.s: Likewise.
* gas/arm/ldgesh-bad.d: Likewise.
* gas/arm/ldgesh-bad.l: Likewise.
* gas/arm/ldgesh-bad.s: Likewise.
* gas/arm/ldsgeb.d: Likewise.
* gas/arm/ldsgeb.s: Likewise.
* gas/arm/ldsgeb.l: Likewise.
* gas/arm/ldsgeh.d: Likewise.
* gas/arm/ldsgeh.s: Likewise.
* gas/arm/ldsgeh.l: Likewise.
2012-10-11 15:26:18 +00:00
5e5c50d37b
Add AMD bdver3 support.
...
gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
* doc/c-i386.texi: Add -march=bdver3 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver3 test cases.
* gas/i386/nops-1-bdver3.d: New.
* gas/i386/arch-10-bdver3.d: New.
* gas/i386/x86-64-nops-1-bdver3.d: New.
* gas/i386/x86-64-arch-2-bdver3.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
* i386-init.h: Regenerated.
2012-10-09 08:43:06 +00:00
04ee5257d6
* v850-dis.c (disassemble): Place square parentheses around second
...
register operand of clr1, not1, set1 and tst1 instructions.
* config/tc-v850.c (v850_insert_operand): Use a static buffer for
the error message.
* gas/v850/v850e1.d: Fix expected disassembly of clr1, not1, set1
and tst1 insns.
2012-10-04 10:30:06 +00:00
cfc7277920
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (s390_parse_cpu): Add new option zEC12.
* doc/as.texinfo: Document new option zEC12.
* doc/c-s390.texi: Likewise.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run zEC12 tests.
* gas/s390/zarch-zEC12.d: New file.
* gas/s390/zarch-zEC12.s: New file.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c: Support new option zEC12.
* s390-opc.c: Add new instruction formats.
* s390-opc.txt: Add new instructions for zEC12.
2012-10-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12.
2012-10-04 08:47:36 +00:00
cbf1fdc93b
* config/tc-rl78.c: Change line_separator to '@' so that '|' can
...
be used in expressions.
2012-10-03 20:48:13 +00:00
4fc0b46e62
* write.c (chain_frchains_together_1): Reorder assertion to avoid
...
uninit warning.
2012-10-01 06:46:16 +00:00
b886a2ab0d
gas/
...
* config/tc-mips.h (TC_FORCE_RELOCATION): Remove comment.
* config/tc-mips.c (calculate_reloc): New function.
(append_insn): Use it. Do not resolve compound relocations here.
(mips16_macro_build, mips16_ip): Use calculate_reloc.
(mips16_immed_extend): New function, split out from...
(mips16_immed): ...here.
(mips_frob_file): Handle null symbols.
(mips_force_relocation): Remove NEWABI handling.
(read_reloc_insn, write_reloc_insn): New functions.
(md_apply_fix): Report TLS relocations against constants.
Use read_reloc_insn, calculate_reloc and write_reloc_insn.
Report relocations against constants that can't be resolved
at assembly time.
gas/testsuite/
* gas/mips/elf-rel22.s, gas/mips/elf-rel22.d: Add more tests.
* gas/mips/elf-rel29.s, gas/mips/elf-rel29.d,
gas/mips/micromips@elf-rel29.d, gas/mips/elf-rel30.s,
gas/mips/elf-rel30.l: New tests.
* gas/mips/mips.exp: Run them.
2012-09-23 11:14:27 +00:00
335574df3c
gas/
...
2012-09-23 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (append_insn) <BFD_RELOC_MIPS_JMP>: Don't
mark as incomplete for constant expressions.
<BFD_RELOC_MIPS16_JMP>: Likewise.
2012-09-23 10:46:38 +00:00
e1b47bd5c7
gas/
...
2012-09-23 Richard Sandiford <rdsandiford@googlemail.com>
Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.h (mips_record_label): Delete.
(mips_add_dot_label): Declare.
(tc_new_dot_label): Use it.
* config/tc-mips.c (mips_assembling_insn): New variable.
(md_assemble): Call mips_mark_labels. Set mips_assembling_insn
while the main part of the function is executing.
(mips_compressed_mark_label): New function, split out from...
(mips_compressed_mark_labels): ...here.
(append_insn): Don't call mips_mark_labels here.
(mips_record_label): Make local.
(mips_add_dot_label): New function.
gas/testsuite/
* gas/mips/dot-1.s, gas/mips/dot-1.d, gas/mips/micromips@dot-1.d,
gas/mips/mips16@dot-1.d: New test.
* gas/mips/mips.exp: Run it.
2012-09-23 10:41:24 +00:00
43c0598fe7
gas/
...
* config/tc-mips.c (SEXT_16BIT): New macro.
(mips16_immed): Take the reloc type as a parameter. Do not impose
a signed vs. unsigned distinction on the value when a relocation
operator was used.
(mips16_macro_build, mips16_ip, md_convert_frag): Pass the reloc
type to mips16_immed.
(macro): Use SEXT_16BIT.
2012-09-23 09:56:47 +00:00
4d68580a99
gas/
...
* config/tc-mips.c (read_insn, write_insn, read_compressed_insn):
New functions.
(install_insn, md_apply_fix, md_convert_frag, mips_handle_align):
Use them, and write_compressed_insn.
2012-09-23 09:31:14 +00:00
5c04167a7e
gas/
...
* config/tc-mips.c (mips_cl_insn): Remove use_extend and extend.
(MIPS16_EXTEND): New macro.
(mips16_opcode_length): New function.
(insn_length): Use it.
(create_insn): Update after mips_cl_insn change.
(write_compressed_insn): New function.
(install_insn): Use it.
(append_insn): Use insn_length to check for unextended MIPS16
instructions.
(mips16_macro_build): Update call to mips16_immed.
(mips16_ip): Likewise. Use MIPS16_EXTEND to force an extended
instruction.
(mips16_immed): Remove use_extend and extend; install EXTEND
opcodes in the upper 16 bits of *INSN instead. Keep the
instruction extended if it already is. Replace warn, small
and ext with a forced_insn_length-like parameter.
(md_convert_frag): Update call mips16_immed.
Use write_compressed_insn.
2012-09-23 09:23:24 +00:00
60aa667ec4
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
...
gas/
* config/tc-i386.c (cpu_arch): Add .cx16.
* doc/c-i386.texi: Document .cx16.
gas/testsuite/
* gas/i386/x86-64-arch-2.s: Add test for cmpxchg16b.
* gas/i386/x86-64-arch-2.d: Update correspondingly.
* gas/i386/x86-64-arch-2-bdver2.d: Likewise.
* gas/i386/x86-64-arch-2-btver1.d: Likewise.
* gas/i386/x86-64-arch-2-btver2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS,
CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS,
CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS,
CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS.
(cpu_flags): Add CpuCX16.
* i386-opc.h (CpuCX16): New.
(i386_cpu_flags): Add cpucx16.
* i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-09-20 11:53:33 +00:00
c76b75fd82
2012-09-19 Steve Ellcey <sellcey@mips.com>
...
* configure.tgt: Add mips*-mti-elf* target.
2012-09-19 20:14:26 +00:00
4b8c8c02e9
2012-09-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
...
opcodes:
* arm-dis.c: Changed ldra and strl-form mnemonics
to lda and stl-form.
gas:
* config/tc-arm.c: Changed ldra and strl-form mnemonics
to lda and stl-form for armv8.
gas/testsuite:
* gas/arm/armv8-a-bad.l: Updated for changed mnemonics.
* gas/arm/armv8-a-bad.s: Likewise.
* gas/arm/armv8-a.d: Likewise.
* gas/arm/armv8-a.s: Likewise.
* gas/arm/inst.s: Added test for ldrt encoding compatibly with ldralt.
* gas/arm/inst.d: Updated.
2012-09-18 14:52:43 +00:00
5a1ad39d72
2012-09-17 Yufeng Zhang <yufeng.zhang@arm.com>
...
gas:
* config/tc-aarch64.c (aarch64_archs): Rename 'armv8' to 'armv8-a'.
gas/testsuite:
* gas/aarch64/crypto.d (#as): Update for v8->v8-A change.
* gas/aarch64/int-insns.d (#as): Likewise.
* gas/aarch64/legacy_reg_names.s (.arch): Likewise.
* gas/aarch64/neon-not.s (.arch): Likewise.
* gas/aarch64/neon-vfp-reglist-post.s (.arch): Likewise.
* gas/aarch64/neon-vfp-reglist.s (.arch): Likewise.
2012-09-17 17:48:51 +00:00
6c9c0a5029
* configure: Regenerate.
2012-09-15 00:03:06 +00:00
e202fa84e7
Bi-endian patches for moxie
2012-09-13 22:24:51 +00:00
f41aef5f6e
2012-09-11 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
...
bfd/
* bfd-in2.h: Regenerated.
* elf64-aarch64.c
(elf64_aarch64_howto_table): Add R_AARCH64_GOT_LD_PREL19 reloc to HOWTO.
(elf64_aarch64_reloc_map): Add reloc entry.
(aarch64_resolve_relocation): Likewise.
(bfd_elf_aarch64_put_addend): Likewise.
(aarch64_reloc_got_type): Likewise.
(elf64_aarch64_final_link_relocate): Likewise.
(lf64_aarch64_check_relocs): Likewise.
(elf64_aarch64_check_relocs): New case for R_AARCH64_ADR_PREL_LO21
reloc.
* libbfd.h: Regenerated.
* reloc.c (R_AARCH64_GOT_LD_PREL19): New reloc.
gas/
* config/tc-aarch64.c
(reloc_table): Add reloc to table entry.
(parse_address_main): Add support for #:<reloc_op>:<symbol>.
(parse_operands): Check for unused reloc.
(md_apply_fix): New case for reloc.
(aarch64_force_relocation): Likewise.
gas/testsuite
* gas/aarch64/reloc-insn.d
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add expected asm for new reloc test.
* gas/aarch64/reloc-insn.s
(BFD_RELOC_AARCH64_GOT_LD_PREL19): Add test for reloc.
include/
* elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc.
ld/testsuite
* ld-aarch64/aarch64-elf.exp: New reloc tests.
* ld-aarch64/emit-relocs-309-low-bad.d: New file. Expected asm for test
failure (lower bound overflow).
* ld-aarch64/emit-relocs-309-low.d: New file. Expected asm for test
success (lower bound).
* ld-aarch64/emit-relocs-309-up-bad.d: New file. Expected asm for test
failure (upper bound overflow).
* ld-aarch64/emit-relocs-309-up.d: New file. Expected asm for test
success (upper bound).
* ld-aarch64/emit-relocs-309.s: New file. Asm for new reloc tests.
2012-09-12 16:25:51 +00:00
1179bed3c9
PR gas/13503
...
* config/tc-avr.h (TC_VALIDATE_FIX): Skip: BFD_RELOC_AVR_8_LO,
BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HLO.
2012-09-11 17:01:00 +00:00
5c7a0b3ee7
* Makefile.am (bootstrap): Add $EXEEXT to dependency.
...
* Makefile.in: Regenerate.
2012-09-11 00:39:02 +00:00
00716ab174
* config.in: Disable sanity check for kfreebsd.
2012-09-10 22:30:57 +00:00
6d2920c847
Regenerate binutils configure
...
bfd/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
binutils/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
etc/
2010-11-20 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.in (install-strip): New target.
gas/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
gold/
2012-09-09 Alan Modra <amodra@gmail.com>
* target.h (Target::gc_mark_symbol, do_gc_mark_symbol): New functions.
gprof/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
intl/
2010-06-27 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
PR bootstrap/44621
ld/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
libiberty/
2011-08-28 H.J. Lu <hongjiu.lu@intel.com>
* argv.c (dupargv): Replace malloc with xmalloc. Don't check
opcodes/
2012-09-10 H.J. Lu <hongjiu.lu@intel.com>
* configure: Regenerated.
2012-09-10 17:00:44 +00:00
7078b4097f
Change moxie branch target encodings.
2012-09-08 01:20:28 +00:00
1dd5381629
2012-09-06 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
* config/tc-s390.c (set_highgprs_p): New variable.
(s390_machinemode): New function.
(md_pseudo_table): Add new pseudo command machinemode.
(md_parse_option): Set set_highgprs_p to TRUE if -mzarch was
specified on command line.
(s390_elf_final_processing): Set the highgprs flag in the ELF
header depending on set_highgprs_p.
* doc/c-s390.texi: Document new pseudo machinemode.
2012-09-06 08:23:25 +00:00
b4b783be19
* doc/as.texinfo: Document -mvle.
...
Missed with the original port commit.
Committed as obvious / trivial.
2012-09-05 18:19:55 +00:00
47527d7eb3
* gas/doc/c-ppc.texi: Document -mvle.
...
This was missing from the initial VLE port commit.
Committed as obvious / trivial.
2012-09-05 18:01:00 +00:00
b3e14edafc
Add Intel Itanium Series 9500 support
...
bfd/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* cpu-ia64-opc.c (ins_cnt6a): New function.
(ext_cnt6a): Ditto.
(ins_strd5b): Ditto.
(ext_strd5b): Ditto.
(elf64_ia64_operands): Add new operand types.
gas/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* config/tc-ia64.c (reg_symbol): Add a new register.
(indirect_reg): Ditto.
(pseudo_func): Add new symbolic constants.
(operand_match): Add new operand types recognition.
(operand_insn): Add new register recognition.
(md_begin): Add new register definition.
(specify_resource): Add new register recognition.
gas/testsuite/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* gas/testsuite/gas/ia64/psn.d: New file.
* gas/testsuite/gas/ia64/psn.s: New file.
* gas/testsuite/gas/ia64/ia64.exp: Add new testcase.
* gas/testsuite/gas/ia64/opc-i.d: Fixed failing tests.
* gas/testsuite/gas/ia64/opc-m.d: Ditto.
include/opcode/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64.h (ia64_opnd): Add new operand types.
opcodes/
2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com>
* ia64-asmtab.h (completer_index): Extend bitfield to full uint.
* ia64-gen.c: Promote completer index type to longlong.
(irf_operand): Add new register recognition.
(in_iclass_mov_x): Add an entry for the new mov_* instruction type.
(lookup_specifier): Add new resource recognition.
(insert_bit_table_ent): Relax abort condition according to the
changed completer index type.
(print_dis_table): Fix printf format for completer index.
* ia64-ic.tbl: Add a new instruction class.
* ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions.
* ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions.
* ia64-opc.h: Define short names for new operand types.
* ia64-raw.tbl: Add new RAW resource for DAHR register.
* ia64-waw.tbl: Add new WAW resource for DAHR register.
* ia64-asmtab.c: Regenerate.
2012-09-04 13:52:06 +00:00
6c1065151f
PR gas/14521
...
* config/tc-mmix.h (tc_frob_file_before_fix): Renumber sections
after call to mmix_frob_file.
2012-09-01 18:10:50 +00:00
b192990071
* doc/c-mips.texi (MIPS Opts): Correct a typo in the -mips5
...
option.
2012-08-31 19:15:59 +00:00
e5b95258d9
Add support for constructing pc-relative addresses to the plt, by
...
adding the necessary assembly operators and relocations.
bfd:
* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
(tilegx_reloc_map): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_check_relocs): Ditto.
(tilegx_elf_gc_sweep_hook): Ditto.
(tilegx_elf_relocate_section): Ditto.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas:
* tc-tilegx.c (O_hw0_plt): Define operator.
(O_hw1_plt): Ditto.
(O_hw1_last_plt): Ditto.
(O_hw2_last_plt): Ditto.
(md_begin): Handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Document new operators.
include/elf:
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
3c9017d250
* gas/config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries.
...
(do_sha1h): New function.
(do_sha1su1): Likewise.
(do_sha256su0): Likewise.
(insns): Add 2 operand SHA instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add 2 operand sha instructions.
2012-08-24 08:14:40 +00:00
48adcd8ed5
* gas/config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry.
...
(do_crypto_3op_1): New function.
(do_sha1c): Likewise.
(do_sha1p): Likewise.
(do_sha1m): Likewise.
(do_sha1su0): Likewise.
(do_sha256h): Likewise.
(do_sha256h2): Likewise.
(do_sha256su1): Likewise.
(insns): Add SHA 3 operand instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add SHA 3-operand instructions.
2012-08-24 08:14:04 +00:00
4f51b4bdbb
* gas/config/tc-arm.c (neon_type_mask): Add P64 type.
...
(type_chk_of_el_type): Handle P64 type.
(el_type_of_type_chk): Likewise.
(do_neon_vmull): Handle VMULL.P64.
* gas/testsuite/gas/arm/armv8-a+crypto.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Handle VMULL.P64.
2012-08-24 08:13:24 +00:00
91ff78946d
* gas/config/tc-arm.c (NEON_ENC_TAB): Add aes entry.
...
(neon_type_mask): Add N_UNT.
(neon_check_type): Don't always decay typed to untyped sizes.
(do_crypto_2op_1): New function.
(do_aese): Likewise.
(do_aesd): Likewise.
(do_aesmc.8): Likewise.
(do_aesimc.8): Likewise.
(insns): Add AES instructions.
* gas/testsuite/gas/arm/armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/armv8-a+crypto.s: Likewise.
* opcodes/arm-dis.c (neon_opcodes): Add support for AES instructions.
2012-08-24 08:12:45 +00:00
c70a898785
* gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bit
...
floating point types.
(do_neon_cvttb_2): New function.
(do_neon_cvttb_1): Likewise.
(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
(do_neon_cvtt): Likewise.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/half-prec-vfpv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for HP/DP
conversions.
2012-08-24 08:11:44 +00:00
30bdf75259
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vrint entries.
...
(neon_cvt_mode): Add neon_cvt_mode_r.
(do_vrint_1): New function.
(do_vrint_x): Likewise.
(do_vrint_z): Likewise.
(do_vrint_r): Likewise.
(do_vrint_a): Likewise.
(do_vrint_n): Likewise.
(do_vrint_p): Likewise.
(do_vrint_m): Likewise.
(insns): Add VRINT instructions.
* gas/testsuite/gas/arm/armv8-a+fpv5.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fpv5.s: Likewise.
* gas/testsuite/gas/arm/armv8-a+simdv3.d: Likewise.
* gas/testsuite/gas/arm/armv8-a+simdv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VRINT.
(neon_opcodes): Likewise.
2012-08-24 08:11:13 +00:00
7e8e678496
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry.
...
(neon_cvt_mode): New enumeration.
(do_vfp_nsyn_cvt_fpv8): New function.
(do_neon_cvt_1): Add support for new conversions.
(do_neon_cvtr): Use neon_cvt_mode enumerator.
(do_neon_cvt): Likewise.
(do_neon_cvta): New function.
(do_neon_cvtn): Likewise.
(do_neon_cvtp): Likewise.
(do_neon_cvtm): Likewise.
(insns): Add new VCVT instructions.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/armv8-a+simd.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for new VCVT
variants.
(neon_opcodes): Likewise.
2012-08-24 08:09:50 +00:00
6b9a8b6790
* gas/config/tc-arm.c (CVT_FLAVOUR_VAR): New define.
...
(CVT_VAR): New helper define.
(neon_cvt_flavour): New enumeration, function renamed...
(get_neon_cvt_flavour): ...to this.
(do_vfp_nsyn_cvt): Update to use new neon_cvt_flavour.
(do_vfp_nsyn_cvtz): Likewise.
(do_neon_cvt_1): Likewise.
2012-08-24 08:09:01 +00:00
73924fbcf8
* gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.
...
(vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator.
(vfp_or_neon_is_neon): Add check for SIMD for ARMv8.
(do_maxnm): New function.
(insns): Add vmaxnm, vminnm entries.
* gas/testsuite/gas/testsuite/gas/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/testsuite/gas/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/testsuite/gas/armv8-a+simd.d: New testcase.
* gas/testsuite/gas/testsuite/gas/armv8-a+simd.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM.
(neon_opcodes): Likewise.
2012-08-24 08:07:36 +00:00
33399f071c
* gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.
...
(NEON_ENC_FPV8_): New define.
(do_vfp_nsyn_fpv8): New function.
(do_vsel): Likewise.
(insns): Add VSEL instructions.
* gas/testsuite/gas/arm/armv8-a+fp.d: New testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL.
(print_insn_coprocessor): Add new %<>c bitfield format
specifier.
2012-08-24 08:06:36 +00:00
9eb6c0f132
* gas/config/tc-arm.c (do_rm_rn): New function.
...
(do_strlex): Likewise.
(do_t_strlex): Likewise.
(insns): Add support for LDRA/STRL instructions.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add LDRA/STRL instructions.
(thumb32_opcodes): Likewise.
(print_arm_insn): Add support for %<>T formatter.
2012-08-24 08:03:39 +00:00
8884b7208b
* gas/config/tc-arm.c (do_t_bkpt_hlt1): New function.
...
(do_t_hlt): New function.
(do_t_bkpt): Use do_t_bkpt_hlt1.
(insns): Add HLT.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add HLT.
(thumb_opcodes): Likewise.
2012-08-24 08:02:51 +00:00
b79f7053dd
* gas/config/tc-arm.c (insns): Add DCPS instruction.
...
* gas/testsuite/gas/arm/armv8-a.d: Update.
* gas/testsuite/gas/arm/armv8-a.s: Likewise.
* opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
2012-08-24 08:02:09 +00:00
53c4b28b4f
* gas/config/tc-arm.c (T16_32_TAB): Add _sevl.
...
(insns): Add SEVL.
* gas/testsuite/gas/arm/armv8-a.s: New testcase.
* gas/testsuite/gas/arm/armv8-a.d: Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add SEVL.
(thumb_opcodes): Likewise.
(thumb32_opcodes): Likewise.
2012-08-24 08:01:18 +00:00
e797f7e0b2
* gas/config/tc-arm.c (asm_barrier_opt): Add arch field.
...
(mark_feature_used): New function.
(parse_barrier): Check specified option is valid for the
specified architecture.
(UL_BARRIER): New macro.
(barrier_opt_names): Update for new barrier options.
* gas/testsuite/gas/arm/armv8-a-barrier.s: New testcase.
* gas/testsuite/gas/arm/armv8-a-barrier-arm.d: Likewise.
* gas/testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
* opcodes/arm-dis.c (data_barrier_option): New function.
(print_insn_arm): Use data_barrier_option.
(print_insn_thumb32): Use data_barrier_option.
2012-08-24 08:00:20 +00:00
12e37cbc4b
* gas/config/tc-arm.c (do_setend): Warn on deprecated SETEND.
...
(do_t_setend): Likewise.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
2012-08-24 07:58:02 +00:00
5a01bb1d0f
* gas/config/tc-arm.c (do_t_it): Fully initialise now_it.
...
(new_automatic_it_block): Likewise.
(handle_it_block): Record whether current instruction is
conditionally executed.
* gas/config/tc-arm.c (depr_insn_mask): New structure.
(depr_it_insns): New variable.
(it_fsm_post_encode): Warn on deprecated uses.
* gas/config/tc-arm.h (current_it): Add new fields.
* gas/testsuite/gas/arm/armv8-a-it-bad.d: New testcase.
* gas/testsuite/gas/arm/armv8-a-it-bad.l: Likewise.
* gas/testsuite/gas/arm/armv8-a-it-bad.s: Likewise.
* gas/testsuite/gas/arm/ldr-t-bad.s: Update testcase.
* gas/testsuite/gas/arm/ldr-t.d: Likewise.
* gas/testsuite/gas/arm/ldr-t.s: Likewise.
* gas/testsuite/gas/arm/neon-cond-bad-inc.s: Likewise.
* gas/testsuite/gas/arm/sp-pc-validations-bad-t: Likewise.
* gas/testsuite/gas/arm/vfp-fma-inc.s: Likewise.
* gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Likewise.
2012-08-24 07:57:19 +00:00
dcbd0d713c
* gas/config/tc-arm.c (deprecated_coproc_regs_s): New structure.
...
(deprecated_coproc_regs): New variable.
(deprecated_coproc_reg_count): Likewise.
(do_co_reg): Error on obsolete & warn on deprecated registers.
* gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
2012-08-24 07:54:45 +00:00
59d09be6f5
* gas/config/tc-arm.c (check_obsolete): New function.
...
(do_rd_rm_rn): Check swp{b} for obsoletion.
* gas/testsuite/gas/arm/armv8-a-bad.d: New testcase.
* gas/testsuite/gas/arm/armv8-a-bad.l: Likewise.
* gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* gas/testsuite/gas/arm/depr-swp.l: Update for change in expected output.
* gas/testsuite/gas/arm/depr-swp.s: Add additional test.
* include/opcode/arm.h (ARM_CPU_IS_ANY): New define.
2012-08-24 07:52:49 +00:00
bca3892142
* bfd/elf32-arm.c (v8): New array.
...
(tag_cpu_arch_combine): Add support for ARMv8 attributes.
(elf32_arm_merge_eabi_attributes): Likewise.
(VFP_VERSION_COUNT): New define.
* binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8.
(arm_attr_tag_FP_arch): Likewise.
(arm_attr_tag_Advanced_SIMD_arch): Likewise.
* gas/config/tc-arm.h (arm_ext_v8): New variable.
(fpu_vfp_ext_armv8): Likewise.
(fpu_neon_ext_armv8): Likewise.
(fpu_crypto_ext_armv8): Likewise.
(arm_archs): Add armv8-a.
(arm_extensions): Add crypto, fp, and simd.
(arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8.
(cpu_arch_ver): Add support for ARMv8.
(aeabi_set_public_sttributes): Likewise.
* gas/doc/c-arm.texi (ARM Options): Document new architecture and
extension options for ARMv8.
* gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected
output.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase.
* gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise.
* include/elf/arm.h (TAG_CPU_ARCH_V8): New define.
(MAX_TAG_CPU_ARCH): Update.
* include/opcode/arm.h (ARM_EXT_V8): New define.
(FPU_VFP_EXT_ARMV8): Likewise.
(FPU_NEON_EXT_ARMV8): Likewise.
(FPU_CRYPTO_EXT_ARMV8): Likewise.
(ARM_AEXT_V8A): Likewise.
(FPU_VFP_ARMV8): Likwise.
(FPU_NEON_ARMV8): Likewise.
(FPU_CRYPTO_ARMV8): Likewise.
(FPU_ARCH_VFP_ARMV8): Likewise.
(FPU_ARCH_NEON_VFP_ARMV8): Likewise.
(FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
(ARM_ARCH_V8A): Likwise.
(ARM_ARCH_V8A_FP): Likewise.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTO): Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected
output.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase.
* ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
2012-08-24 07:50:38 +00:00
542385d9f7
Replace --n32 with --x32
...
* doc/as.texinfo: Replace --n32 with --x32.
2012-08-20 13:57:05 +00:00
7b458c12dc
Add AMD btver1 and btver2 support
...
gas/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
(i386_align_code): Add case for PROCESSOR_BT.
* config/tc-i386.h (enum processor_type): Add PROCESSOR_BT.
* doc/c-i386.texi: Add -march={btver1, btver2} options.
gas/testsuite/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* gas/i386/i386.exp: Run btver1 and btver2 test cases.
* gas/i386/nops-1-btver1.d: New.
* gas/i386/nops-1-btver2.d: New.
* gas/i386/arch-10-btver1.d: New.
* gas/i386/arch-10-btver2.d: New.
* gas/i386/x86-64-nops-1-btver1.d: New.
* gas/i386/x86-64-nops-1-btver2.d: New.
* gas/i386/x86-64-arch-2-btver1.d: New.
* gas/i386/x86-64-arch-2-btver2.d: New.
opcodes/
2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com>
* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
CPU_BTVER2_FLAGS.
* i386-opc.h: Update CpuPRFCHW comment.
* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2012-08-17 17:12:36 +00:00
f76bf5e00c
Terminate register name when reporting bad register
...
gas/
PR gas/14457
* config/tc-i386.c (i386_att_operand): Terminate register name
when reporting bad register.
gas/testsuite/
PR gas/14457
* gas/i386/i386.exp: Run reg-bad.
* gas/i386/reg-bad.l: New.
* gas/i386/reg-bad.s: Likewise.
2012-08-14 17:01:46 +00:00
c3330fbecc
* config/tc-mmix.c (loc_asserts): New variable.
...
(mmix_greg_internal): Handle expressions not determinable at first
pass.
(s_loc): Ditto. Record expressions where the section isn't
determinable at the first pass, and assume they don't refer to
other sections.
(mmix_md_end): Verify that recorded LOC expressions weren't
to other sections, else emit error messages.
2012-08-14 02:29:01 +00:00
a06ea96464
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:54 +00:00
35d0a16941
include/opcode/
...
* mips.h (mips_opcode): Add the exclusions field.
(OPCODE_IS_MEMBER): Remove macro.
(cpu_is_member): New inline function.
(opcode_is_member): Likewise.
opcodes/
* micromips-opc.c (micromips_opcodes): Update comment.
* mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
instructions for IOCT as appropriate.
* mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
opcode_is_member.
* configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
the result of a check for the -Wno-missing-field-initializers
GCC option.
* Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
(mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
compilation.
(mips16-opc.lo): Likewise.
(micromips-opc.lo): Likewise.
* aclocal.m4: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
gas/
* config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros.
(is_opcode_valid): Remove coprocessor instruction exclusions.
Replace OPCODE_IS_MEMBER with opcode_is_member.
(is_opcode_valid_16): Replace OPCODE_IS_MEMBER with
opcode_is_member.
(macro): Remove coprocessor instruction exclusions.
2012-08-13 14:26:14 +00:00
a276b80c45
* config/tc-mips.c (s_cpload, s_cpsetup): Fail if MIPS16 mode.
...
(s_cplocal, s_cprestore, s_cpreturn): Likewise.
2012-08-13 14:09:44 +00:00
848930b2ba
Despite them being ignored by the CPU, gas issues segment override
...
prefixes for other than FS/GS in 64-bit mode. If doing so at all, it
should clearly do this correctly. Determining the default segment,
however, requires to take into consideration RegRex (so far, RSP, RBP,
R12, and R13 were all treated equally here).
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (build_modrm_byte): Split determining
default segment from figuring out encoding. Honor RegRex for
the former.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-segovr.{s,l}: New.
* gas/i386/i386.exp: Run new test.
2012-08-07 16:57:49 +00:00
7bab8ab56f
The VGATHER group of instructions requires that all three involved
...
xmm/ymm registers are distinct. This patch adds code to check for this,
and at once eliminates a superfluous check for not using PC-relative
addressing for these instructions (the fact that an index register is
required here already excludes valid PC-relative addresses). The
severity of the resulting diagnostics can be controlled via command
line option or directive.
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (set_check): Renamed from set_sse_check.
Generalize to also handle operand checking option.
(enum i386_error): New enumerator 'invalid_vector_register_set'.
(match_template): Handle it.
(enum check_kind): Give it a tag. Drop sse_ prefixes from
enumerators.
(operand_check): New.
(md_pseudo_table): Add "operand_check".
(check_VecOperands): Don't special case RIP addressing. Check
that vSIB operands use distinct vector registers unless no
checking was requested.
(OPTION_MOPERAND_CHECK): New.
(md_parse_option): Handle it.
(OPTION_MAVXSCALAR, OPTION_X32): Adjust.
(md_longopts): Add "moperand-check".
(md_show_usage): Add help text for it.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/vgather-check-error.{s,l}: New.
* gas/i386/vgather-check-none.{s,d}: New.
* gas/i386/vgather-check-warn.{d,e}: New.
* gas/i386/vgather-check.{s,d}: New.
* gas/i386/x86-64-vgather-check-error.{s,l}: New.
* gas/i386/x86-64-vgather-check-none.{s,d}: New.
* gas/i386/x86-64-vgather-check-warn.{d,e}: New.
* gas/i386/x86-64-vgather-check.{s,d}: New.
* gas/i386/i386.exp: Run new tests.
2012-08-07 16:55:00 +00:00
4c692bc7aa
There were several cases where the registers in the REX encoded range
...
got treated identically to the ones in the base range, due to not
paying attention to the fact that reg_entry's reg_num field doesn't
fully specify the register number (reg_flags also needs to be checked
for RegRex). This patch introduces and uses a new (inline) function to
obtain the full register number, and uses it to fix all those cases.
It additionally adds the missing operand checks for SVME instructions
(which match the monitor/mwait ones).
gas/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (register_number): New function.
(build_vex_prefix, process_immext, process_operands,
build_modrm_byte, i386_index_check): Use it.
gas/testsuite/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-specific-reg.{s,l}: New.
* gas/i386/i386.exp: Run new test.
opcodes/
2012-08-07 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
2012-08-07 16:51:34 +00:00
a988325c24
* config/tc-i386.c (lex_got): Provide implementation for PE
...
format.
* gas/i386/secrel.s: Add test of <symbol>@SECREL32.
* gas/i386/secrel.d: Add expected disassembly.
* scripttempl/pe.sc (R_TLS): Add .tls$AAA and .tls$ZZZ.
* scripttempl/pep.sc (R_TLS): Add .tls$AAA and .tls$ZZZ.
* archive.c (_bfd_delete_archive_data): New function.
* libbfd-in.h (_bfd_delete_archive_data): Declare.
* libbfd.h: Rebuild.
* opncls.c (_bfd_delete_bfd): Call _bfd_delete_archive_data.
2012-08-07 13:47:19 +00:00
464ab0e55a
gas/
...
* config/tc-mips.c (append_insn): Also handle moving delay-slot
instruction across frags for fixed branches.
gas/testsuite/
* gas/mips/branch-swap-2.l: New list test.
* gas/mips/branch-swap-2.s: New test source.
* gas/mips/mips.exp: Run the new test.
2012-08-06 20:33:00 +00:00
3db8daf394
* frags.c (frag_grow): Never shrink the obstack size requested
...
below the default.
2012-08-03 22:23:44 +00:00
03d46c0e96
* config/tc-m68hc11.c (s_m68hc11_parse_pseudo_instruction):
...
New function to parse pseudo ops that are unreleated to
existing pseudo ops.
2012-08-02 20:26:52 +00:00
711eefe492
2012-08-01 Catherine Moore <clm@codesourcery.com>
...
Sandra Loosemore <sandra@codesourcery.com>
gas/
* config/mips/tc-mips.c (mips_cpu_info): Add the 34kn.
* doc/c-mips.texi (MIPS Opts): Document it.
2012-08-01 19:59:43 +00:00
4e47244dbe
Reformat ChangeLog files
2012-08-01 15:59:55 +00:00
8fbf7334de
gas/ChangeLog:
...
2012-08-01 James Lemke <jwlemke@codesourcery.com>
* gas/dwarf2dbg.c (out_set_addr): Allow for non-constant value of
DWARF2_LINE_MIN_INSN_LENGTH
* gas/config/tc-ppc.c (ppc_dwarf2_line_min_insn_length): Declare
and initialize.
(md_apply_fix): Branch addr can be a multiple of 2 or 4.
* gas/config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): Now a
variable reference.
gas/testsuite/ChangeLog:
2012-08-01 James Lemke <jwlemke@codesourcery.com>
* gas/cfi/cfi-ppc-1.d: Allow for code alignment of 2 or 4.
ld/ChangeLog:
2012-08-01 James Lemke <jwlemke@codesourcery.com>
* ld/testsuite/ld-gc/pr13683.d: XFAIL for powerpc*-*-eabivle.
2012-08-01 13:46:59 +00:00
7a2d09ccbf
Correct ChangeLog.
2012-08-01 03:05:50 +00:00
03f66e8a8f
include/opcode/
...
* mips.h: Document microMIPS DSP ASE usage.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
microMIPS DSP ASE support.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
gas/
* config/tc-mips.c (macro_build) <'2'>: Handle microMIPS.
(macro) <M_BALIGN>: Update error handling.
(validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases.
<'7', '8', '0', '@', '^'>: Likewise.
(mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS.
<'9'>: Fix formatting.
<'0', '@'>: Handle microMIPS.
<'^'>: New case.
gas/testsuite/
* gas/mips/micromips@mips32-dsp.d: New.
* gas/mips/micromips@mips32-dspr2.d: New.
* gas/mips/mips32-dsp.d: Remove -mips32r2.
* gas/mips/mips32-dspr2.d: Likewise.
* gas/mips/mips.exp: (mips_create_arch): Use -mips64r2
for micromips. Use run_dump_test_arches to run dsp tests.
opcodes/
* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
(DSP_VOLA): Likewise.
(D32, D33): Likewise.
(micromips_opcodes): Add DSP ASE instructions.
* micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
<'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31 21:38:54 +00:00
4a2608e354
The current error message for bad imm4 operands wasn't really helpful,
...
and was pointing at the wrong operand in Intel mode. Since non-constant
operands are being taken care of by other means anyway, adjust it to
simply state that the constant doesn't fit.
2012-07-31 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (match_template): Adjust error message
for 'bad_imm4' case.
2012-07-31 07:45:48 +00:00
5a819eb989
Since the word to byte register conversion isn't active for x86-64
...
anyway, there's also no need to issue a separate, inconsistent
diagnostic in some of the cases - non-matching operands will be
complained about anyway.
2012-07-31 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (check_byte_reg): Check for I/O port
register earlier, and just once. Drop diagnostic that got
issued only for some registers.
2012-07-31 07:43:38 +00:00
5614d22c1d
At the point where check_VecOperands()/VEX_check_operands() get run,
...
all other instruction attributes already matched, so any mismatch here
will tell the user more precisely what is wrong than using an eventual
(and very likely to occur) more generic error encountered on a
subsequent iteration through the template matching loop.
2012-07-31 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (match_template): New local variable
'specific_error'. Set it from i.error after failed
check_VecOperands or VEX_check_operands. Use it if set in
preference to i.error when actually issuing disagnostic.
2012-07-31 07:41:39 +00:00
6b0d957ec7
Added missing gas/ChangeLog entries for previous XGATE commits.
2012-07-30 21:29:59 +00:00
204d254e64
2012-07-27 James Murray <jsm@jsm-net.demon.co.uk>
...
* config/tc-m68hc11.c: Replace binary with hex for cygwin.
2012-07-30 16:49:05 +00:00
a6dc81d2ab
Updated translations
2012-07-30 08:43:46 +00:00
c4dd807e7b
bfd: update to AC_INIT
...
Move the package name/version from AM_INIT_AUTOMAKE to AC_INIT per recent
autotools guidelines. We use recent versions of both, so it shouldn't be
a problem.
This sets PACKAGE_xxx variables correctly, and makes the output of:
./configure --version
actually useful:
bfd configure 2.22.52
Changing the other dirs to use AC_INIT would require a bit of m4 trickery
that I don't feel like getting into, and they all use BFD_VERSION anyways,
so there isn't much point.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-27 16:30:57 +00:00
af18cb5940
binutils/
...
2012-07-27 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.23.
gas/
2012-07-27 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.23.
ld/
2012-07-27 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.23.
2012-07-27 08:13:03 +00:00
c71bb85d64
2012-07-26 Segher Boessenkool <segher@kernel.crashing.org>
...
gas/
* listing.c (struct list_message): New.
(struct list_info_struct): Delete "message". Add "messages"
and "last_message".
(listing_message): Adjust.
(listing_newline): Adjust.
(print_lines): Adjust.
2012-07-27 03:32:21 +00:00
9e2934f799
MASM accepts ESP/RSP being specified second in a memory address
...
operand, by silently making it the base register despite not being
specified first.
Consequently, we also permit an xmm/ymm index to be specified first
(possibly alone), nevertheless putting it in as index register.
2012-07-24 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register): Handle
xmm/ymm index register being specified first as well as esp/rsp
base register being specified last in a memory operand.
2012-07-25 11:34:49 +00:00
8280f32685
Using the dedicated manifest constant is more descriptive.
...
2012-07-24 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register):
Replace literal 4 by corresponding ESP_REG_NUM.
2012-07-25 11:33:23 +00:00
5e73442d4c
2012-07-24 Sandra Loosemore <sandra@codesourcery.com>
...
Jie Zhang <jzhang918@gmail.com>
gas/
* config/tc-arm.c (md_apply_fix): Use encoding A2 of ADR
if offset is negative.
gas/testsuite/
* gas/arm/adr.d: New test.
* gas/arm/adr.s: New test.
2012-07-24 16:38:35 +00:00
e2e1fcde62
Implement RDRSEED, ADX and PRFCHW instructions
...
gas/
* config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives.
* doc/c-i386.texi: Document the new directives.
gas/testsuite/
* gas/i386/i386.exp: Run adx, rdseed and prefetchw tests.
* gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10-1.l: Changed correspondingly.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-lzcnt.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/ilp32/x86-64-arch-2.d: Likewise.
* gas/i386/arch-10-prefetchw.d: New file.
* gas/i386/x86-64-arch-2-prefetchw.d: Likewise.
* gas/i386/rdseed.s: Likewise.
* gas/i386/rdseed.d: Likewise.
* gas/i386/rdseed-intel.d: Likewise.
* gas/i386/adx.s: Likewise.
* gas/i386/adx.d: Likewise.
* gas/i386/adx-intel.d: Likewise.
* gas/i386/x86-64-rdseed.s: Likewise.
* gas/i386/x86-64-rdseed.d: Likewise.
* gas/i386/x86-64-rdseed-intel.d: Likewise.
* gas/i386/x86-64-adx.s: Likewise.
* gas/i386/x86-64-adx.d: Likewise.
* gas/i386/x86-64-adx-intel.d: Likewise.
opcodes/
* i386-dis.c (PREFIX_0F38F6): New.
(prefix_table): Add adcx, adox instructions.
(three_byte_table): Use PREFIX_0F38F6.
(mod_table): Add rdseed instruction.
* i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
(cpu_flags): Likewise.
* i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
(i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
* i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
prefetchw.
* i386-tbl.h: Regenerate.
* i386-init.h: Likewise.
2012-07-16 12:58:29 +00:00
586ec8c1d0
* write.c (fixup_segment): Only perform the subtraction of an
...
fx_subsy symbol if MD_APPLY_SYM_VALUE allows it and the symbol is
properly defined.
* config/tc-msp430.h (MD_APPLY_SYM_VALUE): Define.
2012-07-02 07:35:06 +00:00
e95a6b1c3c
PR gas/14315
...
* config/obj-elf.c (obj_elf_weak): Don't set local.
2012-06-30 06:32:29 +00:00
08ea70204d
* frags.h (frag_offset_fixed_p): Update prototype.
...
* frags.c (frag_offset_fixed_p): Change type of "offset" to offsetT.
* expr.c (expr, resolve_expression): Likewise for frag_off var.
2012-06-30 00:27:31 +00:00
99aad25459
PR gas/14263
...
* config/tc-arm.c (parse_operands): Initialise val.
2012-06-29 15:15:48 +00:00
2b2f5df902
PR gas/14260
...
* config/tc-arm.c (encode_arm_addr_mode_common): Generate an error
message if literal pool addressing is used.
* gas/arm/ldr-t-bad.s: Add test of bogus use of literal pool
addressing.
* gas/arm/ldr-t-bad.l: Update expected assembler error message
output.
2012-06-28 15:38:15 +00:00
453dc3f010
* dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): Enable when using
...
linker relaxation.
(dwarf2_gen_line_info): Generate real, local, labels for line
numbers.
(dwarf2dbg_convert_frag): Do not finalize the computation of the
frag's symbol value when linker relaxation is enabled.
(ADDR_DELTA_LIMIT): Define.
(size_fixed_inc_line_addr): Use ADDR_DELTA_LIMIT.
(emit_fixed_inc_line_addr): Likewise.
* write.c (fixup_segment): If the subtraction of two symbols
cannot be resolved but is valid, then prevent bogus range warnings
by pre-biasing add_number.
* config/tc-h8300.h (DWARF2_USE_FIXED_ADVANCE_PC): Define to 0.
* gas/lns/lns.exp: Use alternate lns-common test for targets
enabling linker relaxation.
* gas/lns/lns-big-delta.d: Allow for output from architectures
with 32-bit addresses.
2012-06-28 11:31:14 +00:00
fe13e45b9a
gas/
...
* NEWS: Mention 'rep ret' too.
gas/testsuite/
* gas/i386/rep-ret.d: New file.
* gas/i386/rep-ret.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.tbl: Add RepPrefixOk to ret.
* i386-tbl.h: Regenerate.
2012-06-22 21:54:06 +00:00
29c048b696
gas/
...
* config/tc-i386.c (parse_insn): Don't complain about REP prefix
when the template has opcode_modifier.repprefixok set.
* NEWS: Mention the change.
gas/testsuite/
* gas/i386/rep-bsf.d: New file.
* gas/i386/rep-bsf.s: New file.
* gas/i386/i386.exp: Add the new test.
opcodes/
* i386-opc.h (RepPrefixOk): New enum constant.
(i386_opcode_modifier): New bitfield 'repprefixok'.
* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
instructions that have IsString.
* i386-tbl.h: Regenerate.
2012-06-22 16:42:08 +00:00
a574142b3e
* configure.in: Check DECLS for free, getenv, malloc, realloc,
...
* configure: Regenerate.
* config.in: Likewise.
2012-06-18 04:23:15 +00:00
357d1bd8fd
Fix .dc.a for x32
...
gas/
* config/tc-i386.c (x86_address_bytes): New.
* config/tc-i386.h (TC_ADDRESS_BYTES): Likewise.
(x86_address_bytes): Likewise.
gas/testsuite/
* gas/i386/ilp32/x86-64-dc_a.d: New.
* gas/i386/ilp32/x86-64-dc_a.s: Likewise.
2012-06-13 21:41:07 +00:00
1a43faafe7
PR gas/12698
...
* config/tc-arm.c (do_t_mrs): Do not require an m-profile
architecure when assembling for all archiectures.
(do_t_msr): Likewise.
2012-06-13 14:19:00 +00:00
e4efb66531
PR 13503
...
* config/tc-avr.c (exp_mod): Fix typo introduced in 1.82
from 2012-05-16.
2012-06-11 14:26:41 +00:00
d2ae702c46
Allocate sufficient space for string buffer
...
* input-scrub.c (input_scrub_include_sb): Use sb_build to
allocate sufficient space for from_sb. Use sb_terminate to
terminate string.
* read.c (read_a_source_file): Use sb_build to allocate
sufficient space and replace sb_add_string with sb_add_buffer.
(s_macro): Likewise.
(input_scrub_insert_line): Likewise.
(s_irp): Use sb_build to allocate sufficient space.
(do_repeat): Use sb_build to allocate sufficient space
for many.
* sb.c (sb_build): Remove static.
* sb.h (sb_build): New prototype.
2012-06-09 13:22:00 +00:00
5197bfb548
* sb.c: Include limits.h.
...
(dsize): Delete.
(MALLOC_OVERHEAD, INIT_ALLOC): Define.
(sb_new): Use INIT_ALLOC.
(sb_check): Modify allocation strategy using MALLOC_OVERHEAD.
(sb_terminate): Don't use sb_add_char.
2012-06-09 08:32:43 +00:00
39a45edc07
PR gas/14201
...
* sb.h (sb_max_power_two): Delete.
(struct sb): Delete "item" and "pot". Make "len" a size_t. Add "max".
(sb_element): Delete.
(sb_add_char, sb_add_buffer, sb_skip_comma, sb_skip_write): Update
prototypes.
* sb.c (string_count, free_list): Delete.
(sb_build, sb_kill, sb_check): Rewrite.
(scrub_from_sb, sb_add_char, sb_add_string, sb_add_buffer,
sb_skip_white, sb_skip_comma): Replace assorted int params,
vars and return types with size_t.
* input-scrub.c: Likewise.
* macro.c: Likewise.
* macro.h: Likewise.
* as.c: Likewise.
* as.h: Likewise.
* input-file.h: Likewise.
* input-file.c: Likewise.
* read.c: Likewise.
* app.c: ..or ptrdiff_t.
* input-file.c (input_file_get): Use ferror.
(input_file_give_next_buffer): Use input_file_get.
2012-06-07 12:47:23 +00:00
d416e51da0
gas/
...
* read.c [HANDLE_BUNDLE] (bundle_lock_depth): New variable.
(read_a_source_file) [HANDLE_BUNDLE]: Reset it.
[HANDLE_BUNDLE] (s_bundle_lock, s_bundle_unlock): Allow nested
pairs.
gas/testsuite/
* gas/i386/bundle-bad.s: Remove nested .bundle_lock case.
* gas/i386/bundle-bad.l: Remove expected error line.
* gas/i386/bundle-lock.s: Add nested .bundle_lock case.
* gas/i386/bundle-lock.d: Update expectations.
2012-05-29 16:32:11 +00:00
7bfd842d05
* read.c (read_symbol_name): New function. Reads a symbol names.
...
Allows escape codes in names.
(s_comm_internal): Use read_symbol_name.
(s_globl, s_lsym, s_set, s_weakref): Likewise.
* doc/as.texinfo: Document support for multibyte characters in
symbol names.
* gas/elf/syms.s: New test - checks the generation of multibyte
symbol names.
* gas/elf/syms.d: New file - expected readelf output.
* gas/elf/elf.exp: Add syms.
* readelf.c (print_symbol): Display multibyte characters in symbol
names.
(process_section_headers): Use print_symbol.
* ld-ifunc/ifunc-13a-i386.s: Fix use of .global directive.
* ld-ifunc/ifunc-15a-i385.s: Likewise.
2012-05-28 14:20:19 +00:00
95bfe26e6b
gas: mips: fix segfault with invalid default cpu strings
...
If you configure gas for a mips32el-* target, the default cpu calculation
gets mangled, and we end up passing and invalid value as the default cpu.
If you try executing gas after that, it segfaults. This is because it
assumes that the default cpu value is always valid.
$ ./gas/as-new
Assembler messages:
Error: Bad value (2) for default CPU
Segmentation fault (core dumped)
I'm not debating that the target tuple is valid, just that gas shouldn't
crash. So add a friendly assert to avoid that.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-05-22 01:55:16 +00:00
59365e1917
* config/obj-elf.c (obj_elf_section): Cater for TC_KEEP_OPERAND_SPACES
...
targets when checking for "comdat".
2012-05-19 10:36:32 +00:00
f3719d90a6
* config/tc-dlx.c (s_proc): Don't use asprintf.
2012-05-18 23:21:49 +00:00
74cda0c4ba
* config/tc-dlx.c (s_proc): Avoid warning about ignoring asprintf
...
return value.
2012-05-18 05:48:50 +00:00
d6ed37ed5c
* config/tc-ppc.c: Don't capitalise error and warning messages.
...
(md_parse_option): Add checks for -a32 -mvle.
2012-05-18 05:42:24 +00:00
222661cb8e
* config/obj-evax.c: Include as.h first.
2012-05-18 05:32:03 +00:00
f2c621e45e
bfd/
...
* aclocal.m4: Regenerate.
* Makefile.in: Regenerate.
binutils/
* aclocal.m4: Regenerate.
* configure: Regenerate.
* config.in: Regenerate.
* Makefile.in: Regenerate.
gas/
* aclocal.m4: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
2012-05-17 22:23:42 +00:00
df7b86aa4c
PR 14072
...
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: Generate an error if included before config.h.
* alpha-opc.c: Include sysdep.h before any other header file.
* alpha-dis.c: Likewise.
* avr-dis.c: Likewise.
* cgen-opc.c: Likewise.
* cr16-dis.c: Likewise.
* cris-dis.c: Likewise.
* crx-dis.c: Likewise.
* d10v-dis.c: Likewise.
* d10v-opc.c: Likewise.
* d30v-dis.c: Likewise.
* d30v-opc.c: Likewise.
* h8500-dis.c: Likewise.
* i370-dis.c: Likewise.
* i370-opc.c: Likewise.
* m10200-dis.c: Likewise.
* m10300-dis.c: Likewise.
* micromips-opc.c: Likewise.
* mips-opc.c: Likewise.
* mips61-opc.c: Likewise.
* moxie-dis.c: Likewise.
* or32-opc.c: Likewise.
* pj-dis.c: Likewise.
* ppc-dis.c: Likewise.
* ppc-opc.c: Likewise.
* s390-dis.c: Likewise.
* sh-dis.c: Likewise.
* sh64-dis.c: Likewise.
* sparc-dis.c: Likewise.
* sparc-opc.c: Likewise.
* spu-dis.c: Likewise.
* tic30-dis.c: Likewise.
* tic54x-dis.c: Likewise.
* tic80-dis.c: Likewise.
* tic80-opc.c: Likewise.
* tilegx-dis.c: Likewise.
* tilepro-dis.c: Likewise.
* v850-dis.c: Likewise.
* v850-opc.c: Likewise.
* vax-dis.c: Likewise.
* w65-dis.c: Likewise.
* xgate-dis.c: Likewise.
* xtensa-dis.c: Likewise.
* rl78-decode.opc: Likewise.
* rl78-decode.c: Regenerate.
* rx-decode.opc: Likewise.
* rx-decode.c: Regenerate.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: Generate an error if included before config.h.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* aclocal.m4: Regenerate.
* bfd-in.h: Generate an error if included before config.h.
* sysdep.h: Likewise.
* bfd-in2.h: Regenerate.
* compress.c: Remove #include "config.h".
* plugin.c: Likewise.
* elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h.
* elf64-hppa.c: Likewise.
* som.c: Likewise.
* xsymc.c: Likewise.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* aclocal.m4: Regenerate.
* Makefile.am: Use wrappers around C files generated by flex.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* itbl-lex-wrapper.c: New file.
* config/bfin-lex-wrapper.c: New file.
* cgen.c: Include as.h before setjmp.h.
* config/tc-dlx.c: Include as.h before any other header.
* config/tc-h8300.c: Likewise.
* config/tc-lm32.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-xtensa.c: Likewise.
* configure.in: Add check that sysdep.h has been included before
any system header files.
* configure: Regenerate.
* config.in: Regenerate.
* unwind-ia64.h: Include config.h.
2012-05-17 15:13:28 +00:00
a0f49396fd
* bfd-in.h (bfd_get_section_name, bfd_get_section_vma,
...
bfd_get_section_lma, bfd_get_section_alignment,
bfd_get_section_flags, bfd_get_section_userdata): Rewrite macros
in order to use the `bfd' argument.
* bfd-in2.h: Regenerate.
* elf-vxworks.c (elf_vxworks_finish_dynamic_entry): Pass proper `bfd'
as the first argument for `bfd_get_section_alignment'.
* elf32-arm.c (create_ifunc_sections): Likewise, for
`bfd_set_section_alignment'.
* elf32-m32r.c (m32r_elf_relocate_section): Likewise, for
`bfd_get_section_name'.
* elf32-microblaze.c (microblaze_elf_relocate_section): Likewise.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
(ppc_elf_relocate_section): Likewise.
* elf64-mmix.c (mmix_final_link_relocate): Likewise, for
`bfd_get_section_vma'.
* elf64-ppc.c (create_linkage_sections): Likewise, for
`bfd_set_section_alignment'.
* emultempl/m68hc1xelf.em (hook_in_stub): Pass proper `bfd'
as the first argument for `bfd_get_section_name'.
* config/tc-alpha.c (maybe_set_gp): Pass proper `bfd'
as the first argument for `bfd_get_section_vma'.
2012-05-16 16:38:29 +00:00
536695d0f7
PR gas/14082
...
* app.c (do_scrub_chars): Prevent possible out of bounds access to
lex[] array.
2012-05-16 15:25:30 +00:00
40551fb82e
PR 13503
...
* reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to
R_AVR_8_HLO8.
(avr_reloc_map): Ditto.
* config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to
R_AVR_8_HLO8.
(exp_mod_data) Ditto. And replace "hhi8" with "hlo8".
(md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
* avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
2012-05-16 14:52:16 +00:00
c1c30076b2
* config/tc-m68k.c (m68k_cpus): Add 51ag, 51je, 51jf, 51jg, 51mm,
...
51qm variants.
2012-05-16 10:26:47 +00:00
6927f98292
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
...
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
918edac337
* config/rx-parse.y (rx_range): declare.
...
(O1,O2,O3,O4): Add calls to rx_range.
(UO1,UO2,UO3): Likewise.
(IMM2,IMMB): Likewise.
(rx_range): New.
2012-05-15 03:23:37 +00:00
0e25bcb440
* config/tc-rx.c (rx_fetchalign): Declare.
...
(md_pseudo_table): Add .fetchalign.
(RX_NBASE_FETCHALIGN): New.
(fetchalign_bytes): New.
(rx_fetchalign): New.
(rx_frag_init): If a "magic" value is found, also init the
machine-specific data.
(md_assemble): Note following opcode size if called for.
(rx_next_opcode): New.
(rx_relax_frag): Support .fetchalign.
(md_convert_frag): Likewise.
* doc/c-rx.texi (RX-Directives): Add .fetchalign.
2012-05-15 03:04:47 +00:00
b9c361e0ad
Add support for PowerPC VLE.
...
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:30 +00:00
56e63005cd
Remove x32 addend overflow for BFD_RELOC_64
...
gas/
* config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow
for BFD_RELOC_64.
gas/testsuite/
* gas/i386/ilp32/ilp32.exp: Don't run reloc64-inval.
* gas/i386/ilp32/reloc64.s: Add test for -4294967295 addend.
* gas/i386/ilp32/reloc64.d: Updated.
* gas/i386/ilp32/reloc64-inval.l: Removed.
* gas/i386/ilp32/reloc64-inval.s: Likewise.
2012-05-12 12:34:37 +00:00
208a4923ed
PR binutils/14028
...
* configure.in: Invoke ACX_HEADER_STRING.
* configure: Regenerate.
* config.in: Regenerate.
* sysdep.h: If STRINGS_WITH_STRING is defined then include both
string.h and strings.h.
2012-05-11 14:25:30 +00:00
99700d6feb
PR 13503
...
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Add entries for
R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
(avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
R_AVR_8_HHI8.
* config/tc-avr.c (exp_mod_pm): Remove variable.
(exp_mod_data_t): New typedef.
(pexp_mod_data, exp_mod_data): New variables.
(avr_parse_cons_expression): Scan through exp_mod_data[] to find
data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
(avr_cons_fix_new): Handle new data expression modifiers shipped
in pexp_mod_data.
(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
BFD_RELOC_AVR_8_HHI.
* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
R_AVR_8_HI8, R_AVR_8_HHI8.
2012-05-11 12:59:23 +00:00
268a8d3ac4
Use int and bfd_signed_vma in x32 addend overflow check
...
bfd/
* elf64-x86-64.c (elf_x86_64_relocate_section): Use int in x32
addend overflow check.
gas/
* config/tc-i386.c (tc_gen_reloc): Use bfd_signed_vma in x32
addend overflow check.
2012-05-11 00:50:43 +00:00
6f2c9068ed
Display signed hex number in x32 addend overflow check
...
bfd/
* elf64-x86-64.c (elf_x86_64_relocate_section): Display signed
hex number in x32 addend overflow check.
gas/
* config/tc-i386.c (tc_gen_reloc): Display signed hex number in
x32 addend overflow check.
ld/testsuite/
* ld-x86-64/ilp32-11.d: Updated.
2012-05-10 20:46:34 +00:00
83acd3e879
Use fits_in_signed_long to check x32 addend overflow
...
* config/tc-i386.c (tc_gen_reloc): Use fits_in_signed_long.
2012-05-10 03:48:33 +00:00
8cf0d2dd21
Check 64-bit relocation addend overflow for x32
...
bfd/
* elf64-x86-64.c (elf_x86_64_relocate_section): Check addend
overflow for R_X86_64_RELATIVE64.
gas/
* config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow
for BFD_RELOC_64.
gas/testsuite/
* gas/i386/ilp32/ilp32.exp: Run reloc64-inval.
* gas/i386/ilp32/reloc64.s: Add tests for ".quad".
* gas/i386/ilp32/reloc64.d: Updated.
* gas/i386/ilp32/reloc64-inval.l: New file.
* gas/i386/ilp32/reloc64-inval.s: Likewise.
ld/testsuite/
* ld-x86-64/ilp32-11.d: New file.
* ld-x86-64/ilp32-11.s: Likewise.
* ld-x86-64/x86-64.exp: Run ilp32-11.
2012-05-10 03:25:17 +00:00
e5b62927f4
* Makefile.am (check_DEJAGNU): Export LC_ALL=C in place of other
...
LC and LANG environment vars.
* Makefile.in: Regenerate.
2012-05-08 12:14:15 +00:00
cce3d66c34
* Makefile.am (check-DEJAGNU): Clear LC_COLLATE, LC_ALL and LANG.
...
* Makefile.in: Regenerate.
2012-05-07 09:21:48 +00:00
25045f7922
2012-05-06 Arnold Metselaar <arnold_m@operamail.com>
...
* config/tc-z80.h(md_register_arithmetic): Define as 0.
* config/tc-z80.c(md_begin): Store register names in symbol table, prevents usage as ordinary symbol.
* config/tc-z80.c(contains_register): New function.
* config/tc-z80.c(parse_exp2): Removed.
* config/tc-z80.c(parse_exp_not_indexed): New function.
* config/tc-z80.c(parse_exp): Add code to recogize indexed addressing after parsing.
* config/tc-z80.c(emit_byte, emit_word): Use contains_register.
* config/tc-z80.c(emit_jp): Use parse_exp_not_indexed, simplify condition for jump to register.
* config/tc-z80.c(emit_call, emit_jr, emit_ex, emit_rst): Use parse_exp_not_indexed.
2012-05-06 09:49:21 +00:00
45dfa85a1e
Replace all uses of bfd_abs_section, bfd_com_section, bfd_und_section
...
and bfd_ind_section with their _ptr variants, or use corresponding
bfd_is_* macros.
2012-05-05 03:05:32 +00:00
3c99554527
Support x86_64-*-linux-gnux32
...
gas/
* configure.tgt: Support x86_64-*-linux-gnux32.
ld/
* configure.tgt: Support x86_64-*-linux-gnux32.
ld/testsuite/
* ld-elf/eh1.d: Skip x86_64-*-linux-gnux32.
* ld-elf/eh2.d: Likewise.
* ld-elf/eh3.d: Likewise.
* ld-elf/eh4.d: Likewise.
* ld-elfvsb/elfvsb.exp: Xfail x86_64-*-linux-gnux32.
* ld-shared/shared.exp: Likewise.
* ld-ifunc/ifunc-3a-x86.d: Support x86_64-*-linux-gnux32.
2012-05-04 20:01:03 +00:00
35262a230c
Add `instruction' to unsupported error message
...
* config/tc-i386.c (match_template): Add `instruction' to
unsupported error message.
2012-05-04 19:18:02 +00:00
89e71f5c88
Reformat output_insn
...
* config/tc-i386.c (output_insn): Reformat.
2012-05-04 19:11:04 +00:00
ae5c1c7b1d
Remove the extra VEX check
...
* config/tc-i386.c (output_insn): Remove the extra VEX check.
2012-05-04 18:06:38 +00:00
10efe3f6ab
Improve unsupported error message
...
* config/tc-i386.c (match_template): Improve unsupported error
message.
2012-05-04 17:55:38 +00:00
f6c1a2d592
Add support for Motorola XGATE embedded CPU
2012-05-03 13:12:08 +00:00
cad335c901
* config/rx-parse.y (rx_intop): Add parameter for operation size.
...
Check for large positive constants really being small negative
ones.
(BRA, BSR): Update calls to rx_intop.
(immediate): Likewise.
2012-04-30 22:09:09 +00:00
88ebb0a156
gas: Make dwarf2dbg.c versions specific and add DW_AT_high_pc case for DWARF 4+.
...
* dwarf2dbg.c (DWARF2_ARANGES_VERSION): New define to 2.
(DWARF2_LINE_VERSION): Likewise.
(out_debug_line): Use DWARF2_LINE_VERSION not DWARF2_VERSION.
(out_debug_aranges): Use DWARF2_ARANGES_VERSION not DWARF2_VERSION.
(out_debug_abbrev): Use DW_FORM_data for DW_AT_high_pc when
DWARF2_VERSION >= 4.
(out_debug_info): Use difference between start and end as data
value for DW_AT_high_pc when DWARF2_VERSION >= 4.
* config/tc-ia64.h (DWARF2_LINE_VERSION): Override it.
2012-04-30 14:32:28 +00:00
2755f698e1
Document sparc's %l34 and %h34
...
gas/
* doc/c-sparc.text: Document %l34 and %h34.
2012-04-27 20:45:23 +00:00
2e52845baf
Add support for sparc %cfr ASR register.
...
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
gas/
* config/tc-sparc.c (v9a_asr_table): Add 'cfr'.
gas/testsuite/
* gas/sparc/sparc.exp: Run cfr test.
* gas/sparc/cfr.s: New testcase.
* gas/sparc/cfr.d: Likewise.
2012-04-27 20:43:35 +00:00
58004e23c9
Add support for sparc pause instruction.
...
opcodes/
* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
gas/
* config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4,
v8pluse, v8plusv, v9e, and v9v.
(v9a_asr_table): Add 'pause'.
gas/testsuite/
* gas/sparc/sparc.exp: Run pause test.
* gas/sparc/pause.s: New testcase.
* gas/sparc/pause.d: Likewise.
2012-04-27 18:04:00 +00:00
698544e152
Add support for sparc compare-and-branch instructions.
...
opcodes/
* sparc-opc.c (CBCOND): New define.
(CBCOND_XCC): Likewise.
(cbcond): New helper macro.
(sparc_opcodes): Add compare-and-branch instructions.
gas/
* config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to
sparc4, v8pluse, v8plusv, v9e, and v9v.
(sparc_ip): Handle R_SPARC_5 of immediate constants inline in
order to accomodate cbcond which otherwise would require two
relocations to be handled in a single instruction..
gas/testsuite/
* gas/sparc/cbcond.s: New file.
* gas/sparc/cbcond.d: New file.
* gas/sparc/sparc.exp: Run cbcond test.
2012-04-27 18:03:13 +00:00
6cda13266f
Add support for SPARC T4 crypto instructions.
...
include/opcode/
* sparc.h: Document new arg code' )' for crypto RS3
immediates.
opcodes/
* sparc-dis.c (print_insn_sparc): Handle ')'.
* sparc-opc.c (sparc_opcodes): Add crypto instructions.
gas/
* config/tc-sparc.c (sparc_ip): Likewise. Accept instruction
names containing "_".
(sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto
hwcap masks to v8plusv and v9v.
gas/testsuite/
* gas/sparc/crypto.s: New file.
* gas/sparc/crypto.d: New file.
* gas/sparc/sparc.exp: Run crypto test.
2012-04-27 18:02:35 +00:00
ec668d69b9
Move sparc opcode hwcaps out of sparc_opcode flags field.
...
include/opcode/
* sparc.h (struct sparc_opcode): New field 'hwcaps'.
F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete.
(HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC,
HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF,
HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU,
HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES,
HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1,
HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE,
HWCAP_CBCOND, HWCAP_CRC32): New defines.
opcodes/
* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
gas/
* config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_*
masks.
(sparc_md_end): No longer need to translate hwcap_seen values into
ELF hwcap bits, they now match exactly.
(get_hwcap_name): Use HWCAP_* and handle new values.
(sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-27 18:01:35 +00:00
2b0bc50148
2012-04-20 Tristan Gingold <gingold@adacore.com>
...
* config/tc-ia64.c (obj_elf_vms_common): New function.
(md_pseudo_table): Add .vms_common pseudo.
* config/obj-elf.h (obj_elf_section_name): Add a prototype.
* config/obj-elf.c (obj_elf_section_name): Make it public.
2012-04-20 10:21:33 +00:00
0b649256e3
gas/
...
* config/tc-avr.c (md_apply_fix): Fix handling of BFD_RELOC32.
2012-04-17 13:59:41 +00:00
2615994e91
Support R_SPARC_WDISP10 and R_SPARC_H34.
...
include/
* elf/sparc.h (R_SPARC_WDISP10): New reloc.
* opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10.
opcodes/
* sparc-dis.c (X_DISP10): Define.
(print_insn_sparc): Handle '='.
bfd/
* reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32,
BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise.
* elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function.
(_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34,
R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10.
(_bfd_sparc_elf_reloc_type_lookup): Handle new relocs.
(_bfd_sparc_elf_check_relocs): Likewise.
(_bfd_sparc_elf_gc_sweep_hook): Likewise.
(_bfd_sparc_elf_relocate_section): Likewise.
gas/
* config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and
BFD_RELOC_SPARC_H34.
(md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34.
(tc_gen_reloc): Likewise.
gas/testsuite/
* gas/sparc/reloc64.s: Add abs34 code model tests.
* gas/sparc/reloc64.d: Update.
elfcpp/
* sparc.h (R_SPARC_WDISP10): New relocation.
gold/
* sparc.cc (Reloc::wdisp10): New relocation method.
(Reloc::h34): Likewise.
(Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34.
(Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and
R_SPARC_WDISP10.
(Target_sparc::Scan::local): Likewise.
(Target_sparc::Scan::global): Likewise.
(Target_sparc::Relocate::relocate): Likewise.
2012-04-12 16:26:06 +00:00
b38cadfb70
* elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry):
...
New variables.
(struct elf32_arm_link_hash_table): New member `nacl_p'.
(elf32_arm_link_hash_table_create): Initialize it.
(elf32_arm_nacl_link_hash_table_create): New function.
(arm_movw_immediate, arm_movt_immediate): New functions.
(elf32_arm_populate_plt_entry): Test HTAB->nacl_p.
(elf32_arm_finish_dynamic_sections): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
(bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec):
New backend vector stanza.
(elf32_arm_nacl_modify_segment_map): New function.
* config.bfd: Handle arm-*-nacl*, armeb-*-nacl*.
* targets.c: Support bfd_elf32_{big,little}_nacl_vec.
* configure.in: Likewise.
(bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here.
(bfd_elf32_littlearm_nacl_vec): Likewise.
(bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise.
(bfd_elf32_bigarm_symbian_vec): Likewise.
(bfd_elf32_littlearm_symbian_vec): Likewise.
(bfd_elf32_bigarm_vxworks_vec): Likewise.
(bfd_elf32_littlearm_vxworks_vec): Likewise.
* configure: Regenerated.
* configure.tgt (arm-*-nacl*): Match it.
* config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define.
(LOCAL_LABELS_DOLLAR): Define.
* config/tc-arm.c (elf32_arm_target_format) [TE_NACL]:
Use nacl format variants.
* gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets
as -armeabi.
* gas/arm/any-idiv.d: Match *-*-nacl* targets too.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arch4t-eabi.d: Likewise.
* gas/arm/attr-any-armv4t.d: Likewise.
* gas/arm/attr-any-thumbv6.d: Likewise.
* gas/arm/attr-cpu-directive.d: Likewise.
* gas/arm/attr-default.d: Likewise.
* gas/arm/attr-march-all.d: Likewise.
* gas/arm/attr-march-armv1.d: Likewise.
* gas/arm/attr-march-armv2a.d: Likewise.
* gas/arm/attr-march-armv2.d: Likewise.
* gas/arm/attr-march-armv2s.d: Likewise.
* gas/arm/attr-march-armv3.d: Likewise.
* gas/arm/attr-march-armv3m.d: Likewise.
* gas/arm/attr-march-armv4.d: Likewise.
* gas/arm/attr-march-armv4t.d: Likewise.
* gas/arm/attr-march-armv4txm.d: Likewise.
* gas/arm/attr-march-armv4xm.d: Likewise.
* gas/arm/attr-march-armv5.d: Likewise.
* gas/arm/attr-march-armv5t.d: Likewise.
* gas/arm/attr-march-armv5te.d: Likewise.
* gas/arm/attr-march-armv5tej.d: Likewise.
* gas/arm/attr-march-armv5texp.d: Likewise.
* gas/arm/attr-march-armv5txm.d: Likewise.
* gas/arm/attr-march-armv6.d: Likewise.
* gas/arm/attr-march-armv6j.d: Likewise.
* gas/arm/attr-march-armv6k.d: Likewise.
* gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/arm/attr-march-armv6-m.d: Likewise.
* gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/arm/attr-march-armv6t2.d: Likewise.
* gas/arm/attr-march-armv6z.d: Likewise.
* gas/arm/attr-march-armv6zk.d: Likewise.
* gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/arm/attr-march-armv7-a.d: Likewise.
* gas/arm/attr-march-armv7a.d: Likewise.
* gas/arm/attr-march-armv7-a+idiv.d: Likewise.
* gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/arm/attr-march-armv7-a+sec+virt.d: Likewise.
* gas/arm/attr-march-armv7-a+virt.d: Likewise.
* gas/arm/attr-march-armv7.d: Likewise.
* gas/arm/attr-march-armv7em.d: Likewise.
* gas/arm/attr-march-armv7-m.d: Likewise.
* gas/arm/attr-march-armv7m.d: Likewise.
* gas/arm/attr-march-armv7-r.d: Likewise.
* gas/arm/attr-march-armv7r.d: Likewise.
* gas/arm/attr-march-armv7-r+mp.d: Likewise.
* gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/arm/attr-march-xscale.d: Likewise.
* gas/arm/attr-mcpu.d: Likewise.
* gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/arm/attr-mfpu-neon.d: Likewise.
* gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/arm/attr-names.d: Likewise.
* gas/arm/attr-order.d: Likewise.
* gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/arm/attr-override-mcpu.d: Likewise.
* gas/arm/got_prel.d: Likewise.
* gas/arm/mapdir.d: Likewise.
* gas/arm/mapmisc.d: Likewise.
* gas/arm/mapsecs.d: Likewise.
* gas/arm/mapshort-eabi.d: Likewise.
* gas/arm/mapshort-elf.d: Likewise.
* gas/arm/mov-highregs-any.d: Likewise.
* gas/arm/mov-lowregs-any.d: Likewise.
* gas/arm/pr12198-1.d: Likewise.
* gas/arm/pr12198-2.d: Likewise.
* gas/arm/thumb.d: Likewise.
* gas/arm/thumb-eabi.d: Likewise.
* gas/arm/thumbrel.d: Likewise.
* configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them.
* emulparams/armelf_nacl.sh: New file.
* emulparams/armelfb_nacl.sh: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c
and earmelfb_nacl.c here.
(earmelf_nacl.c, earmelfb_nacl.c): New targets.
* Makefile.in: Regenerated.
* ld-arm/arm-elf.exp (armelftests): Split out into ...
(armelftests_common, armelftests_nonacl): ... these two.
(armeabitests): Split out into ...
(armeabitests_common, armeabitests_nonacl): ... these two.
Omit _nonacl sets for arm*-*-nacl* targets.
* ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones.
* ld-arm/farcall-mix2.d: Likewise.
* ld-arm/farcall-group.d: Likewise.
* ld-arm/tls-gdesc-got.d: Match variant file formats too.
Accept some variation in exact addresses.
* ld-arm/thumb2-b-interwork.d: Match variant file formats too.
Fix regexps not to care about exact addresses where not relevant.
* ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any
strings of particular exact lengths.
* ld-arm/thumb2-bl-undefweak1.d: Likewise.
* ld-arm/arm-app.r: Match variant file formats too.
* ld-arm/arm-app-abs32.r: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-lib.r: Likewise.
* ld-arm/arm-static-app.r: Likewise.
* ld-arm/armv4-bx.d: Likewise.
* ld-arm/data-only-map.d: Likewise.
* ld-arm/group-relocs.d: Likewise.
* ld-arm/jump19.d: Likewise.
* ld-arm/reloc-boundaries.d: Likewise.
* ld-arm/thumb1-bl.d: Likewise.
* ld-arm/thumb2-bl.d: Likewise.
* ld-arm/tls-app.d: Likewise.
* ld-arm/tls-app.r: Likewise.
* ld-arm/tls-gdierelax.d: Likewise.
* ld-arm/tls-gdierelax2.d: Likewise.
* ld-arm/tls-gdlerelax.d: Likewise.
* ld-arm/tls-lib.d: Likewise.
* ld-arm/tls-lib.r: Likewise.
* ld-arm/tls-mixed.r: Likewise.
* ld-arm/vfp11-fix-none.d: Likewise.
* ld-arm/vfp11-fix-scalar.d: Likewise.
* ld-arm/vfp11-fix-vector.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
Fix regexps not to care about exact number of leading spaces.
* ld-arm/arm-app-abs32.d: Likewise.
* ld-arm/fix-arm1176-off.d: Likewise.
* ld-arm/fix-arm1176-on.d: Likewise.
* ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12 13:01:15 +00:00
6530b175a1
* config/tc-arm.c (only_one_reg_in_list): New function.
...
(encode_ldmstm): Ditto.
(do_ldmstm): Use a different encoding when pushing or poping
a single register.
(A_COND_MASK): New macro.
(A_PUSH_POP_OP_MASK): Ditto.
(A1_OPCODE_PUSH): Ditto.
(A2_OPCODE_PUSH): Ditto.
(A2_OPCODE_POP): Ditto.
* gas/arm/push-pop.d: New testcase.
* gas/arm/push-pop.s: Ditto.
* gas/arm/stm-ldm.d: Ditto.
* gas/arm/stm-ldm.s: Ditto.
2012-04-12 07:46:54 +00:00
45e279f5d4
* doc/c-mips.texi (MIPS Opts): Correct -no-mfix-24k to
...
-mno-fix-24k.
2012-04-06 22:02:43 +00:00
5879767462
binutils/
...
2012-04-06 Roland McGrath <mcgrathr@google.com>
* configure.in (AC_CHECK_HEADERS): Add locale.h.
* config.in: Regenerate.
* configure: Regenerate.
gas/
2012-04-06 Roland McGrath <mcgrathr@google.com>
* configure.in (AC_CHECK_HEADERS): Add locale.h.
* config.in: Regenerate.
* configure: Regenerate.
gold/
2012-04-06 Roland McGrath <mcgrathr@google.com>
* configure.in (AC_CHECK_HEADERS): Add locale.h.
* config.in: Regenerate.
* configure: Regenerate.
ld/
2012-04-06 Roland McGrath <mcgrathr@google.com>
* configure.in (AC_CHECK_HEADERS): Add locale.h.
* config.in: Regenerate.
* configure: Regenerate.
2012-04-06 16:49:02 +00:00
443507505d
* configure.in (AC_CHECK_FUNCS): Add setlocale.
...
(AM_LC_MESSAGES): Add.
* aclocal.m4: Regenerate.
* config.in: Regenerate.
* configure: Regenerate.
2012-04-05 08:43:41 +00:00
e91a22cece
* config/rx-parse.y: Make the .L optional for ADC and SBB.
2012-04-03 19:06:40 +00:00
b1c0804b2e
* config/rx-parse.y: IMM->IMM_, take an extra parameter for the
...
transfer size.
(IMM): New, call IMM_ with the default 32.
(IMMW,IMMB): Likewise, for 16 and 8.
(NIMM, MBIMM): Add size parameter.
(immediate): Likewise. Allow 32768..65535 for 16-bit transfers.
(MOV.W): Use IMMW instead of IMM.
* config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L.
(op_dp20_rm_l): New.
(op_dp20_rim_l): New.
* config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem.
(ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms).
* gas/rx/mov.d: Update patterns for fixed MOV.W encoding.
2012-04-03 03:01:57 +00:00
ce32bd10df
2012-03-29 Terry Guo <terry.guo@arm.com>
...
* gas/config/tc-arm.c (arm_cpus): Add cortex-m0plus.
* gas/doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
2012-03-29 10:28:40 +00:00
55a36193d8
gas/
...
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP.
* doc/c-mips.texi: Mention XLP.
opcodes/
* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
2012-03-24 01:09:28 +00:00
32b9ff0d14
gas/
...
[SH] Support the .uaquad and .8byte directives also for non-sh64
configurations.
* config/tc-sh.c (sh_cons_fix_new, md_apply_fix) [!HAVE_SH64]: Handle
BFD_RELOC_64.
* doc/c-sh64.texi (SH64 Machine Directives): Move .uaquad
description...
* doc/c-sh.texi (SH Machine Directives): ... here.
2012-03-21 08:58:40 +00:00
7465e07a57
* config/tc-arm.c (do_vmrs): Accept priviledged mode VFP system
...
registers.
(do_vmsr): Likewise.
(arm_opcode_insns): Do not default to using the FPSCR register in
the VMRS and VMSR registers.
* gas/arm/vfp1xD.s: Add tests of the VMSR ad VMRS instructions in
priviledged modes.
* gas/arm/vfp1xD.d: Update expected output.
2012-03-20 11:55:07 +00:00
8059fb196e
bfd/
...
2012-03-16 Roland McGrath <mcgrathr@google.com>
* config.bfd: Handle x86_64-*-nacl*.
* elf64-x86-64.c (bfd_elf64_x86_64_nacl_vec): New backend vector stanza.
(bfd_elf32_x86_64_nacl_vec): Likewise.
* targets.c: Support them.
* configure.in: Likewise.
* configure: Regenerated.
gas/
2012-03-16 Roland McGrath <mcgrathr@google.com>
* config/tc-i386.h [TE_NACL] (ELF_TARGET_FORMAT32, ELF_TARGET_FORMAT64):
Define for this case.
* configure.tgt (i386-*-nacl*): If ${cpu} is x86_64*, default to x32.
2012-03-16 23:19:47 +00:00
692392805b
* gas/config/tc-arm.c (aeabi_set_public_attributes): Correct
...
handling of Tag_DIV_use.
* gas/testsuite/gas/testsuite/gas/arm/any-idiv.d: New testcase.
* gas/testsuite/gas/testsuite/gas/arm/any-idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-any-armv4t.d: Update expected output.
* gas/testsuite/gas/arm/attr-any-thumbv6.d: Likewise.
* gas/testsuite/gas/arm/attr-cpu-directive.d: Likewise.
* gas/testsuite/gas/arm/attr-default.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv1.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv2s.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv3.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv3m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4t.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4txm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv4xm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5t.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5te.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5tej.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5texp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv5txm.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6j.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6k.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6kt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6t2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7a.d: Likewise.
* gas/testsuite/gas/arm/attr-march-iwmmxt.d: Likewise.
* gas/testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-xscale.d: Likewise.
* gas/testsuite/gas/arm/attr-mcpu.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpa11.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-fpe3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-maverick.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softfpa.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise.
* gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise.
* gas/testsuite/gas/arm/attr-order.d: Likewise.
* gas/testsuite/gas/arm/attr-override-cpu-directive.d: Likewise.
* gas/testsuite/gas/arm/attr-override-mcpu.d: Likewise.
* gas/testsuite/gas/arm/eabi_attr_1.d: Likewise.
* gas/testsuite/gas/arm/mov-highregs-any.d: Likewise.
* gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise.
* gas/testsuite/gas/arm/pr12198-1.d: Likewise.
* gas/testsuite/gas/arm/pr12198-2.d: Likewise.
* ld/testsuite/ld-arm/arm-elf.exp: Add new testcases.
* ld/testsuite/ld-arm/attr-merge-2.attr: Update ouput.
* ld/testsuite/ld-arm/attr-merge-2a.s: Remove Tag_DIV_use test.
* ld/testsuite/ld-arm/attr-merge-2b.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-3.attr: Updated expected output.
* ld/testsuite/ld-arm/attr-merge-4.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-5.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-1.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-unknown-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-6.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
* ld/testsuite/ld-arm/attr-merge.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-0.s: New testcase.
* ld/testsuite/ld-arm/attr-merge-div-00.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-01.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-02.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-1.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-10.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-11.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-12.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-120.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-2.s: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-20.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-21.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-div-22.d: Likewise.
2012-03-16 14:02:33 +00:00
27dcf5c00e
gas/
...
* doc/as.texinfo (Bundle directives): Fix typo.
2012-03-15 11:19:13 +00:00
ec82c18e8a
Replace @defn with @dfn
...
2012-03-14 Ryan Mansfield <rmansfield@qnx.com>
* doc/as.texinfo (Bundle directives): Replace @defn with @dfn.
2012-03-14 17:51:16 +00:00
8d3eaee676
Fix up last commit.
2012-03-13 17:01:34 +00:00
fa94de6b5c
gas/
...
2012-03-12 Roland McGrath <mcgrathr@google.com>
* config/tc-arm.c (arm_frag_max_var): New function.
* config/tc-arm.h: Declare it.
(md_frag_max_var): New macro.
* config/tc-i386.c (i386_frag_max_var): New function.
* config/tc-i386.h: Declare it.
(md_frag_max_var): New macro.
* doc/as.texinfo (Bundle directives): New node.
(Pseudo Ops): Add it to the menu.
* NEWS: Mention new feature.
* read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro.
[HANDLE_BUNDLE] (bundle_align_p2): New variable.
[HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables.
[HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle):
New functions.
(assemble_one): New function if [HANDLE_BUNDLE], #define directly
to md_assembly if not.
(read_a_source_file): Call assemble_one in place of md_assemble.
(read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated
.bundle_lock at end of processing.
[HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock):
New functions.
[HANDLE_BUNDLE] (potable): Add their entries.
* read.h: Declare new functions.
gas/testsuite/
2012-03-12 Roland McGrath <mcgrathr@google.com>
* gas/i386/bundle-bad.s: New file.
* gas/i386/bundle-bad.d: New file.
* gas/i386/bundle-bad.l: New file.
* gas/i386/i386.exp: Run it.
* gas/arm/bundle.s: New file.
* gas/arm/bundle.d: New file.
* gas/arm/bundle-lock.s: New file.
* gas/arm/bundle-lock.d: New file.
* gas/i386/bundle.s: New file.
* gas/i386/bundle.d: New file.
* gas/i386/x86-64-bundle.s: New file.
* gas/i386/x86-64-bundle.d: New file.
* gas/i386/bundle-lock.s: New file.
* gas/i386/bundle-lock.d: New file.
* gas/i386/i386.exp: Run them.
2012-03-13 16:59:57 +00:00
aea77599d0
include/opcode/
...
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR.
opcodes/
* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
(PPCVEC2, PPCTMR, E6500): New short names.
(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
optional operands on sync instruction for E6500 target.
bfd/
* archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
* bfd-in2.h: Regenerate.
* cpu-powerpc.c (bfd_powerpc_archs): Add entryies for
bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500.
gas/
* config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500.
(ppc_handle_align): Add termination nop opcode for e500mc family.
* doc/as.texinfo: Document options -me5500 and -me6500.
* doc/c-ppc.texi: Likewise.
gas/testsuite/
* gas/ppc/e500mc64_nop.s: New test case for e500mc family
termination nops.
* gas/ppc/e500mc64_nop.d: Likewise.
* gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e5500_nop.d: Likewise.
* gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/e6500_nop.d: Likewise.
* gas/ppc/e6500.s: New.
* gas/ppc/e6500.d: Likewise.
* gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-09 23:39:06 +00:00
0a22ae8eb5
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
...
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF.
* elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type
field.
(elf32_mn10300_link_hash_table): Add tls_ldm_got entry;
(elf_mn10300_tdata): Define.
(elf_mn10300_local_got_tls_type): Define.
(elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD,
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs.
(mn10300_reloc_map): Likewise.
(elf_mn10300_tls_transition): New function.
(dtpoff, tpoff, mn10300_do_tls_transition): New functions.
(mn10300_elf_check_relocs): Add TLS support.
(mn10300_elf_final_link_relocate): Likewise.
(mn10300_elf_relocate_section): Likewise.
(mn10300_elf_relax_section): Likewise.
(elf32_mn10300_link_hash_newfunc): Initialise new field.
(_bfd_mn10300_copy_indirect_symbol): New function.
(elf32_mn10300_link_hash_table_create): Initialise new fields.
(_bfd_mn10300_elf_size_dynamic_sections): Add TLS support.
(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
(_bfd_mn10300_elf_reloc_type_class): Allocate an
elf_mn10300_obj_tdata structure.
(elf_backend_copy_indirect_symbol): Define.
* reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD,
BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE,
BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD,
BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations.
(BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to
alongside other MN10300 relocations.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* config/tc-mn10300.c (other_registers): Add SSP and USP.
(md_assemble): Add support for TLS relocs.
(mn10300_parse_name): Likewise.
* readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16.
2012-03-07 17:52:00 +00:00
805e800d04
* config/tc-crx.c (check_range): Correct uint32_t misconceptions.
2012-02-27 12:36:21 +00:00
b9fcee797c
* config/tc-tic4x.c (tic4x_do_align): Remove ATTRIBUTE_UNUSED on
...
params. Properly generate NOP pattern. Comment reason for
subseg_text_p failure.
2012-02-27 06:52:20 +00:00
35a358074f
* config/tc-h8300.c (constant_fits_width_p): Trim constant to 32 bits
...
and sign extend before range tests.
(constant_fits_size_p): Similarly.
(get_specific): Trim X_add_number to 32 bits.
(fix_operand_size): Likewise, and use unsigned test for signed
ranges.
2012-02-27 06:40:42 +00:00
1f42f8b31d
gas/
...
* config/tc-crx.c: Include bfd_stdint.h.
(getconstant): Remove irrelevant comment. Don't fail due to
sign-extension of int mask.
(check_range): Rewrite using unsigned arithmetic throughout.
opcodes/
* crx-dis.c (print_arg): Mask constant to 32 bits.
* crx-opc.c (cst4_map): Use int array.
include/opcode/
* crx.h (cst4_map): Update declaration.
2012-02-27 06:37:40 +00:00
481fe810e4
Fix regression from change
...
http://sourceware.org/ml/binutils-cvs/2012-01/msg00049.html . The
code needs to check that the symbol is not a local symbol before
accessing a non-local-symbol field.
* tc-tilepro.c (emit_tilepro_instruction): Check if symbol is
non-local before checking sy_value.
* tc-tilegx.c (emit_tilegx_instruction): Ditto.
2012-02-25 22:40:48 +00:00
6f7be9592d
Improve TLS support on TILE-Gx/TILEPro:
...
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.
This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.
bfd/
* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
relocations.
(tilepro_reloc_map): Ditto.
(tilepro_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilepro_tls_translate_to_le): New.
(tilepro_tls_translate_to_ie): New.
(tilepro_elf_tls_transition): New.
(tilepro_elf_check_relocs): Handle new tls relocations.
(tilepro_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilepro_elf_relocate_section): Ditto.
(tilepro_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New
(insn_mask_X1_no_dest_no_srca): New
(insn_mask_Y0_no_dest_no_srca): New
(insn_mask_Y1_no_dest_no_srca): New
(srca_mask_X0): New
(srca_mask_X1): New
(insn_tls_le_move_X1): New
(insn_tls_le_move_zero_X0X1): New
(insn_tls_ie_lw_X1): New
(insn_tls_ie_add_X0X1): New
(insn_tls_ie_add_Y0Y1): New
(insn_tls_gd_add_X0X1): New
(insn_tls_gd_add_Y0Y1): New
* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
relocations.
(tilegx_reloc_map): Ditto.
(tilegx_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_link_hash_table): New field disable_le_transition.
(tilegx_tls_translate_to_le): New.
(tilegx_tls_translate_to_ie): New.
(tilegx_elf_tls_transition): New.
(tilegx_elf_check_relocs): Handle new tls relocations.
(tilegx_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilegx_elf_relocate_section): Ditto.
(tilegx_copy_bits): New.
(tilegx_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New.
(insn_mask_X1_no_dest_no_srca): New.
(insn_mask_Y0_no_dest_no_srca): New.
(insn_mask_Y1_no_dest_no_srca): New.
(insn_mask_X0_no_operand): New.
(insn_mask_X1_no_operand): New.
(insn_mask_Y0_no_operand): New.
(insn_mask_Y1_no_operand): New.
(insn_tls_ie_ld_X1): New.
(insn_tls_ie_ld4s_X1): New.
(insn_tls_ie_add_X0X1): New.
(insn_tls_ie_add_Y0Y1): New.
(insn_tls_ie_addx_X0X1): New.
(insn_tls_ie_addx_Y0Y1): New.
(insn_tls_gd_add_X0X1): New.
(insn_tls_gd_add_Y0Y1): New.
(insn_move_X0X1): New.
(insn_move_Y0Y1): New.
(insn_add_X0X1): New.
(insn_add_Y0Y1): New.
(insn_addx_X0X1): New.
(insn_addx_Y0Y1): New.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* tc-tilepro.c (O_tls_le): Define operator.
(O_tls_le_lo16): Ditto.
(O_tls_le_hi16): Ditto.
(O_tls_le_ha16): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilepro_instruction): Ditto.
(md_apply_fix): Ditto.
* tc-tilegx.c (O_hw1_got): Delete operator.
(O_hw2_got): Ditto.
(O_hw3_got): Ditto.
(O_hw2_last_got): Ditto.
(O_hw1_tls_gd): Ditto.
(O_hw2_tls_gd): Ditto.
(O_hw3_tls_gd): Ditto.
(O_hw2_last_tls_gd): Ditto.
(O_hw1_tls_ie): Ditto.
(O_hw2_tls_ie): Ditto.
(O_hw3_tls_ie): Ditto.
(O_hw2_last_tls_ie): Ditto.
(O_hw0_tls_le): Define operator.
(O_hw0_last_tls_le): Ditto.
(O_hw1_last_tls_le): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(O_tls_add): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Delete old operators; document new operators.
* doc/c-tilepro.texi: Ditto.
include/elf/
* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_TLS_GD_CALL): Ditto.
(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEGX_TLS_IE_LOAD): Ditto.
(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEPRO_TLS_IE_LOAD): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.
include/opcode/
* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
TILEGX_OPC_LD_TLS.
* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
TILEPRO_OPC_LW_TLS_SN.
opcodes/
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
TILEPRO_OPC_LW_TLS_SN.
2012-02-25 22:24:21 +00:00
5414dbefea
Deletes some dead code in the TILE-Gx/TILEPro ports of gas.
...
* tc-tilepro.c (apply_special_operator): delete cases for
got and tls operators.
(md_apply_fix): Ditto.
* tc-tilegx.c: (apply_special_operator): delete cases for
got and tls operators.
(md_apply_fix): Ditto.
2012-02-25 20:07:08 +00:00
fb6ceddedd
Add big-endian support for tilegx.
...
bfd/
* config.bfd (tilegx-*-*): rename little endian vector; add big
endian vector.
(tilegxbe-*-*): New case.
* configure.in (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): New vector.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): New vector.
* configure: Regenerate.
* elf32-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* elf64-tilegx.c (TARGET_LITTLE_SYM): Rename.
(TARGET_LITTLE_NAME): Ditto.
(TARGET_BIG_SYM): Define.
(TARGET_BIG_NAME): Define.
* targets.c (bfd_elf32_tilegx_vec): Rename...
(bfd_elf32_tilegx_le_vec): ... to this.
(bfd_elf32_tilegx_be_vec): Declare.
(bfd_elf64_tilegx_vec): Rename...
(bfd_elf64_tilegx_le_vec): ... to this.
(bfd_elf64_tilegx_be_vec): Declare.
(_bfd_target_vector): Add / rename above vectors.
binutils/testsuite/
* binutils-all/objdump.exp (cpus_expected): Add tilegx.
gas/
* tc-tilegx.c (tilegx_target_format): Handle big endian.
(OPTION_EB): Define.
(OPTION_EL): Define.
(md_longopts): Add entries for "EB" and "EL".
(md_parse_option): Handle OPTION_EB and OPTION_EL.
(md_show_usage): Add -EB and -EL.
(md_number_to_chars): New.
* tc-tilegx.h (TARGET_BYTES_BIG_ENDIAN): Guard definition with
ifndef.
(md_number_to_chars): Delete.
* configure.tgt (tilegx*be): Handle.
* doc/as.texinfo [TILE-Gx]: Document -EB and -EL.
* doc/c-tilegx.texi: Ditto.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx_be.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx_be.c.
(eelf32tilegx_be.c): Add rule to build this file.
(eelf64tilegx_be.c): Ditto.
* Makefile.in: Regenerate.
* configure.tgt (tilegx-*-*): Support big endian.
(tilegxbe-*-*): New.
* emulparams/elf32tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf32tilegx_be.sh: New.
* emulparams/elf64tilegx.sh (OUTPUT_FORMAT): Rename.
(BIG_OUTPUT_FORMAT): Define.
(LITTLE_OUTPUT_FORMAT): Define.
* emulparams/elf64tilegx_be.sh: New.
ld/testsuite/
* ld-tilegx/reloc-be.d: New.
* ld-tilegx/reloc-le.d: New.
* ld-tilegx/reloc.d: Delete.
* ld-tilegx/tilegx.exp: Test big and little endian.
2012-02-25 19:51:34 +00:00
825902491e
Properly create and use a bfd_arch_info_type for 32-bit tilegx.
...
bfd/
* arctures.c (bfd_architecture): Define bfd_mach_tilegx32.
* bfd-in2.h: Regenerate.
* cpu-tilegx.c (bfd_tilegx32_arch): define.
(bfd_tilegx_arch): link to bfd_tilegx32_arch.
gas/
* tc-tilegx.c (md_begin): set architecture and machine.
2012-02-25 18:57:55 +00:00
82c2def5ff
Add HLEPrefixNone/HLEPrefixLock/HLEPrefixAny/HLEPrefixRelease
...
gas/
2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (check_hle): Use HLEPrefixNone, HLEPrefixLock,
HLEPrefixAny and HLEPrefixRelease.
opcodes/
2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (HLEPrefixNone): New.
(HLEPrefixLock): Likewise.
(HLEPrefixAny): Likewise.
(HLEPrefixRelease): Likewise.
2012-02-21 18:09:48 +00:00
Alan Modra
H.J. Lu
Nick Clifton
DJ Delorie
Roland McGrath
Joseph Myers
Yufeng Zhang
Sean Keys
Peter Bergner
Steve Ellcey
Andreas Schwab
Richard Earnshaw
Michael Eager
Julian Brown
David S. Miller
Ulrich Weigand
Maciej W. Rozycki
Simon Baldwin
Kai Tietz
Dave Anglin
Nagajyothi Eggone
Andreas Krebbel
Richard Sandiford
David Edelsohn
Anthony Green
Denis Chertykov
James Lemke
Hans-Peter Nilsson
Walter Lee
Matthew Gretton-Dann
Jan Beulich
Sandra Loosemore
Mike Frysinger
Tristan Gingold
Segher Boessenkool
Nathan Sidwell
Arnold Metselaar
Mark Wielaard
Maxim Kuvyrkov
Thomas Schwinge