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665 Commits

Author SHA1 Message Date
Nick Clifton 3e60263266 Add ColfFire v4 support 2003-10-21 13:28:59 +00:00
Michael Snyder d43ff6d27f 2003-06-03 Michael Snyder <msnyder@redhat.com> 
and Bernd Schmidt   <bernds@redhat.com>
        and Alexandre Oliva <aoliva@redhat.com>

        * disassemble.c (disassembler): Add support for h8300sx.
 2003-10-10 22:13:49 +00:00
Dave Brolley f7c541f680 2003-10-10 Dave Brolley <brolley@redhat.com> 
* frv-asm.c,frv-desc.c,frv-opc.c: Regenerated.
 2003-10-10 19:30:02 +00:00
Dave Brolley d576f161dd 2003-10-08 Dave Brolley <brolley@redhat.com> 
* frv-desc.[ch], frv-opc.[ch]: Regenerated.
 2003-10-08 18:26:01 +00:00
Bob Wilson 118fecd307 * xtensa-dis.c (fetch_data): Remove numBytes parameter. 
(print_insn_xtensa): Fix call to fetch_data.
 2003-10-01 00:40:22 +00:00
Chris Demetriou 5f74bc130d [ bfd/ChangeLog ] 
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* archures.c (bfd_mach_mipsisa64r2): New define.
	* bfd-in2.h: Regenerate.
	* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
	* cpu-mips.c (I_mipsisa64r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa64r2.
	* elfxx-mips.c (_bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
	(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
	(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.

[ binutils/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.

[ gas/Changelog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
	* configure: Regenerate.
	* config/tc-mips.c (imm2_expr): New variable.
	(md_assemble, mips16_ip): Initialize imm2_expr.
	(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
	(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
	(macro): Handle M_DEXT and M_DINS.
	(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
	(mips_ip): Likewise.
	(OPTION_MIPS64R2): New define.
	(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
	OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
	(md_parse_option): Handle OPTION_MIPS64R2.
	(s_mipsset): Handle setting "mips64r2" ISA.
	(mips_cpu_info_table): Add mips64r2.
	(md_show_usage): Document -mips64r2 option.
	* doc/as.texinfo: Docuemnt -mips64r2 option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips64r2.d: New file.
	* gas/mips/cp0sel-names-mips64r2.d: New file.
	* gas/mips/elf_arch_mips64r2.d: New file.
	* gas/mips/hwr-names-mips64r2.d: New file.
	* gas/mips/mips32r2-ill-fp64.l: New file.
	* gas/mips/mips32r2-ill-fp64.s: New file.
	* gas/mips/mips64r2-ill.l: New file.
	* gas/mips/mips64r2-ill.s: New file.
	* gas/mips/mips64r2.d: New file.
	* gas/mips/mips64r2.s: New file.
	* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.

[ include/elf/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_64R2): New define.

[ include/opcode/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document +E, +F, +G, +H, and +I operand types.
	Update documentation of I, +B and +C operand types.
	(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
	(M_DEXT, M_DINS): New enum values.

[ ld/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ldmain.c (get_emulation): Ignore "-mips64r2".

[ ld/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
	with MIPS64r2.

[ opcodes/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
	(print_insn_args): Add handing for +E, +F, +G, and +H.
	* mips-opc.c (I65): New define for MIPS64r2.
	(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
	"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
	and "dshd" for MIPS64r2.  Adjust "dror", "dror32", and "drorv" to
	be supported on MIPS64r2.
 2003-09-30 16:17:15 +00:00
Dave Brolley e74d091b9a 2003-09-24 Dave Brolley <brolley@redhat.com> 
* frv-desc.c, frv-opc.c, frv-opc.h: Regenerated.
 2003-09-24 19:10:48 +00:00
Andreas Jaeger 26ca545091 * i386-dis.c: Convert to ISO C90 prototypes. 
* i370-dis.c: Likewise.
	* i370-opc.c: Likewiwse.
	* i960-dis.c: Likewise.
	* ia64-opc.c: Likewise.
 2003-09-14 15:16:57 +00:00
Dave Brolley f7df6a7927 2003-09-09 Dave Brolley <brolley@redhat.com> 
* frv-desc.c: Regenerated.
 2003-09-09 22:29:42 +00:00
Dave Brolley 9c2de72926 2003-09-08 Dave Brolley <brolley@redhat.com> 
On behalf of Doug Evans <dje@sebabeach.org>
        * Makefile.am (run-cgen): Pass new args archfile and opcfile
        to cgen.sh.
        (stamp-ip2k,stamp-m32r,stamp-fr30,stamp-frv,stamp-openrisc,
        stamp-iq2000,stamp-xstormy16): Pass paths of .cpu and .opc files
        to cgen.sh.
        (stamp-frv): Delete hardcoded path spec workaround.
        * Makefile.in: Regenerate.
        * cgen.sh: New args archfile and opcfile.  Pass on to cgen.
 2003-09-08 17:24:05 +00:00
Nick Clifton 8ad30312ff Add binutils support for v850e1 processor 2003-09-04 11:04:38 +00:00
Alan Modra 661bd698e4 * ppc-dis.c (struct dis_private): New. 
(powerpc_dialect): Make static.  Accept -Many in addition to existing
	options.  Save dialect in dis_private.
	(print_insn_big_powerpc): Retrieve dialect from dis_private.
	(print_insn_little_powerpc): Likewise.
	(print_insn_powerpc): Call powpc_dialect here.  Remove unnecessary
	efs/altivec check.  Try harder to disassemble if given -Many.
	* ppc-opc.c (insert_fxm): Expand comment.
	(PPC, PPCCOM, PPC32, PPC64, PPCVEC): Remove PPC_OPCODE_ANY.
	(POWER, POWER2, PPCPWR2, POWER32, COM, COM32, M601, PWRCOM): Likewise.
	(POWER4): Remove PPCCOM.
	(PPCONLY): Don't define.  Update all occurrences to PPC.
 2003-09-04 01:51:37 +00:00
Andrew Cagney 92c2346c02 Index: opcodes/ChangeLog 
2003-09-03  Andrew Cagney  <cagney@redhat.com>

	* dis-init.c (init_disassemble_info): New file and function.
	* Makefile.am (CFILES): Add "dis-init.c".
	(libopcodes_la_SOURCES): Add "dis-init.c".
	(dis-init.lo): Specify dependencies.
	* Makefile.in: Regenerate.

Index: include/ChangeLog
2003-08-27  Andrew Cagney  <cagney@redhat.com>

	* dis-asm.h (init_disassemble_info): Declare.
	(INIT_DISASSEMBLE_INFO): Redefine as a call to
	init_disassemble_info.
	(INIT_DISASSEMBLE_INFO_NO_ARCH): Ditto.

Index: binutils/ChangeLog
2003-09-03  Andrew Cagney  <cagney@redhat.com>

	* objdump.c: Refer to init_disassemble_info in comments.
	(disassemble_data): Replace INIT_DISASSEMBLE_INFO with
	init_disassemble_info.
 2003-09-03 23:43:18 +00:00
Dave Brolley ecd51ad39f 2003-09-03 Dave Brolley <brolley@redhat.com> 
* frv-*: Regenerated.
 2003-09-03 23:09:56 +00:00
Alan Modra 823bbe9d95 * ppc-opc.c (powerpc_opcodes): Combine identical PPC403/BOOKE entries. 
Move duplicate mnemonic entries together.  Use RS instead of RT on
	all mt*.
	* ppc-dis.c: Convert to ISO C.
 2003-09-02 04:15:29 +00:00
Dave Brolley 5272d2012d 2003-08-29 Dave Brolley <brolley@redhat.com> 
* Makefile.am (stamp-frv): Copy frv.cpu and frv.opc from
        $(srcdir)/../cpu temporarily when regenerating source files.
        * Makefile.in: Regenerated.
 2003-08-29 19:14:54 +00:00
Nick Clifton f02232aaa3 Add support for unindexed form of Addressing Mode 5 2003-08-19 13:05:42 +00:00
Alan Modra 7d5b217e2c * ppc-opc.c (PPC440): Define. 
(powerpc_opcodes): Allow mac*, mul*, nmac*, dccci, dcread, iccci,
	icread instructions when PPC440.  Add dlmzb instruction.
 2003-08-19 07:09:10 +00:00
Alan Modra f860738999 * dep-in.sed: Remove libintl.h. 
* Makefile.am (POTFILES.in): Unset LC_COLLATE.
	Run "make dep-am".
	* Makefile.in: Regenerate.
 2003-08-14 07:03:18 +00:00
Michael Meissner 90e3a20cfe fix typo in ChangeLog 2003-08-09 00:46:53 +00:00
Michael Meissner ffead7aece regenerate cgen files after prototype fix 2003-08-09 00:39:21 +00:00
Michael Meissner 44d221f0b8 Fix typos in last change 2003-08-08 23:01:28 +00:00
Michael Meissner 209e303302 fix changelog date 2003-08-08 21:22:41 +00:00
Michael Meissner 10e05405ac Convert cgen to C-90 2003-08-08 21:21:24 +00:00
Nick Clifton 9e7d479d74 Updated French translations 2003-08-06 10:15:16 +00:00
Nick Clifton 3d3d3d639b Add new Dutch translation. 2003-08-05 09:39:31 +00:00
Jason Eckhardt 7f8a68cd19 2003-07-30 Jason Eckhardt <jle@rice.edu> 
* i860-dis.c: Convert to ISO C90.  Remove superflous prototypes.
 2003-07-30 21:10:12 +00:00
Nick Clifton 52f20b276f Updated Romanian translation 2003-07-30 15:53:12 +00:00
Jakub Jelinek 0deb7ac528 * ppc-opc.c (insert_mbe, extract_mbe): Shift 1L instead of 1 up. 2003-07-29 08:29:56 +00:00
Nick Clifton 834d807bb8 Updated French translations 2003-07-24 11:16:05 +00:00
Nick Clifton 31e0f3cd45 * objdump.c (main) :Accept multiple -M switch. 
* doc/binutils.texi: Document that multiple -M switches are accepted and that
  a single -M switch can contain comma separated options.
* arm-dis.c (parse_arm_disassembler_option): Do not expect option string to be
  NUL terminated.
  (parse_disassembler_options): Allow options to be space or comma separated.
 2003-07-18 11:34:41 +00:00
Nick Clifton 6c37ac4d15 Update translations 2003-07-17 14:22:45 +00:00
Richard Sandiford 5a7ea74950 include/opcode/ 
* mips.h (CPU_RM7000): New macro.
	(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.

bfd/
	* archures.c (bfd_mach_mips7000): New.
	* bfd-in2.h: Regenerated.
	* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
	(mips_mach_extensions): Add an entry for it.

opcodes/
	* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.

gas/
	* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
	(mips_cpu_info_table): Add rm7000 and rm9000 entries.

gas/testsuite/
	* gas/mips/rm7000.[sd]: New test.
	* gas/mips/mips.exp: Run it.
 2003-07-15 07:50:39 +00:00
Nick Clifton 76bff7057c Update Turkish translation files for bfd, gas and opcodes 2003-07-14 11:18:13 +00:00
Alan Modra fce0080055 Update pot files. 2003-07-11 05:10:21 +00:00
Alexandre Oliva 40fa02078b 2000-05-25 Alexandre Oliva <aoliva@cygnus.com> 
* m10300-dis.c (disassemble): Negate negative accumulator's shift.
2000-05-24  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-dis.c (disassemble, case FSREG, FDREG): Don't assume
32-bit longs when sign-extending operands.
2000-04-20  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-opc.c: Remove MN10300_OPERAND_RELAX from all FSREGs.
* m10300-dis.c (HAVE_AM33_2): Define.
(disassemble): Use it.
(HAVE_AM33): Redefine.
(print_insn_mn10300): Fix mask for 5-byte extended insns.
2000-04-01  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-opc.c: Renamed AM332 to AM33_2.
2000-03-31  Alexandre Oliva  <aoliva@cygnus.com>
* m10300-opc.c: Defined AM33 2.0 register operands.  Added support
for AM33 2.0 `imm8,(abs16)' addressing mode for btst, bset and
bclr.  Implemented `fbCC', `flCC', `dcpf' and all FP insns.
* m10300-dis.c (print_insn_mn10300): Recognize 5byte extended
insn code of AM33 2.0.
(disassemble): Recognize FMT_D3.  Print out FP register names.
 2003-07-10 02:53:27 +00:00
Chris Demetriou fec0654638 2003-07-09 Chris Demetriou <cgd@broadcom.com> 
* mips-dis.c (set_default_mips_dis_options): Get BFD from
        the disassembler_info's section, rather than from the
        disassembler_info's symbols pointer.
 2003-07-09 22:53:52 +00:00
Alan Modra 8427c42425 * ppc-opc.c: Remove NULL pointer checks. Formatting. Remove 
extraneous ATTRIBUTE_UNUSED.
	* ppc-dis.c (print_insn_powerpc): Always pass a valid address to
	operand->extract.
 2003-07-07 01:34:04 +00:00
Alan Modra 2fbfdc41e7 * ppc-opc.c: Convert to C90, removing unnecessary prototypes and 
casts.  Formatting.
 2003-07-04 15:27:25 +00:00
Alan Modra c168870a29 * ppc-opc.c: Remove PARAMS from prototypes. 
(FXM4): Define.
	(insert_fxm): New function, used by both FXM and FXM4.
	(extract_fxm): Likewise.
	(XFXFXM_MASK): Remove 1 << 20 term.
	(powerpc_opcodes): Add Power4 version of "mfcr".  Simplify "mtcr" mask.
 2003-07-04 13:06:21 +00:00
Martin Schwidefsky bac0268913 * s390-dis.c (s390_extract_operand): Add support for long displacements. 
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
        * s390-opc.c (D20_20): Add define for 20 bit displacements.
        (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
        INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
        new instruction formats.
        (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
        MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
        (s390_opformats): Likewise.
        * s390-opc.txt: Add new instructions for cpu type z990. Add missing
        hfp instructions. Add missing instructions pgin, pgout and xsch.
 2003-07-01 14:47:58 +00:00
H.J. Lu ca164297eb gas/ 
2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
	Instructions.

	* gas/config/tc-i386.h (CpuPNI): New.
	(CpuUnknownFlags): Add CpuPNI.

gas/testsuite/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add prescott.

	* gas/i386/prescott.d: New file.
	* gas/i386/prescott.s: Likewise.

include/opcode/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Precott New Instructions.

opcodes/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
	Intel Precott New Instructions.
	(PREGRP27): New. Added for "addsubpd" and "addsubps".
	(PREGRP28): New. Added for "haddpd" and "haddps".
	(PREGRP29): New. Added for "hsubpd" and "hsubps".
	(PREGRP30): New. Added for "movsldup" and "movddup".
	(PREGRP31): New. Added for "movshdup" and "movhpd".
	(PREGRP32): New. Added for "lddqu".
	(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
	Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
	entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
	entry 0xd0. Use PREGRP32 for entry 0xf0.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(grps): Use PNI_Fixup in the "sidtQ" entry.
	(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
	PREGRP31 and PREGRP32.
	(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
	Use "fisttpll" in entry 1 in opcode 0xdd.
	Use "fisttp" in entry 1 in opcode 0xdf.
 2003-06-23 20:15:34 +00:00
Christian Groessler 6ddfd88c72 * z8k-dis.c (instr_data_s): Change tabl_index from long to int. 
(print_insn_z8k): Correctly check return value from
	z8k_lookup_instr call.
	(unparse_instr): Handle CLASS_IRO case.
	* z8kgen.c: Fix function definitions.  Fix formatting.
	(opt): Add brk opcode alias for non-simulator breakpoint.  Add
	missing and fix existing in/out and sin/sout opcode definitions.
	(args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
	opcodes.
	(internal): Check p->flags for non-zero before dereferencing it.
	(gas): Add CLASS_IRO line.  Insert new OPC_xxx lines for the added
	opcodes and renumber the remaining lines repectively.
	(main): Remove "-d" command line switch.
	* z8k-opc.h: Regenerate with new z8kgen.c.
 2003-06-19 13:46:37 +00:00
H.J. Lu 3b4433739c bfd/ 
2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

binutils/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

gas/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

gprof/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

ld/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

opcodes/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.
 2003-06-11 01:32:08 +00:00
Alan Modra 795bb480ca * bfd/Makefile.am (config.status): Depend on version.h. 
Run "make dep-am" in bfd/ and elsewhere, and regen files.
 2003-06-10 23:44:42 +00:00
Doug Evans b11dcf4e7f opcodes: 
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
	* frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
	* ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
	* iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
	* m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
	* openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
	* xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
gas:
	* cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* config/tc-fr30.c (md_estimate_size_before_relax): Ditto.
	* config/tc-m32r.c (md_estimate_size_before_relax): Ditto.
	* config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
 2003-06-10 22:08:45 +00:00
Alan Modra adadcc0cc9 Add "attn", "lq" and "stq" power4 insns. 2003-06-10 07:44:11 +00:00
Richard Sandiford 0613284fd4 opcodes/ 
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
	rts/l and rte/l register lists.

gas/
	* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
	lists.  Allow single-register ranges.

testsuite/
	* gas/h8300/h8sx_rtsl.[sd]: New test.
	* gas/h8300/h8300.exp: Run it.
 2003-06-10 07:27:56 +00:00
Nick Clifton 36c3ae2457 Add code to handle even-numbered only register operands 2003-06-05 16:04:20 +00:00
Michael Snyder 20dc5b5ae3 2003-06-03 Michael Snyder <msnyder@redhat.com> 
and Bernd Schmidt   <bernds@redhat.com>
	and Alexandre Oliva <aoliva@redhat.com>
	* disassemble.c (disassembler): Add support for h8300sx.
	* h8300-dis.c: Ditto.
 2003-06-03 21:32:52 +00:00