Commit Graph

8524 Commits

Author SHA1 Message Date
H.J. Lu
4a1b91eabb x86: Expand Broadcast to 3 bits
Expand Broadcast to 3 bits so that the number of bytes to broadcast
can be computed as 1 << (Broadcast - 1).  Use it to simplify x86
assembler.

gas/

	* config/tc-i386.c (Broadcast_Operation): Add bytes.
	(build_evex_prefix): Use i.broadcast->bytes.
	(match_broadcast_size): New function.
	(check_VecOperands): Use the broadcast field to compute the
	number of bytes to broadcast directly.  Set i.broadcast->bytes.
	Use match_broadcast_size.

opcodes/

	* i386-gen.c (adjust_broadcast_modifier): New function.
	(process_i386_opcode_modifier): Add an argument for operands.
	Adjust the Broadcast value based on operands.
	(output_i386_opcode): Pass operand_types to
	process_i386_opcode_modifier.
	(process_i386_opcodes): Pass NULL as operands to
	process_i386_opcode_modifier.
	* i386-opc.h (BYTE_BROADCAST): New.
	(WORD_BROADCAST): Likewise.
	(DWORD_BROADCAST): Likewise.
	(QWORD_BROADCAST): Likewise.
	(i386_opcode_modifier): Expand broadcast to 3 bits.
	* i386-tbl.h: Regenerated.
2018-07-25 15:28:24 -07:00
Thomas Preud'homme
5469110733 Clarify doc for .arch/.cpu
Documentation for .arch and .cpu directives currently says that it
accepts the same name as -march/-mcpu command-line options respectively.
However it only accept the architecture/CPU part of those options: it
does not accept specifying an extension which is done via
.arch_extension. This patch clarifies that the extension is not
accepted.

2018-07-25  Thomas Preud'homme  <thomas.preudhomme@linaro.org>

gas/
	* doc/c-arm.texi (.arch directive): Clarify that name must not include
	an extension.
	(.cpu directive): Likewise.
2018-07-25 14:12:40 +01:00
H.J. Lu
56522fc5af x86: Use unsigned int to iterate through vector operands
Use unsigned int to iterate through multi-length vector operands to avoid
sign-extension.

	* config/tc-i386.c (build_vex_prefix): Use unsigned int to
	iterate through multi-length vector operands.
	(build_evex_prefix): Likewise.
2018-07-24 09:51:08 -07:00
Jan Beulich
4174bfff8a x86-64: correct AVX512F vcvtsi2s{d,s} handling
Just like for their AVX counterparts and CVTSI2S{D,S}, a memory source
here is ambiguous and hence
- in source files should be qualified with a suitable suffix or operand
  size specifier (not doing so is an error in Intel mode, and will gain
  a diagnostic in AT&T mode in the future),
- in disassembly should be properly suffixed (the Intel operand size
  specifiers were emitted correctly already).
2018-07-24 09:46:27 +02:00
H.J. Lu
e2b7fbc46d x86: Add a test for missing broadcast
For

	.intel_syntax noprefix
	vcvtps2qq xmm0, DWORD PTR [rax]

we should get

Error: broadcast is needed for operand of such type for `vcvtps2qq'

	* testsuite/gas/i386/inval-avx512f.s: Add a test for missing
	broadcast.
	* testsuite/gas/i386/x86-64-inval-avx512f.s: Likewise.
	* testsuite/gas/i386/inval-avx512f.l: Updated.
	* testsuite/gas/i386/x86-64-inval-avx512f.l: Likewise.
2018-07-23 06:32:20 -07:00
H.J. Lu
c265869848 x86: Remove broadcast_not_on_src_operand
Remove broadcast_not_on_src_operand since it is unused.

	* config/tc-i386.c (i386_error): Remove
	broadcast_not_on_src_operand.
	(match_template): Likewse.
2018-07-23 05:43:43 -07:00
Claudiu Zissulescu
04e65276fa [ARC] Fix decoding of w6 signed short immediate.
gas/
  Claudiu Zissulescu  <claziss@synopsys.com>

        * testsuite/gas/arc/st.d: Fix test.

opcodes/
  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-opc.c (extract_w6): Fix extending the sign.
2018-07-23 11:09:43 +02:00
claziss
f02806be1f [ARC] Fix case-sensitivity for extension instructions.
In ARC assembler, we accept case insensitive mnemonics, but this was
not the case for extension instruction, fix it and add a test.

gas/
Claudiu Zissulescu <claziss@synopsys.com>

	* config/tc-arc.c (tokenize_extinsn): Convert to lower case the
	name of extension instructions.
	* testsuite/gas/arc/textinsn_case.d: New file.
	* testsuite/gas/arc/textinsn_case.s: Likewise.
2018-07-23 11:09:43 +02:00
H.J. Lu
c7213af9b3 x86: Determine vector length from the last vector operand
Determine VEX/EVEXE vector length from the last multi-length vector
operand.

	* config/tc-i386.c (build_vex_prefix): Determine vector
	length from the last multi-length vector operand.
	(build_evex_prefix): Likewise.
2018-07-22 12:00:39 -07:00
H.J. Lu
dd40ce22d0 gas/config/tc-i386.c: Break long line
* config/tc-i386.c (match_simd_size): Break long line.
	(match_mem_size): Likewise.
2018-07-21 10:57:54 -07:00
H.J. Lu
7a54636a02 x86: Rename match_reg_size to match_operand_size
match_reg_size checks size for both memory and register operands.  This
patch renamed match_reg_size to match_operand_size and updated comments
for

commit 3ac21baa84
Author: Jan Beulich <jbeulich@novell.com>
Date:   Mon Jul 16 08:19:21 2018 +0200

    x86: fix operand size checking

which added one argument to match_reg_size, match_simd_size and
match_mem_size.

	* config/tc-i386.c (match_reg_size): Renamed to ...
	(match_operand_size): This.  Update comments.
	(match_simd_size): Update comments.  Replace match_reg_size
	with match_operand_size.
	(match_mem_size): Likewise.
	(operand_size_match): Replace match_reg_size with
	match_operand_size.
2018-07-20 12:55:14 -07:00
Chenghua Xu
8095d2f70e MIPS/GAS: Split Loongson MMI Instructions from loongson2f/3a
The MMI instruction set has been implemented in many Loongson
processors.  There is a lot of software optimized for MMI.  This patch
splits MMI from loongson2f/3a, and adds GAS and disassembler options for
MMI instructions.

2018-07-20  Chenghua Xu  <paul.hua.gm@gmail.com>
            Maciej W. Rozycki  <macro@mips.com>

bfd/
	* elfxx-mips.c (print_mips_ases): Add MMI extension.

binutils/
	* readelf.c (print_mips_ases): Add MMI extension.

gas/
	* NEWS: Mention MultiMedia extensions Instructions (MMI)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_MMI and
	OPTION_NO_LOONGSON_MMI.
	(md_longopts): Likewise.
	(mips_ases): Define availability for MMI.
	(mips_convert_ase_flags): Map ASE_LOONGSON_MMI to
	AFL_ASE_LOONGSON_MMI.
	(mips_cpu_info_table): Add ASE_LOONGSON_MMI for loongson2f/3a.
	(md_show_usage): Add help for -mloongson-mmi and
	-mno-loongson-mmi.
	* doc/as.texi: Document -mloongson-mmi, -mno-loongson-mmi.
	* doc/c-mips.texi: Document -mloongson-mmi, -mno-loongson-mmi,
	.set loongson-mmi and .set noloongson-mmi.
	* testsuite/gas/mips/loongson-2f.d: Move mmi test to ...
	* testsuite/gas/mips/loongson-2f-mmi.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-2f.s: Move mmi test to ...
	* testsuite/gas/mips/loongson-2f-mmi.s: Here.
	* testsuite/gas/mips/loongson-3a.d: Move mmi test to ...
	* testsuite/gas/mips/loongson-3a-mmi.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a.s: Move mmi test to ...
	* testsuite/gas/mips/loongson-3a-mmi.s: Here.
	* testsuite/gas/mips/mips.exp: Run loongson-2f-mmi and
	loongson-3a-mmi tests.

include/
	* elf/mips.h (AFL_ASE_MMI): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
	* opcode/mips.h (ASE_LOONGSON_MMI): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add MMI to loongson2f and
	loongson3a descriptors.
	(parse_mips_ase_option): Handle -M loongson-mmi option.
	(print_mips_disassembler_options): Document -M loongson-mmi.
	* mips-opc.c (LMMI): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LMMI for MMI
	instructions.
2018-07-20 13:21:33 +01:00
Rainer Orth
0458ca4440 Specify architecture for SPARC gas tests
A couple of SPARC gas tests FAIL on Solaris/SPARC (both
sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11):

FAIL: sparc PAUSE
FAIL: sparc CBCOND
FAIL: sparc CFR
FAIL: sparc CRYPTO
FAIL: sparc HPC+VIS3
FAIL: sparc IMA
FAIL: sparc OSA2015 %mwait asr and MWAIT instruction
FAIL: sparc OSA2015 %mcdper asr
FAIL: sparc SPARC5 and VIS4.0
FAIL: OSA2015 crypto instructions
FAIL: SPARC6
FAIL: FPCMPSHL OSA2017 instructions
FAIL: OSA2017 ONADD/ONSUB/ONMUL/ONDIV instructions.
FAIL: OSA2017 RLE instructions
FAIL: sparc64 rdasr
FAIL: sparc64 rdpr
FAIL: sparc64 rdhpr
FAIL: sparc64 wrasr
FAIL: sparc64 wrpr

It turns out there's a common pattern here: failures happen for all
tests that use SPARC ISA extensions beyond sparcv9, e.g. for the sparc
PAUSE test:

regexp_diff match failure
regexp "^   0:  b7 80 40 02     wr  %g1, %g2, %pause$"
line   "   0:   b7 80 40 02     wr  %g1, %g2, %asr27"
[...]
regexp_diff match failure
regexp "^   8:  b7 80 20 08     pause  8$"
line   "   8:   b7 80 20 08     wr  8, %asr27"
[...]

The fix is easy, actually: just as the tests specify the ISA extension
to use as a gas flag, the same needs to be done for objdump.  For the
test above, which has -Av9v, this means passing -msparc:v9v to objdump.
Doing so makes all but two (unrelated; to be reported separately)
failures go away.

This doesn't happen on Linux/SPARC, where gas emits GNU object attributes
matching the hardcare capabilities used.  Since gas doesn't yet implement
Solaris-style object capabilites, the explicit -march is needed, but only
passed on Solaris.

Tested on both sparc-sun-solaris2.11 and sparcv9-sun-solaris2.11.

	* testsuite/gas/sparc/sparc.exp (set_tests_arch): New proc.
	Prefix v9c, v9d, v9v, v9m, v9m8 tests with corresponding
	set_tests_arch.
2018-07-20 11:15:57 +02:00
Jan Beulich
625cbd7ac1 x86: fold VFPCLASSP{D,S} templates
These are special because they may not have a register operand to derive
the vector length from, which requires to also deal with the braodcast
case when determining vector length in build_evex_prefix().

Also drop IgnoreSize (and the now redundant size specifiers) from their
suffixed counterparts.
2018-07-19 08:35:38 +02:00
Jan Beulich
8282b7ad0d x86: fold various AVX512BW templates 2018-07-19 08:32:17 +02:00
Jan Beulich
7091c61201 x86: fold various AVX512VL templates into their AVX512F counterparts 2018-07-19 08:29:35 +02:00
Maciej W. Rozycki
972450a72c MIPS/GAS/testsuite: Correct whitespace issues with Loongson tests
Remove CR characters, trailing whitespace and space characters appearing
immediately before a tab character, and replace spaces with tabs, all
across Loongson GAS tests.

	gas/
	* testsuite/gas/mips/loongson-2e.d: Correct whitespace issues.
	* testsuite/gas/mips/loongson-2f.d: Likewise.
	* testsuite/gas/mips/loongson-2f-2.d: Likewise.
	* testsuite/gas/mips/loongson-2f-3.d: Likewise.
	* testsuite/gas/mips/loongson-3a.d: Likewise.
	* testsuite/gas/mips/loongson-3a-2.d: Likewise.
	* testsuite/gas/mips/loongson-2e.s: Likewise.
	* testsuite/gas/mips/loongson-2f.s: Likewise.
	* testsuite/gas/mips/loongson-2f-3.s: Likewise.
	* testsuite/gas/mips/loongson-3a.s: Likewise.
	* testsuite/gas/mips/loongson-3a-2.s: Likewise.
2018-07-18 14:08:37 +01:00
H.J. Lu
11a322db5c x86: Split vcvtps2{,u}qq and vcvttps2{,u}qq
After

commit 1b54b8d7e4
Author: Jan Beulich <jbeulich@novell.com>
Date:   Mon Dec 18 09:36:14 2017 +0100

    x86: fold RegXMM/RegYMM/RegZMM into RegSIMD

    ... qualified by their respective sizes, allowing to drop FirstXmm0 at
    the same time.

folded RegXMM, RegYMM and RegZMM into RegSIMD, it's no longer impossible
to distinguish if Xmmword can represent a memory reference when operand
specification contains SIMD register. For example, template operands
specification like these

RegXMM|...|Xmmword|...

and

RegXMM|...

The Xmmword bitfield is always set by RegXMM which is represented by
"RegSIMD|Xmmword".  This patch splits each of vcvtps2qq, vcvtps2uqq,
vcvttps2qq and vcvttps2uqq into 2 templates: one template only has
RegXMM source operand and the other only has mempry source operand.

gas/

	PR gas/23418
	* testsuite/gas/i386/xmmword.s: Add tests for vcvtps2qq,
	vcvtps2uqq, vcvttps2qq and vcvttps2uqq.
	* testsuite/gas/i386/xmmword.l: Updated.

opcodes/

	PR gas/23418
	* i386-opc.h (Byte): Update comments.
	(Word): Likewise.
	(Dword): Likewise.
	(Fword): Likewise.
	(Qword): Likewise.
	(Tbyte): Likewise.
	(Xmmword): Likewise.
	(Ymmword): Likewise.
	(Zmmword): Likewise.
	* i386-opc.tbl: Split vcvtps2qq, vcvtps2uqq, vcvttps2qq and
	vcvttps2uqq.
	* i386-tbl.h: Regenerated.
2018-07-18 05:33:50 -07:00
Jan Beulich
3ac21baa84 x86: fix operand size checking
Currently mov to/from control, debug, and test register insns accept any
size GPR operand (general pattern: templates with D set and both
operands being registers in distinct register files). This is due to
improper checking of the reverse case, including not informing the
caller whether a straight and/or reverse match was successful.

The helper functions need to be told two indexes: One to index the given
operand types array, and the other to index the template one. The caller
must attempt a further straight match only if the function reported a
straight match (and respectively for reverse matches).
2018-07-16 08:19:21 +02:00
Nick Clifton
b84f59efc6 Add a test that relocs are correctly generated for missing build notes.
* testsuite/gas/elf/missing-build-notes.s: New test.  Checks that
	relocs are correctly generated for missing build notes.
	* testsuite/gas/elf/missing-build-notes.d: New file.  Expected
	output from objdump.
	* testsuite/gas/elf/elf.exp: Run the new test.
2018-07-13 15:48:49 +01:00
Nick Clifton
4ef4710f5c Allow bit-patterns in the immediate field of ARM neon mov instructions.
* config/tc-arm.c (do_neon_mov): When converting an integer
	immediate into a floating point value, check that the conversion
	is valid.  Also warn if the immediate is valid as both a floating
	point value and a bit pattern.
	* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
	floating point bit patterns.
	* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
	of the new insns.
2018-07-13 11:50:16 +01:00
Nick Clifton
cde3679eb5 This patch adds support for the SSBB and PSSBB speculation barrier instructions to the AArch64 assembler and disassembler.
For more details see: https://static.docs.arm.com/ddi0596/a/DDI_0596_ARM_a64_instruction_set_architecture.pdf

opcodes	* aarch64-tbl.h (aarch64_opcode_table): Add entry for
	ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas	* testsuite/gas/aarch64/system.s: Add test for ssbb
	and pssbb.
	* testsuite/gas/aarch64/system.d: Update accordingly
	and remove explicit addresses.
2018-07-12 15:48:02 +01:00
Tamar Christina
45a28947f3 Add remainder of Em16 restrictions for AArch64 gas.
This adds the missing Em16 constraints the rest of the instructions requiring them
and also adds a testcase to test all the instructions so these are checked from
now on.

The Em16 operand constrains the valid registers to the lower 16 registers when used
with a half precision qualifier.

The list has been cross checked (by hand) through the Arm ARM version Ca.

opcodes/

	PR binutils/23192
	* aarch64-tbl.h (sqdmlal, sqdmlal2, smlsl, smlsl2, sqdmlsl, sqdmlsl2,
	mul, smull, smull2, sqdmull, sqdmull2, sqdmulh, sqrdmulh, mla, umlal,
	umlal2, mls, umlsl, umlsl2, umull, umull2, sqdmlal, sqdmlsl, sqdmull,
	sqdmulh, sqrdmulh): Use Em16.

gas/

	PR binutils/23192
	* testsuite/gas/aarch64/illegal-by-element.s: New.
	* testsuite/gas/aarch64/illegal-by-element.d: New.
	* testsuite/gas/aarch64/illegal-by-element.l: New.
2018-07-12 10:30:35 +01:00
Sudakshina Das
c597cc3d6e Adds the speculation barrier instructions to the ARM assembler and disassembler.
See:
https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability/download-the-whitepaper

opcodes	* arm-dis.c (arm_opcodes): Add ssbb and pssbb and move
	csdb together with them.
	(thumb32_opcodes): Likewise.

gas	* config/tc-arm.c (insns): Add new ssbb and pssbb instructions.
	* testsuite/gas/arm/csdb.s: Add new tests for ssbb and pssbb.
	* testsuite/gas/arm/csdb.d: Likewise
	* testsuite/gas/arm/thumb2_it_bad.s: Likewise.
	* testsuite/gas/arm/thumb2_it_bad.l: Likewise.
	* testsuite/gas/arm/barrier.d: Update with ssbb.
	* testsuite/gas/arm/barrier-thumb.d: Likewise.
2018-07-11 18:05:34 +01:00
Jan Beulich
2fb5be8dac x86: drop {,reg16_}inoutportreg variables
The checking against reg16_inoutportreg can be had with a simple test of
a bit, and the value setting from inoutportreg can be replaced by using
the actual register's reg_type field.

Note that the so far redundant 2nd instance of OPERAND_TYPE_INOUTPORTREG
is left in place, for its use in type_names[].
2018-07-11 10:28:56 +02:00
Jan Beulich
bd59a6313d x86: simplify legacy prefix emission
The check_prefix label was bogus from the beginning: The special
checking is supposed to happen for PadLock insns only; no
3-opcode-byte insn should go this path.
2018-07-11 10:28:16 +02:00
Jan Beulich
7f5cad3047 x86/Intel: accept memory operand size specifiers for CET insns 2018-07-11 10:25:40 +02:00
Jan Beulich
76d3a78a49 x86: fix "REP RET" with -madd-bnd-prefix
Just like any other branches, RET should gain a BND prefix also when
already prefixed in source by REP.
2018-07-11 10:23:48 +02:00
Jeff Law
2af4d0d938 * testsuite/nds32/ji-jr.d: Fix name tag. 2018-07-09 10:35:12 -06:00
Tamar Christina
cba05feb51 Fix the read/write flag for these registers on AArch64
The previous constraints were based on information already in opcodes and it
seems that a few of them were wrong.  I have now hand verified the ones changed
by the previous patch and corrected where needed.

This prevents a warning to be issued when one shouldn't be.

opcodes/

	PR binutils/23369
	* aarch64-opc.c (aarch64_sys_regs): Make read/write csselr_el1,
	vsesr_el2, osdtrrx_el1, osdtrtx_el1, pmsidr_el1.

gas/testsuite/

	PR binutils/23369
	* gas/aarch64/msr.d (csselr_el1,
	vsesr_el2, osdtrrx_el1, osdtrtx_el1, pmsidr_el1): New.
	* gas/aarch64/msr.s: Likewise.
2018-07-06 16:17:17 +01:00
Nick Clifton
2e48456f02 Fix the relocs created to adjust notes created by the assembler.
* write.c (maybe_generate_build_notes): Bias reloc offsets by the
	number of notes already generated.
2018-07-06 11:46:14 +01:00
Nick Clifton
d8dab05495 Updated Russian, Bulgarian, and Brazilian Portuguese translations for various components of the binutuls.
ld	* po/bg.po: Updated Bulgarian translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.

binutils* po/bg.po: Updated Bulgarian translation.

bfd,gas	* po/ru.po: Updated Russian translation.
2018-07-05 12:16:56 +01:00
Maciej W. Rozycki
14c80123c0 microMIPS/GAS: Handle several percent-ops with macros
In the microMIPS mode also accept %half, %got, %call, %got_hi, %got_lo,
%call_hi, %call_lo, %neg, %got_page, %highest, %got_disp, %tlsgd,
%tlsldm, %dtprel_hi, %dtprel_lo, %gottprel, %tprel_hi and %tprel_lo
percent-ops with macros, so that they can be used with instructions that
expand into sequences if relocation is required due to their limited
offset span, such as LL, LWL, etc., fixing GAS assertions:

.../gas/testsuite/gas/mips/elf-rel28.s: Assembler messages:
.../gas/testsuite/gas/mips/elf-rel28.s:17: Internal error in macro_build at .../gas/config/tc-mips.c:8854.
Please report this bug.

observed if an attempt is made to assemble the `elf-rel28.s' test case
modified to use one of the affected instructions to microMIPS code.

	gas/
	* config/tc-mips.c (macro_build) <'i', 'j'>: Also accept
	BFD_RELOC_16, BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_CALL16,
	BFD_RELOC_MIPS_GOT_HI16, BFD_RELOC_MIPS_GOT_LO16,
	BFD_RELOC_MIPS_CALL_HI16, BFD_RELOC_MIPS_CALL_LO16,
	BFD_RELOC_MIPS_SUB, BFD_RELOC_MIPS_GOT_PAGE,
	BFD_RELOC_MIPS_HIGHEST, BFD_RELOC_MIPS_GOT_DISP,
	BFD_RELOC_MIPS_TLS_GD, BFD_RELOC_MIPS_TLS_LDM,
	BFD_RELOC_MIPS_TLS_DTPREL_HI16, BFD_RELOC_MIPS_TLS_DTPREL_LO16,
	BFD_RELOC_MIPS_TLS_GOTTPREL, BFD_RELOC_MIPS_TLS_TPREL_HI16 and
	BFD_RELOC_MIPS_TLS_TPREL_LO16 relocations if in the microMIPS
	mode.
	* testsuite/gas/mips/elf-rel28-lldscd-n32.d: New test.
	* testsuite/gas/mips/elf-rel28-lldscd-micromips-n32.d: New test.
	* testsuite/gas/mips/elf-rel28-lldscd-n64.d: New test.
	* testsuite/gas/mips/elf-rel28-lldscd-micromips-n64.d: New test.
	* testsuite/gas/mips/elf-rel28.s: Add instruction selection.
	* testsuite/gas/mips/mips.exp: Run the new tests.
2018-07-02 23:57:22 +01:00
Maciej W. Rozycki
156f2c001e microMIPS/BFD: Add missing NewABI TLS and miscellaneous relocations
Complement commit df58fc944d ("MIPS: microMIPS ASE support"),
<https://sourceware.org/ml/binutils/2011-07/msg00198.html>, and add TLS
and a few miscellaneous relocations to NewABI microMIPS support, fixing
GAS assertion failures:

.../gas/testsuite/gas/mips/elf-rel28.s: Assembler messages:
.../gas/testsuite/gas/mips/elf-rel28.s:19: Internal error in append_insn at .../gas/config/tc-mips.c:7660.
Please report this bug.

observed if an attempt is made to assemble the `elf-rel28.s' test case
to microMIPS code.  The relocations are the same as with o32 support,
except for `partial_inplace' and `src_mask' updates for the respective
RELA variants.

	bfd/
	* elf64-mips.c (micromips_elf64_howto_table_rel): Add
	R_MICROMIPS_HI0_LO16, R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM,
	R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_DTPREL_LO16,
	R_MICROMIPS_TLS_GOTTPREL, R_MICROMIPS_TLS_TPREL_HI16,
	R_MICROMIPS_TLS_TPREL_LO16, R_MICROMIPS_GPREL7_S2 and
	R_MICROMIPS_PC23_S2 relocation entries.
	(micromips_elf64_howto_table_rela): Likewise.
	(micromips_reloc_map): Likewise.
	* elfn32-mips.c (elf_micromips_howto_table_rel): Likewise.
	(elf_micromips_howto_table_rela): Likewise.
	(micromips_reloc_map): Likewise.

	gas/
	* testsuite/gas/mips/elf-rel28-micromips-n32.d: New test.
	* testsuite/gas/mips/elf-rel28-micromips-n64.d: New test.
	* testsuite/gas/mips/mips.exp: Run the new tests.
2018-07-02 23:57:22 +01:00
Thomas Preud'homme
c0c468d562 [ARM] Update bfd's Tag_CPU_arch knowledge
BFD's bfd_get_mach () function returns a bfd specific value representing
the architecture of the target which is populated from the Tag_CPU_arch
build attribute value of that target. Among other users of that
interfacem, objdump which uses it to print the architecture version of
the binary being examinated and to decide what instruction is available
if run with "-m arm" via its own mapping from bfd_mach_arm_X values to
feature bits available.

However, both BFD and objdump's most recent known architecture is
Armv5TE. When encountering a newer architecture bfd_get_mach will return
bfd_mach_arm_unknown. This is unfortunate since objdump uses that value
to allow all instructions on all architectures which is already what it
does by default, making the "-m arm" trick useless.

This patch updates BFD and objdump's knowledge of Arm architecture
versions up to the latest Armv8-M Baseline and Mainline, Armv8-R and
Armv8.4-A architectures. Since several architecture versions (eg. 8.X-A)
share the same Tag_CPU_arch build attribute value and
bfd_mach_arm values, the mapping from bfd machine value to feature bits
need to return the most featureful feature bits that would yield the
given bfd machine value otherwise some instruction would not disassemble
under "-m arm" mode. The patch rework that mapping to make this clearer
and simplify writing the mapping rules. In particular, for simplicity
all FPU instructions are allowed in all cases.

Finally, the patch also rewrite the cpu_arch_ver table in GAS to use the
TAG_CPU_ARCH_X macros rather than hardcode their value.

2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* archures.c (bfd_mach_arm_5TEJ, bfd_mach_arm_6, bfd_mach_arm_6KZ,
	bfd_mach_arm_6T2, bfd_mach_arm_6K, bfd_mach_arm_7, bfd_mach_arm_6M,
	bfd_mach_arm_6SM, bfd_mach_arm_7EM, bfd_mach_arm_8, bfd_mach_arm_8R,
	bfd_mach_arm_8M_BASE, bfd_mach_arm_8M_MAIN): Define.
	* bfd-in2.h: Regenerate.
	* cpu-arm.c (arch_info_struct): Add entries for above new
	bfd_mach_arm values.
	* elf32-arm.c (bfd_arm_get_mach_from_attributes): Add Tag_CPU_arch to
	bfd_mach_arm mapping logic for pre Armv4 and Armv5TEJ and later
	architectures.  Force assert failure for any new Tag_CPU_arch value.

gas/
	* config/tc-arm.c (cpu_arch_ver): Use symbolic TAG_CPU_ARCH macros
	rather than hardcode their values.

ld/
	* arm-dis.c (select_arm_features): Fix typo in heading comment.  Allow
	all FPU features and add mapping from new bfd_mach_arm values to
	allowed CPU feature bits.

opcodes/
	* testsuite/ld-arm/tls-descrelax-be8.d: Add architecture version in
	expected result.
	* testsuite/ld-arm/tls-descrelax-v7.d: Likewise.
	* testsuite/ld-arm/tls-longplt-lib.d: Likewise.
	* testsuite/ld-arm/tls-longplt.d: Likewise.
2018-07-02 11:22:20 +01:00
Thomas Preud'homme
a05a5b64cf Fix use of "command line X" in binutils doc
Binutils documentation uses a mix of spelling for the compound word
"command-line X". According to [1]:

"Sometimes compound words are written separately (nail polish),
sometimes with a hyphen (short-sighted) and sometimes as one word
(eyelashes). Often new compounds are written as two separate words and,
as they become more familiar, they are either connected with a hyphen
(-) or made into one word."

I think command-line X is common enough in our industry that the two
workds command and line should be connected. Since command-line is more
common than commandline, I propose to update binutils documentation to
consistently use "command-line" when this is used as an adjective to a
noun (eg. command-line argument, command-line switch, command-line
option and command-line flag). I've left occurences of "the command
line" as is. I've also left gdb, sim and readline alone and have only
touched public documentation (texi and NEWS files).

[1]
http://dictionary.cambridge.org/grammar/british-grammar/word-formation/compounds

2018-07-02  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* doc/bfdint.texi: Use command-line consistently when used in a
	compount word.
	* doc/bfdsumm.texi: Likewise.

binutils/
	* NEWS: Use command-line consistently when used in a compount word.
	* doc/binutils.texi: Likewise and fix trailing whitespace on same
	line.

gas/
	* NEWS: Use command-line consistently when used in a compount word.
	* doc/as.texi: Likewise.
	* doc/c-aarch64.texi: Likewise.
	* doc/c-alpha.texi: Likewise.
	* doc/c-arc.texi: Likewise.
	* doc/c-arm.texi: Likewise.
	* doc/c-avr.texi: Likewise.
	* doc/c-bfin.texi: Likewise.
	* doc/c-cris.texi: Likewise.
	* doc/c-epiphany.texi: Likewise.
	* doc/c-i386.texi: Likewise.
	* doc/c-ia64.texi: Likewise.
	* doc/c-lm32.texi: Likewise.
	* doc/c-m32r.texi: Likewise.
	* doc/c-m68k.texi: Likewise.
	* doc/c-mips.texi: Likewise.
	* doc/c-mmix.texi: Likewise.
	* doc/c-msp430.texi: Likewise.
	* doc/c-mt.texi: Likewise.
	* doc/c-nios2.texi: Likewise.
	* doc/c-ppc.texi: Likewise.
	* doc/c-pru.texi: Likewise.
	* doc/c-rl78.texi: Likewise.
	* doc/c-rx.texi: Likewise.
	* doc/c-tic6x.texi: Likewise.
	* doc/c-v850.texi: Likewise.
	* doc/c-vax.texi: Likewise.
	* doc/c-visium.texi: Likewise.
	* doc/c-xstormy16.texi: Likewise.
	* doc/c-xtensa.texi: Likewise.
	* doc/c-z80.texi: Likewise.
	* doc/c-z8k.texi: Likewise.
	* doc/internals.texi: Likewise.

gprof/
	* gprof.texi: Use command-line consistently when used in a compount
	word.

ld/
	* NEWS: Use command-line consistently when used in a compount word.
	* ld.texinfo: Likewise.
	* ldint.texinfo: Likewise.
2018-07-02 11:18:24 +01:00
Jim Wilson
b9c04e5a82 RISC-V: Add gas support for "fp" register.
gas/
	* config/tc-riscv.c (md_begin): Call hash_reg_name for "fp".
2018-06-29 15:12:23 -07:00
Ramana Radhakrishnan
ee94397044 [Patch AArch64] Warn on unpredictable stlxrb , stlxrh and stlxr cases.
A recent case in golang highlighted that gas wasn't warning on these
unpredictable cases in the architecture. Fixed thusly.

I need to audit gcc to make sure we have early clobbers on the
patterns but that's a separate patch.

Tested aarch64-none-elf and gas

Ok ?

Ramana

2018-06-29 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

        * config/tc-aarch64.c (warn_unpredictable_ldst): Add
        unpredictable cases for ldxp, stlxrb, stlxrh, stlxr.  *
        testsuite/gas/aarch64/diagnostic.s: New tests.  *
        testsuite/gas/aarch64/diagnostic.l: Adjust.
2018-06-29 13:06:05 +01:00
Tamar Christina
369c9167d4 Fix AArch64 encodings for by element instructions.
Some instructions in Armv8-a place a limitation on FP16 registers that can be
used as the register from which to select an element from.

e.g. fmla restricts Rm to 4 bits when using an FP16 register.  This restriction
does not apply for all instructions, e.g. fcmla does not have this restriction
as it gets an extra bit from the M field.

Unfortunately, this restriction to S_H was added for all _Em operands before,
meaning for a large number of instructions you couldn't use the full register
file.

This fixes the issue by introducing a new operand _Em16 which applies this
restriction only when paired with S_H and leaves the _Em and the other
qualifiers for _Em16 unbounded (i.e. using the full 5 bit range).

Also the patch updates all instructions that should be affected by this.

opcodes/

	PR binutils/23192
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.
	* aarch64-dis.c (aarch64_ext_reglane): Add AARCH64_OPND_Em16 constraint.
	* aarch64-opc.c (operand_general_constraint_met_p,
	aarch64_print_operand): Likewise.
	* aarch64-tbl.h (aarch64_opcode_table): Change Em to Em16 for smlal,
	smlal2, fmla, fmls, fmul, fmulx, sqrdmlah, sqrdlsh, fmlal, fmlsl,
	fmlal2, fmlsl2.
	(AARCH64_OPERANDS): Add Em2.

gas/

	PR binutils/23192
	* config/tc-aarch64.c (process_omitted_operand, parse_operands): Add
	AARCH64_OPND_Em16
	* testsuite/gas/aarch64/advsimd-armv8_3.s: Expand tests to cover upper
	16 registers.
	* testsuite/gas/aarch64/advsimd-armv8_3.d: Likewise.
	* testsuite/gas/aarch64/advsimd-compnum.s: Likewise.
	* testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
	* testsuite/gas/aarch64/sve.d: Likewise.

include/

	PR binutils/23192
	*opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
2018-06-29 12:14:42 +01:00
Alan Modra
e11078da44 gas object file locations
With the update to newer autotools, some gas object files are now
built in config/, breaking xtensa-elf and ia64-vms.  This patch fixes
the dependencies.

	* configure.ac: Specify extra_objects with leading "config/"
	for xtensa-relax.o and te-vms.o.  Use case statements to unique
	extra_objects.  Formatting.
	* configure: Regenerate.
2018-06-27 17:26:52 +09:30
Nick Clifton
30aa13067f Updated translations.
gas	* po/uk.po: Updated Ukranian translation.
bfd	* po/uk.po: Updated Ukranian translation.
ld	* po/uk.po: Updated Ukranian translation.
gold	* po/uk.po: Updated Ukranian translation.

opcodes	* po/uk.po: Updated Ukranian translation.
	* po/de.po: Updated German translation.
	* po/pt_BR.po: Updated Brazilian Portuguese translation.

binutils* po/sv.po: Updated Swedish translation.
	* po/uk.po: Updated Ukranian translation.
2018-06-26 14:03:16 +01:00
Nick Clifton
791755f59d Fix the MSP430 assembler's parsing of register names.
PR 23335
	* config/tc-msp430.c (check_reg): Only accept register name
	strings that do not end in an alphanumeric character.
	* testsuite/gas/msp430/msp430x.d: Update expected disassembly.
2018-06-26 13:40:13 +01:00
Nick Clifton
71300e2c0c Regenerate configure and pot files with updated binutils version number. 2018-06-24 19:13:01 +01:00
Nick Clifton
719d828850 Add 2.30 branch notes to ChangeLogs and NEWS files. 2018-06-24 18:36:15 +01:00
Tamar Christina
514cd3a0f5 Correct negs aliasing on AArch64.
This patch fixes a disassembly issue with the aliases to subs with a shifted
register.  The subs instruction with the zero register as destination is
supposed to alias to cmp and when the first input register is the zero register
the subs is supposed to be aliased to negs.

This means that a subs with destination and first input registers the zero
register is supposed to be a cmp.

This is done by raising the priority of the cmp alias.

opcodes/

	* aarch64-tbl.h (aarch64_opcode_table): Fix alias flag for negs
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.

gas/

	* testsuite/gas/aarch64/addsub.s: Add negs to zero reg test.
	* testsuite/gas/aarch64/addsub.d: Likewise.
2018-06-22 12:32:19 +01:00
Alan Modra
d388f64333 Regen doc/Makefile.in
Also make the automake strictness "foreign".  My regeneration of the
three doc/Makefile.in files already had --foreign in the automake
invocation, so this just makes it explicit.

bfd/
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
	* doc/Makefile.in: Regenerate.
binutils/
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
	* doc/Makefile.in: Regenerate.
gas/
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Add "foreign".
	* doc/Makefile.in: Regenerate.
zlib/
	* Makefile.in: Regenerate.
2018-06-21 23:00:05 +09:30
Nick Clifton
fc6141f097 Change the ARM assembler's ADR and ADRl pseudo-ops so that they will only set the bottom bit of imported thumb function symbols if the -mthumb-interwork option is active.
For more information see the email thread starting here:
https://www.sourceware.org/ml/binutils/2018-05/msg00348.html

	PR 21458
	* tc-arm.c (do_adr): Only set the bottom bit of an imported thumb
	function symbol address if -mthumb-interwork is active.
	(do_adrl): Likewise.
	* doc/c-arm.texi: Update descriptions of the -mthumb-interwork
	option and the ADR and ADRL pseudo-ops.
	* NEWS: Mention the new behaviour of the ADR and ADRL pseudo-ops.
	* testsuite/gas/arm/pr21458.d: Add -mthumb-interwork option to
	assembler command line.
	* testsuite/gas/arm/adr.d: Likewise.
	* testsuite/gas/arm/adrl.d: Likewise.
2018-06-20 12:38:10 +01:00
Sebastian Huber
160d1b3d74 RISC-V: Accept constant operands in la and lla
opcodes/
	PR gas/23305
	* riscv-opc.c (riscv_opcodes): Use new format specifier 'B' for
	la and lla.

gas/
	PR gas/23305
	* config/tc-riscv.c (riscv_ip): Add format specifier 'B' for
	constants and symbols.
	* testsuite/gas/riscv/lla32.d: New file.
	* testsuite/gas/riscv/lla32.s: Likewise.
	* testsuite/gas/riscv/lla64-fail.d: Likewise.
	* testsuite/gas/riscv/lla64-fail.l: Likewise.
	* testsuite/gas/riscv/lla64-fail.s: Likewise.
	* testsuite/gas/riscv/lla64.d: Likewise.
	* testsuite/gas/riscv/lla64.s: Likewise.
2018-06-20 07:24:25 +02:00
Simon Marchi
d0ac1c4488 Bump to autoconf 2.69 and automake 1.15.1
When trying to run the update-gnulib.sh script in gdb, I get this:

Error: Wrong automake version (Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\${ <-- HERE ([^      =:+{}]+)}/ at /opt/automake/1.11.1/bin/automake line 4113.), we need 1.11.1.
Aborting.

Apparently, it's an issue with a regex in automake that triggers a
warning starting with Perl 5.22.  It has been fixed in automake 1.15.1.
So I think it's a good excuse to bump the versions of autoconf and
automake used in the gnulib import.  And to avoid requiring multiple
builds of autoconf/automake, it was suggested that we bump the required
version of those tools for all binutils-gdb.

For autoconf, the 2.69 version is universally available, so it's an easy
choice.  For automake, different distros and distro versions have
different automake versions.  But 1.15.1 seems to be the most readily
available as a package.  In any case, it's easy to build it from source.

I removed the version checks from AUTOMAKE_OPTIONS and AC_PREREQ,
because I don't think they are useful in our case.  They only specify a
lower bound for the acceptable version of automake/autoconf.  That's
useful if you let the user choose the version of the tool they want to
use, but want to set a minimum version (because you use a feature that
was introduced in that version).  In our case, we force people to use a
specific version anyway.  For the autoconf version, we have the check in
config/override.m4 that enforces the version we want.  It will be one
less thing to update next time we change autotools version.

I hit a few categories of problems that required some changes.  They are
described below along with the chosen solutions.

Problem 1:

  configure.ac:17: warning: AM_INIT_AUTOMAKE: two- and three-arguments forms are deprecated.  For more info, see:
  configure.ac:17: http://www.gnu.org/software/automake/manual/automake.html#Modernize-AM_005fINIT_005fAUTOMAKE-invocation

Solution 1:

  Adjust the code based on the example at that URL.

Problem 2 (in zlib/):

  Makefile.am: error: required file './INSTALL' not found
  Makefile.am:   'automake --add-missing' can install 'INSTALL'
  Makefile.am: error: required file './NEWS' not found
  Makefile.am: error: required file './AUTHORS' not found
  Makefile.am: error: required file './COPYING' not found
  Makefile.am:   'automake --add-missing' can install 'COPYING'

Solution 2:

  Add the foreign option to AUTOMAKE_OPTIONS.

Problem 3:

  doc/Makefile.am:20: error: support for Cygnus-style trees has been removed

Solution 3:

  Remove the cygnus options.

Problem 4:

  Makefile.am:656: warning: 'INCLUDES' is the old name for 'AM_CPPFLAGS' (or '*_CPPFLAGS')

Solution 4:

  Rename "INCLUDES = " to "AM_CPPFLAGS += " (because AM_CPPFLAGS is
  already defined earlier).

Problem 5:

  doc/Makefile.am:71: warning: suffix '.texinfo' for Texinfo files is discouraged; use '.texi' instead
  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 5:

  Rename .texinfo files to .texi.

Problem 6:

  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 6:

  Remove the hack at the bottom of doc/Makefile.am and use
  the info-in-builddir automake option.

Problem 7:

  doc/Makefile.am:35: error: required file '../texinfo.tex' not found
  doc/Makefile.am:35:   'automake --add-missing' can install 'texinfo.tex'

Solution 7:

  Use the no-texinfo.tex automake option.  We also have one in
  texinfo/texinfo.tex, not sure if we should point to that, or move it
  (or a newer version of it added with automake --add-missing) to
  top-level.

Problem 8:

  Makefile.am:131: warning: source file 'config/tc-aarch64.c' is in a subdirectory,
  Makefile.am:131: but option 'subdir-objects' is disabled
  automake: warning: possible forward-incompatibility.
  automake: At least a source file is in a subdirectory, but the 'subdir-objects'
  automake: automake option hasn't been enabled.  For now, the corresponding output
  automake: object file(s) will be placed in the top-level directory.  However,
  automake: this behaviour will change in future Automake versions: they will
  automake: unconditionally cause object files to be placed in the same subdirectory
  automake: of the corresponding sources.
  automake: You are advised to start using 'subdir-objects' option throughout your
  automake: project, to avoid future incompatibilities.

Solution 8:

  Use subdir-objects, that means adjusting references to some .o that will now
  be in config/.

Problem 9:

  configure.ac:375: warning: AC_LANG_CONFTEST: no AC_LANG_SOURCE call detected in body
  ../../lib/autoconf/lang.m4:193: AC_LANG_CONFTEST is expanded from...
  ../../lib/autoconf/general.m4:2601: _AC_COMPILE_IFELSE is expanded from...
  ../../lib/autoconf/general.m4:2617: AC_COMPILE_IFELSE is expanded from...
  ../../lib/m4sugar/m4sh.m4:639: AS_IF is expanded from...
  ../../lib/autoconf/general.m4:2042: AC_CACHE_VAL is expanded from...
  ../../lib/autoconf/general.m4:2063: AC_CACHE_CHECK is expanded from...
  configure.ac:375: the top level

Solution 9:

  Use AC_LANG_SOURCE, or use proper quoting.

Problem 10 (in intl/):

  configure.ac:7: warning: AC_COMPILE_IFELSE was called before AC_USE_SYSTEM_EXTENSIONS
  /usr/share/aclocal/threadlib.m4:36: gl_THREADLIB_EARLY_BODY is expanded from...
  /usr/share/aclocal/threadlib.m4:29: gl_THREADLIB_EARLY is expanded from...
  /usr/share/aclocal/threadlib.m4:318: gl_THREADLIB is expanded from...
  /usr/share/aclocal/lock.m4:9: gl_LOCK is expanded from...
  /usr/share/aclocal/intl.m4:211: gt_INTL_SUBDIR_CORE is expanded from...
  /usr/share/aclocal/intl.m4:25: AM_INTL_SUBDIR is expanded from...
  /usr/share/aclocal/gettext.m4:57: AM_GNU_GETTEXT is expanded from...
  configure.ac:7: the top level

Solution 10:

  Add AC_USE_SYSTEM_EXTENSIONS in configure.ac.

ChangeLog:

	* libtool.m4: Use AC_LANG_SOURCE.
	* configure.ac: Remove AC_PREREQ, use AC_LANG_SOURCE.
	* README-maintainer-mode: Update version requirements.
	* ar-lib: New file.
	* test-driver: New file.
	* configure: Re-generate.

bfd/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	(INCLUDES): Rename to ...
	(AM_CPPFLAGS): ... this.
	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9, cygnus, add
	info-in-builddir no-texinfo.tex.
	(info_TEXINFOS): Rename bfd.texinfo to bfd.texi.
	* doc/bfd.texinfo: Rename to ...
	* doc/bfd.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

binutils/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove cygnus, add
	info-in-builddir no-texinfo.tex.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

config/ChangeLog:

	* override.m4 (_GCC_AUTOCONF_VERSION): Bump from 2.64 to 2.69.

etc/ChangeLog:

	* configure.in: Remove AC_PREREQ.
	* configure: Re-generate.

gas/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
	(TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
	* configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
	extra_objects): Add config/ prefix.
	* doc/as.texinfo: Rename to...
	* doc/as.texi: ... this.
	* doc/Makefile.am: Rename as.texinfo to as.texi throughout.
	Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
	info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gdb/ChangeLog:

	* common/common-defs.h (PACKAGE_NAME, PACKAGE_VERSION,
	PACKAGE_STRING, PACKAGE_TARNAME): Undefine.
	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* gnulib/configure.ac: Modernize usage of
	AC_INIT/AM_INIT_AUTOMAKE.  Remove AC_PREREQ.
	* gnulib/update-gnulib.sh (AUTOCONF_VERSION): Bump to 2.69.
	(AUTOMAKE_VERSION): Bump to 1.15.1.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.
	* gnulib/aclocal.m4: Re-generate.
	* gnulib/config.in: Re-generate.
	* gnulib/configure: Re-generate.
	* gnulib/import/Makefile.in: Re-generate.

gdb/gdbserver/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.

gdb/testsuite/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.

gold/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting and usage
	of AC_LANG_SOURCE.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* testsuite/Makefile.in: Re-generate.

gprof/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.11, add info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* gconfig.in: Re-generate.

intl/ChangeLog:

	* configure.ac: Add AC_USE_SYSTEM_EXTENSIONS, remove AC_PREREQ.
	* configure: Re-generate.
	* config.h.in: Re-generate.
	* aclocal.m4: Re-generate.

ld/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack, rename ld.texinfo to
	ld.texi, ldint.texinfo to ldint.texi throughout.
	(AUTOMAKE_OPTIONS): Add info-in-builddir.
	* README: Rename ld.texinfo to ld.texi, ldint.texinfo to
	ldint.texi throughout.
	* gen-doc.texi: Likewise.
	* h8-doc.texi: Likewise.
	* ld.texinfo: Rename to ...
	* ld.texi: ... this.
	* ldint.texinfo: Rename to ...
	* ldint.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.

libdecnumber/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* aclocal.m4.

libiberty/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* config.in: Re-generate.

opcodes/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	* configure.ac: Remove AC_PREREQ.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.

readline/ChangeLog.gdb:

	* configure: Re-generate.
	* examples/rlfe/configure: Re-generate.

sim/ChangeLog:

	* All configure.ac: Remove AC_PREREQ.
	* All configure: Re-generate.

zlib/ChangeLog.bin-gdb:

	* configure.ac: Modernize AC_INIT call, remove AC_PREREQ.
	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add
	foreign.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
2018-06-19 16:55:06 -04:00
Faraz Shahbazker
6f20c942c3 MIPS: Add Global INValidate ASE support
Add support for the Global INValidate Application Specific Extension
for Release 6 of the MIPS Architecture.

[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
    Instruction Set Manual", Imagination Technologies Ltd., Document
    Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
    "Alphabetical List of Instructions", pp. 187-191

bfd/
	* elfxx-mips.c (print_mips_ases): Add GINV extension.

binutils/
	* readelf.c (print_mips_ases): Add GINV extension.

gas/
	* NEWS: Mention MIPS Global INValidate ASE support.
	* config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
	(md_longopts): Likewise.
	(mips_ases): Define availability for GINV.
	(mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
	(md_show_usage): Add help for -mginv and -mno-ginv.
	* doc/as.texinfo: Document -mginv, -mno-ginv.
	* doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
	.set noginv.
	* testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
	ASE.
	* testsuite/gas/mips/ase-errors-2.s: Likewise.
	* testsuite/gas/mips/ase-errors-1.l: Likewise.
	* testsuite/gas/mips/ase-errors-2.l: Likewise.
	* testsuite/gas/mips/ginv.d: New test.
	* testsuite/gas/mips/ginv-err.d: New test.
	* testsuite/gas/mips/ginv-err.l: New test stderr output.
	* testsuite/gas/mips/ginv.s: New test source.
	* testsuite/gas/mips/ginv-err.s: New test source.
	* testsuite/gas/mips/mips.exp: Run the new tests.

include/
	* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
	(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
	* opcode/mips.h: Document "+\" operand format.
	(ASE_GINV): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and
	mips64r6 descriptors.
	(parse_mips_ase_option): Handle -Mginv option.
	(print_mips_disassembler_options): Document -Mginv.
	* mips-opc.c (decode_mips_operand) <+\>: New operand format.
	(GINV): New macro.
	(mips_opcodes): Define ginvi and ginvt.
2018-06-14 21:34:49 +01:00