Commit Graph

2322 Commits

Author SHA1 Message Date
Chris Demetriou 577d8c4b5a 2002-06-07 Chris Demetriou <cgd@broadcom.com>
* cp1.c (convert): Remove unusable debugging code, and move MIPS
	rounding mode to sim FP rounding mode flag conversion code into...
	(rounding_mode): New function.
2002-06-07 16:50:42 +00:00
Chris Demetriou 196496eda0 2002-06-07 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up formatting of a few comments.
	(value_fpr): Reformat switch statement.
2002-06-07 16:43:19 +00:00
Chris Demetriou cfe9ea23c7 2002-06-06 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* cp1.h: New file.
	* sim-main.h: Include cp1.h.
	(SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
	(FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
	(FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
	(FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
	(value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
	(ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
	* cp1.c: Don't include sim-fpu.h; already included by
	sim-main.h.  Clean up formatting of some comments.
	(NaN, Equal, Less): Remove.
	(test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
	(fp_cmp): New functions.
	* mips.igen (do_c_cond_fmt): Remove.
	(C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
	Compare.  Add result tracing.
	(CxC1): Remove, replace with...
	(CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
	(DMxC1): Remove, replace with...
	(DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
	(MxC1): Remove, replace with...
	(MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
2002-06-07 00:13:24 +00:00
Andrew Cagney c93abbccf2 * Makefile.in (ChangeLog): New makefile variable.
* README-HACKING: Mention the ChangeLog makefile variable.
2002-06-06 16:33:45 +00:00
Andrew Cagney 73fa0d3fb2 * writecode.c (lookup_inst): Generate inverse table on-the-fly.
(z8k_inv_list): Delete global.
(DIRTY_HACK): Delete macro.
(makelist): Delete global.
(main): Delete code making a list.  Delete dirty hack code.  Use
lookup_inst instead of z8k_inv_list.
* list.c: Delete file.
* Makefile.in (writecode): Do not link in list.o.
(list.o): Delete target.
2002-06-06 15:50:50 +00:00
Chris Demetriou ee7254b0cc 2002-06-04 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (FGRIDX): Remove, replace all uses with...
        (FGR_BASE): New macro.
        (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
        (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
        (NR_FGR, FGR): Likewise.
        * interp.c: Replace all uses of FGRIDX with FGR_BASE.
        * mips.igen: Likewise.
2002-06-04 22:38:41 +00:00
Chris Demetriou d3eb724f81 2002-06-04 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Add an FSF Copyright notice to this file.
2002-06-04 16:35:24 +00:00
Chris Demetriou ba46ddd0cf 2002-06-04 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

        * cp1.c (Infinity): Remove.
        * sim-main.h (Infinity): Likewise.

        * cp1.c (fp_unary, fp_binary): New functions.
        (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
        (fp_sqrt): New functions, implemented in terms of the above.
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (Recip, SquareRoot): Remove (replaced by functions above).
        * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
        (fp_recip, fp_sqrt): New prototypes.
        (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
        (Recip, SquareRoot): Replace prototypes with #defines which
        invoke the functions above.
2002-06-04 16:17:20 +00:00
Chris Demetriou 18d8a52d00 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
        (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
        file, remove PARAMS from prototypes.
        (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
        simulator state arguments.
        (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
        pass simulator state arguments.
        * cp1.c (SD): Redefine as CPU_STATE(cpu).
        (store_fpr, convert): Remove 'sd' argument.
        (value_fpr): Likewise.  Convert to use 'SD' instead.
2002-06-04 01:35:23 +00:00
Chris Demetriou 0f154cbd1c 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c (Min, Max): Remove #if 0'd functions.
        * sim-main.h (Min, Max): Remove.
2002-06-04 00:18:46 +00:00
Chris Demetriou e80fc1523d 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: fix formatting of switch case and default labels.
        * interp.c: Likewise.
        * sim-main.c: Likewise.
2002-06-03 22:30:52 +00:00
Chris Demetriou bad673a9cb 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up comments which describe FP formats.
	 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
2002-06-03 22:05:15 +00:00
Chris Demetriou 7cbea0890e 2002-06-03 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* configure.in (mipsisa64sb1*-*-*): New target for supporting
	Broadcom SiByte SB-1 processor configurations.
	* configure: Regenerate.
	* sb1.igen: New file.
	* mips.igen: Include sb1.igen.
	(sb1): New model.
	* Makefile.in (IGEN_INCLUDE): Add sb1.igen.
	* mdmx.igen: Add "sb1" model to all appropriate functions and
	instructions.
	* mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
	(ob_func, ob_acc): Reference the above.
	(qh_acc): Adjust to keep the same size as ob_acc.
	* sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
	(MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
2002-06-03 21:00:29 +00:00
Chris Demetriou 909daa8222 2002-06-03 Chris Demetriou <cgd@broadcom.com>
* Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
2002-06-03 18:35:19 +00:00
Richard Henderson 4e62efb8f8 * gen-engine.c (print_run_body): Avoid multi-line strings.
* lf.c (lf_print__gnu_copyleft): Likewise.
2002-06-03 16:04:31 +00:00
Elena Zannoni 676ab6a01e Use current date in ChangeLog entry. 2002-06-03 00:47:14 +00:00
Elena Zannoni c7675842d8 2002-05-28 Elena Zannoni <ezannoni@redhat.com>
From Jason Eckhardt <jle@redhat.com>
        * d10v_sim.h (INC_ADDR): Correctly handle the case where MOD_E is
        less than MOD_S (post-decrement).
2002-06-03 00:36:02 +00:00
Chris Demetriou f4f1b9f102 2002-06-02 Chris Demetriou <cgd@broadcom.com>
Ed Satterthwaite  <ehs@broadcom.com>

	* mips.igen (mdmx): New (pseudo-)model.
	* mdmx.c, mdmx.igen: New files.
	* Makefile.in (SIM_OBJS): Add mdmx.o.
	* sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
	New typedefs.
	(ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
	(MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
	(MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
	(MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
	(MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
	(MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
	(MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
	(MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
	(MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
	(MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
	(MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
	(MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
	(SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
	(qh_fmtsel): New macros.
	(_sim_cpu): New member "acc".
	(mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
	(mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
2002-06-02 07:39:26 +00:00
Andrew Cagney e4045cdb95 Delete TiC80, no longer supported by GDB. 2002-06-01 23:23:28 +00:00
Andrew Cagney 18c0df9e1b Fill-out d10v enum so that there are no ``=''. 2002-06-01 18:15:43 +00:00
Kazu Hirata dbec3bef45 * run.c: Fix formatting. 2002-05-31 02:17:26 +00:00
DJ Delorie d7a97a9b1c * lf.c (lf_print__gnu_copyleft): Convert multiline strings to
compatible format.
* gen-idecode.c (print_run_until_stop_body): Likewise.
* gen-model.c (gen_model_c): Likewise.
2002-05-30 15:07:06 +00:00
Nick Clifton 5aa682b2e0 Set the FSR and FAR registers if a Data Abort is detected. 2002-05-29 19:01:36 +00:00
Elena Zannoni 1aa5e64f43 2002-05-28 Elena Zannoni <ezannoni@redhat.com>
* interp.c (sim_create_inferior): Add comment.

	From Alan Matsuoka <alanm@redhat.com>:
	From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
	* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
	(OP_4401): Output "mvf0t" instead of "mf0t".
	(OP_460B): Do not output a flag register.
	(OP_4609): Do not output a flag register.
2002-05-28 15:49:52 +00:00
Nick Clifton 10b57fcbd7 Only perform access checks if 'check' is set.
Report unknown machine numbers.
Formatting tidy ups.
2002-05-27 14:12:00 +00:00
Nick Clifton 7378e198a5 Thumb BL instruction: Do not set LR to pc + 2, it has already been advanced. 2002-05-27 13:30:36 +00:00
Andrew Cagney b91b96f4f6 * sim-d10v.h: Delete file. Moved to include/gdb/.
* sim-d10v.h: New file.  Moved from include/sim-d10v.h.

* Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
* interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".

* d10v-tdep.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* Makefile.in (sim_d10v_h): Update definition.
2002-05-24 00:12:18 +00:00
Nick Clifton 2984e11475 When decoding a BLX(1) instruction do not add in the second bit of the base
address - this has already been accounted for.
2002-05-23 12:38:31 +00:00
Nick Clifton 8b2440b731 Simulate XScale BCUMOD register 2002-05-21 20:28:26 +00:00
Nick Clifton de4112fa38 Add support for target specific command line switches to old-style simualtors.
Make use of this support in the ARM simulator to add a --swi-support= switch
to select whcih SWI protocols to emulate.
2002-05-20 14:32:50 +00:00
Kazu Hirata d13351445b * compile.c: Fix formatting. 2002-05-19 12:52:54 +00:00
Kazu Hirata c3f4437ee1 * compile.c: Fix formatting. 2002-05-18 11:40:19 +00:00
Andrey Volkov 6147b1f62b * compile.c: Add absented opcodes: LDC, STC, EEPMOV, TAS. 2002-05-17 19:22:14 +00:00
Andrey Volkov fc97460264 h8300: Add support of EXR register 2002-05-17 19:19:24 +00:00
Andrey Volkov a8cdafbd4e * h8300s now new target, not alias of h8300h 2002-05-17 19:09:13 +00:00
Andrey Volkov f6225c9615 *compile.c: Add additional CCR flags (I,UI,H,U) 2002-05-17 18:55:13 +00:00
Andrey Volkov 3b02cf9281 * compile.c: Change literal regnumbers to REGNUMS. 2002-05-17 18:47:14 +00:00
Joern Rennecke 1c509ca821 print_insn_sh cleanup:
include:
	* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
	* sh-tdep.c (gdb_print_insn_sh64): Delete.
	(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
	(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
	* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
	* sh-dis.c (LITTLE_BIT): Delete.
	(print_insn_sh, print_insn_shl): Deleted.
	(print_insn_shx): Renamed to
	(print_insn_sh).  No longer static.  Handle SHmedia instructions.
	Use info->endian to determine endianness.
	* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
	(print_insn_sh64x): No longer static.  Renamed to
	(print_insn_sh64).  Removed pfun_compact and endian arguments.
	If we got an uneven address to indicate SHmedia, adjust it.
	Return -2 for SHcompact instructions.
sim/sh64:
	* sim-if.c (sh64_disassemble_insn): Use  print_insn_sh instead of
	print_insn_shl.
2002-05-17 14:36:46 +00:00
Stephane Carrez 2be99286c5 * MAINTAINERS: Update my email address. 2002-05-16 13:38:55 +00:00
Nick Clifton ace4f296f5 Uses sim callback interface for system calls in RedBoot SWI support. 2002-05-09 10:29:08 +00:00
Nick Clifton d8512e6afd Support the RedBoot SWI in ARM mode and some of its system calls. 2002-05-09 10:14:12 +00:00
Chris Demetriou 5accf1ff56 [ common/ChangeLog ]
2002-05-01  Chris Demetriou  <cgd@broadcom.com>

        * callback.c: Use 'deprecated' rather than 'depreciated.'

[ igen/ChangeLog ]
2002-05-01  Chris Demetriou  <cgd@broadcom.com>

        * igen.c: Use 'deprecated' rather than 'depreciated.'

[ mips/ChangeLog ]
2002-05-01  Chris Demetriou  <cgd@broadcom.com>

        * interp.c: Use 'deprecated' rather than 'depreciated.'
        * sim-main.h: Likewise.
2002-05-01 23:26:32 +00:00
Chris Demetriou 402586aa26 2002-05-01 Chris Demetriou <cgd@broadcom.com>
* cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
        which wouldn't compile anyway.
        * sim-main.h (unpredictable_action): New function prototype.
        (Unpredictable): Define to call igen function unpredictable().
        (NotWordValue): New macro to call igen function not_word_value().
        (UndefinedResult): Remove.
        * interp.c (undefined_result): Remove.
        (unpredictable_action): New function.
        * mips.igen (not_word_value, unpredictable): New functions.
        (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
        (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
        (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
        NotWordValue() to check for unpredictable inputs, then
        Unpredictable() to handle them.
2002-05-01 17:26:14 +00:00
Nick Clifton d1b0a5b4a9 Handle CLASS_IGNORE and ARG_NIM4. 2002-04-29 16:50:29 +00:00
Chris Demetriou c9b9995a38 2002-02-24 Chris Demetriou <cgd@broadcom.com>
* mips.igen: Fix formatting of calls to Unpredictable().
2002-04-25 05:37:03 +00:00
Andrew Cagney e101598283 Revert previous change. 2002-04-20 16:39:46 +00:00
Alexandre Oliva b882a66bfc * interp.c (sim_open): Disable chunk of code that wrote code in
vector table entries.
2002-04-18 19:47:14 +00:00
Elena Zannoni d395ade3db 2002-04-15 Elena Zannoni <ezannoni@redhat.com>
* sim_calls.c (sim_fetch_register, sim_store_register): Return -1 for
        AltiVec registers as a temporary stopgap.
2002-04-15 16:32:55 +00:00
David O'Brien 23c7880c01 2002-03-24 David O'Brien <obrien@FreeBSD.org>
* ppc/hw_disk.c: Export a disk device property.

This is needed by the FreeBSD/powerpc porting effort.
2002-03-25 04:39:20 +00:00
Andrew Cagney e7b564aa85 * gen.c (format_name_cmp): New function.
(insn_list_insert): Use the instruction field name as an
additional key.  Different field names indicate different
semantics.
2002-03-24 00:43:28 +00:00