Commit Graph

233 Commits

Author SHA1 Message Date
Tristan Gingold
8b351884bb 2010-04-14 Tristan Gingold <gingold@adacore.com>
* emulparams/alphavms.sh: New file.
	* emultempl/vms.em: New file.
	* scripttempl/alphavms.sc: New file.
	* configure.tgt (alpha*-*-*vms*): Added.
	* Makefile.am (ALL_EMULATIONS): Add ealphavms.o
	(ealphavms.c): New target.
	* Makefile.in: Regenerate.
2010-04-14 09:27:27 +00:00
Joseph Myers
40b365969f bfd:
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
	(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
	(BFD32_BACKENDS): Add elf32-tic6x.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
	* Makefile.in: Regenerate.
	* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
	(bfd_archures_list): Update.
	* config.bfd (tic6x-*-elf): New.
	* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
	New.
	* configure: Regenerate.
	* cpu-tic6x.c, elf32-tic6x.c: New.
	* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
	BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
	BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
	BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
	BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
	BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
	BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
	BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
	BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
	BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
	BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
	BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
	BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
	* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
	(_bfd_target_vector): Update.
	* bfd-in2.h, libbfd.h: Regenerate.

binutils:
	* MAINTAINERS: Add self as TI C6X maintainer.
	* NEWS: Add news entry for TI C6X support.
	* readelf.c: Include elf/tic6x.h.
	(guess_is_rela): Handle EM_TI_C6000.
	(dump_relocations): Likewise.
	(get_tic6x_dynamic_type): New.
	(get_dynamic_type): Call it.
	(get_machine_flags): Handle EF_C6000_REL.
	(get_osabi_name): Handle machine-specific values only for relevant
	machines.  Handle C6X values.
	(get_tic6x_segment_type): New.
	(get_segment_type): Call it.
	(get_tic6x_section_type_name): New.
	(get_section_type_name): Call it.
	(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
	EM_TI_C6000.

gas:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
	(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
	* Makefile.in: Regenerate.
	* NEWS: Add news entry for TI C6X support.
	* app.c (do_scrub_chars): Handle "||^" for TI C6X.  Handle
	TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR.  Keep spaces in
	operands if TC_KEEP_OPERAND_SPACES.
	* configure.tgt (tic6x-*-*): New.
	* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
	TC_PREDICATE_END_CHAR): Define.
	* config/tc-tic6x.c, config/tc-tic6x.h: New.
	* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TIC6X): Define.
	* doc/as.texinfo: Add TI C6X documentation.  Include c-tic6x.texi.
	* doc/c-tic6x.texi: New.

gas/testsuite:
	* gas/tic6x: New directory and testcases.

include:
	* dis-asm.h (print_insn_tic6x): Declare.

include/elf:
	* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
	* tic6x.h: New.

include/opcode:
	* tic6x-control-registers.h, tic6x-insn-formats.h,
	tic6x-opcode-table.h, tic6x.h: New.

ld:
	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
	eelf32_tic6x_le.o.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
	* NEWS: Add news entry for TI C6X support.
	* configure.tgt (tic6x-*-*): New.
	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.

ld/testsuite:
	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
	* ld-tic6x: New directory and testcases.

opcodes:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.
2010-03-25 21:12:36 +00:00
Rainer Orth
a6cc6b3bc4 ld:
* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_sol2.o,
	eelf_i386_sol2.o.
	(ALL_64_EMULATIONS): Add eelf_x86_64_sol2.o, eelf64_sparc_sol2.o.
	(eelf32_sparc_sol2.c): New rule.
	(eelf64_sparc_sol2.c): Likewise.
	(eelf_x86_64_sol2.c): Likewise.
	(eelf_i386_sol2.c): Likewise.
	* Makefile.in: Regenerate.
	* configure.tgt (i[3-7]86-*-solaris2*): Change targ_emul to
	elf_i386_sol2.
	Add elf_i386_ldso, elf_x86_64_sol2 to targ_extra_emuls.
	(x86_64-*-solaris2*): Change targ_emul to elf_x86_64_sol2.
	Add elf_x86_64, elf_i386_sol2, elf_i386 to targ_extra_emuls.
	(sparc-*-solaris2.[0-6]*): Change targ_emul to elf32_sparc_sol2.
	Add target_extra_emuls.
	(sparc-*-solaris2*): Change targ_emul to elf32_sparc_sol2.
	Add elf32_sparc, elf64_sparc_sol2 to targ_extra_emuls.
	(sparcv9-*-solaris2*): Change targ_emul to elf64_sparc_sol2.
	Add elf64_sparc, elf32_sparc_sol2 to target_extra_emuls.
	* emulparams/elf32_sparc_sol2.sh: New file.
	* emulparams/elf64_sparc_sol2.sh: New file.
	* emulparams/elf_i386_sol2.sh: New file.
	* emulparams/elf_x86_64_sol2.sh: New file.
	* emultempl/solaris2.em: New file.

	bfd:
	* elflink.c (bfd_elf_size_dynamic_sections): Don't emit base
	version twice.
	Skip it when constructing def.vd_next.

	* elf32-i386.c (TARGET_LITTLE_SYM): Redefine to
	bfd_elf32_i386_sol2_vec.
	(TARGET_LITTLE_NAME): Redefine to elf32-i386-sol2.
	(elf32_bed): Redefine to elf32_i386_sol2_bed.
	(elf_backend_want_plt_sym): Redefine to 1.

	* elf64-x86-64.c (TARGET_LITTLE_SYM): Redefine to
	bfd_elf64_x86_64_sol2_vec.
	(TARGET_LITTLE_NAME): Redefine to elf64-x86-64-sol2.
	(elf64_bed): Redefine to elf64_x86_64_sol2_bed.
	(elf_backend_want_plt_sym): Redefine to 1.

	* config.bfd (i[3-7]86-*-solaris2*): Set targ_defvec to
	bfd_elf32_i386_sol2_vec.
	Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in
	targ64_selvecs.
	(x86_64-*-solaris2*): Set targ_defvec to bfd_elf32_i386_sol2_vec.
	Replace bfd_elf64_x86_64_vec by bfd_elf64_x86_64_sol2_vec in
	targ_selvecs.

	* configure.in: Handle bfd_elf32_i386_sol2_vec,
	bfd_elf64_x86_64_sol2_vec.
	* configure: Regenerate.

	* targets.c (bfd_elf32_i386_sol2_vec): Declare.
	(bfd_elf64_x86_64_sol2_vec): Declare.
	(_bfd_target_vector): Add bfd_elf32_i386_sol2_vec,
	bfd_elf64_x86_64_sol2_vec.
2010-03-05 19:49:00 +00:00
Nick Clifton
c7927a3c0e bfd
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
        (ALL_MACHINES_CFILES): Add cpu-rx.c.
        (BFD32_BACKENDS): Add elf32-rx.lo.
        (BFD32_BACKENDS_CFILES): Add elf32-rx.c.
        * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
        Export bfd_rx_arch.
        (bfd_archures_list): Add bfd_rx_arch.
        * config.bfd: Add entry for rx-*-elf.
        * configure.in: Add entries for bfd_elf32_rx_le_vec and
        bfd_elf32_rx_be_vec.
        * reloc.c: Add RX relocations.
        * targets.c: Add RX target vectors.
        * Makefile.in: Regenerate.
        * bfd-in2.h: Regenerate.
        * configure: Regenerate.
        * libbfd.h: Regenerate.
        * cpu-rx.c: New file.
        * elf32-rx.c: New file.

binutils
        * readelf.c: Add support for RX target.
        * MAINTAINERS: Add DJ and NickC as maintainers for RX.

gas
        * Makefile.am: Add RX target.
        * configure.in: Likewise.
        * configure.tgt: Likewise.
        * read.c (do_repeat_with_expander): New function.
        * read.h: Provide a prototype for do_repeat_with_expander.
        * doc/Makefile.am: Add RX target documentation.
        * doc/all.texi: Likewise.
        * doc/as.texinfo: Likewise.
        * Makefile.in: Regenerate.
        * NEWS: Mention support for RX architecture.
        * configure: Regenerate.
        * doc/Makefile.in: Regenerate.
        * config/rx-defs.h: New file.
        * config/rx-parse.y: New file.
        * config/tc-rx.h: New file.
        * config/tc-rx.c: New file.
        * doc/c-rx.texi: New file.

gas/testsuite
        * gas/rx: New directory.
        * gas/rx/*: New set of test cases.
        * gas/elf/section2.e-rx: New expected output file.
        * gas/all/gas.exp: Add support for RX target.
        * gas/elf/elf.exp: Likewise.
        * gas/lns/lns.exp: Likewise.
        * gas/macros/macros.exp: Likewise.

include
        * dis-asm.h: Add prototype for print_insn_rx.

include/elf
        * rx.h: New file.

include/opcode
        * rx.h: New file.

ld
        * Makefile.am: Add rules to build RX emulation.
        * configure.tgt: Likewise.
        * NEWS: Mention support for RX architecture.
        * Makefile.in: Regenerate.
        * emulparams/elf32rx.sh: New file.
        * emultempl/rxelf.em: New file.

opcodes
        * Makefile.am: Add RX files.
        * configure.in: Add support for RX target.
        * disassemble.c: Likewise.
        * Makefile.in: Regenerate.
        * configure: Regenerate.
        * opc2c.c: New file.
        * rx-decode.c: New file.
        * rx-decode.opc: New file.
        * rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
Nick Clifton
7ba29e2a41 Add support for Xilinx MicroBlaze processor.
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
        * bfd/Makefile.in: Same.
        * bfd/archures.c: Add bfd_arch_microblaze.
        * bfd/bfd-in2.h: Regenerate.
        * bfd/config.bfd: Add microblaze target.
        * bfd/configure: Add bfd_elf32_microblaze_vec target.
        * bfd/configure.in: Same.
        * bfd/cpu-microblaze.c: New.
        * bfd/elf32-microblaze.c: New.
        * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
        * bfd/libbfd.h: Regenerate.
        * bfd/reloc.c: Add MICROBLAZE relocations.
        * bfd/section.c: Add struct relax_table and relax_count to section.
        * bfd/targets.c: Add bfd_elf32_microblaze_vec.
        * binutils/MAINTAINERS: Add self as maintainer.
        * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
        EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
        get_machine_name().
        * config.sub: Add microblaze target.
        * configure: Same.
        * configure.ac: Same.
        * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
        TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
        DEP_microblaze_elf target.
        * gas/Makefile.in: Same.
        * gas/config/tc-microblaze.c: Add MicroBlaze assembler.
        * gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
        * gas/configure: Add microblaze target.
        * gas/configure.in: Same.
        * gas/configure.tgt: Same.
        * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
        * gas/doc/Makefile.in: Same.
        * gas/doc/all.texi: Set MICROBLAZE.
        * gas/doc/as.texinfo: Add MicroBlaze doc links.
        * gas/doc/c-microblaze.texi: New MicroBlaze docs.
        * include/dis-asm.h: Decl print_insn_microblaze().
        * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
        * include/elf/microblaze.h: New reloc definitions.
        * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
        ALL_EMULATIONS, targets.
        * ld/Makefile.in: Same.
        * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
        * ld/emulparams/elf32mb_linux.sh: New.
        * ld/emulparams/elf32microblaze.sh. New.
        * ld/scripttempl/elfmicroblaze.sc: New.
        * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
        CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
        * opcodes/Makefile.in: Same.
        * opcodes/configure: Add bfd_microblaze_arch target.
        * opcodes/configure.in: Same.
        * opcodes/disassemble.c: Define ARCH_microblaze, return
        print_insn_microblaze().
        * opcodes/microblaze-dis.c: New MicroBlaze disassembler.
        * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
        * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-06 17:38:04 +00:00
H.J. Lu
8a9036a406 bfd/
2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* archures.c (bfd_architecture): Add bfd_arch_l1om.
	(bfd_l1om_arch): New.
	(bfd_archures_list): Add &bfd_l1om_arch.
	* bfd-in2.h: Regenerated.

	* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
	bfd_elf64_x86_64_vec is supported.  Add bfd_elf64_l1om_freebsd_vec
	if bfd_elf64_x86_64_freebsd_vec is supported.
	(targ_selvecs): Likewise.

	* configure.in: Support bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.
	* configure: Regenerated.

	* cpu-l1om.c: New.

	* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
	(bfd_elf64_l1om_vec): Likewise.
	(bfd_elf64_l1om_freebsd_vec): Likewise.

	* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
	(ALL_MACHINES_CFILES): Add cpu-l1om.c.
	* Makefile.in: Regenerated.

	* targets.c (bfd_elf64_l1om_vec): New.
	(bfd_elf64_l1om_freebsd_vec): Likewise.
	(_bfd_target_vector): Add bfd_elf64_l1om_vec and
	bfd_elf64_l1om_freebsd_vec.

binutils/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* readelf.c (guess_is_rela): Handle EM_L1OM.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.
	(get_section_type_name): Likewise.
	(get_elf_section_flags): Likewise.
	(get_symbol_index_type): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_32bit_pcrel_reloc): Likewise.
	(is_64bit_abs_reloc): Likewise.
	(is_64bit_pcrel_reloc): Likewise.
	(is_none_reloc): Likewise.

gas/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add l1om.
	(check_cpu_arch_compatible): New.
	(set_cpu_arch): Use it.
	(i386_arch): New.
	(i386_mach): Return bfd_mach_l1om for Intel L1OM.
	(md_show_usage): Display l1om.
	(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
	cpu_arch_isa_flags.bitfield.cpul1om is set.

	* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
	(i386_arch): New.
	(ELF_TARGET_L1OM_FORMAT): Likewise.

	* doc/c-i386.texi: Document l1om.

gas/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/l1om.d: New.
	* gas/i386/l1om-inval.l: Likewise.
	* gas/i386/l1om-inval.s: Likewise.

	* gas/i386/i386.exp: Run l1om-inval and l1om.

include/elf/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* common.h (EM_L1OM): New.

ld/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
	is supported.  Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
	(targ_extra_emuls): Likewise.

	* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
	eelf_l1om_fbsd.o
	(eelf_l1om.c): New.
	(eelf_l1om_fbsd.c): Likewise.
	* Makefile.in: Regenerated.

	* emulparams/elf_l1om.sh: New.
	* emulparams/elf_l1om_fbsd.sh: Likewise.

ld/testsuite/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/abs-l1om.d: New.
	* ld-x86-64/protected2-l1om.d: Likewise.
	* ld-x86-64/protected3-l1om.d: Likewise.

	* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
	protected3-l1om.

opcodes/

2009-07-25  H.J. Lu  <hongjiu.lu@intel.com>

	* configure.in: Handle bfd_l1om_arch.
	* disassemble.c (disassembler): Likewise.

	* configure: Regenerated.

	* i386-dis.c (print_insn): Handle bfd_mach_l1om and
	bfd_mach_l1om_intel_syntax.  Use 8 bytes per line for Intel L1OM.

	* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
	Add CPU_L1OM_FLAGS.
	(cpu_flags): Add CpuL1OM.
	(set_bitfield): Take an argument to set the value field.
	(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
	(process_i386_opcode_modifier): Updated.
	(process_i386_operand_type): Likewise.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.

	* i386-opc.h (CpuL1OM): New.
	(CpuXsave): Updated.
	(i386_cpu_flags): Add cpul1om.
2009-07-25 14:58:58 +00:00
Dave Korn
361dff7384 2009-06-18 Dave Korn <dave.korn.cygwin@gmail.com>
Merge cegcc and mingw32ce target name changes from CeGCC project,
replacing "arm-*-" by "arm*-*-" where needed.

  2008-09-24  Pedro Alves  <pedroalves@users.sourceforge.net>

	ld/
	* configure.tgt (arm*-*-cegcc*): Set LIB_PATH to
	${tooldir}/lib/w32api.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	bfd/
	* config.bfd: Add arm*-*-cegcc* target.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	binutils/
	* configure.in: Add arm*-*-cegcc* and arm*-*-mingw32ce* targets.
	* configure: Regenerate.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	gas/
	* configure.tgt: Add arm*-*-cegcc* target.

  2007-12-25  Pedro Alves  <pedro_alves@portugalmail.pt>

	ld/
	* configure.tgt: Add arm*-*-cegcc* target.

  2007-12-17  Pedro Alves  <pedro_alves@portugalmail.pt>

	bfd/
	* config.bfd: Add arm-*-mingw32ce* target.

  2007-12-17  Pedro Alves  <pedro_alves@portugalmail.pt>

	gas/
	* configure.tgt: Add arm-*-mingw32ce* target.

  2007-12-17  Pedro Alves  <pedro_alves@portugalmail.pt>

	ld/
	* configure.tgt: Add arm-*-mingw32ce* target.
2009-06-18 02:11:03 +00:00
Nick Clifton
20135e4cea Add new binutils target: moxie 2009-04-16 15:39:48 +00:00
Richard Sandiford
e52315924b bfd/
* config.bfd: Treat AIX 6+ in the same way as AIX 5.
	* configure.in: Likewise.
	* configure: Regenerate.

binutils/
	* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.
	* configure.in: Likewise.
	* configure: Regenerate.

gas/
	* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.
	* configure.in: Likewise.
	* configure: Regenerate.

ld/
	* configure.tgt: Extend AIX 5 behavior to AIX 6 and above.
2009-03-14 09:11:38 +00:00
Nick Clifton
c3b7224ae4 Add support for Score7 architecture. 2009-03-02 10:33:08 +00:00
Dave Anglin
d1bbb13a63 * configure.tgt: Only use elf64hppa target emulation for hpux.
* emulparams/elf64hppa.sh: Don't include hppa64linux.sh.
	(SCRIPT_NAME): Use new script elf64hppa.
	(SCRIPT_NAME, ELFSIZE, NO_REL_RELOCS, ARCH, MACHINE, ENTRY,
	TEMPLATE_NAME, GENERATE_SHLIB_SCRIPT, OTHER_READONLY_SECTIONS,
	OTHER_READWRITE_SECTIONS, OTHER_BSS_SECTIONS, OTHER_GOT_RELOC_SECTIONS,
	DATA_START_SYMBOLS, OTHER_SYMBOLS, DATA_PLT, PLT_BEFORE_GOT,
	TEXT_DYNAMIC): Define.
	* emulparams/hppa64linux.sh: Adjust comments.
	* scripttempl/elf64hppa.sc: New file.
2009-03-01 22:10:36 +00:00
Nick Clifton
84e94c9023 Add LM32 port. 2008-12-23 19:10:25 +00:00
Ulrich Weigand
d7b99e76e2 * configure.tgt [spu-*-elf*]: Set NATIVE_LIB_DIRS to '/lib'. 2008-11-17 20:11:48 +00:00
Nick Clifton
8a2a2dbb65 Add m32c-*-rtems* and m32r-*-rtems* configuration targets. 2008-11-06 15:36:38 +00:00
Eric B. Weddington
7b21ac3f45 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Mike Frysinger
bec9537ec1 2008-04-25 Michael Frysinger <vapier@gentoo.org>
* configure.tgt (bfin-*-linux-uclibc*): Set targ_emul to elf32bfinfd
	and targ_extra_emuls to elf32bfin.
2008-04-26 01:10:55 +00:00
Bob Wilson
f8a52b5923 2008-01-31 Marc Gauthier <marc@tensilica.com>
bfd/
	* config.bfd (xtensa*-*-*): Recognize processor variants.
gas/
	* configure.tgt (xtensa*-*-*): Recognize processor variants.
gas/testsuite/
	* gas/all/gas.exp: Recognize Xtensa processor variants.
	* gas/elf/elf.exp: Likewise.
	* gas/lns/lns.exp: Likewise.
ld/
	* configure.tgt (xtensa*-*-*): Recognize processor variants.
ld/testsuite/
	* ld-elf/merge.d: Recognize Xtensa processor variants.
	* ld-xtensa/coalesce.exp: Likewise.
	* ld-xtensa/lcall.exp: Likewise.
2008-02-01 17:58:48 +00:00
Nick Clifton
00b2bfc124 * config.bfd (x86_64-*-solaris2): Add support for this target.
* configure.tgt (x86_64-*-solaris2): Add support for this target.
2008-01-28 16:57:22 +00:00
Nick Clifton
bfff164249 Add MN10300 linker relaxation support for symbol differences 2007-10-19 17:31:31 +00:00
Nick Clifton
0b3e17e93d Add support for i386-dragonfly target. 2007-08-28 11:02:55 +00:00
Nick Clifton
c2c09cab6c * configure.tgt: Add bfin-*rtems*. 2007-08-07 09:32:06 +00:00
Nick Clifton
3d3d428f04 New port: National Semiconductor's CR16 2007-06-29 14:09:34 +00:00
Paul Brook
9fcfe2ed35 2007-04-04 Paul Brook <paul@codesourcery.com>
ld/
	* configure.tgt: Loosen checks for arm uclinux eabi targets.
	gas/
	* configure.tgt: Loosen checks for arm uclinux eabi targets.
2007-04-04 18:02:39 +00:00
Bernd Schmidt
3f2dad243c * configure.tgt (bfin-*-elf, bfin-*-uclinux*): Add targ_extra_libpath.
(bfin-*-linux-uclibc*): New target.
2007-03-19 17:31:31 +00:00
Nathan Sidwell
ed6ba29825 bfd/
* config.bfd (sh-*-uclinux, sh[12]-*-uclinux): New stanza.

	gas/
	* configure.tgt (sh-*-uclinux, sh[12]-*-uclinux): Specify as elf.

	ld/
	* Makefile.am (ALL_EMULATIONS): Add eshelf_uclinux.o
	(eshelf_uclinux.c): New target.
	* Makefile.in: Rebuilt.
	* configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): New stanza.
	* emulparams/shelf_uclinux.sh: New.
2007-02-28 10:53:19 +00:00
Alan Modra
46c3c2015b * configure.tgt: Fix type last change. 2007-02-28 01:39:59 +00:00
Alan Modra
37dc280a2e * configure.tgt (spu-*-elf*): Delete targ_extra_ofiles. 2007-02-28 01:29:58 +00:00
Joseph Myers
919e35ed89 * configure.tgt (mips64*el-*-linux-*, mips64*-*-linux-*,
mips*el-*-linux-*, mips*-*-linux-*): Set
	targ_extra_libpath=$targ_extra_emuls.
2007-02-22 15:05:42 +00:00
H.J. Lu
534d31192c 2007-02-09 H.J. Lu <hongjiu.lu@intel.com>
* configure.in (targ_extra_emuls): Add $targ64_extra_emuls if
	want64 is true.
	(targ_extra_libpath): Add $targ64_extra_libpath if want64 is
	true
	* configure: Regenerated.

	* configure.tgt (targ_extra_libpath): Initialize.
	(targ64_extra_emuls): New. Document. Initialize.
	(targ64_extra_libpath): Likewise.
	(i[3-7]86-*-linux-*): Set targ64_extra_emuls and
	targ64_extra_libpath.
	(powerpc*-*-linux*): Likewise.
	(s390-*-linux*): Likewise.
2007-02-09 18:20:24 +00:00
Paul Brook
7bd1c9613d 2007-02-07 Paul Brook <paul@codesourcery.com>
ld/
	* configure.tgt: Add arm*-*-uclinux-*eabi.
	gas/
	* configure.tgt: Ditto.
2007-02-07 17:06:20 +00:00
Dave Brolley
19d9b7d3f8 Support for Toshiba MeP. 2007-02-05 20:16:32 +00:00
Nick Clifton
42037fe5bb Renamed target x86_64-*-mingw64 to x86_64-*-mingw*. 2007-01-08 17:21:50 +00:00
Nick Clifton
916c46cb42 PR ld/3843
* configure.tgt (x86_64_[k]freebsd*): Add targ_extra_libpath and tdir_elf_i386_fbsd.
2007-01-08 15:38:59 +00:00
Kazu Hirata
ebff6cd5e5 bfd/
* config.bfd: Recognize fido.

gas/
	* configure.tgt: Recognize fido.

ld/
	* configure.tgt: Recognize fido.
2006-12-24 02:48:59 +00:00
Ben Elliston
a6c73b34d0 * configure.tgt (NATIVE_LIB_DIRS): Specify for spu-*-elf*. 2006-12-15 05:49:28 +00:00
Joseph Myers
fffbd2ef6b 2006-10-26 Joseph S. Myers <joseph@codesourcery.com>
Mark Mitchell  <mark@codesourcery.com>

	* configure.tgt (arm*linux*): Support both big- and little-endian.
2006-10-26 12:52:39 +00:00
Alan Modra
e9f5312993 New Cell SPU port. 2006-10-25 06:49:21 +00:00
Joseph Myers
e4818e07f3 * configure.tgt (i[3-7]86-*-linux-*): Also define
targ_extra_libpath in want64 case.
	* emulparams/elf_x86_64.sh: Handle i[3-7]86-*-linux-* the same as
	x86_64*-linux*.
2006-10-18 16:24:01 +00:00
Nick Clifton
99ad839030 Add x86_64-mingw64 target 2006-09-20 11:35:11 +00:00
Thiemo Seufer
6f69307352 * configure.tgt: Add mips*el-sde-elf* and mips*-sde-elf*
configurations.
2006-09-18 13:18:44 +00:00
Nick Clifton
1c0d3aa6ae Add support for Score target. 2006-09-16 23:51:50 +00:00
Nick Clifton
57da97f58c * configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets. 2006-08-22 11:50:33 +00:00
Richard Sandiford
55e6e39790 bfd/
2006-08-02  Richard Sandiford  <richard@codesourcery.com>
	    Kazu Hirata  <kazu@codesourcery.com>
	    Phil Edwards  <phil@codesourcery.com>
	    Nathan Sidwell  <nathan@codesourcery.com>

	* config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and
	bfd_elf32_shlvxworks_vec.
	* configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo.
	(bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise.
	(bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise.
	(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise.
	(bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise.
	(bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise.
	(bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise.
	(bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas.
	* configure: Regenerate.
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
	* elf-vxworks.c (elf_vxworks_gott_symbol_p): New function.
	(elf_vxworks_add_symbol_hook): Use it.
	(elf_vxworks_link_output_symbol_hook): Likewise.  Use the hash
	table entry to check for weak undefined symbols and to obtain
	the original bfd.
	(elf_vxworks_emit_relocs): Use target_index instead of this_idx.
	* elf32-sh-relocs.h: New file, split from elf32-sh.c.
	(R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field,
	SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the
	special_function field.
	(R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too.
	(R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise.
	(R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise.
	(R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise.
	(R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise.
	(R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise.
	(SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file.
	* elf32-sh.c: Include elf32-vxworks.h.
	(MINUS_ONE): Define.
	(sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32
	set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set
	to sh_elf_reloc.
	(sh_vxworks_howto_table): New variable.  Include elf32-sh-relocs.h
	with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and
	SH_ELF_RELOC set to bfd_elf_generic_reloc.
	(vxworks_object_p, get_howto_table): New functions.
	(sh_elf_reloc_type_lookup): Fix typo.  Use get_howto_table.
	(sh_elf_info_to_howto): Use get_howto_table.
	(sh_elf_relax_section): Honor the partial_inplace field of the
	R_SH_DIR32 howto.
	(sh_elf_relax_delete_bytes): Likewise.
	(elf_sh_plt_info): New structure.
	(PLT_ENTRY_SIZE): Replace both definitions with...
	(ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for
	INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_entry_be): Update sizes of both definitions accordingly.
	(elf_sh_plt0_entry_le): Likewise.
	(elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise.
	(elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise.
	(elf_sh_plts): New structure, with separate definitions for
	INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_entry): Delete both definitions.
	(elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise.
	(elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise.
	(elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise.
	(elf_sh_plt_reloc_offset): Likewise.
	(movi_shori_putval): Delete in favor of...
	(install_plt_field): ...this new function, with separate definitions
	for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(get_plt_info): New function, with separate definitions
	for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete.
	(VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros.
	(vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants.
	(vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise.
	(vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise.
	(get_plt_index, get_plt_offset): New functions.
	(elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields.
	(sh_elf_link_hash_table_create): Initialize them.
	(sh_elf_create_dynamic_sections): Call
	elf_vxworks_create_dynamic_sections for VxWorks.
	(allocate_dynrelocs): Use htab->plt_info to get the size of PLT
	entries.  Allocate relocation entries in .rela.plt.unloaded if
	generating a VxWorks executable.
	(sh_elf_always_size_sections): New function.
	(sh_elf_size_dynamic_sections): Extend .rela.plt handling to
	.rela.plt.unloaded.
	(sh_elf_relocate_section): Use get_howto_table.  Honor
	partial_inplace when calculating the addend for dynamic
	relocations.  Use get_plt_index.
	(sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field
	and htab->plt_info.  Fill in the bra .plt offset for VxWorks
	executables.  Populate .rela.plt.unloaded.  Do not make
	_GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
	(sh_elf_finish_dynamic_sections): Use install_plt_field and
	htab->plt_info.  Handle cases where there is no special PLT header.
	Populate the first relocation in .rela.plt.unloaded and fix up
	the remaining entries.
	(sh_elf_plt_sym_val): Use get_plt_info.
	(elf_backend_always_size_sections): Define.
	(TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks.
	(TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise.
	(elf32_bed, elf_backend_want_plt_sym): Likewise.
	(elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise.
	(elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing): Likewise.
	(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise.
	* targets.c (bfd_elf32_shlvxworks_vec): Declare.
	(bfd_elf32_shvxworks_vec): Likewise.
	(_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and
	bfd_elf32_shvxworks_vec.

gas/
	* config/tc-sh.c (apply_full_field_fix): New function.
	(md_apply_fix): Use it instead of md_number_to_chars.  Do not fill
	in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
	(tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
	* config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.

ld/
2006-08-02  Richard Sandiford  <richard@codesourcery.com>
	    Kazu Hirata  <kazu@codesourcery.com>
	    Phil Edwards  <phil@codesourcery.com>

	* Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and
	eshlelf_vxworks.o.
	(eshelf_vxworks.c, eshlelf_vxworks.c): New rules.
	* Makefile.in: Regenerate.
	* configure.tgt (sh-*-vxworks): Use shelf_vxworks and
	shlelf_vxworks.
	* emulparams/shelf_vxworks.sh: New file.
	* emulparams/shlelf_vxworks.sh: Likewise.
	* emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}.
	(OTHER_END_SYMBOLS): Likewise _ehdr.
	(DATA_END_SYMBOLS): Likewise _edata.
	* emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd
	is indeed an ELF file before dealing with --force-dynamic.

ld/testsuite/
	* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
	* ld-sh/sh-vxworks.exp: New file.
	* ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to
	sh-*-vxworks.
	* ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd,
	* ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd,
	* ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s,
	* ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd,
	* ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s,
	* ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s,
	* ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd,
	* ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd,
	* ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s,
	* ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s,
	* ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
2006-08-04 13:13:56 +00:00
Daniel Jacobowitz
d19628a59d * configure.tgt (i[3-7]86-*-solaris2*, i[3-7]86-*-solaris*): Correct
typo setting targ_extra_libpath.
2006-07-14 15:26:36 +00:00
Daniel Jacobowitz
0faaaeb8fc * configure.tgt (i[3-7]86-*-solaris2*, i[3-7]86-*-solaris*): Set
targ_extra_libpath.
2006-06-23 18:11:47 +00:00
Nick Clifton
28c9d252b4 Add support for AVR6 family 2006-05-24 07:36:12 +00:00
Richard Sandiford
910600e9c7 bfd/
* config.bfd (sparc-*-vxworks*): New stanza.
	* configure.in (bfd_elf32_sparc_vxworks_vec): New stanza.
	(bfd_elf32_sparc_vec, bfd_elf64_sparc_vec): Add elf-vxworks.lo.
	* configure: Regenerate.
	* elf32-sparc.c: Include elf-vxworks.h.
	(elf32_sparc_vxworks_link_hash_table_create: New.
	(elf32_sparc_vxworks_final_write_processing): New.
	(TARGET_BIG_SYM): Override for VxWorks.
	(TARGET_BIG_NAME, ELF_MINPAGESIZE): Likewise.
	(bfd_elf32_bfd_link_hash_table_create): Likewise.
	(elf_backend_want_got_plt, elf_backend_plt_readonly): Likewise.
	(elf_backend_got_header_size, elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing, elf32_bed): Likewise.
	* elfxx-sparc.c: Include libiberty.h and elf-vxworks.h.
	(sparc_vxworks_exec_plt0_entry, sparc_vxworks_exec_plt_entry): New.
	(sparc_vxworks_shared_plt0_entry, sparc_vxworks_shared_plt_entry): New.
	(_bfd_sparc_elf_link_hash_table_create): Don't initialize
	build_plt_entry here.
	(create_got_section): Initialize sgotplt for VxWorks.
	(_bfd_sparc_elf_create_dynamic_sections): Initialize build_plt_entry,
	plt_header_size and plt_entry_size, with new VxWorks-specific settings.
	Call elf_vxworks_create_dynamic_sections for VxWorks.
	(allocate_dynrelocs): Use plt_header_size and plt_entry_size.
	Allocate room for .got.plt and .rela.plt.unloaded entries on VxWorks.
	(_bfd_sparc_elf_size_dynamic_sections): Don't allocate a nop in .plt
	for VxWorks.  Check for the .got.plt section.
	(sparc_vxworks_build_plt_entry): New function.
	(_bfd_sparc_elf_finish_dynamic_symbol): Add handling of VxWorks PLTs.
	Don't make _GLOBAL_OFFSET_TABLE_ and _PROCEDURE_LINKAGE_TABLE_
	absolute on VxWorks.
	(sparc32_finish_dyn): Add special handling for DT_RELASZ
	and DT_PLTGOT on VxWorks.
	(sparc_vxworks_finish_exec_plt): New.
	(sparc_vxworks_finish_shared_plt): New.
	(_bfd_sparc_elf_finish_dynamic_sections): Call them.
	Use plt_header_size and plt_entry_size.
	* elfxx-sparc.h (_bfd_sparc_elf_link_hash_table): Add is_vxworks,
	srelplt2, sgotplt, plt_header_size and plt_entry_size fields.
	* Makefile.am (elfxx-sparc.lo): Depend on elf-vxworks.h.
	(elf32-sparc.lo): Likewise.
	* Makefile.in: Regenerate.
	* targets.c (bfd_elf32_sparc_vxworks_vec): Declare.
	(_bfd_target_vector): Add a pointer to it.

gas/
	* config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
	(GOTT_BASE, GOTT_INDEX): New.
	(tc_gen_reloc): Don't alter relocations against GOTT_BASE and
	GOTT_INDEX when generating VxWorks PIC.
	* configure.tgt (sparc*-*-vxworks*): Remove this special case;
	use the generic *-*-vxworks* stanza instead.

gas/testsuite/
	* gas/sparc/vxworks-pic.s, gas/sparc/vxworks-pic.d: New test.
	* gas/sparc/sparc.exp: Run it.  Remove sparc*-*-vxworks* XFAILs.

ld/
	* configure.tgt (sparc*-*-vxworks*): New stanza.
	* emulparams/elf32_sparc_vxworks.sh: New file.
	* Makefile.am (ALL_EMULATIONS): Add eelf32_sparc_vxworks.o.
	(eelf32_sparc_vxworks.c): New rule.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-sparc/vxworks1.dd, ld-sparc/vxworks1.ld, ld-sparc/vxworks1-lib.dd,
	* ld-sparc/vxworks1-lib.nd, ld-sparc/vxworks1-lib.rd,
	* ld-sparc/vxworks1-lib.s, ld-sparc/vxworks1.rd, ld-sparc/vxworks1.s,
	* ld-sparc/vxworks1-static.d, ld-sparc/vxworks2.s,
	* ld-sparc/vxworks2.sd, ld-sparc/vxworks2-static.sd: New tests.
	* ld-sparc/sparc.exp: Run them.
2006-04-05 12:41:59 +00:00
Bernd Schmidt
753a4ce392 * emulparams/elf32bfinfd.sh: New file.
* emultempl/bfin.em: Delete.
	* emulparams/bfin.sh: Lose reference to bfin.em.
	* Makefile.am (eelf32bfin.c): Likewise.
	(eelf32bfinfd.c): New.
	* Makefile.in: Regenerate.
	* configure.tgt (bfin-*-elf, bfin-*-uclinux): Add elf32bfinfd to
	targ_extra_emuls.
2006-03-26 00:46:13 +00:00
Richard Sandiford
0a44bf6950 Richard Sandiford <richard@codesourcery.com>
Daniel Jacobowitz  <dan@codesourcery.com>
	Phil Edwards  <phil@codesourcery.com>
	Zack Weinberg  <zack@codesourcery.com>
	Mark Mitchell  <mark@codesourcery.com>
	Nathan Sidwell  <nathan@codesourcery.com>

bfd/
	* bfd-in2.h: Regenerate.
	* config.bfd (mips*-*-vxworks*, mips*el-*-vxworks*): New stanzas.
	* configure.in (bfd_elf32_bigmips_vxworks_vec): New stanza.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(bfd_elf32_bigmips_vec): Add elf-vxworks.lo.
	(bfd_elf32_littlemips_vec): Likewise.
	(bfd_elf32_nbigmips_vec): Likewise.
	(bfd_elf32_nlittlemips_vec): Likewise.
	(bfd_elf32_ntradbigmips_vec): Likewise.
	(bfd_elf32_ntradlittlemips_vec): Likewise.
	(bfd_elf32_tradbigmips_vec): Likewise.
	(bfd_elf32_tradlittlemips_vec): Likewise.
	(bfd_elf64_bigmips_vec): Likewise.
	(bfd_elf64_littlemips_vec): Likewise.
	(bfd_elf64_tradbigmips_vec): Likewise.
	(bfd_elf64_tradlittlemips_vec): Likewise.
	* elf32-mips.c: Include elf-vxworks.h.
	(mips_info_to_howto_rel): Use elf_backend_mips_rtype_to_howto
	instead of calling mips_elf32_rtype_to_howto directly.
	(mips_vxworks_copy_howto_rela): New reloc howto.
	(mips_vxworks_jump_slot_howto_rela): Likewise.
	(mips_vxworks_bfd_reloc_type_lookup): New function.
	(mips_vxworks_rtype_to_howto): Likewise.
	(mips_vxworks_final_write_processing): Likewise.
	(TARGET_LITTLE_SYM, TARGET_LITTLE_NAME): Override for VxWorks.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, elf_bed, ELF_MAXPAGESIZE): Likewise.
	(elf_backend_want_got_plt): Likewise.
	(elf_backend_want_plt_sym): Likewise.
	(elf_backend_got_symbol_offset): Likewise.
	(elf_backend_want_dynbss): Likewise.
	(elf_backend_may_use_rel_p): Likewise.
	(elf_backend_may_use_rela_p): Likewise.
	(elf_backend_default_use_rela_p): Likewise.
	(elf_backend_got_header_size: Likewise.
	(elf_backend_plt_readonly): Likewise.
	(bfd_elf32_bfd_reloc_type_lookup): Likewise.
	(elf_backend_mips_rtype_to_howto): Likewise.
	(elf_backend_adjust_dynamic_symbol): Likewise.
	(elf_backend_finish_dynamic_symbol): Likewise.
	(bfd_elf32_bfd_link_hash_table_create): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing: Likewise.
	(elf_backend_additional_program_headers): Likewise.
	(elf_backend_modify_segment_map): Likewise.
	(elf_backend_symbol_processing): Likewise.
	* elfxx-mips.c: Include elf-vxworks.h.
	(mips_elf_link_hash_entry): Add is_relocation_target and
	is_branch_target fields.
	(mips_elf_link_hash_table): Add is_vxworks, srelbss, sdynbss, srelplt,
	srelplt2, sgotplt, splt, plt_header_size and plt_entry_size fields.
	(MIPS_ELF_RELA_SIZE, MIPS_ELF_REL_DYN_NAME): New macros.
	(MIPS_RESERVED_GOTNO): Take a mips_elf_link_hash_table argument.
	Return 3 for VxWorks.
	(ELF_MIPS_GP_OFFSET): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Return 0 for VxWorks.
	(MIPS_ELF_GOT_MAX_SIZE): Change the argument from a bfd to a
	mips_elf_link_hash_table.  Update the call to ELF_MIPS_GP_OFFSET.
	(mips_vxworks_exec_plt0_entry): New variable.
	(mips_vxworks_exec_plt_entry): Likewise.
	(mips_vxworks_shared_plt0_entry): Likewise.
	(mips_vxworks_shared_plt_entry): Likewise.
	(mips_elf_link_hash_newfunc): Initialize the new hash_entry fields.
	(mips_elf_rel_dyn_section): Change the bfd argument to a
	mips_elf_link_hash_table.  Use MIPS_ELF_REL_DYN_NAME to get
	the name of the section.
	(mips_elf_initialize_tls_slots): Update the call to
	mips_elf_rel_dyn_section.
	(mips_elf_gotplt_index): New function.
	(mips_elf_local_got_index): Add an input_section argument.
	Update the call to mips_elf_create_local_got_entry.
	(mips_elf_got_page): Likewise.
	(mips_elf_got16_entry): Likewise.
	(mips_elf_create_local_got_entry): Add bfd_link_info and input_section
	arguments.  Create dynamic relocations for each entry on VxWorks.
	(mips_elf_merge_gots): Update the use of MIPS_ELF_GOT_MAX_SIZE.
	(mips_elf_multi_got): Update the uses of MIPS_ELF_GOT_MAX_SIZE
	and MIPS_RESERVED_GOTNO.
	(mips_elf_create_got_section): Update the uses of
	MIPS_ELF_GOT_MAX_SIZE.  Create .got.plt on VxWorks.
	(is_gott_symbol): New function.
	(mips_elf_calculate_relocation): Use a dynobj local variable.
	Update the calls to mips_elf_local_got_index, mips_elf_got16_entry and
	mips_elf_got_page_entry.  Set G to the .got.plt entry when calculating
	VxWorks R_MIPS_CALL* relocations.  Calculate and use G for all GOT
	relocations on VxWorks.  Add dynamic relocations for references
	to the VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Don't
	create dynamic relocations for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64
	in VxWorks executables.
	(mips_elf_allocate_dynamic_relocations): Add a bfd_link_info argument.
	Use MIPS_ELF_RELA_SIZE to calculate the size of a VxWorks entry.
	Don't allocate a null entry on VxWorks.
	(mips_elf_create_dynamic_relocation): Update the call to
	mips_elf_rel_dyn_section.  Use absolute rather than relative
	relocations for VxWorks, and make them RELA rather than REL.
	(_bfd_mips_elf_create_dynamic_sections): Don't make .dynamic
	read-only on VxWorks.  Update the call to mips_elf_rel_dyn_section.
	Create the .plt, .rela.plt, .dynbss and .rela.bss sections on
	VxWorks.  Likewise create the _PROCEDURE_LINKAGE_TABLE symbol.
	Call elf_vxworks_create_dynamic_sections for VxWorks and
	initialize the plt_header_size and plt_entry_size fields.
	(_bfd_mips_elf_check_relocs): Don't allow GOT relocations to be
	used in VxWorks executables.  Don't allocate dynamic relocations
	for R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 in VxWorks executables.
	Set is_relocation_target for each symbol referenced by a relocation.
	Allocate .rela.dyn entries for relocations against the special
	VxWorks __GOTT_BASE__ and __GOTT_INDEX__ symbols.  Create GOT
	entries for all VxWorks R_MIPS_GOT16 relocations.  Don't allocate
	a global GOT entry for symbols mentioned in VxWorks R_MIPS_CALL*,
	R_MIPS_32, R_MIPS_REL32 or R_MIPS_64 relocations.  Update the calls
	to mips_elf_rel_dyn_section and mips_elf_allocate_dynamic_relocations.
	Set is_branch_target for symbols mentioned in R_MIPS_PC16 or R_MIPS_26
	relocations.  Don't set no_fn_stub on VxWorks.
	(_bfd_mips_elf_adjust_dynamic_symbol): Update the call to
	mips_elf_allocate_dynamic_relocations.
	(_bfd_mips_vxworks_adjust_dynamic_symbol): New function.
	(_bfd_mips_elf_always_size_sections): Do not allocate GOT page
	entries for VxWorks, and do not create multiple GOTs.
	(_bfd_mips_elf_size_dynamic_sections): Use MIPS_ELF_REL_DYN_NAME.
	Handle .got specially for VxWorks.  Update the uses of
	MIPS_RESERVED_GOTNO and mips_elf_allocate_dynamic_relocations.
	Check for sgotplt and splt.  Allocate the .rel(a).dyn contents last,
	once its final size is known.  Set DF_TEXTREL for VxWorks.  Add
	DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL, DT_PLTRELSZ and DT_JMPREL
	tags on VxWorks.  Do not add the MIPS-specific tags for VxWorks.
	(_bfd_mips_vxworks_finish_dynamic_symbol): New function.
	(mips_vxworks_finish_exec_plt): Likewise.
	(mips_vxworks_finish_shared_plt): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Remove an unncessary call
	to mips_elf_rel_dyn_section.  Use a VxWorks-specific value of
	DT_PLTGOT.  Handle DT_RELA, DT_RELASZ, DT_RELAENT, DT_PLTREL,
	DT_PLTRELSZ and DT_JMPREL.  Update the uses of MIPS_RESERVED_GOTNO
	and mips_elf_rel_dyn_section.  Use a different GOT header for
	VxWorks.  Don't sort .rela.dyn on VxWorks.  Finish the PLT on VxWorks.
	(_bfd_mips_elf_link_hash_table_create): Initialize the new
	mips_elf_link_hash_table fields.
	(_bfd_mips_vxworks_link_hash_table_create): New function.
	(_bfd_mips_elf_final_link): Set the GP value to _GLOBAL_OFFSET_TABLE_
	on VxWorks.  Update the call to ELF_MIPS_GP_OFFSET.
	* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Declare.
	(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
	(_bfd_mips_vxworks_link_hash_table_create): Likewise.
	* libbfd.h: Regenerate.
	* Makefile.am (elfxx-mips.lo): Depend on elf-vxworks.h.
	(elf32-mips.lo): Likewise.
	* Makefile.in: Regenerate.
	* reloc.c (BFD_RELOC_MIPS_COPY, BFD_RELOC_MIPS_JUMP_SLOT): Declare.
	* targets.c (bfd_elf32_bigmips_vxworks_vec): Declare.
	(bfd_elf32_littlemips_vxworks_vec): Likewise.
	(_bfd_target_vector): Add entries for them.

gas/
	* config/tc-mips.c (mips_target_format): Handle vxworks targets.
	(md_begin): Complain about -G being used for PIC.  Don't change
	the text, data and bss alignments on VxWorks.
	(reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
	generating VxWorks PIC.
	(load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
	(macro): Likewise, but do not treat la $25 specially for
	VxWorks PIC, and do not handle jal.
	(OPTION_MVXWORKS_PIC): New macro.
	(md_longopts): Add -mvxworks-pic.
	(md_parse_option): Don't complain about using PIC and -G together here.
	Handle OPTION_MVXWORKS_PIC.
	(md_estimate_size_before_relax): Always use the first relaxation
	sequence on VxWorks.
	* config/tc-mips.h (VXWORKS_PIC): New.

gas/testsuite/
	* gas/mips/vxworks1.s, gas/mips/vxworks1.d,
	* gas/mips/vxworks1-xgot.d: New tests.
	* gas/mips/mips.exp: Run them.  Do not run other tests on VxWorks.

include/elf/
	* mips.h (R_MIPS_COPY, R_MIPS_JUMP_SLOT): New relocs.

ld/
	* configure.tgt (mips*el-*-vxworks*, mips*-*-vxworks*): Use
	separate VxWorks emulations.
	* emulparams/elf32ebmipvxworks.sh: New file.
	* emulparams/elf32elmipvxworks.sh: New file.
	* Makefile.am (ALL_EMULATIONS): Add eelf32ebmipvxworks.o and
	eelf32elmipvxworks.o.
	(eelf32ebmipvxworks.c, eelf32elmipvxworks.c): New rules.
	* Makefile.in: Regenerate.

ld/testsuite/
	* ld-mips/vxworks1.dd, ld-mips/vxworks1.ld, ld-mips/vxworks1-lib.dd,
	* ld-mips/vxworks1-lib.nd, ld-mips/vxworks1-lib.rd,
	* ld-mips/vxworks1-lib.s, ld-mips/vxworks1.rd, ld-mips/vxworks1.s,
	* ld-mips/vxworks1-static.d, ld-mips/vxworks2.s, ld-mips/vxworks2.sd,
	* ld-mips/vxworks2-static.sd: New tests.
	* ld-mips/mips-elf.exp: Run them.
2006-03-22 09:28:15 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00