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1922 Commits

Author SHA1 Message Date
Doug Evans 976a48e6c3 * cgen-defs.h (PCADDR,CIA): Define in terms of IADDR. 
(sim_disassemble_insn): Update prototype.
	(sim_engine_invalid_insn): Ditto.
	* cgen-engine.h (SEMANTIC_FN): Add !WITH_SCACHE version.
	(SEM_BRANCH_INIT): PCADDR->IADDR.
	(SEM_NBRANCH_FINI): New macro for !WITH_SCACHE case.
	* cgen-scache.c (scache_lookup,scache_lookup_or_alloc): PCADDR->IADDR.
	* cgen-scache.h (*): Ditto.
	* cgen-trace.c (*): Ditto.
	* cgen-trace.h (*): Ditto.
	* cgen-utils.c (*): Ditto.
	* cgen-types.h (integer modes): Use signedNN/unsignedNN types.
	(insn_t): Delete.
	* genmloop.sh (@cpu@_fill_argbuf): Add !WITH_SCACHE support.
	(simple engine framework): Rewrite.
	* sim-module.c (modules): Install model module sooner (and in
	particular before the profile module).
 1999-01-15 07:02:30 +00:00
Jason Molenda 984b70f0c8 1999-01-13 Jason Molenda (jsm@bugshack.cygnus.com) 
* t-sadd.s: New file.
	* Makefile.in (TESTS): Add t-sadd.

PR 18438.
 1999-01-14 00:46:01 +00:00
Doug Evans 9e507b690e * cgen-trace.c (trace_insn): Pass pc to trace_prefix for virtual insns. 1999-01-12 21:46:47 +00:00
Doug Evans cee25b7cb8 * sim-model.h (sim_mach_lookup_bfd_name): Add prototype. 
* sim-model.c (sim_mach_lookup_bfd_name): New function.
	(sim_model_init): Call it.
 1999-01-12 21:25:21 +00:00
Dave Brolley e1ef54a703 Add new test cases to the list of files to be kept. 1999-01-12 16:27:49 +00:00
Doug Evans 533a502faf * Makefile.in (m32r-clean): rm eng.h. 1999-01-12 00:37:47 +00:00
Doug Evans e64b6cd434 * sim-main.h: Delete inclusion of ansidecl.h. 
* cpu.h: Regenerate.
	* cpux.h: Regenerate.
 1999-01-12 00:25:41 +00:00
Doug Evans e5e95c7d80 keep fr30 1999-01-11 23:16:57 +00:00
Doug Evans b83dc7fc11 keep fr30-elf 1999-01-11 23:15:16 +00:00
Doug Evans 5759b13198 fix typo in comment 1999-01-11 23:14:23 +00:00
Frank Ch. Eigler 6402c01cc2 * gx sim prototype tweaks 
start-sanitize-gxsim
1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
	* sim-gx-run.c (sim_engine_run): Allay warnings.  Write out updated
	gx block list after each successful compilation job.
	* sim-gx.c (sim_gx_compiled_block_f): dlopen the main executable
	image, to allow gx block DLLs to resolve symbols there.
	(sim_gx_{read,write}_block_list): Allay warnings.
	(sim_gx_block_translate): Allay warnings.  Add $GX_FLAGS to
	gx compilation/link jobs.
	* sim-gx.h: Allay warnings.
end-sanitize-gxsim
 1999-01-11 15:06:11 +00:00
Frank Ch. Eigler 11f9c65f91 * build tweak for gx prototype 1999-01-11 15:04:33 +00:00
Frank Ch. Eigler 3372836e0d * Test for PR 18288 and its predecessors. 
1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
	* do-flags.S: New test for parallel PSW update conflicts.
	* Makefile.in (TESTS): Run it.
 1999-01-11 14:48:48 +00:00
Frank Ch. Eigler 0e854a2019 * Removing last known memories of tx3904 and am30 sanitization. 1999-01-07 13:06:14 +00:00
Frank Ch. Eigler 0d320ebfc9 * Test for PR 18679. 
1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
	* do-2wordops.S: New test for sign-extension by ld2h.
 1999-01-07 08:55:49 +00:00
Doug Evans e0eaa63837 * cpu.h: Regenerate. 
* cpux.h: Regenerate.
 1999-01-07 00:08:46 +00:00
Doug Evans 368fc7dba8 * Makefile.in (MAIN_INCLUDE_DEPS): Delete. 
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
	(sim-if.o): Use SIM_MAIN_DEPS.
	(arch.o,traps.o,devices.o): Ditto.
	(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
	(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
	(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
	(stamp-arch): Pass mach=all to cgen-arch.
	* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
	* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
	([GS]ET_H_CR): Define.
	(fr30bf_h_psw_[gs]et_handler): Declare.
	([GS]ET_H_PSW): Define.
	(fr30bf_h_accum_[gs]et_handler): Declare.
	([GS]ET_H_ACCUM): Define.
	(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
	(fr30bf_h_accums_[gs]et_handler): Declare.
	([GS]ET_H_ACCUMS): Define.
	* sim-if.c (sim_open): Model probing code moved to sim-model.c.
	* m32r.c (WANT_CPU): Define as m32rbf.
	(all register access fns): Rename to ..._handler.
	* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
	* m32rx.c (WANT_CPU): Define as m32rxf.
	(all register access fns): Rename to ..._handler.
 1999-01-06 03:04:25 +00:00
Doug Evans f5cd4d758c * Make-common.in (CGEN_INCLUDE_DEPS): Add cgen-defs.h, cgen-engine.h. 
(CGEN_MAIN_SCM): Add rtx-funcs.scm.
	(cgen-arch): Pass $(mach) to cgen.sh.
	* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
	(SEM_BRANCH_INIT_EXTRACT): New macro.
	(SEM_BRANCH_INIT): Add taken_p.
	(TARGET_SEM_BRANCH_FINI): Provide default definition.
	(SEM_BRANCH_FINI): Use it.
	(SEM_INSN): Update.
	* cgen-run.c (sim_resume): Handle tracing of last insn.
	* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
	* cgen-trace.c (current_abuf): New static global.
	(trace_insn_init): Initialize it.
	(trace_insn_fini): Use it.
	(trace_insn): Set it.
	* cgen.sh (arch case): Pass -m ${mach} to cgen.
	* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
	(@cpu@_emit_after): Ditto.
	(simple @cpu@_engine_run_full): New local `pc'.  Initialize semantic
	labels if WITH_SEM_SWITCH_FULL.
	* sim-model.c: Include bfd.h.
	(sim_model_init): New function.
	(sim_model_install): Record init fn.
	* sim-model.h (MACH): New member bfd_name.
	* sim-module.c (modules): Initialize model before scache.
 1999-01-06 00:42:34 +00:00
Jason Molenda d5159c2520 1999-01-04 Jason Molenda (jsm@bugshack.cygnus.com) 
* configure.in: Require autoconf 2.12.1 or higher.
 1999-01-05 00:27:19 +00:00
Frank Ch. Eigler ba50f16ab7 * sky test case updates for MTIR insn PR 
1998-12-31  Frank Ch. Eigler  <fche@cygnus.com>
	* sim/sky/t-cop2.s: Adjust vmtir instruction tests for new syntax.
	* sim/sky/t-cop2.vuexpect: Matching changes.
 1998-12-31 06:00:29 +00:00
Felix Lee d98ee4f5af * sim/sky/sky-defs.tcl: various changes for remote host testing. 
* sim/sky/mload.exp: ditto.
        * sim/sky/sky_sce.exp: ditto.
        * sim/sky/sky_sce_accurate.exp: ditto.
        * sim/sky/sky_sce_fast.exp: ditto.
        * sim/sky/mload.exp: mark as unresolved on error.
 1998-12-31 01:07:51 +00:00
Frank Ch. Eigler 08f758df94 * resolution of eCos-vs.-sky merge conflict! 
[ChangeLog]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
	* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
 	Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
 1998-12-30 21:16:14 +00:00
Stan Shebs bd164e2835 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE> 
* configure.in, configure (mips64vr5*-*-*): Added missing ;; in
 	case statement.
(actually a sanitize-cygnus mistake, but Rainer doesn't know that)
 1998-12-30 21:16:13 +00:00
Frank Ch. Eigler 86df8e79fc * build / debug improvements for gx JIT sim prototype 1998-12-30 18:30:48 +00:00
Frank Ch. Eigler 14bbac6609 * eCos->devo merge; tx3904 sanitize tags removed 
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
	(load_word): Call SIM_CORE_SIGNAL hook on error.
	(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
	starting.  For exception dispatching, pass PC instead of NULL_CIA.
	(decode_coproc): Use COP0_BADVADDR to store faulting address.
	* sim-main.h (COP0_BADVADDR): Define.
	(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
	(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* mips.igen (*): Replace memory-related SignalException* calls
	with references to SIM_CORE_SIGNAL hook.
	* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
	fix.
	* sim-main.c (*): Minor warning cleanups.
 1998-12-30 12:21:43 +00:00
Frank Ch. Eigler a714374d5e * ChangeLog tweak 1998-12-30 12:17:11 +00:00
Frank Ch. Eigler 9b27cf7bbb * eCos->devo merge; am30 sanitization tags removed 
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o.
	* interp.c (sim_open): Add stub mn103002 cache control memory regions.
	Set OPERATING_ENVIRONMENT on "stdeval1" board.
	(mn10300_core_signal): New function to intercept memory errors.
	(program_interrupt): New function to dispatch to exception vector
	(mn10300_exception_*): New functions to snapshot pre/post exception
	state.
	* sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal.
	(SIM_ENGINE_HALT_HOOK): Do nothing.
	(SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* dv-mn103ser.c (*): Support dv-sockser backend for UART I/O.
	Various endianness and warning fixes.
	* mn10300.igen (illegal): Call program_interrupt on error.
	(break): Call program_interrupt on breakpoint
	Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com>
	merged in:
	* dv-mn103int.c (mn103int_ioctl): New function for NMI
	generation. (mn103int_finish): Install it as ioctl handler.
	* dv-mn103tim.c: Support timer 6 specially.  Endianness fixes.
 1998-12-30 12:17:10 +00:00
Frank Ch. Eigler 617ca17ed2 * eCos->devo merge 
1998-12-24  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-sockser.c (DEFAULT_TIMEOUT): Increase to 1 ms.
	* nrun.c (main): Remain in simulation loop for traps and
 	exceptions when in operating environment mode.
	(ui_loop_hook): New stub hook for standalone use.
	* sim-events.c (sim_events_process): Call ui_loop_hook
	periodically on CYGWIN host.
	* sim-reason.c (sim_stop_reason): Return host signal numbers
	to gdb on sim_stopped and sim_signalled cases.
	* sim-engine.c (sim_engine_halt): Call SIM_CPU_EXCEPTION_SUSPEND
 	hook just before longjmp.
	* sim-resume.c (sim_resume): Call SIM_CPU_EXCEPTION_RESUME
 	hook just before sim_engine_run.
	* sim-n-core.h (sim_core_trace_M): Allay const warning.
	* sim-trace.h (trace_generic): Ditto.
	* sim-trace.c (trace_generic): Ditto.
 1998-12-30 12:09:13 +00:00
Gavin Romig-Koch 35d6075ac2 m16.igen (DADDIU5): Correct type-o. 1998-12-24 05:55:42 +00:00
Dave Brolley 27f6ea6995 New testcase. 1998-12-18 22:22:55 +00:00
Dave Brolley f45ee50714 Fri Dec 18 17:09:34 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/ldres.cgs: New testcase.
	* sim/fr30/stres.cgs: New testcase.
	* sim/fr30/copop.cgs: New testcase.
	* sim/fr30/copld.cgs: New testcase.
	* sim/fr30/copst.cgs: New testcase.
	* sim/fr30/copsv.cgs: New testcase.
	* sim/fr30/nop.cgs: New testcase.
	* sim/fr30/andccr.cgs: New testcase.
	* sim/fr30/orccr.cgs: New testcase.
	* sim/fr30/addsp.cgs: New testcase.
	* sim/fr30/stilm.cgs: New testcase.
	* sim/fr30/extsb.cgs: New testcase.
	* sim/fr30/extub.cgs: New testcase.
	* sim/fr30/extsh.cgs: New testcase.
	* sim/fr30/extuh.cgs: New testcase.
	* sim/fr30/enter.cgs: New testcase.
	* sim/fr30/leave.cgs: New testcase.
	* sim/fr30/xchb.cgs: New testcase.
	* sim/fr30/dmovb.cgs: New testcase.
	* sim/fr30/dmov.cgs: New testcase.
	* sim/fr30/dmovh.cgs: New testcase.
 1998-12-18 22:15:44 +00:00
Dave Brolley de6fb7e775 Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
	* sim/fr30/ret.cgs: Add tests fir ret:d.
	* sim/fr30/inte.cgs: New testcase.
	* sim/fr30/reti.cgs: New testcase.
	* sim/fr30/bra.cgs: New testcase.
	* sim/fr30/bno.cgs: New testcase.
	* sim/fr30/beq.cgs: New testcase.
	* sim/fr30/bne.cgs: New testcase.
	* sim/fr30/bc.cgs: New testcase.
	* sim/fr30/bnc.cgs: New testcase.
	* sim/fr30/bn.cgs: New testcase.
	* sim/fr30/bp.cgs: New testcase.
	* sim/fr30/bv.cgs: New testcase.
	* sim/fr30/bnv.cgs: New testcase.
	* sim/fr30/blt.cgs: New testcase.
	* sim/fr30/bge.cgs: New testcase.
	* sim/fr30/ble.cgs: New testcase.
	* sim/fr30/bgt.cgs: New testcase.
	* sim/fr30/bls.cgs: New testcase.
	* sim/fr30/bhi.cgs: New testcase.
 1998-12-17 22:25:05 +00:00
Doug Evans f7fb02ba10 More sce_testNN cases updated, pr 18402. 1998-12-17 22:21:31 +00:00
Doug Evans 331a809018 * sim/sky/sce_test58.vuasm: Update syntax of MTIR insn. 
PR 18402
 1998-12-17 21:29:06 +00:00
Frank Ch. Eigler 0615cacf10 * Sanitization fixes to retain new files. 1998-12-16 16:10:16 +00:00
Gavin Romig-Koch f87366ec28 New 'hack' generator 1998-12-16 05:07:34 +00:00
Felix Lee db48d8218f vr4run.c, keep-if vr4xxx 1998-12-16 02:12:41 +00:00
Gavin Romig-Koch 7d2ec607de missing *vr4320: 1998-12-15 03:31:39 +00:00
Doug Evans 985fe43632 * configure.in: --enable-cgen-maint support moved to common/aclocal.m4. 
(SIM_AC_OPTION_ALIGNMENT): Make strict.
	* configure: Regenerate.

	* sem-switch.c,sem.c,semx-switch.c: Regenerate.
	* sim-main.h (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Define.
	* traps.c (m32r_core_signal): Handle --environment=operating.
 1998-12-15 01:06:46 +00:00
Doug Evans b58ffc7b4e * sim/m32r/uread16.ms: New testcase. 
* sim/m32r/uread32.ms: New testcase.
	* sim/m32r/uwrite16.ms: New testcase.
	* sim/m32r/uwrite32.ms: New testcase.
 1998-12-14 23:31:28 +00:00
Doug Evans 71d0d0a788 * sim/fr30/hello.ms: Add trailing \n to expected output. 
* sim/m32r/hello.ms: Ditto.
	* sim/m32r/hw-trap.ms: Ditto.
 1998-12-14 23:28:41 +00:00
Doug Evans ebc5ff70a2 lib/sim-defs.exp (sim_run): Look for board_info sim,options. 1998-12-14 23:22:25 +00:00
Doug Evans d4dd077a94 * lib/sim-defs.exp (run_sim_test): New option xerror, for expected 
errors.  Translate \n sequences in expected output to newline char.
	(slurp_options): Make parentheses optional.
 1998-12-14 23:17:02 +00:00
Dave Brolley ecbc0c5533 1998-12-14 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/call.cgs: Test ret here as well.
	* sim/fr30/ld.cgs: Remove bogus comment.
	* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
	* sim/fr30/div.ms: New testcase.
	* sim/fr30/st.cgs: New testcase.
	* sim/fr30/sth.cgs: New testcase.
	* sim/fr30/stb.cgs: New testcase.
	* sim/fr30/mov.cgs: New testcase.
	* sim/fr30/jmp.cgs: New testcase.
	* sim/fr30/ret.cgs: New testcase.
	* sim/fr30/int.cgs: New testcase.
 1998-12-14 20:06:17 +00:00
Gavin Romig-Koch bff2d36890 5xxx and el 1998-12-14 15:14:24 +00:00
Gavin Romig-Koch f14397f057 for bfd: 
* archures.c,bfd-in2.h (bfd_mach_mips4121): New.
	* cpu-mips.c: Added vr4121.
	* elf32-mips.c (elf_mips_mach): Same.
	(_bfd_mips_elf_final_write_processing): Same.

for gas:
	* config/tc-mips.c (mips_4121): New.
	(md_begin,mips_ip,md_longopts,md_parse_option): Add vr4121.

for gcc:
	* config/mips/mips.c (override_options): Add vr4121.
	* config/mips/t-vr4xxx (MULTILIB_MATCHES): Same.

for include/elf:
	* mips.h (E_MIPS_MACH_4121): New.

for include/opcode:
	* mips.h (INSN_4121): New.

for opcodes:
	* mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121.
	(_print_insn_mips): Same.
	* mips-opc.c: Add vr4121.

for sim/mips:
	* configure.in,mips.igen,vr.igen: Add vr4121.
	* configure: Rebuilt.
 1998-12-13 16:14:24 +00:00
Gavin Romig-Koch 82aeada70c * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR. 
Set mips_fpu, and mips_fpu_bitsize.
	Set sim_gen, and sim_igen_machine.
	* configure: Rebuild.
	* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
	* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
 1998-12-12 22:43:54 +00:00
Gavin Romig-Koch eac6dec56e Cleanups. 1998-12-11 15:18:54 +00:00
Andrew Cagney 94a4ff1901 Compare with ZERO not NULL. 1998-12-11 06:00:55 +00:00
Dave Brolley d8d144a0ab Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> 
* sim/fr30/div0s.cgs: New testcase.
	* sim/fr30/div0u.cgs: New testcase.
	* sim/fr30/div1.cgs: New testcase.
	* sim/fr30/div2.cgs: New testcase.
	* sim/fr30/div3.cgs: New testcase.
	* sim/fr30/div4s.cgs: New testcase.
	* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
 1998-12-10 23:48:37 +00:00