Commit Graph

4202 Commits

Author SHA1 Message Date
Nick Clifton d02603dc20 Allow symbol and label names to be enclosed in double quotes.
gas	PR gas/18581
	* expr.c (get_symbol_end): Rename to get_symbol_name.  Add a
	return parameter pointing to the start of the symbol.  Allow
	symbol names enclosed in double quotes.
	(restore_line_pointer): New function.  Replace the NUL character
	inserted into the input stream with the given character.  If the
	character was a double quote, advance the input pointer.
	* expr.h (get_symbol_end): Delete.
	(get_symbol_name): Add prototype.
	(restore_line_pointer): Prototype.
	* read.h (SKIP_WHITESPACE_AFTER_NAME): New macro.
	* doc/as.texinfo (Symbol Intro): Document that symbol names can
	now be enclosed in double quotes.
	* cond.c (s_ifdef): Replace get_symbol_end with get_symbol_name.
	Use restore_line_pointer to replace the NUL in the input stream.
	Use SKIP_WHITESPACE_AFTER_NAME to skip past the end of a symbol.
	Check for the use of double quoted symbol names.
	* expr.c: Likewise.
	* config/obj-aout.c: Likewise.
	* config/obj-coff-seh.c: Likewise.
	* config/obj-coff.c: Likewise.
	* config/obj-elf.c: Likewise.
	* config/obj-evax.c: Likewise.
	* config/obj-macho.c: Likewise.
	* config/obj-som.c: Likewise.
	* config/tc-alpha.c: Likewise.
	* config/tc-arc.c: Likewise.
	* config/tc-arm.c: Likewise.
	* config/tc-dlx.c: Likewise.
	* config/tc-h8300.c: Likewise.
	* config/tc-hppa.c: Likewise.
	* config/tc-i370.c: Likewise.
	* config/tc-i386-intel.c: Likewise.
	* config/tc-i386.c: Likewise.
	* config/tc-i960.c: Likewise.
	* config/tc-ia64.c: Likewise.
	* config/tc-iq2000.c: Likewise.
	* config/tc-m32r.c: Likewise.
	* config/tc-m68hc11.c: Likewise.
	* config/tc-m68k.c: Likewise.
	* config/tc-microblaze.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-mmix.c: Likewise.
	* config/tc-mn10200.c: Likewise.
	* config/tc-mn10300.c: Likewise.
	* config/tc-nios2.c: Likewise.
	* config/tc-ppc.c: Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-score.c: Likewise.
	* config/tc-score7.c: Likewise.
	* config/tc-sparc.c: Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c: Likewise.
	* config/tc-tic6x.c: Likewise.
	* config/tc-tilegx.c: Likewise.
	* config/tc-tilepro.c: Likewise.
	* config/tc-v850.c: Likewise.
	* config/tc-xtensa.c: Likewise.
	* config/tc-z80.c: Likewise.
	* dw2gencfi.c: Likewise.
	* dwarf2dbgc.: Likewise.
	* ecoff.c: Likewise.
	* read.c: Likewise.
	* stabs.c: Likewise.

tests	PR gas/18581
	* gas/all/byte.d: Disable this test.  Quoted expressions
	are now allowed in .byte directives.
	* gas/all/quoted-sym-names.s: New test.
	* gas/all/quoted-sym-names.d: Expected output.
	* gas/all/gas.exp: Run the new test.
2015-08-21 16:42:14 +01:00
Jiong Wang 4c5625238c [AArch64][5/6] GAS support TLSLD load/store relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c: New entries, including
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation types support for
  dtprel_lo12.
  (ldst_lo12_determine_real_reloc_type): Support
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
  BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
  (parse_operands): Likewise.
  (md_apply_fix): Likewise
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
  * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
Jiong Wang 49df5539f9 [AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
Jiong Wang 13289c10e2 [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
Alan Modra db2ed2e0b9 Rationalize ARM .align
* gas/config/tc-arm.c (s_align): Delete.
	(md_pseudo_table): Use s_align_ptwo for "align".
	* gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
	* read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT.
2015-08-17 09:05:54 +09:30
Max Filippov b46824bd49 xtensa: add --auto-litpools option
Auto-litpools is the automated version of text-section-literals: literal
pool candidate frags are planted every N frags and during relaxation
they are turned into actual literal pools where literals are moved to
become reachable for their first reference by L32R instruction.

2015-08-12  David Weatherford  <weath@cadence.com>
gas/
	* config/tc-xtensa.c (struct litpool_frag, struct litpool_seg):
	New structures.
	(xtensa_maybe_create_literal_pool_frag): New function.
	(litpool_seg_list, auto_litpools, auto_litpool_limit)
	(litpool_buf, litpool_slotbuf): New static variables.
	(option_auto_litpools, option_no_auto_litpools)
	(option_auto_litpool_limit): New enum identifiers.
	(md_longopts): Add entries for auto-litpools, no-auto-litpools
	and auto-litpool-limit.
	(md_parse_option): Handle option_auto_litpools,
	option_no_auto_litpools and option_auto_litpool_limit.
	(md_show_usage): Add help for --[no-]auto-litpools and
	--auto-litpool-limit.
	(xtensa_mark_literal_pool_location): Record a place for literal
	pool with a call to xtensa_maybe_create_literal_pool_frag.
	(get_literal_pool_location): Find highest priority literal pool
	or convert candidate to literal pool when auto-litpools are used.
	(xg_assemble_vliw_tokens): Create literal pool after jump
	instruction.
	(xtensa_check_frag_count): Create candidate literal pool every
	auto_litpool_limit frags.
	(xtensa_relax_frag): Add jump around literals to non-empty
	literal pool.
	(xtensa_move_literals): Estimate literal pool addresses and move
	unreachable literals closer to their users, converting candidate
	to literal pool if needed.
	(xtensa_switch_to_non_abs_literal_fragment): Only emit error
	about missing .literal_position in case auto-litpools are not
	used.
	* config/tc-xtensa.h (xtensa_relax_statesE): New relaxation
	state: RELAX_LITERAL_POOL_CANDIDATE_BEGIN.
	* doc/as.texinfo (Xtensa options):  Document --auto-litpools and
	--no-auto-litpools options.
	* doc/c-xtensa.texi (Xtensa options): Likewise.

2015-08-12  Max Filippov  <jcmvbkbc@gmail.com>
gas/testsuite/
	* gas/xtensa/all.exp: Add auto-litpools to the list of xtensa
	tests.
	* gas/xtensa/auto-litpools.s: New file: auto-litpools test.
	* gas/xtensa/auto-litpools.s: New file: auto-litpools test
	result pattern.
2015-08-12 20:19:58 +03:00
Simon Dardis 40fc1451c6 [MIPS] Map 'move' to 'or'.
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.

2015-08-12  Simon Dardis  <simon.dardis@imgtec.com>

opcodes/

	* micromips-opc.c (micromips_opcodes): Re-order table so that move
	based on 'or' is first.
	* mips-opc.c (mips_builtin_opcodes): Ditto.

bfd/

	* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
	(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
	mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
	Update to use 'or' instead of 'addu/daddu'.
	(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
	(move_insns_32): Reorder table.

gas/

	* config/tc-mips.c (move_register): Change to use 'or' only.
	(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
	use or for move.

gas/testsuite/

	* gas/mips/elf-rel23.d: Update test.
	* gas/mips/elf-rel23.d: Ditto.
	* gas/mips/elf-rel23a.d: Ditto.
	* gas/mips/elf-rel23b.d: Ditto.
	* gas/mips/elf_e_flags1.d: Ditto.
	* gas/mips/elf_e_flags2.d: Ditto.
	* gas/mips/elf_e_flags3.d: Ditto.
	* gas/mips/elf_e_flags4.d: Ditto.
	* gas/mips/loc-swap-dis.d: Ditto.
	* gas/mips/micromips-insn32.d: Ditto.
	* gas/mips/micromips-noinsn32.d: Ditto.
	* gas/mips/micromips-trap.d: Ditto.
	* gas/mips/micromips.d: Ditto.
	* gas/mips/mips-abi32-pic.d: Ditto.
	* gas/mips/mips-abi32.d: Ditto.
	* gas/mips/mips-gp32-fp32-pic.d: Ditto.
	* gas/mips/mips-gp32-fp32.d: Ditto.
	* gas/mips/mips-gp32-fp64-pic.d: Ditto.
	* gas/mips/mips-gp32-fp64.d: Ditto.
	* gas/mips/mips-gp64-fp32-pic.d: Ditto.
	* gas/mips/mips-gp64-fp32.d: Ditto.
	* gas/mips/mips-gp64-fp64-pic.d: Ditto.
	* gas/mips/mips-gp64-fp64.d: Ditto.
	* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
	* gas/mips/tls-o32.d: Ditto.
	* gas/mips/uld2-eb.d: Ditto.
	* gas/mips/uld2-el.d: Ditto.
	* gas/mips/ulw2-eb-ilocks.d: Ditto.
	* gas/mips/ulw2-eb.d: Ditto.
	* gas/mips/ulw2-el-ilocks.d: Ditto.
	* gas/mips/ulw2-el.d: Ditto.
	* gas/mips/move.d: New test.
	* gas/mips/move.s: Ditto.
	* gas/mips/micromips32-move.d: Ditto.
	* gas/mips/micromips32-move.s: Ditto.
	* gas/mips/mips.exp: Run the new tests.

gold/

	* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
	lazy_stub_normal_1, lazy_stub_normal_1_n64,
	lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
	lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
	lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
	lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
	of 'addu/daddu'.

ld/testsuite/

	* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
	* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
	* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
	* ld-mips-elf/jalx-2.dd: Ditto.
	* ld-mips-elf/mips16-pic-3.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
	* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
	* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
	* ld-mips-elf/tlsbin-o32.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
	* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
	* ld-mips-elf/tlsdyn-o32.d: Ditto.
	* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00
H.J. Lu 3739860c11 Remove trailing spaces in gas 2015-08-12 04:40:42 -07:00
Jiong Wang 70151fb54a [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

include/elf/
  * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers
  "dtprel_lo12".
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
  * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
Jiong Wang a12fad50d2 [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00
Jiong Wang 1107e076cf [AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm-page-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11 21:24:38 +01:00
Nick Clifton eff0bc54a3 Fix compile time warning messages about constant expressions where a value is being shifted into bit 31.
PR gas/18765
	* config/tc-arm.c (move_or_literal_pool): Use U suffix to remove
	compile time warnings about constant expressions being shifted
	into bit 31.
	(do_iwmmxt_wldstd): Likewise.
	(do_iwmmxt_wrwrwr_or_imm5): Likewise.
	(md_assemble): Likewise.
2015-08-11 10:07:21 +01:00
Nick Clifton e66c3c2568 Convert 'A && (!A || B)' to 'A || B' in various places.
PR gas/18574
	* config/tc-msp430.c (msp430_operands): Rewrite if statements to
	remove redundant checks.
	(md_apply_fix): Likewise.
2015-08-11 09:49:18 +01:00
Nick Clifton d29b2a1ece Fix typo checking MMIX operands.
PR gas/18677
	* config/tc-mmix.c (md_assemble): Fix typo checking operands with
	a numeric constant value.
2015-08-11 09:43:16 +01:00
Nick Clifton 88fd0449a3 Fix typo checking number of operands.
PR gas/18678
	* config/tc-tic4x.c (tic4x_insn_check): Fix typo.
2015-08-11 09:40:02 +01:00
Nick Clifton 2b29bb41d5 Fix a typo where the same name was checked twice.
PR gas/18679
	* config/xtensa-relax.c (same_operand_name): Fix typo.
2015-08-11 09:36:57 +01:00
Hans-Peter Nilsson 8fe3f3d6af tc-arm.c: Append ULL to 0xFFFFFFFFFFFFF to avoid errors on 32-bit hosts. 2015-08-08 22:44:37 +02:00
Robert Suchanek c6e5c03a2c Add cores for M5100 series
gas/

	* config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries.
	* doc/c-mips.texi: Document m5100 and m5101 for -march=.
2015-07-28 11:26:39 +01:00
Robert Suchanek 77403ce966 Add -march=interaptiv
gas/

	* config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry.
	* doc/c-mips.text: Document -march=interaptiv.
2015-07-28 11:26:31 +01:00
Nick Clifton aff1a65ecb Fix the evaluation of RL78 complex relocs, by making immediate values be computed relative to a new absolute symbol.
gas	* config/tc-rl78.c (rl78_abs_sym): New local variable.
	(md_begin): Initialise the new symbol.
	(OPIMM): Define the value to be relative to the new symbol and not
	the absolute section symbol.

ld	* emulparams/elf32rl78.sh (OTHER_SECTIONS): Provide a value for
	the _-rl78_abs__ symbol.

tests	* gas/all/struct.d: Allow for extra symbols in the output.
	* gas/macros/test1.d: Likewise.
	* gas/elf/elf.exp: Add an rl78 machine.
	* gas/elf/sections2e-rl78: New file.

tests	* binutils-all/localize-hidden-1.d: Allow for extra symbols in the
	output.
        * binutils-all/strip-11.d: Skip for the RL78.
2015-07-24 16:44:27 +01:00
Matthew Wahab f33026a965 [ARM] Support correctly spelled ARMv6KZ architecture names
2015-07-20  Matthew Wahab  <matthew.wahab@arm.com>

gas/
    * NEWS: Mention corrected spelling of armv6kz.
    * config/tc-arm.c (arm_cpus): Replace ARM_ARCH_V6ZK with
    ARM_ARCH_V6KZ.
    (arm_archs): Likewise. Also add "armv6kz" and "armv6kzt2".
    * doc/c-arm.texi: Replace "armv6zk" with "armv6kz".

gas/testsuite

    * gas/arm/attr-march-armv6kz.d: New.
    * gas/arm/attr-march-armv6kzt2.d: New.

include/opcode

    * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ.
    (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2.
    (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ.
    (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
2015-07-21 09:43:35 +01:00
Jiong Wang 6c37fedc41 [AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21 2015-07-16 15:43:21 +01:00
Matthew Wahab 081e4c7d67 [ARM] Add crypto-neon-fp-armv8.1 as an fpu option
2015-07-16  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-arm.c (arm_fpus): Add crypto-neon-fp-armv8.1.
  * doc/c-arm.texi (-mfpu=): Likewise.  Correct the entry for
  neon-fp-armv8.1.
2015-07-16 15:11:30 +01:00
James Greenhalgh 84b52b6651 [ARM] Make human parsing of "processor does not support instruction in mode" error messages easier
2015-07-16  James Greenhalgh  <james.greenhalgh@arm.com>

      gas/
	* config/tc-arm.c (md_assemble): Rephrase the "selected processor does
	not support ARM mode" error messages.

      gas/testsuite/
	* gas/arm/arch7em-bad.l: Update expected errors.
	* gas/arm/arch7m-bad.l: Likewise.
	* gas/arm/arm-idiv-bad.l: Likewise.
	* gas/arm/arm7-bad.l: Likewise.
	* gas/arm/armv1-bad.l: Likewise.
	* gas/arm/thumb-w-bad.l: Likewise.
2015-07-16 14:43:00 +01:00
H.J. Lu 189ebcf915 Make x86 Linux assembler default to gABI compliant
The default compression is gABI compliant now.  This patch makes the
x86 Linux assembler default to gABI compliant.

	* config/tc-i386.c (flag_compress_debug): Replace
	COMPRESS_DEBUG_GNU_ZLIB with COMPRESS_DEBUG_GABI_ZLIB.
2015-07-15 07:31:55 -07:00
Catherine Moore 3350cc01de 2015-07-09 Catherine Moore <clm@codesourcery.com>
include/
        * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.

        gas/
        * config/tc-mips.c (check_fpabi):  Handle
        VAL_GNU_MIPS_ABI_FP_NAN2008.

        binutils/
        * readelf.c (print_mips_fp_abi_value): Handle
        Val_GNU_MIPS_ABI_FP_NAN2008.

        ld/testsuite/
        * ld-mips-elf/attr-gnu-4-08.d: Update expected output.
        * ld-mips-elf/attr-gnu-4-09.d: New.
        * ld-mips-elf/attr-gnu-4-19.d: New.
        * ld-mips-elf/attr-gnu-4-29.d: New.
        * ld-mips-elf/attr-gnu-4-39.d: New.
        * ld-mips-elf/attr-gnu-4-49.d: New.
        * ld-mips-elf/attr-gnu-4-59.d: New.
        * ld-mips-elf/attr-gnu-4-69.d: New.
        * ld-mips-elf/attr-gnu-4-79.d: New.
        * ld-mips-elf/attr-gnu-4-89.d: New.
        * ld-mips-elf/attr-gnu-4-9.s: New.
        * ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-09 08:26:10 -07:00
Denis Chertykov 328e7bfdde Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.

bfd/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf32-avr.c: Add 32 bit PC relative relocation for AVR target.

gas/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
    32 bit PC relative and update offset if the fixup is pc-relative.
    * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
    relocs.

gas/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
    * gas/avr/per-function-debugline.s: New test source.

include/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf/avr.h: Add new 32 bit PC relative relocation.

ld/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * ld-avr/gc-section-debugline.d: New test.
    * ld-avr/per-function-debugline.s: Source for new test.
2015-07-08 21:41:52 +03:00
Alan Modra ef5a96d564 Remove ppc860, ppc750cl, ppc7450 insns from common ppc.
Back in the day support for these processors was added, we probably
didn't want to waste PPC_OPCODE bits on minor variations.  I've had a
complaint that disassembly of mfspr/mtspr was wrong for power8.  This
patch fixes that problem.

Note that since -m860/-m850/-m821 are new gas options enabling the
mpc8xx specific mfspr/mtspr variants it is possible that this change
will break some mpc8xx assembly code.  ie. you might need to modify
makefiles to pass -m860 to gas.

include/opcode/
	* ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define.
opcodes/
	* ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*.
	* ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries.  Add
	PPC_OPCODE_7450 to 7450 entry.  Add PPC_OPCODE_750 to 750cl entry.
gas/
	* config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860.
	* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
	* gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
2015-07-03 10:57:14 +09:30
Sandra Loosemore c8c8175b62 Opcodes and assembler support for Nios II R2
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	gas/
	* config/tc-nios2.c (nios2_min_align): New.
	(nop): Replace with....
	(nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New.
	(nios2_align): Handle alignment on 2-byte boundaries when CDX
	instructions may be present.
	(s_nios2_align): Adjust reference to nop.
	(CDXBRANCH, IS_CDXBRANCH): New.
	(CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New.
	(nios2_relax_subtype_size): Handle 2-byte CDX branches.
	(nios2_relax_frag): Likewise.
	(md_convert_frag): Handle R2 encodings.
	(nios2_check_overflow): Check that low-order bits are zero
	before applying rightshift from howto.
	(nios2_check_overflow): Correct negative overflow calculation.
	(nios2_diagnose_overflow): Handle signed_immed12_overflow.  Issue
	generic overflow messages for miscellaneous instruction formats.
	(md_apply_fix): Recognize new R2 relocations.  For pc_relative
	relocations, store fixup in *valP.
	(nios2_reglist_mask, nios2_reglist_dir): New.
	(nios2_parse_reglist): New.
	(nios2_parse_base_register): New.
	(nios2_assemble_expression): Handle constant expressions designated
	by BFD_RELOC_NONE.
	(nios2_assemble_reg3): New.
	(nios2_assemble_arg_c): Handle R2 instruction formats.
	(nios2_assemble_arg_d): Likewise.
	(nios2_assemble_arg_s): Likewise.
	(nios2_assemble_arg_t): Likewise.
	(nios2_assemble_arg_D): New.
	(nios2_assemble_arg_S): New.
	(nios2_assemble_arg_T): New.
	(nios2_assemble_arg_i): Handle R2 instruction formats.
	(nios2_assemble_arg_I): New.
	(nios2_assemble_arg_u): Handle R2 instruction formats.
	(nios2_assemble_arg_U): New.
	(nios2_assemble_arg_V): New.
	(nios2_assemble_arg_W): New.
	(nios2_assemble_arg_X): New.
	(nios2_assemble_arg_Y): New.
	(nios2_assemble_arg_o): Handle R2 instruction formats.
	(nios2_assemble_arg_O): New.
	(nios2_assemble_arg_P): New.
	(nios2_assemble_arg_j): Handle R2 instruction formats.
	(nios2_assemble_arg_k): New.
	(nios2_assemble_arg_l): Handle R2 instruction formats.
	(nios2_assemble_arg_m): Likewise.
	(nios2_assemble_arg_M): New.
	(nios2_assemble_arg_N): New.
	(nios2_assemble_arg_e): New.
	(nios2_assemble_arg_f): New.
	(nios2_assemble_arg_g): New.
	(nios2_assemble_arg_h): New.
	(nios2_assemble_arg_R): New.
	(nios2_assemble_arg_B): New.
	(nios2_assemble_args): Handle new argument letters.
	(nios2_consume_arg): Likewise.
	(nios2_translate_pseudo_insn): Avoid dereferencing null pointer
	in error message.
	(nios2_ps_insn_info_structs): Add nop.n.
	(output_ubranch): Handle CDX branches.
	(output_cbranch): Likewise.
	(output_call): Handle R2 encodings.
	(output_movia): Likewise.
	(md_begin): Initialize nios2_min_align.
	(md_assemble): Align to nios2_min_align.  Adjust nios2_min_align
	if a 16-bit instruction is seen.
	(nios2_cons_align): Use appropriate nop pattern.

	include/opcode/
	* nios2.h (enum iw_format_type): Add R2 formats.
	(enum overflow_type): Add signed_immed12_overflow and
	enumeration_overflow for R2.
	(struct nios2_opcode): Document new argument letters for R2.
	(REG_3BIT, REG_LDWM, REG_POP): Define.
	(includes): Include nios2r2.h.
	(nios2_r2_opcodes, nios2_num_r2_opcodes): Declare.
	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare.
	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare.
	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare.
	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare.
	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):
	Declare.
	* nios2r2.h: New file.

	opcodes/
	* nios2-dis.c (nios2_extract_opcode): New.
	(nios2_disassembler_state): New.
	(nios2_find_opcode_hash): Use mach parameter to select correct
	disassembler state.
	(nios2_print_insn_arg): Extend to support new R2 argument letters
	and formats.
	(print_insn_nios2): Check for 16-bit instruction at end of memory.
	* nios2-opc.c (nios2_builtin_regs): Add R2 register attributes.
	(NIOS2_NUM_OPCODES): Rename to...
	(NIOS2_NUM_R1_OPCODES): This.
	(nios2_r2_opcodes): New.
	(NIOS2_NUM_R2_OPCODES): New.
	(nios2_num_r2_opcodes): New.
	(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New.
	(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New.
	(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New.
	(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New.
	(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):	New.
2015-07-01 16:08:03 -07:00
Sandra Loosemore 965b1d8083 Add Nios II arch flags and compatibility tests
2015-07-01  Sandra Loosemore  <sandra@codesourcery.com>
	    Cesar Philippidis  <cesar@codesourcery.com>

	bfd/
	* archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New.
	* bfd-in2.h: Regenerated.
	* cpu-nios2.c (nios2_compatible): New.
	(N): Use nios2_compatible instead of bfd_default_compatible.
	(NIOS2R1_NEXT, NIOS2R2_NEXT): Define.
	(arch_info_struct): New.
	(bfd_nios2_arch): Chain to NIOS2R1_NEXT.
	* elf32-nios2.c (is_nios2_elf): New.
	(nios2_elf32_merge_private_bfd_data): New.
	(nios2_elf32_object_p): New.
	(bfd_elf32_bfd_merge_private_bfd_data): Define.
	(elf_backend_object_p): Define.

	gas/
	* config/tc-nios2.c: Adjust includes.
	(OPTION_MARCH): Define.
	(md_longopts): Add -march option.
	(nios2_architecture): New.
	(nios2_use_arch): New.
	(md_parse_option): Handle OPTION_MARCH.
	(md_show_usage): Document -march.
	(md_begin): Set arch in BFD.
	(nios2_elf_final_processing): New.
	* config/tc-nios2.h (elf_tc_final_processing): Define.
	(nios2_elf_final_processing): New.
	* doc/c-nios2.texi (-march): Add documentation.

	include/elf/
	* nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define.

	ld/testsuite/
	* ld-nios2/mixed1a.d: New.
	* ld-nios2/mixed1a.s: New.
	* ld-nios2/mixed1b.d: New.
	* ld-nios2/mixed1b.s: New.
	* ld-nios2/nios2.exp: Build the new compatibility tests.
2015-07-01 15:55:28 -07:00
Amit Pawar 9916071f8d Add support for monitorx/mwaitx instructions
gas/

	* config/tc-i386.c (cpu_arch): Add .mwaitx.
	(process_immext): Check operands for monitorx/mwaitx instructions.
	* doc/c-i386.texi: Document mwaitx.

gas/testsuite/

	* gas/i386/i386.exp: Add new mwaitx test cases.
	* gas/i386/mwaitx.s: New.
	* gas/i386/mwaitx-bdver4.d: New.
	* gas/i386/x86-64-mwaitx.s: New.
	* gas/i386/x86-64-mwaitx-bdver4.d: New.
	* gas/i386/mwaitx-reg.s: New.
	* gas/i386/mwaitx-reg.l: New.
	* gas/i386/x86-64-mwaitx-reg.l: New.
	* gas/i386/x86-64-mwaitx-reg.s: New.
	* gas/i386/arch-13.s: Updated.
	* gas/i386/arch-13.d: Updated.
	* gas/i386/arch-13-znver1.d: Updated.
	* gas/i386/x86-64-arch-3.s: Updated.
	* gas/i386/x86-64-arch-3.d: Updated.
	* gas/i386/x86-64-arch-3-znver1.d: Updated.

opcodes/

	* i386-dis.c (OP_Mwaitx): New.
	(rm_table): Add monitorx/mwaitx.
	* i386-gen.c (cpu_flag_init): Add CpuMWAITX to CPU_BDVER4_FLAGS
	and CPU_ZNVER1_FLAGS.  Add CPU_MWAITX_FLAGS.
	(operand_type_init): Add CpuMWAITX.
	* i386-opc.h (CpuMWAITX): New.
	(i386_cpu_flags): Add cpumwaitx.
	* i386-opc.tbl: Add monitorx and mwaitx.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2015-06-30 07:50:12 -07:00
Nick Clifton 54f66250d7 Add support for SADDR addressing to the RL78 port.
gas	* config/rl78-parse.y: Tag all saddr expressions throughout.
	(SET_SA): New.
	(expr_is_saddr): Allow symbolic expressions.
	* config/tc-rl78.c (md_apply_fix): Handle SADDR.

bfd	* elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR.
        (rl78_reloc_map): Add R_RL78_RH_SADDR.
	* reloc.c: Add BFD_RELOC_RL78_SADDR.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Regenerate.
2015-06-30 11:25:18 +01:00
H.J. Lu ee0c0c503d Remove COMPRESS_DEBUG_ZLIB
COMPRESS_DEBUG_ZLIB isn't needed.  This patch removes COMPRESS_DEBUG_ZLIB
and replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.

bfd/

	* bfd-in.h (compressed_debug_section_type): Remove
	COMPRESS_DEBUG_ZLIB.
	* bfd-in2.h : Regenerated.
gas/

	* as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with
	COMPRESS_DEBUG_GNU_ZLIB.
	* config/tc-i386.c (flag_compress_debug): Likewise.

ld/

	* emultempl/elf32.em  (gld${EMULATION_NAME}_handle_option):
	Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.
2015-06-28 06:30:10 -07:00
Peter Bergner 11a0cf2ec0 Allow for optional operands with non-zero default values.
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand
with the value of either a 0 or 1.  It also defines an extended mnemonic
with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1".
I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the
problem is, optional operands that are ommitted always default to the
value 0, which is wrong in this case.  I have added support for allowing
non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE
that specifies that the default operand value to be used is stored in the
SHIFT field of the operand field immediately following this one.

This fixes the rfebb issue.  I also fixed the mftb and mfcr instructions
so they use the same mechanism.  This allows us to flag invalid uses of
mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd].

include/opcode/

	* ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New.
	(ppc_optional_operand_value): New inline function.

opcodes/
	* ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value.
	* ppc-opc.c (FXM4): Add non-zero optional value.
	(TBR): Likewise.
	(SXL): Likewise.
	(insert_fxm): Handle new default operand value.
	(extract_fxm): Likewise.
	(insert_tbr): Likewise.
	(extract_tbr): Likewise.

gas/
	* config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value.
	Allow for optional operands without insert functions.

gas/testsuite/
	* gas/ppc/power8.d: Fixup rfebb test results.
	* gas/ppc/a2.s: Fix invalid mfcr test.
	* gas/ppc/a2.d: Likewise.
2015-06-19 17:17:07 -05:00
Nick Clifton c12d2c9d48 Add support for using the ADR alias in Thumb mode against nearby symbols.
PR gas/18541
gas	* config/tc-arm.c (md_apply_fix): Add support for ADR in thumb
	mode against a nearby symbol.

tests	* gas/arm/thumb.s: Add test of ADR against a nearby symbol.
	* gas/arm/thumb.d: Update expected output.
	* gas/arm/thumb-eabi.d: Likewise.
2015-06-18 10:23:16 +01:00
Nick Clifton 75c1199967 Fix the computation of the addends for an ARM_TLS_LE32 reloc.
PR gas/18481
bfd	* elf32-arm.c (R_ARM_TLS_LE32): Set the special function to NULL.

gas	* config/tc-arm.c (tc_gen_reloc): Include BFD_RELOC_ARM_TLS_LE32
	in the same case as BFD_RELOC_ARM_TLS_IS32.

tests	* gas/arm/tls.s: Add tests of the tpoff pseudo with a local
	symbol.
	* gas/arm/tls.d: Update expected output.
2015-06-18 10:18:42 +01:00
Nick Clifton 5fc177c895 Fix compile warnings building previous delta in a 32-bit environment.
* config/tc-arm.c (is_double_a_single): Make conditional upon the
	availablity of a 64-bit type.  Use this type for the argument and
	mantissa.
	(double_to_single): Likewise.
	* config/tc-arm.c (move_or_literal_pool): Use a 64-bit type for
	the constant value, if available.  Generate a 64-bit value from a
	bignum if supported.  Only perform the second optimization for
	PR 18500 if the 64-bit type is available.
2015-06-17 16:10:36 +01:00
Alessandro Marzocchi 1256987795 Add support for converting LDR Rx,=<imm> to MOV or MVN in Thumb2 mode.
PR gas/18499
gas	* config/tc-arm.c (move_or_literal_pool): Add support for LDR Rx,=
	to MOV.w or MVN.w for Thumb2.

tests	* gas/arm/thumb2_ldr_immediate_armv6.s: New test case.
	* gas/arm/thumb2_ldr_immediate_armv6.d: Expected disassembly.
	* gas/arm/thumb2_ldr_immediate_armv6t2.s: New test case.
	* gas/arm/thumb2_ldr_immediate_armv6t2.d: Expected disassembly.
2015-06-17 13:50:52 +01:00
Alessandro Marzocchi ba592044bc Add support for converting VLDR <reg>,=<constant> to a VMOV instruction when appropriate.
PR gas/18500
gas	* config/tc-arm.c (is_double_a_single): New function.
	(double_to_single): New function.
	(move_or_literal_pool): Add support for	converting VLDR to VMOV.

tests	* gas/arm/vfpv2-ldr_immediate.s: New test case.
	* gas/arm/vfpv2-ldr_immediate.d: Expected disassembly.
	* gas/arm/vfpv3-ldr_immediate.s: New test case.
	* gas/arm/vfpv3-ldr_immediate.d: Expected disassembly.
	* gas/arm/vfpv3xd-ldr_immediate.s: New test case.
	* gas/arm/vfpv3xd-ldr_immediate.d: Expected disassembly.
2015-06-17 12:56:17 +01:00
Nicolas Pitre 451133cefa gas: section name substitution sequence
This patch adds the ability to automatically construct a section name
based on the prior section.

When gas is invoked with --sectname-subst, the occurrence of %S in a
section name will be substituted by the name of the current section. For
example:

	.macro exception_code
	.pushsection %S.exception
	[exception code here]
	.popsection
	.endm

	.text
	[code]
	exception_code
	[...]

	.section .init
	[init code]
	exception_code
	[...]

The first and second exception_code invocations create the
.text.exception and the .init.exception sections respectively.  This is
useful e.g. to discriminate between anciliary sections that are tied to
.init code and can be discarded at run time when initialization is over
vs anciliary sections tied to .text sections that need to stay resident.

	* as.c (show_usage): Document --sectname-subst.
	(parse_args): Add --sectname-subst.
	* as.h (flag_sectname_subst): New.
	* config/obj-elf.c (obj_elf_section_name): Add %S substitution.
	* doc/as.texinfo: Document it.
2015-06-17 08:52:00 +09:30
Renlin Li 87f5fbcc7a [AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 support
2015-06-15  Renlin Li <renlin.li@arm.com>
bfd/
    * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry.
    * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
    BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    * bfd-in2.h: Regenerate.
    * libbfd.h: Regenerate.

gas/
    * config/tc-aarch64.c (reloc_table): New relocation modifier.
    (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15.
    (aarch64_force_relocation): Ditto

gas/testsuite/
    * gas/aarch64/reloc-insn.s: Update test
    * gas/aarch64/reloc-insn.d: Update expected result.
2015-06-15 11:07:37 +01:00
John David Anglin 18c208b229 tc-hppa.c: Speed up search for last label 2015-06-11 18:50:39 -04:00
Nick Clifton f0e8c65e02 Fix RX GAS handling of integer bignums.
* config/tc-rx.c (rx_op): Correct handling of integer bignums.
2015-06-08 11:32:38 +01:00
Nick Clifton 239c0f4ceb Fix compile time warning for tc-h8300.c when using gcc 5+.
* config/tc-h8300.c (md_section_align): Fix compile time warning
	about left shifting a negative value.
2015-06-04 16:25:03 +01:00
Matthew Wahab 88f0ea342d [AArch64] Add support for ARMv8.1 command line option 2015-06-04 11:14:07 +01:00
Jiong Wang b968d18a6d [ARM] Use frag's thumb_mode information when available
2015-06-04  Renlin Li  <renlin.li@arm.com>

	* config/tc-arm.c (arm_init_frag): Use frag's thumb_mode information
	when available.
2015-06-04 09:36:35 +01:00
Matthew Wahab a5932920ef [ARM] Support for ARMv8.1 command line option
2015-06-03  Matthew Wahab  <matthew.wahab@arm.com>

gas/
	* config/tc-arm.c (arm_archs): Add "armv8.1-a".
	* doc/c-arm.texi (ARM Options, -march): Add "armv8.1-a".
	* NEWS: Mention ARMv8.1 support.

include/opcode/
	* arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New.
	(ARM_ARCH_V8_1A): New.
	(ARM_ARCH_V8_1A_FP): New.
	(ARM_ARCH_V8_1A_SIMD): New.
	(ARM_ARCH_V8_1A_CRYPTOV1): New.
	(ARM_FEATURE_CORE): New.
2015-06-03 10:03:50 +01:00
Matthew Wahab d6b4b13ed2 [ARM] Support for ARMv8.1 Adv.SIMD extension 2015-06-02 12:37:33 +01:00
Matthew Wahab ddfded2f7b [ARM] Add support for ARMv8.1 PAN extension 2015-06-02 12:30:38 +01:00
Matthew Wahab 9e1f0fa7f3 [AArch64] Support for ARMv8.1a Adv.SIMD instructions
2015-06-02  Matthew Wahab  <matthew.wahab@arm.com>

gas/
  * config/tc-aarch64.c (aarch64_features): Add "rdma".
  * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma".

gas/testsuite/
  * rdma-directive.d: New.
  * rdma.d: New.
  * rdma.s: New.

include/opcode/
  * aarch64.h (AARCH64_FEATURE_RDMA): New.

opcode/
  * aarch64-tbl.h (aarch64_feature_rdma): New.
  (RDMA): New.
  (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions.
  * aarch64-asm-2.c: Regenerate.
  * aarch64-dis-2.c: Regenerate.
  * aarch64-opc-2.c: Regenerate.
2015-06-02 12:20:00 +01:00