8eb2af8ecd
* config/tc-avr.c (mcu_types): Add support for atmega8hva and
...
atmega16hva devices. Move at90usb82 device to 'avr5' architecture.
* doc/c-avr.texi: Document new devices.
2007-04-26 17:18:23 +00:00
9a2e615a9f
gas/testsuite/
...
* gas/m68k/br-isaa.s: New.
* gas/m68k/br-isaa.d: New.
* gas/m68k/br-isab.s: New.
* gas/m68k/br-isab.d: New.
* gas/m68k/br-isac.s: New.
* gas/m68k/br-isac.d: New.
* gas/m68k/all.exp: Adjust.
gas/
* config/tc-m68k.c (mcf54455_ctrl): New.
(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
(m68k_archs): Add isac.
(m68k_cpus): Add 54455 family.
(m68k_ip): Split Bg into Bb, Bs, Bg.
(m68k_elf_final_processing): Add ISA_C.
* doc/c-m68k.texi (M680x0 Options): Add isac.
include/opcode/
* m68k.h (mcfisa_c): New.
(mcfusp, mcf_mask): Adjust.
bfd/
* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
bfd_mach_mcf_isa_c_emac): New.
* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
elf_isac_plt_entry, elf_isac_plt_info): New.
(elf32_m68k_object_p): Add ISA_C.
(elf32_m68k_print_private_bfd_data): Print ISA_C.
(elf32_m68k_get_plt_info): Detect ISA_C.
* cpu-m68k.c (arch_info): Add ISAC.
(m68k_arch_features): Likewise,
(bfd_m68k_compatible): ISAs B & C are not compatible.
opcodes/
* m68k-opc.c: Mark mcfisa_c instructions.
2007-04-23 07:51:33 +00:00
541d2ffd36
* config/atof-vax.c (atof_vax_sizeof): Change return type to unsigned.
...
(md_atof): Make number_of_chars unsigned. Revert last change.
* config/tc-or32.c (md_apply_fix): Delete bogus assertions.
* config/tc-sh.c (sh_optimize_expr): Only define for OBJ_ELF.
* config/tc-sh.h (md_optimize_expr): Likewise.
* config/tc-sh64.c (shmedia_md_pcrel_from_section): Delete bogus
assertion.
* config/tc-xtensa.c (convert_frag_immed_finish_loop): Likewise.
2007-04-21 13:04:14 +00:00
2523cd0a81
* config/atof-vax.c (md_atof): Fix comparison inside know().
2007-04-21 12:50:49 +00:00
c13781b849
Fix typo.
2007-04-21 12:25:13 +00:00
db55703487
gas/
...
* expr.c (expr): Assert on rankarg, not rank which can be unsigned.
* read.c (read_a_source_file): Remove buffer_limit[-1] assertion.
Don't skip over NUL char.
(pseudo_set): Set X_op for registers to O_register.
* symbols.c (symbol_clone): Remove assertion that sym is defined.
(resolve_symbol_value): Resolve O_register symbols.
* config/tc-i386.c (parse_real_register): Don't use i386_float_regtab.
Instead find st(0) by hash lookup.
* config/tc-ppc.c (ppc_macro): Warning fix.
opcodes/
* i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete.
Move contents to..
(i386_regtab): ..here.
* i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete.
2007-04-21 06:54:57 +00:00
c43a438d5e
* as.h (ENABLE_CHECKING): Default define to 0.
...
(know): Assert if ENABLE_CHECKING.
(struct relax_type): Remove superfluous declaration.
* configure.in (--enable-checking): New.
* configure: Regenerate.
* config.in: Regenerate.
* config/tc-ppc.c (ppc_setup_opcodes): Do checks when ENABLE_CHECKING.
Check for duplicate powerpc_operands entries.
2007-04-21 05:15:41 +00:00
d5be95937e
* config/tc-m68k.c (mcf5253_ctrl): New.
...
(mcf52223_ctrl): New.
(m68k_cpus): Add 5253, 52221, 52223.
2007-04-20 14:41:38 +00:00
7833670643
gas/
...
* config/m68k-parse.h (RAMBAR_ALT): New.
* config/tc-m68k.c (mcf5206_ctrl, mcf5307_ctrl): New.
(mcf_ctrl, mcf5208_ctrl, mcf5210a_ctrl, mcf5213_ctrl, mcf52235_ctrl,
mcf5225_ctrl, mcf5235_ctrl, mcf5271_ctrl, mcf5275_ctrl,
mcf5282_ctrl, mcf5329_ctrl, mcf5373_ctrl, mcfv4e_ctrl,
mcf5475_ctrl, mcf5485_ctrl): Add RAMBAR synonym for
RAMBAR1.
(mcf5272_ctrl): Add RAMBAR0, replace add RAMBAR with RAMBAR_ALT.
(m68k_cpus): Adjust 5206, 5206e & 5307 entries.
(m68k_ip) <Case J>: Detect when RAMBAR_ALT should be used. Add it
to control register mapping.
gas/testsuite/
* gas/m68k/ctrl-1.d, gas/m68k/ctrl-1.s: New.
* gas/m68k/ctrl-2.d, gas/m68k/ctrl-2.s: New.
* gas/m68k/all.exp: Add them.
opcodes/
* m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as
rambar1.
2007-04-20 14:09:00 +00:00
931774a953
* messages.c (as_internal_value_out_of_range): Fix typo in
...
error message. Return after printing domain error.
* config/tc-ppc.c (ppc_insert_operand): Preserve low zero bits
in max when shifting right.
2007-04-20 13:42:03 +00:00
b84bf58af1
include/opcode/
...
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
(num_powerpc_operands): Declare.
(PPC_OPERAND_SIGNED et al): Redefine as hex.
(PPC_OPERAND_PLUS1): Define.
opcodes/
* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
change.
* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove
references to following deleted functions.
(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
(insert_ds, extract_ds, insert_de, extract_de): Delete.
(insert_des, extract_des, insert_li, extract_li): Delete.
(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
(num_powerpc_operands): New constant.
(XSPRG_MASK): Remove entire SPRG field.
(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
* messages.c (as_internal_value_out_of_range): Extend to report
errors for values with invalid low bits set.
* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
fields. Check that operands and opcode fields are disjoint.
(ppc_insert_operand): Check operands using mask rather than bit
count. Check low bits too. Handle PPC_OPERAND_PLUS1. Adjust
insertion code.
(md_apply_fix): Adjust for struct powerpc_operand change.
2007-04-20 12:25:15 +00:00
076d447c31
2007-04-19 Paul Brook <paul@codesourcery.com>
...
gas/testsuite/
* gas/arm/thumb1_unified.d: New test.
* gas/arm/thumb1_unified.s: New test.
gas/
* config/tc-arm.c (md_assemble): Only allow 16-bit instructions on
Thumb-1. Add sanity check for bogus relaxations.
2007-04-19 17:08:21 +00:00
16a4cf1777
2007-04-19 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (insns): Allow rsb and rsbs on Thumb-1.
2007-04-19 17:05:12 +00:00
381d071fc5
gas/
...
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .sse4.2 and .sse4.
(match_template): Handle operand size for crc32 in SSE4.2.
(process_suffix): Handle operand type for crc32 in SSE4.2.
(output_insn): Support SSE4.2.
gas/testsuite/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add sse4.2 and x86-64-sse4.2.
* gas/i386/sse4_2.d: New file.
* gas/i386/sse4_2.s: Likewise.
* gas/i386/x86-64-sse4_2.d: Likewise.
* gas/i386/x86-64-sse4_2.s: Likewise.
opcodes/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (CRC32_Fixup): New.
(PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90,
PREGRP91): New.
(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87,
PREGRP88, PREGRP89, PREGRP90 and PREGRP91.
(three_byte_table): Likewise.
* i386-opc.c (i386_optab): Add SSE4.2 opcodes.
* gas/config/tc-i386.h (CpuSSE4_2): New.
(CpuSSE4): Likewise.
(CpuUnknownFlags): Add CpuSSE4_2.
2007-04-18 16:15:55 +00:00
42903f7f59
gas/
...
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add .sse4.1.
(process_operands): Adjust implicit operand for blendvpd,
blendvps and pblendvb in SSE4.1.
(output_insn): Support SSE4.1.
gas/testsuite/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add sse4.1 and x86-64-sse4.1.
* gas/i386/sse4_1.d: New file.
* gas/i386/sse4_1.s: Likewise.
* gas/i386/x86-64-sse4_1.d: Likewise.
* gas/i386/x86-64-sse4_1.s: Likewise.
opcodes/
2007-04-18 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (XMM_Fixup): New.
(Edqb): New.
(Edqd): New.
(XMM0): New.
(dqb_mode): New.
(dqd_mode): New.
(PREGRP39 ... PREGRP85): New.
(threebyte_0x38_uses_DATA_prefix): Updated for SSE4.
(threebyte_0x3a_uses_DATA_prefix): Likewise.
(prefix_user_table): Add PREGRP39 ... PREGRP85.
(three_byte_table): Likewise.
(putop): Handle 'K'.
(intel_operand_size): Handle dqb_mode, dqd_mode):
(OP_E): Likewise.
(OP_G): Likewise.
* i386-opc.c (i386_optab): Add SSE4.1 opcodes.
* i386-opc.h (CpuSSE4_1): New.
(CpuUnknownFlags): Add CpuSSE4_1.
(regKludge): Update comment.
2007-04-18 16:13:15 +00:00
026d3abbb2
2007-04-18 Paul Brook <paul@codesourcery.com>
...
gas/testsuite/
* gas/arm/thumb2_add.s: Add rsb #0 test.
* gas/arm/thumb2_add.d: Update expected output.
gas/
* config/tc-arm.c (do_t_rsb): Use 16-bit encoding when possible.
2007-04-18 13:49:34 +00:00
91382b56ee
* config/tc-sh.c (sh_handle_align): Call as_bad_where instead
...
of as_warn_where for misaligned data.
2007-04-16 13:05:30 +00:00
0838d2ac72
* config/tc-sh.c (align_test_frag_offset_fixed_p): Handle
...
rs_fill frags.
2007-04-15 22:02:25 +00:00
0cc3409506
* config/tc-sh.c (align_test_frag_offset_fixed_p): New.
...
(sh_optimize_expr): Likewise.
* config/tc-sh.h (md_optimize_expr): Define.
(sh_optimize_expr): Prototype.
2007-04-14 14:21:11 +00:00
6f7b6869f3
2007-04-06 Matt Thomas <matt@netbsd.org>
...
* config/tc-vax.c (vax_cons): Added to support %pcrel{8,16,32}(exp)
to emit pcrel relocations by DWARF2 in non-code sections. Borrowed
heavily from tc-sparc.c. (vax_cons_fix_new): Likewise.
2007-04-06 16:36:48 +00:00
d0e8669a8d
* config/tc-m68k.c (HAVE_LONG_BRANCH): Add fido_a.
2007-04-04 22:10:34 +00:00
3b8d421e14
2007-04-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_neon_ext): Enforce immediate range.
(insns): Use I15 for vext.
gas/testsute/
* gas/arm/neon-cov.s: Add new vext test.
* gas/arm/neon-cov.d: Ditto.
2007-04-04 19:21:24 +00:00
a3582eee7b
* config/tc-xtensa.c (xtensa_flush_pending_output): Check
...
outputting_stabs_line_debug.
2007-04-02 20:05:47 +00:00
7b60f4730c
* config/tc-avr.c (mcu_types): Add support for at90pwm1, at90usb82,
...
at90usb162, atmega325p, atmega329p, atmega3250p and atmega3290p
devices.
* doc/c-avr.texi: Document new devices.
2007-04-02 18:42:36 +00:00
0c00074519
gas/
...
* doc/as.texinfo: Add -mvxworks-pic to the list of MIPS options.
* doc/c-mips.texi (-KPIC, -mvxworks-pic): Document.
* config/tc-mips.c (md_show_usage): Mention -mvxworks-pic.
2007-04-02 14:25:27 +00:00
c3ea6048f0
* config/tc-xtensa.c (xtensa_move_labels): Remove loops_ok argument.
...
Do not check is_loop_target flag.
(xtensa_frob_label): Adjust calls to xtensa_move_labels.
(xg_assemble_vliw_tokens): Likewise. Also avoid calling
xtensa_move_labels for alignment of loop opcodes.
2007-03-31 00:09:34 +00:00
f6bee0627d
2007-03-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Reindent a bit.
2007-03-30 16:28:33 +00:00
3c707909b2
2007-03-30 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (encode_thumb2_ldmstm): New function.
(do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm.
(do_t_push_pop): Use encode_thumb2_ldmstm.
gas/testsuite/
* gas/arm/thumb2_ldmstm.d: New test.
* gas/arm/thumb2_ldmstm.s: New test.
2007-03-30 14:51:25 +00:00
144f4bc66d
* m32c.cpu (Imm-8-s4n): Fix print hook.
...
(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
(arith-jnz-imm4-dst-defn): Make relaxable.
(arith-jnz16-imm4-dst-defn): Fix encodings.
* m32c-desc.c: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-opc.c: Regenerate.
* config/tc-m32c.c (rl_for, relaxable): Protect argument.
(md_relax_table): Add entries for ADJNZ macros.
(M32C_Macros): Add ADJNZ macros.
(subtype_mappings): Add entries for ADJNZ macros.
(insn_to_subtype): Check for adjnz and sbjnz insns.
(md_estimate_size_before_relax): Pass insn to insn_to_subtype.
(md_convert_frag): Convert adjnz and sbjnz.
2007-03-29 23:56:39 +00:00
e72cf3ec8e
gas/
...
2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): For instructions with 2
register operands, encode destination in i.rm.regmem if its
RegMem bit is set.
opcodes/
2007-03-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c (i386_optab): Change InvMem to RegMem for mov and
movq. Remove InvMem from sldt, smsw and str.
* i386-opc.h (InvMem): Renamed to ...
(RegMem): Update comments.
(AnyMem): Remove InvMem.
2007-03-29 04:27:54 +00:00
eb6d9dce34
* config/tc-xtensa.c (xg_translate_idioms): Allow assembly idioms
...
in FLIX instructions.
2007-03-26 23:01:46 +00:00
c96612cc4c
* config/tc-arm.c (arm_it): Add immisfloat field.
...
(parse_qfloat_immediate): Disallow integer syntax for floating-point
immediates. Fix hex immediates, handle 0.0 and -0.0 specially.
(parse_neon_mov): Set immisfloat bit for operand if it parsed as a
float.
(neon_cmode_for_move_imm): Reject non-float immediates for float
operands.
(neon_move_immediate): Pass immisfloat bit to neon_cmode_for_move_imm.
2007-03-26 14:43:29 +00:00
1198ca51f0
2007-03-24 Paul Brook <paul@codesourcery.com>
...
* config/tc-arm.c (do_t_ldmstm): Error on Thumb-2 addressing modes.
2007-03-24 16:09:16 +00:00
b67020158a
2007-03-24 Paul Brook <paul@codesourcery.com>
...
Mark Shinwell <shinwell@codesourcery.com>
gas/
* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
(parse_operands): Don't expect comma if first operand missing.
Handle OP_oRRw.
(do_srs): Encode register number, checking it is r13. Update comment.
(insns): Update SRS entries to take a register.
gas/testsuite/
* gas/arm/archv6.s: Add new SRS tests.
* gas/arm/archv6.d: Update expected output.
* gas/arm/thumb32.s: Add new SRS tests.
* gas/arm/thumb32.d: Update expected output.
* gas/arm/srs-t2.d: New.
* gas/arm/srs-t2.l: New.
* gas/arm/srs-t2.s: New.
* gas/arm/srs-arm.d: New.
* gas/arm/srs-arm.l: New.
* gas/arm/srs-arm.s: New.
opcodes/
* arm-dis.c (arm_opcodes): Print SRS base register.
2007-03-24 01:29:00 +00:00
0003779b5d
gas/
...
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Allow '.' in mnemonic.
gas/testsuite/
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rex.s: Add tests for rex.WRXB.
* gas/i386/rex.d: Updated.
* gas/i386/rex.d: Replace rex64XYZ with rex.WRXB.
* gas/i386/x86-64-io-intel.d : Likewise.
* gas/i386/x86-64-io-suffix.d: Likewise.
* gas/i386/x86-64-io.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB.
* i386-opc.c (i386_optab): Add rex.wrxb.
2007-03-23 16:17:21 +00:00
738755b09a
gas/
...
* config/tc-arm.c (md_apply_fix): Turn CZB instructions that
attempt to jump to the next instruction into NOPs.
2007-03-23 10:43:35 +00:00
840edabd6d
* config/tc-spu.c: Don't include opcode/spu.h.
...
(md_assemble): Set tc_fix_data.insn_tag and arg_format.
(md_apply_fix): Adjust.
* config/tc-spu.h: Include opcode/spu.h.
(struct tc_fix_info): New.
(TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust.
(TC_FORCE_RELOCATION): Define.
2007-03-23 00:42:26 +00:00
13a1e313c9
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_suffix): Check 0x90 instead of
xchg for xchg %rax,%rax.
2007-03-22 00:27:14 +00:00
161a04f630
gas/
...
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c: Replace REX_MODE64, REX_EXTX, REX_EXTY
and REX_EXTZ with REX_W, REX_R, REX_X and REX_B respectively.
include/opcode/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (REX_MODE64): Renamed to ...
(REX_W): This.
(REX_EXTX): Renamed to ...
(REX_R): This.
(REX_EXTY): Renamed to ...
(REX_X): This.
(REX_EXTZ): Renamed to ...
(REX_B): This.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REX_MODE64): Remove definition.
(REX_EXTX): Likewise.
(REX_EXTY): Likewise.
(REX_EXTZ): Likewise.
(USED_REX): Use REX_OPCODE instead of 0x40.
Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W,
REX_R, REX_X and REX_B respectively.
2007-03-21 21:23:44 +00:00
8b38ad713b
gas/
...
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* config/tc-i386.c (match_template): Properly handle 64bit mode
"xchg %eax, %eax".
gas/testsuite/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* gas/i386/nops.s: Add testcases for nop r/m.
* gas/i386/x86-64-nops.s: Likewise.
* gas/i386/x86-64-opcode.s: Add testcases for xchg with %ax,
%eax and %rax.
* gas/i386/nops.d: Updated.
* gas/i386/x86-64-nops.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
opcodes/
2003-03-21 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/4218
* i386-dis.c (PREGRP38): New.
(dis386): Use PREGRP38 for 0x90.
(prefix_user_table): Add PREGRP38.
(print_insn): Set uses_REPZ_prefix to 1 for pause.
(NOP_Fixup1): Properly handle REX bits.
(NOP_Fixup2): Likewise.
* i386-opc.c (i386_optab): Allow %eax with xchg in 64bit.
Allow register with nop.
2007-03-21 20:45:14 +00:00
af1c101013
PR gas/4124
...
* config/tc-alpha.c (emit_ustX): Fix ustq code generation.
2007-03-21 16:08:14 +00:00
1d5f2fe90d
2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
...
* Makefile.am: Run dep-am.
* Makefile.in: Regenerated.
* config/tc-i386.c: Don't include "opcodes/i386-opc.h".
* config/tc-i386.h: Include "opcodes/i386-opc.h".
(NOP_OPCODE): Removed.
(template): Likewise.
2007-03-21 15:37:21 +00:00
5ac8f2a23b
* config/tc-i386.h (NOP_OPCODE): Restore.
2007-03-21 10:26:15 +00:00
8fb9d7b9aa
gas/
...
* config/tc-arm.c (do_mul): Don't warn about overlapping
Rd and Rm operands when assembling for v6 or above.
Correctly capitalize register names in the messages.
(do_mlas): Likewise. Delete spurious blank line.
gas/testsuite/
* gas/arm/mul-overlap.s: New.
* gas/arm/mul-overlap.d: New.
* gas/arm/mul-overlap.l: New.
* gas/arm/mul-overlap-v6.s: New.
* gas/arm/mul-overlap-v6.d: New.
2007-03-18 16:21:27 +00:00
b37683797e
* config/tc-m68k.c (m68k_cpus): Add an entry for fidoa.
2007-03-16 18:08:58 +00:00
c3fe08facb
gas/
...
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_begin): Use i386_regtab_size to scan
i386_regtab.
(parse_register): Use i386_regtab_size instead of ARRAY_SIZE
on i386_regtab.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.c: Include "libiberty.h".
(i386_regtab): Remove the last entry.
(i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
* i386-opc.h (i386_regtab_size): New.
(i386_float_regtab_size): Likewise.
2007-03-15 17:30:31 +00:00
0b1cf022c8
gas/
...
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
"opcode/i386.h".
(md_begin): Check reg_name != NULL for the last entry in
i386_regtab.
* config/tc-i386.h: Move many entries to opcode/i386.h and
opcodes/i386-opc.h.
* configure.in (need_opcodes): Set true for i386.
* configure: Regenerated.
include/opcode/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Add entries from config/tc-i386.h and move tables
to opcodes/i386-opc.h.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (CFILES): Add i386-opc.c.
(ALL_MACHINES): Add i386-opc.lo.
Run "make dep-am".
* Makefile.in: Regenerated.
* configure.in: Add i386-opc.lo for bfd_i386_arch.
* configure: Regenerated.
* i386-dis.c: Include "opcode/i386.h".
(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
(FWAIT_OPCODE): Remove definition.
(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
(MAX_OPERANDS): Remove definition.
* i386-opc.c: New file.
* i386-opc.h: Likewise.
2007-03-15 14:31:24 +00:00
794ba86ab2
gas/
...
* config/tc-arm.c (arm_copy_symbol_attributes): New.
* config/tc-arm.h (arm_copy_symbol_attributes): Declare.
(TC_COPY_SYMBOL_ATTRIBUTES): Define.
* gas/symbols.c (copy_symbol_attributes): Use
TC_COPY_SYMBOL_ATTRIBUTES.
gas/testsuite/
* gas/arm/thumbver.d, gas/arm/thumbver.s: New test.
2007-03-15 12:11:50 +00:00
155257ea59
2007-03-14 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (T16_32_TAB): Fix dec_sp encoding.
gas/testsuite/
* gas/arm/thumb2_add.d: Add tests using sp.
* gas/arm/thumb2_add.s: Ditto.
2007-03-14 21:12:13 +00:00
8a2ed48987
2007-03-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_assemble): Use Opcode_XXX instead of XXX
on i.tm.base_opcode.
(match_template): Likewise.
(process_operands): Use ~0x3 mask to match MOV_AX_DISP32.
* config/tc-i386.h (Opcode_D): New.
(Opcode_FloatR): Likewise.
(Opcode_FloatD): Likewise.
(D): Redefined.
(W): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
2007-03-12 21:36:23 +00:00
b1b7d09b07
* config/tc-i386.h (WORKING_DOT_WORD): Define.
2007-03-09 12:35:37 +00:00
b5639b37c5
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
...
* opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR,
INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New
instruction formats added.
(MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF,
MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format
masks added.
* opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point
instructions added.
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
(main): z9-ec cpu type option added.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added.
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z9-ec option added.
2007-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z9-ec.d: New file.
* gas/s390/zarch-z9-ec.s: New file.
* gas/s390/s390.exp: Run the z9-ec testcases.
2007-03-06 13:19:08 +00:00
5e77afaabd
2007-03-02 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (relax_immediate): Always return positive values.
(relaxed_symbol_addr): New function.
(relax_adr, relax_branch): Use it.
(arm_relax_frag): Pass stretch argument. Adjust infinite loop check.
gas/testsuite/
* gas/arm/relax_branch_align.d: New test.
* gas/arm/relax_branch_align.s: New test.
2007-03-02 18:22:34 +00:00
c5d07591f7
PR gas/3797
...
* config/tc-d10v.c (do_assemble): Do not generate error messages, just return -1 whenever a problem is encoun$
(md_assemble): If do_assemble returns -1 generate a non-fatal error message and return.
* gas/lns/lns.exp: Do not run the lns-common test for the d10v port.
* gas/d10v/address-002.l: Update expected assembler output.
* gas/d10v/address-003.l, gas/d10v/address-004.l,
gas/d10v/address-005.l, gas/d10v/address-006.l,
gas/d10v/address-007.l, gas/d10v/address-008.l,
gas/d10v/address-009.l, gas/d10v/address-010.l,
gas/d10v/address-011.l, gas/d10v/address-012.l,
gas/d10v/address-013.l, gas/d10v/address-014.l,
gas/d10v/address-015.l, gas/d10v/address-016.l,
gas/d10v/address-017.l, gas/d10v/address-018.l,
gas/d10v/address-019.l, gas/d10v/address-020.l,
gas/d10v/address-021.l, gas/d10v/address-022.l,
gas/d10v/address-023.l, gas/d10v/address-024.l,
gas/d10v/address-025.l, gas/d10v/address-026.l,
gas/d10v/address-027.l, gas/d10v/address-030.l,
gas/d10v/address-031.l, gas/d10v/address-032.l,
gas/d10v/address-033.l, gas/d10v/address-034.l,
gas/d10v/address-035.l, gas/d10v/address-036.l,
gas/d10v/address-037.l, gas/d10v/address-038.l,
gas/d10v/address-039.l, gas/d10v/address-040.l,
gas/d10v/address-041.l: Likewise.
2007-02-28 18:38:51 +00:00
870074ddae
PR gas/2623
...
* config/tc-msp430.c (line_separator_char): Change to '{'.
2007-02-28 10:02:37 +00:00
fd99afa763
* config/tc-m68hc11.c (fixup24): Correct fixup size.
...
(build_jump_insn): Likewise.
(build_insn): Likewise.
(s_m68hc11_relax): Likewise.
2007-02-27 08:15:17 +00:00
07cb2078a9
* config/obj-elf.c (elf_frob_file): frag_wane any new frags.
2007-02-27 07:16:31 +00:00
22b5b65113
* config/tc-arm.c (do_vfp_nsyn_pop): Use fldmias/fldmiad.
2007-02-25 19:29:25 +00:00
acb02403a2
* config/tc-mn10300.c (md_convert_frag): Correct fixup size.
...
(md_assemble): Likewise.
2007-02-22 22:34:16 +00:00
a1836728f6
PR 4082
...
* config/tc-avr.h (TC_FX_SIZE_SLACK): Define.
2007-02-20 23:02:58 +00:00
01fd108fa7
* config/tc-mips.c (mips_cpu_info_table): Add 74K configurations.
2007-02-20 14:48:28 +00:00
8b082fb134
[ gas/ChangeLog ]
...
* config/tc-mips.c (mips_set_options, mips_opts, file_ase_dspr2,
ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2): Add DSP R2 ASE support.
(macro_build): Add case '2'.
(macro): Expand M_BALIGN to nop, packrl.ph or balign.
(validate_mips_insn): Add support for balign instruction.
(mips_ip): Handle DSP R2 instructions. Support balign instruction.
(OPTION_DSPR2, OPTION_NO_DSPR2, OPTION_COMPAT_ARCH_BASE,
md_parse_option, mips_after_parse_args): Add -mdspr2 and -mno-dspr2
command line options.
(s_mipsset): Add support for .set dspr2 and .set nodspr2 directives.
(md_show_usage): Add -mdspr2 and -mno-dspr2 help output.
* doc/c-mips.texi, doc/as.texinfo: Document -mdspr2, -mno-dspr2,
.set dspr2, .set nodspr2.
[ gas/testsuite/ChangeLog ]
* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
DSP R2.
* gas/mips/mips.exp: Run new test.
[ include/opcode/Changelog ]
* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
(INSN_DSPR2): Add flag for DSP R2 instructions.
(M_BALIGN): New macro.
[ opcodes/ChangeLog ]
* mips-dis.c (mips_arch_choices): Add DSP R2 support.
(print_insn_args): Add support for balign instruction.
* mips-opc.c (D33): New shortcut for DSP R2 instructions.
(mips_builtin_opcodes): Add DSP R2 instructions.
[ sim/mips/ChangeLog ]
* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
Add dsp2 to sim_igen_machine.
* configure: Regenerate.
* dsp.igen (do_ph_op): Add MUL support when op = 2.
(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
(mulq_rs.ph): Use do_ph_mulq.
(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
* mips.igen: Add dsp2 model and include dsp2.igen.
(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
for *mips32r2, *mips64r2, *dsp.
(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
for *mips32r2, *mips64r2, *dsp2.
* dsp2.igen: New file for MIPS DSP REV 2 ASE.
[ sim/testsuite/sim/mips/ChangeLog ]
* basic.exp: Run the dsp2 test.
* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
* mips32-dsp2.s: New test.
2007-02-20 13:28:56 +00:00
96e0bbccb7
* config/tc-m68k.c (mcf5210a_ctrl, mcf52235_ctrl, mcf5225_ctrl): New.
...
(m68k_cpus): Add 5210a..5211a, 52230..52235 5224..5225.
2007-02-20 09:25:45 +00:00
d31f0f6d41
* write.c (TC_FX_SIZE_SLACK): Define.
...
(write_relocs): Reinstate check for fixup within frag.
* config/tc-bfin.h (TC_FX_SIZE_SLACK): Define.
* config/tc-h8300.h (TC_FX_SIZE_SLACK): Define.
* config/tc-mmix.h (TC_FX_SIZE_SLACK): Define.
* config/tc-sh.h (TC_FX_SIZE_SLACK): Define.
* config/tc-xstormy16.h (TC_FX_SIZE_SLACK): Define.
2007-02-17 23:13:49 +00:00
a8e24a5610
* config/m68k-parse.h (m68k_register): Add ROMBAR0, ASID.
...
* config/tc-m68k.c (mcfv4e_ctrl): Add ColdFire specific names.
(mcf5475_ctrl, mcf5485_ctrl): New.
(m68k_cpus): Use mcf5485_ctrl and mcf5485_ctrl for those families.
(m68k_ip): Add ASID, MMUBAR, ROMBAR0 handling.
(init_table): Add asid, mmubar, adjust rombar0.
2007-02-15 18:37:08 +00:00
4eed87de48
gas/
...
* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
(process_operands): Move old Seg2ShortForm and Seg3ShortForm
code, and test for these insns using a combination of
opcode_modifier and operand_types.
include/opcode/
* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
and Seg3ShortFrom with Shortform.
2007-02-13 23:23:54 +00:00
280d71bf40
Support for Toshiba MeP and for complex relocations.
2007-02-05 20:10:25 +00:00
e110eeb74e
* config/tc-m32c.c (m32c_cons_fix_new): New. Added to support 3
...
byte relocs.
* config/tc-m32c.h (TC_CONS_FIX_NEW): Define.
(m32c_cons_fix_new): Prototype.
2007-02-04 04:45:36 +00:00
60242db2b7
* config/tc-xtensa.c (xg_build_to_insn): Use tinsn_init.
...
(xg_expand_assembly_insn, istack_push_space, istack_pop): Likewise.
2007-02-03 00:08:22 +00:00
bbdd25a805
* config/tc-xtensa.c (SUFFIX_MAP, suffix_relocs): New.
...
(xtensa_elf_suffix): Use suffix_relocs instead of local mapping table.
(map_suffix_reloc_to_operator): New.
(map_operator_to_reloc): New.
(expression_maybe_register): Fix incorrect test of return value from
xtensa_elf_suffix. Rearrange to use map_suffix_reloc_to_operator.
(xg_assemble_literal, convert_frag_immed): Use map_operator_to_reloc.
2007-02-02 23:59:29 +00:00
9c8747735c
* config/xtensa-istack.h (struct tinsn_struct): Delete fixup field.
...
(tinsn_get_tok): Delete prototype.
* config/tc-xtensa.c (tinsn_get_tok): Delete.
2007-02-02 23:26:53 +00:00
61376837da
* config/xtensa-relax.h (struct build_instr): Delete id field.
...
* config/xtensa-relax.c (widen_spec_list): Remove zeros from LITERAL
and LABEL tokens.
(append_literal_op, append_label_op): Remove litnum/labnum arguments;
set op_data fields to zero.
(parse_id_constant): Delete.
(build_transition): Remove code to handle numbered literals and labels.
2007-02-02 23:09:50 +00:00
bc447904f7
* config/xtensa-relax.c (build_transition): Remove code after as_fatal.
...
(build_transition_table): Likewise.
2007-02-02 22:08:36 +00:00
63a7429b8b
* config/tc-xtensa.c (xg_add_opcode_fix, md_apply_fix): Delete use of
...
fx_tcbit.
* config/tc-xtensa.h (TC_FORCE_RELOCATION_LOCAL): Remove.
2007-02-01 23:54:59 +00:00
20ee54e817
* write.h (struct fix <fx_pcrel_adjust, fx_size>): Move.
...
(struct fix <fx_plt>): Rename to tcbit2.
* write.c (fix_new_internal): Adjust.
(TC_FORCE_RELOCATION_LOCAL): Don't test fx_plt.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-cris.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-i960.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sh.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sh64.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sparc.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-msp430.c (msp430_force_relocation_local): Likewise.
* config/tc-ia64.c (emit_one_bundle): Don't set fx_plt.
* config/tc-ia64.h (TC_FORCE_RELOCATION_LOCAL): Don't test fx_plt.
Instead, compare fx_r_type.
* config/tc-xtensa.c (xg_add_opcode_fix, md_apply_fix): Use
fx_tcbit in place of fx_plt.
* config/tc-xtensa.h (TC_FORCE_RELOCATION_LOCAL): Define.
* doc/internals.texi (TC_FORCE_RELOCATION_LOCAL): Remove reference
to fx_plt.
2007-02-01 14:12:20 +00:00
4d456e3dc5
2076-01-28 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (swap_imm_operands): Renamed to ...
(swap_2_operands): This. Take 2 ints.
(md_assemble): Updated.
(swap_operands): Call swap_2_operands to swap 2 operands.
2007-01-28 16:14:33 +00:00
7bc4c13c61
* config/tc-m32c.c (md_pseudo_table): Add .3byte.
2007-01-24 21:53:09 +00:00
489038311c
* tc-score.c: Remove unnecessary uses of _().
...
Make the err_msg[] a file level local array in order to save storage space.
Remove unnecessary sprintf()s.
2007-01-22 08:55:34 +00:00
141190726e
2007-01-18 Mei Ligang <ligang@sunnorth.com.cn>
...
* config/tc-score.c : Using _() for const string.
Do not assign inst.error with a local string pointer.
(md_section_align): Pad section.
2007-01-18 10:33:49 +00:00
99018f420a
2007-01-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Check number of operands
when procssing memory/register operand.
2007-01-13 16:48:00 +00:00
66a4ad4264
* config/tc-spu.h (TC_RELOC_RTSYM_LOC_FIXUP): Delete.
...
* config/tc-m32r.h (TC_RELOC_RTSYM_LOC_FIXUP): Delete.
* config/tc-mn10300.h (TC_RELOC_RTSYM_LOC_FIXUP): Delete.
(TC_FORCE_RELOCATION): Define.
(TC_FORCE_RELOCATION_LOCAL): Define.
* config/tc-mn10300.c (mn10300_fix_adjustable): Adjust.
2007-01-12 06:23:52 +00:00
dc4503c681
2007-01-11 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_t_add_sub): Use Rd and Rs.
gas/testsuite/
* gas/arm/thumb2_add.d: Add test for missing operand.
* gas/arm/thumb2_add.s: Ditto.
2007-01-11 15:39:08 +00:00
493cb6ef0a
PR gas/3707
...
* config/tc-arm.c (md_begin): Cope with an NULL mcpu_fpu_opt variable.
2007-01-11 15:22:10 +00:00
04f8d83b9a
* config/tc-mcore.c (md_number_to_chars): Use number_to_chars_{big|little}endian.
2007-01-11 08:58:56 +00:00
3bdcfdf41f
bfd/
...
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido.
* bfd-in2.h: Regenerate.
* cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of
bfd_mach_cpu32_fido.
(m68k_arch_features): Use fido_a instead of cpu32.
(bfd_m68k_compatible): Reject the combination of Fido and
ColdFire. Accept the combination of CPU32 and Fido with a
warning.
* elf32-m68k.c (elf32_m68k_object_p,
elf32_m68k_merge_private_bfd_data,
elf32_m68k_print_private_bfd_data): Treat Fido as an
architecture by itself.
binutils/
* readelf.c (get_machine_flags): Treat Fido as an architecture
by itself.
gas/
* config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an
architecture by itself.
(m68k_ip): Don't issue a warning for tbl instructions on fido.
(m68k_elf_final_processing): Treat Fido as an architecture by
itself.
include/elf/
* m68k.h (EF_M68K_FIDO): New.
(EF_M68K_ARCH_MASK): OR EF_M68K_FIDO.
(EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove.
include/opcode/
* m68k.h (m68010up): OR fido_a.
opcodes/
* m68k-opc.c (m68k_opcodes): Replace cpu32 with
cpu32 | fido_a except on tbl instructions.
2007-01-08 18:42:37 +00:00
e4a3b5a47e
2007-01-05 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (set_intel_syntax): Update set_intel_syntax
depending on allow_naked_reg.
2007-01-05 14:55:44 +00:00
a028a6f534
2007-01-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_cpsi): Set mmod bit for 2 argument form.
gas/testsuite/
* gas/arm/archv6.s: Add more cpsie tests.
* gas/arm/archv6.d: Ditto.
opcodes/
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
2007-01-04 20:08:36 +00:00
2ca3ace5aa
2007-01-04 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/3826
* config/tc-i386.c (register_prefix): New.
(set_intel_syntax): Set set_intel_syntax to "" if register
prefix is needed.
(check_byte_reg): Use register_prefix for error message.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
2007-01-04 18:03:31 +00:00
627907b7d8
* config/tc-arm.c (do_neon_shl_imm): Swap rN, rM.
...
(do_neon_qshl_imm): Likewise.
(do_neon_rshl): New function. Handle rounding variants of
v{q}shl-by-register.
(insns): Use do_neon_rshl for vrshl, vqrshl.
2007-01-04 15:32:50 +00:00
b7c61d9abb
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (swap_operands): Remove branches.
2007-01-04 05:35:52 +00:00
92559b5be6
2007-01-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (NEON_ENC_TAB): Fix encoding of vclt, vcle, vaclt
and vacle.
gas/testsuite/
* gas/arm/neon-cov.d: Adjust expected output.
* gas/arm/neon-omit.s: Add tests for vcgt and vcle. Reorder vacle
and vacle.
* gas/arm/neon-omit.d: Adjust expected output.
2007-01-04 04:39:53 +00:00
4dc856073a
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Update copyright year.
* config/tc-i386.h: Likewise.
2007-01-03 22:54:45 +00:00
1509aa9a58
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (smallest_imm_type): Return unsigned int
instead of int.
2007-01-03 22:48:52 +00:00
e3bb37b525
2007-01-03 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Convert to ISO C90 formatting
* config/tc-i386.h: Likewise.
2007-01-03 22:36:19 +00:00
d821e36b0b
* config/tc-mips.c (md_show_usage): Clean up -mno-shared
...
documentation.
2007-01-03 18:12:52 +00:00
87a918e202
2006-12-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (ShiftCount): Fix a comment typo.
2006-12-30 19:32:49 +00:00
751d281c74
2006-12-30 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (md_show_usage): Mention --32/--64.
2006-12-30 18:37:29 +00:00
c81128dcdf
gas/
...
2006-12-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Handle shift count
register with 3 operands.
gas/testsuite/
2006-12-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for "shrd %cl,%edx,%eax" and
"shld %cl,%edx,%eax".
* gas/i386/opcode.s: Likewise.
* gas/i386/intel.d: Updated.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
2006-12-29 21:48:48 +00:00
cab737b91f
2006-12-28 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (process_operands): Check i.reg_operands
and increment i.operands when adding a register operand.
(build_modrm_byte): Fix 4 operand instruction handling.
2006-12-29 06:02:04 +00:00
31b2323cf7
2006-12-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS
for array size instead of 2.
(im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size
instead of 2.
(i386_immediate): Update immediate operand overflow error
message.
(i386_displacement): Check displacement operand overflow.
2006-12-28 07:09:16 +00:00
b534c6d307
2006-12-27 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Document tc-i386.c, not i386.c.
2006-12-27 18:34:08 +00:00
f7ec513bed
gas/
...
* config/m68k-parse.h (m68k_register): Add CAC and MBB.
* config/tc-m68k.c (fido_ctrl): New.
(m68k_archs): Use fido_ctrl for -mfidoa.
(m68k_cpus): Use fido_ctrl on fido-*-*.
(m68k_ip): Add support for CAC and MBB.
(init_table): Add CAC and MBB.
opcodes/
* m68k-dis.c (print_insn_arg): Add support for cac and mbb.
2006-12-27 07:15:02 +00:00
70e41adeb3
2006-12-26 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (i386_immediate): Remove prototype.
2006-12-26 23:42:11 +00:00
9840d27e81
bfd/
...
* archures.c (bfd_mach_cpu32_fido): New.
(bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a,
bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac,
bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp,
bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac,
bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac,
bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float,
bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac):
Increment the defined values.
* bfd-in2.h: Regenerate.
* cpu-m68k.c (arch_info_struct): Add en entry for
bfd_mach_cpu32_fido.
* elf32-m68k.c (elf32_m68k_object_p): Handle
EF_M68K_CPU32_FIDO_A.
(elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK.
(elf32_m68k_print_private_bfd_data): Handle
EF_M68K_CPU32_FIDO_A.
binutils/
* readelf.c (get_machine_flags): Handle EF_M68K_CPU32_FIDO_A.
gas/
* config/tc-m68k.c (cpu_of_arch): Add fido.
(m68k_archs, m68k_cpu): Add entries for fido.
(m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A.
include/elf/
* m68k.h (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): New.
include/opcode/
* m68k.h (fido_a): New.
2006-12-25 22:39:21 +00:00
8fce5f8c17
* config/tc-score.c (build_lw_pic): Rename as build_lwst_pic.
...
Delete the code handling large constant for PIC.
Modify some comments.
(score_relax_frag): Decrease insn_addr in certain situation.
(s_score_cprestore): Change .cprestore syntax from ".cprestore offset"
to ".cprestore reg, offset".
2006-12-25 09:26:22 +00:00
2a962e6dd3
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Add a blank line bewteen function bodies.
2006-12-15 19:43:59 +00:00
fc225355e8
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Reformat to 72 columns.
2006-12-15 14:09:22 +00:00
d1cbb4db76
2006-12-14 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Simplify 3 and 4 operand
match.
2006-12-14 13:28:24 +00:00
71903a11b9
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel
bit only.
2006-12-13 19:39:12 +00:00
a5c311ca76
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (match_template): Use a for loop to set
operand_types array.
2006-12-13 18:26:30 +00:00
f48ff2ae3d
gas/
...
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* config/tc-i386.c (match_template): Use MAX_OPERANDS for the
number of operands. Issue an error if MAX_OPERANDS != 4. Add
the 4th operand check.
gas/testsuite/
2006-12-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/3712
* gas/i386/inval.s: Add invalid insertq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
2006-12-13 18:00:00 +00:00
c450d570b0
2006-12-13 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}.
* doc/c-arm.texi: Fix spelling of ARMv7 profile variants.
2006-12-13 16:06:39 +00:00
eca5433bc0
2006-12-12 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (WordMem): Document it for 64 bit memory
reference.
2006-12-12 20:28:17 +00:00
ffb08c8024
2006-12-09 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
operand_types array.
2006-12-09 16:43:41 +00:00
41d3b0565d
* config/tc-z8k.c (whatreg): Add comment describing function.
...
Return NULL if symbol name characters follow the register number.
(parse_reg): Use NULL instead of 0 for pointer values. Stop
processing if whatreg returned NULL.
2006-12-08 22:15:11 +00:00
c694fd509c
bfd/
...
* elf32-m68k.c: Update uses of EF_M68K_*.
binutils/
* readelf.c: Update uses of EF_M68K_*.
gas/
* config/tc-m68k.c: Update uses of EF_M68K_*.
include/elf
* m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A_NODIV,
EF_M68K_ISA_A, EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B_NOUSP,
EF_M68K_ISA_B, EF_M68K_ISA_C, EF_M68K_MAC_MASK, EF_M68K_MAC,
EF_M68K_EMAC, EF_M68K_EMAC_B, EF_M68K_FLOAT): Rename to
EF_M68K_CF_ISA_MASK, EF_M68K_CF_ISA_A_NODIV, EF_M68K_CF_ISA_A,
EF_M68K_CF_ISA_A_PLUS, EF_M68K_CF_ISA_B_NOUSP,
EF_M68K_CF_ISA_B, EF_M68K_CF_ISA_C, EF_M68K_CF_MAC_MASK,
EF_M68K_CF_MAC, EF_M68K_CF_EMAC, EF_M68K_CF_EMAC_B,
EF_M68K_CF_FLOAT, respectively.
2006-12-07 15:39:02 +00:00
9021ec07d7
gas/
...
2006-12-06 H.J. Lu <hjl@gnu.org>
* config/tc-i386.h: Change the prefix order to SEG_PREFIX,
ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
gas/testsuite/
2006-12-06 H.J. Lu <hjl@gnu.org>
* gas/i386/amdfam10.d: Updated for operand/address-size override
prefix position change.
* gas/i386/naked.d: Likewise.
* gas/i386/rep-suffix.d: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/white.l: Likewise.
* gas/i386/x86-64-amdfam10.d: Likewise.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86_64.d: Likewise.
2006-12-06 18:15:45 +00:00
f0291e4c15
2006-12-01 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_force_relocation): Return 1 for relocs against
function symbols.
gas/testsuite/
* gas/arm/thumbrel.s: New test.
* gas/arm/thumbrel.d: New test.
2006-12-01 16:42:26 +00:00
e1da3f5b96
2006-11-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_is_eabi): New function.
* config/tc-arm.h (arm_is_eabi): New prototype.
(THUMB_IS_FUNC): Use ELF function type for EABI objects.
* doc/c-arm.texi (.thumb_func): Update documentation.
2006-11-29 17:53:39 +00:00
00249aaae7
2006-11-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans
encoding.
gas/testsuite/
* gas/arm/vfpv3-const-conv.s: Improve test coverage.
* gas/arm/vfpv3-const-conv.d: Adjust expected output.
* gas/arm/vfp-neon-syntax_t2.d: Ditto.
* gas/arm/vfp-neon-syntax.d: Ditto.
opcodes/
* arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
2006-11-29 16:26:56 +00:00
a7284bf13b
* config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED
...
as the first slot_subtype, not the frag subtype.
2006-11-27 23:58:39 +00:00
2caa7ca0aa
bfd/
...
* elf32-xtensa.c (elf_xtensa_special_sections): Add .xtensa.info.
gas/
* config/tc-xtensa.c (XSHAL_ABI): Add default definition.
(directive_state): Disable scheduling by default.
(xtensa_add_config_info): New.
(xtensa_end): Call xtensa_add_config_info.
gas/testsuite/
* gas/elf/section2.e-xtensa: New file.
* gas/elf/elf.exp: Use it.
include/
* xtensa-config.h (XSHAL_ABI): New.
(XTHAL_ABI_WINDOWED, XTHAL_ABI_CALL0): New.
ld/
* emultempl/xtensaelf.em (XSHAL_ABI): Add default definition.
(replace_insn_sec_with_prop_sec): Use bfd_make_section_with_flags.
Delete redundant code to set sections flags and alignment.
(xt_config_info_unpack_and_check, check_xtensa_info): New.
(elf_xtensa_after_open): Iterate over input statements instead of
link_info.input_bfds.
(elf_xtensa_before_allocation): Likewise. Call check_xtensa_info for
each input, and write a new .xtensa.info section in the output.
2006-11-27 20:14:53 +00:00
062cf83700
* config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into
...
their unaligned counterparts in debugging sections.
2006-11-27 11:25:27 +00:00
cefdba3983
* config/tc-spu.c (md_pseudo_table): Add eqv and .eqv.
2006-11-24 04:32:41 +00:00
e821645dee
opcodes/
...
* arm-dis.c (last_is_thumb): Delete.
(enum map_type, last_type): New.
(print_insn_data): New.
(get_sym_code_type): Take MAP_TYPE argument. Check the type of
the right symbol. Handle $d.
(print_insn): Check for mapping symbols even without a normal
symbol. Adjust searching. If $d is found see how much data
to print. Handle data.
gas/
* config/tc-arm.h (md_cons_align): Define.
(mapping_state): New prototype.
* config/tc-arm.c (mapping_state): Make global.
gas/testsuite/
* gas/arm/arm7t.d, gas/arm/neon-ldst-rm.d, gas/arm/thumb2_pool.d,
gas/arm/tls.d: Update for $d support.
* gas/arm/mapshort.d, gas/arm/mapshort.s: New test.
* gas/elf/section2.e-armeabi: Update.
* gas/elf/section2.e-armelf: New file.
* gas/elf/elf.exp: Use it.
ld/testsuite/
* ld-arm/mixed-app.d, ld-arm/tls-app.d, ld-arm/tls-lib.d: Update
for $d support.
2006-11-22 17:45:57 +00:00
5ab504f906
* config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy.
2006-11-22 03:35:36 +00:00
869ddf2a18
gas/
...
* config/tc-m68k.c (m68k_ip): Correct output of cpu aliases.
gas/testsuite/
* gas/m68k/all.exp: Add mcf-trap.
* gas/m68k/mcf-trap.[sd]: New.
opcodes/
* m68k-opc.c (m68k_opcodes): Place trap instructions before set
conditionals. Add tpf coldfire instruction as alias for trapf.
2006-11-16 07:22:25 +00:00
41c55c875a
* config/tc-score.c (score_relax_frag): If next frag contains 32 bit branch
...
instruction, handle it specially.
(score_insns): Modify 32 bit branch instruction.
2006-11-16 04:36:25 +00:00
25fe350bd9
gas/
...
* config/tc-arm.c (do_t_czb): Rename to do_t_cbz.
(insns): Adjust accordingly.
(md_apply_fix): Alter comments to use CBZ instead of CZB.
2006-11-14 12:21:13 +00:00
0ffdc86ce9
* config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete.
...
(arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too.
* gas/arm/local_label_coff.s: New test.
* gas/arm/local_label_coff.d: New test.
* gas/arm/local_label_elf.s: New test.
* gas/arm/local_label_elf.d: New test.
* gas/arm/local_label_wince.s: New test.
* gas/arm/local_label_wince.d: New test.
2006-11-10 09:32:42 +00:00
6afdfa61bd
PR gas/3456:
...
* config/obj-elf.c (obj_elf_version): Do not include the name field's padding in the namesz value.
2006-11-10 07:47:14 +00:00
d84bcf09ed
* config/tc-mips.c: Fix outdated comment.
2006-11-09 13:04:39 +00:00
b7d9ef3748
gas/
...
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuPNI): Removed.
(CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
* config/tc-i386.c (md_assemble): Likewise.
include/opcode/
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
2006-11-08 19:56:02 +00:00
df1f3cdab5
gas:
...
* config/tc-mips.c (pic_need_relax): Return true for section symbols.
gas/testsuite:
* gas/mips/elf-rel26.s: New test.
* gas/mips/elf-rel26.d: Ditto.
* gas/mips/mips.exp: Run it.
2006-11-07 23:55:36 +00:00
a360e743fb
* config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases.
...
34k always has DSP ASE.
2006-11-06 14:28:21 +00:00
58ea3d6a2f
Fix typo in comment.
2006-11-03 16:32:04 +00:00
648178740a
* config/tc-mips.c (md_pcrel_from_section): Disallow PC relative
...
MIPS16 instructions referencing other sections, unless they are
external branches.
2006-11-03 16:27:41 +00:00
7764b3958e
* config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64
...
release 1 CPU.
2006-11-03 12:36:40 +00:00
d1e50f8a7e
* config/tc-h8300.c (build_bytes): Fix const warning.
2006-11-02 21:39:56 +00:00
06d2da930d
* tc-score.c (do16_rdrs): Handle not! instruction especially.
...
* score-opc.h (score_opcodes): Delete modifier '0x'.
* gas/score/rD_rA.d: Correct not! and not.c instruction disassembly.
* gas/score/b.d: Correct b! and b instruction disassembly.
2006-11-01 10:29:49 +00:00
3ba674705b
2006-10-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT
for EABIv4.
2006-10-31 20:33:40 +00:00
7a1d4c3893
2006-10-31 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (object_arch): New variable.
(s_arm_object_arch): New function.
(md_pseudo_table): Add object_arch.
(aeabi_set_public_attributes): Obey object_arch.
* doc/c-arm.texi: Document .object_arch.
2006-10-31 20:16:33 +00:00
b138abaa40
* tc-score.c (data_op2): Check invalid operands.
...
(my_get_expression): Const operand of some instructions can not be symbol in assembly.
(get_insn_class_from_type): Handle instruction type Insn_internal.
(do_macro_ldst_label): Modify inst.type.
(Insn_PIC): Delete.
* score-inst.h (enum score_insn_type): Add Insn_internal.
* tc-score.c (data_op2): The immediate value in lw is 15 bit signed.
* score-dis.c (print_insn): Correct the error code to print correct PCE instruction disassembly.
2006-10-31 09:54:41 +00:00
c79b7c30b4
2006-10-29 Randolph Chung <tausq@debian.org>
...
* config/tc-hppa.c (hppa_cfi_frame_initial_instructions)
(hppa_regname_to_dw2regnum): New funcions.
* config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define.
(tc_cfi_frame_initial_instructions)
(tc_regname_to_dw2regnum): Define.
(hppa_cfi_frame_initial_instructions)
(hppa_regname_to_dw2regnum): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN)
(DWARF2_CIE_DATA_ALIGNMENT): Define.
2006-10-30 01:09:18 +00:00
e2785c4472
* config/tc-spu.c (md_assemble): Cast printf string size parameter
...
to int in order to avoid a compiler warning.
2006-10-29 18:18:34 +00:00
86157c2070
2006-10-27 Andrew Stubbs <andrew.stubbs@st.com>
...
* config/tc-sh.c (md_assemble): Define size of branches.
2006-10-27 09:34:45 +00:00
e9f5312993
New Cell SPU port.
2006-10-25 06:49:21 +00:00
ede602d7c8
Add powerpc cell support.
2006-10-24 01:27:29 +00:00
878bcc438a
* config/tc-m68hc11.c (md_assemble): Quiet warning.
2006-10-23 03:23:49 +00:00
8620418b9c
* config/tc-i386.c (md_parse_option): Use CONST_STRNEQ.
...
(x86_64_section_letter): Likewise.
2006-10-20 00:32:43 +00:00
Denis Chertykov
Nathan Sidwell
Alan Modra
Nick Clifton
Paul Brook
H.J. Lu
Kaz Kojima
Matt Thomas
Kazu Hirata
Bob Wilson
Richard Sandiford
DJ Delorie
Julian Brown
Mark Shinwell
Andreas Schwab
Daniel Jacobowitz
Martin Schwidefsky
Thiemo Seufer
Dave Brolley
Mei Ligang
David Daney
Christian Groessler
Eric Botcazou
Randolph Chung
Andrew Stubbs
Mike Frysinger