Commit Graph

2653 Commits

Author SHA1 Message Date
Bernd Schmidt ee171c8f94 gas/
* config/bfin-parse.y (check_macfunc_option): Allow (IU)
	option for multiply and multiply-accumulate to data register
	instruction.
	(check_macfuncs): Don't check if accumulator matches the data register
	here.
	(assign_macfunc): Check if accumulator matches the
	data register in each rule that moves to the data
	register.

gas/testsuite/
	* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
	for IU option.
	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
	Add check for mismatch of accumulator and data register.

opcodes/
	* bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
	multiply and multiply-accumulate to data register instruction.
2008-03-26 16:21:10 +00:00
Bernd Schmidt c1db045b89 gas/:
* config/bfin-parse.y (check_macfunc_option): New.
 	(check_macfuncs): Check option by calling check_macfunc_option.
	Fix comparison always true warnings.  Both scalar instructions
	of vector instruction must share the same mode option.  Only allow
	option mode at the end of the second instruction of the vector.
 	(asm_1): Check option by calling check_macfunc_option.

gas/testsuite/:
	* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
	tests for bad options of "multiply and multipy-accumulate to
	accumulator" instructions.  Add new vector instruction option
	mode tests.
	* gas/bfin/vector2.s: Add new vector instruction option mode test.
	* gas/bfin/vector2.d: Adjust accordingly.

	* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
	for mismatched half registers in vector multipy-accumulate
	instructions.
2008-03-26 15:58:27 +00:00
Bernd Schmidt 99bfa74a53 gas/
From Jie Zhang  <jie.zhang@analog.com>
	* config/bfin-parse.y (asm_1): Check AREGS in comparison
	instructions. And call yyerror () when comparing PREG with
	DREG.

gas/testsuite/:
	* gas/bfin/expected_comparison_errors.l: New test.
	* gas/bfin/expected_comparison_errors.s: New test.
	* gas/bfin/bfin.exp: Add expected_comparison_errors.
2008-03-26 15:18:42 +00:00
Andreas Krebbel 5746fb46c8 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
	(s390_cond_extensions): Reduced extensions to the compare related.
	(main): z10 cpu type option added.
	(expandConditionalJump): Renamed to ...
	(insertExpandedMnemonic): ... this.

	* opcodes/s390-opc.c: Re-group the operand format makros.
	(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
	INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
	INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
	INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
	INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
	INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
	INSTR_SIL_RDU): New instruction formats added.
	(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
	MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
	MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
	MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
	MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
	MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
	masks added.
	(s390_opformats): New formats added "ris", "rrs", "sil".
	* opcodes/s390-opc.txt: Add the conditional jumps with the
	extensions removed from automatic expansion in s390-mkopc.c manually.
	(asi - trtre): Add new System z10 EC instructions.
	* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* config/tc-s390.c (md_parse_option): z10 option added.

2008-03-19  Andreas Krebbel  <krebbel1@de.ibm.com>

	* gas/s390/zarch-z10.d: New file.
	* gas/s390/zarch-z10.s: New file.
	* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 10:29:18 +00:00
Alan Modra da6b876ee6 PR 5946
* config/tc-hppa.c (is_same_frag): Delete.
2008-03-16 23:16:03 +00:00
Bob Wilson 3b49282506 2008-03-14 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.h (xtensa_relax_statesE): Update comment for
	RELAX_LOOP_END_ADD_NOP.
2008-03-14 20:17:39 +00:00
Paul Brook 15290f0adc 2008-03-09 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_cpu_option_table): Add cortex-a9.
	* doc/c-arm.texi: Add cortex-a9.
2008-03-09 15:20:31 +00:00
Paul Brook b1cc4aeb65 2008-03-09 Paul Brook <paul@codesourcery.com>
bfd/
	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
	Tag_VFP_arch values.

	binutils/
	* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".

	gas/
	* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
	(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
	(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
	(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
	* doc/c-arm.texi: Document new ARM FPU variants.

	gas/testsuite/
	* gas/arm/vfpv3-d16-bad.d: New test.
	* gas/arm/vfpv3-d16-bad.l: New test.

	include/opcode/
	* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
2008-03-09 13:23:29 +00:00
Paul Brook 39623e120c 2008-03-07 Paul Brook <paul@codesourcery.com>
bfd/
	* elf32-arm.c (elf32_arm_howto_table_1): Fix bitmasks for MOVW and
	MOVT relocations.
	(elf32_arm_final_link_relocate): Fix off by one MOVW/MOVT sign
	extension.
	(elf32_arm_relocate_section): Handle MOVW and MOVT
	relocations.  Improve safety check for other weird relocations.
	(elf32_arm_check_relocs): Only set h->needs_plt for branch/call
	relocations.

	gas/
	* config/tc-arm.c (md_apply_fix): Use correct offset range.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests): Add movw-merge and arm-app-movw.
	* ld-arm/arm-app-movw.s: New test.
	* ld-arm/arm-app.r: Update expected output.
	* ld-arm/movw-merge.d: New test.
	* ld-arm/movw-merge.s: New test.
2008-03-08 01:20:39 +00:00
Alan Modra d815f1a994 * config/tc-ppc.c (ppc_setup_opcodes): Tidy. Add code to test
for strict ordering of powerpc_opcodes, but disable for now.
2008-03-06 23:01:00 +00:00
Paul Brook 7e8064706d 2008-03-04 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
	(arm_ext_v7m): Rename...
	(arm_ext_m): ... to this.  Include v6-M.
	(do_t_add_sub): Allow narrow low-reg non flag setting adds.
	(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
	(md_assemble): Allow wide msr instructions.
	(insns): Add classifications for v6-m instructions.
	(arm_cpu_option_table): Add cortex-m1.
	(arm_arch_option_table): Add armv6-m.
	(cpu_arch): Add ARM_ARCH_V6M.  Fix numbering of other v6 variants.

	gas/testsuite/
	* gas/arm/archv6m.d: New test.
	* gas/arm/archv6m.s: New test.
	* gas/arm/t16-bad.s: Test low register non flag setting add.
	* gas/arm/t16-bad.l: Update expected output.

	include/opcode/
	* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
	(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
2008-03-05 01:31:26 +00:00
Bob Wilson 77cba8a32b bfd/
* xtensa-isa.c (xtensa_isa_num_pipe_stages): Make max_stage static and
	only compute its value once.
gas/
	* config/tc-xtensa.c (xtensa_num_pipe_stages): New.
	(md_begin): Initialize it.
	(resources_conflict): Use it.
2008-03-03 23:23:41 +00:00
Bob Wilson 58502fec59 2008-03-03 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.h (RELAX_XTENSA_NONE): New.
2008-03-03 22:14:45 +00:00
Alan Modra 783de16343 * config/tc-ppc.h (struct _ppc_fix_extra): New.
(ppc_cpu): Declare.
	(TC_FIX_TYPE, TC_INIT_FIX_DATA): Define.
	* config/tc-ppc.c (ppu_cpu): Make global.
	(ppc_insert_operand): Add ppu_cpu parameter.
	(md_assemble): Adjust for above change.
	(md_apply_fix): Pass tc_fix_data.ppc_cpu to ppc_insert_operand.
2008-03-01 07:24:47 +00:00
Nick Clifton 584206dbd5 * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
targeted ARM ports, otherwise just skip generating the reloc.
2008-02-22 16:47:01 +00:00
Nick Clifton 5ad3420347 * config/tc-arm.c (do_bx): Only test EF_ARM_EABI_VERSION on ELF
targeted ARM ports.
2008-02-22 15:14:44 +00:00
Paul Brook 845b51d665 2008-02-20 Paul Brook <paul@codesourcery.com>
ld/
	* emultempl/armelf.em (OPTION_FIX_V4BX_INTERWORKING): Define.
	(PARSE_AND_LIST_LONGOPTS): Add fix-v4bx-interworking.
	(PARSE_AND_LIST_OPTIONS): Ditto.
	(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FIX_V4BX_INTERWORKING.
	* emulparams/armelf.sh (OTHER_TEXT_SECTIONS): Add .v4_bx.
	* emulparams/armelf_linux.sh (OTHER_TEXT_SECTIONS): Ditto.
	* emulparams/armnto.sh (OTHER_TEXT_SECTIONS): Ditto.
	* ld.texinfo: Document --fix-v4bx-interworking.

	ld/testsuite/
	* ld-arm/armv4-bx.d: New test.
	* ld-arm/armv4-bx.s: New test.
	* ld-arm/arm.ld: Add .v4bx.
	* ld-arm/arm-elf.exp: Add armv4-bx.

	gas/testsuite/
	* gas/arm/thumb.d: Exclude EABI targets.
	* gas/arm/arch4t.d: Exclude EABI targts.
	* gas/arm/v4bx.d: New test.
	* gas/arm/v4bx.s: New test.
	* gas/arm/thumb-eabi.d: New test.
	* gas/arm/arch4t-eabi.d: New test.

	gas/
	* config/tc-arm.c (fix_v4bx): New variable.
	(do_bx): Generate V4BX relocations.
	(md_assemble): Allow bx on v4 codes when fix_v4bx.
	(md_apply_fix): Handle BFD_RELOC_ARM_V4BX.
	(tc_gen_reloc): Ditto.
	(OPTION_FIX_V4BX): Define.
	(md_longopts): Add fix-v4bx.
	(md_parse_option): Handle OPTION_FIX_V4BX.
	(md_show_usage): Document --fix-v4bx.
	* doc/c-arm.texi: Document --fix-v4bx.

	bfd/
	* reloc.c: Add BFD_RELOC_ARM_V4BX.
	* elf32-arm.c (elf32_arm_reloc_map): Add BFD_RELOC_ARM_V4BX.
	(ARM_BX_GLUE_SECTION_NAME, ARM_BX_GLUE_SECTION_NAME): Define.
	(elf32_arm_link_hash_table): Add bx_glue_size and bx_glue_offset.
	Update comment for fix_v4bx.
	(elf32_arm_link_hash_table_create): Zero bx_glue_size and
	bx_glue_offset.
	(ARM_BX_VENEER_SIZE, armbx1_tst_insn, armbx2_moveq_insn,
	armbx3_bx_insn): New.
	(bfd_elf32_arm_allocate_interworking_sections): Allocate BX veneer
	section.
	(bfd_elf32_arm_add_glue_sections_to_bfd): Ditto.
	(bfd_elf32_arm_process_before_allocation): Record BX veneers.
	(record_arm_bx_glue, elf32_arm_bx_glue): New functions.
	(elf32_arm_final_link_relocate): Handle BX veneers.
	(elf32_arm_output_arch_local_syms): Output mapping symbol for .v4_bx.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
2008-02-20 15:17:56 +00:00
Nick Clifton ca75ed2d8f * config/tc-mn10300.c (has_known_symbol_location): New function.
Do not regard weak symbols as having a known location.
        (md_estimate_size_before_relax): Use new function.
        (md_pcrel_from): Do not compute a pcrel against a weak symbol.
2008-02-18 10:03:06 +00:00
Jan Beulich 192dc9c6fd gas/
2008-02-18  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (match_template): Disallow 'l' suffix when
	currently selected CPU has no 32-bit support.
	(parse_real_register): Do not return registers not available on
	currently selected CPU.

gas/testsuite/
2008-02-18  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/att-regs.s, gas/i386/att-regs.d,
	gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
	* gas/i386/i386.exp: Run new tests.
2008-02-18 08:44:38 +00:00
H.J. Lu 1fed0ba155 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_immext): Fix format.
2008-02-17 00:26:19 +00:00
H.J. Lu 65da13b5e0 gas/
2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (inoutportreg): New.
	(process_immext): New.
	(md_assemble): Use it.
	(update_imm): Use imm16 and imm32s.
	(i386_att_operand): Use inoutportreg.

opcodes/

2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
	* i386-init.h: Regenerated.
2008-02-16 16:16:48 +00:00
H.J. Lu 0dfbf9d7ce 2008-02-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (operand_type_all_zero): New.
	(operand_type_set): Likewise.
	(operand_type_equal): Likewise.
	(cpu_flags_all_zero): Likewise.
	(cpu_flags_set): Likewise.
	(cpu_flags_equal): Likewise.
	(UINTS_ALL_ZERO): Removed.
	(UINTS_SET): Likewise.
	(UINTS_CLEAR): Likewise.
	(UINTS_EQUAL): Likewise.
	(cpu_flags_match): Updated.
	(smallest_imm_type): Likewise.
	(set_cpu_arch): Likewise.
	(md_assemble): Likewise.
	(optimize_imm): Likewise.
	(match_template): Likewise.
	(process_suffix): Likewise.
	(update_imm): Likewise.
	(process_drex): Likewise.
	(process_operands): Likewise.
	(build_modrm_byte): Likewise.
	(i386_immediate): Likewise.
	(i386_displacement): Likewise.
	(i386_att_operand): Likewise.
	(parse_real_register): Likewise.
	(md_parse_option): Likewise.
	(i386_target_format): Likewise.
2008-02-14 22:54:02 +00:00
Nick Clifton 93ac268764 PR gas/5712
* config/tc-arm.c (s_arm_unwind_save): Advance the input line
        pointer past the comma after parsing a floating point register
        name.

        * gas/arm/fp-save.s: New test.
        * gas/arm/fp-save.d: Expected disassembly.
2008-02-14 16:35:51 +00:00
Nick Clifton d669d37f8d PR gas/2626
* avr.h (AVR_ISA_2xxe): Define.

        * config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
        to AVR_ISA_2xxe.
        (avr_operand): Disallow post-increment addressing in the lpm
        instruction for the attiny26.
2008-02-14 13:04:29 +00:00
Jan Beulich b7240065b3 gas/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (parse_real_register): Don't return 'FLAT'
	if not in Intel mode.
	(i386_intel_operand): Ignore segment overrides in immediate and
	offset operands.
	(intel_e11): Range-check i.mem_operands before use as array
	index. Filter out FLAT for uses other than as segment override.
	(intel_get_token): Remove broken promotion of "FLAT:" to mean
	"offset FLAT:".

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelok.s: Replace invalid offset expression with
	valid ones.
	* gas/i386/x86_64.s: Likewise.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.h (RegFlat): New.
	* i386-reg.tbl (flat): Add.
	* i386-tbl.h: Re-generate.
2008-02-13 13:41:26 +00:00
Jan Beulich 34b772a651 gas/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (intel_e09): Also special-case 'bound'.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
	* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
	gas/i386/opcode-intel.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-dis.c (a_mode): New.
	(cond_jump_mode): Adjust.
	(Ma): Change to a_mode.
	(intel_operand_size): Handle a_mode.
	* i386-opc.tbl: Allow Dword and Qword for bound.
	* i386-tbl.h: Re-generate.
2008-02-13 13:29:31 +00:00
Jan Beulich a60de03c61 gas/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (allow_pseudo_reg): New.
	(parse_real_register): Check for NULL just once. Allow all
	register table entries when allow_pseudo_reg is non-zero.
	Don't allow any registers without type when allow_pseudo_reg
	is zero.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	(tc_x86_frame_initial_instructions): Adjust for above change.
	* config/tc-i386.h (tc_regname_to_dw2regnum): Remove.
	(tc_parse_to_dw2regnum): New.
	(tc_x86_regname_to_dw2regnum): Replace with ...
	(tc_x86_parse_to_dw2regnum): ... this.
	* dw2gencfi.c (tc_parse_to_dw2regnum): New, broken out of ...
	(cfi_parse_reg): ... this. Use tc_parse_to_dw2regnum. Adjust
	error handling.

gas/testsuite/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* gas/cfi/cfi-i386.s: Add code testing use of all registers.
	Fix a few comments.
	* gas/cfi/cfi-x86_64.s: Likewise.
	* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.

opcodes/
2008-02-13  Jan Beulich  <jbeulich@novell.com>

	* i386-gen.c (process_i386_registers): Process new fields.
	* i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
	unsigned char. Add dw2_regnum and Dw2Inval.
	* i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
	register names.
	* i386-tbl.h: Re-generate.
2008-02-13 10:14:40 +00:00
Nick Clifton 9c95b5212a * config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier to
argument.
  (tic4x_insn_add): Likewise.
  (md_begin): Drop cast that was discarding a const qualifier.
  * config/tc-d30v.c (get_reloc): Add const qualifier to op
  argument.
  (build_insn): Drop cast that was discarding a const qualifier.
2008-02-12 08:37:08 +00:00
H.J. Lu f03fe4c110 gas/
2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (cpu_arch): Add .xsave.
	(md_show_usage): Add .xsave.

	* doc/c-i386.texi: Add xsave to -march=.

gas/testsuite/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.s: Add xgetbv.

	* gas/i386/arch-10.d: Updated.
	* gas/i386/arch-10-1.l: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c  (cpu_flag_init): Add CPU_XSAVE_FLAGS.
	* i386-init.h: Updated.
2008-02-12 05:35:36 +00:00
Alan Modra 1bf57e9fa3 * read.c (s_weakref): Don't pass unadorned NULL to concat.
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
2008-02-07 08:40:29 +00:00
Bob Wilson 2276bc2089 2008-02-05 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (relax_frag_immed): Change internal consistency
	checks into assertions.  When relaxation produces an operation that
	does not fit in the current FLIX instruction, make sure that the
	operation is relaxed as needed to account for being placed following
	the current instruction.
2008-02-05 19:39:08 +00:00
Adam Nemet 967344c664 * config/tc-mips.c (mips_cpu_info_table): Add Octeon. 2008-02-04 19:20:16 +00:00
H.J. Lu 599121aa77 gas/
2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_show_usage): Replace tabs with spaces.

gas/testsuite/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.

	* gas/i386/x86-64-arch-1.d: New.
	* gas/i386/x86-64-arch-1.s: Likewise.
	* gas/i386/x86-64-arch-10.d: Likewise.

opcodes/

2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
	* i386-init.h: Regenerated.
2008-01-23 19:05:12 +00:00
Eric B. Weddington 2b1ed17bea /gas:
2008-01-23  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.

/include:
2008-01-23  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-23 17:36:23 +00:00
H.J. Lu 2cb4f3d5a9 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_show_usage): Show more processors for
	-march=/-mtune=.
2008-01-23 14:13:08 +00:00
H.J. Lu 115c7c25fe gas/
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_target_format): Remove cpummx2.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: New.
	* gas/i386/arch-11.s: Likewise.
	* gas/i386/arch-12.d: Likewise.
	* gas/i386/arch-12.s: Likewise.

	* gas/i386/i386.exp: Run arch-11 and arch-12.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuMMX2.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuMMX2): Removed.
	(CpuSSE): Updated.

	* i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-01-22 19:57:30 +00:00
H.J. Lu 6305a20382 gas/
2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.
	(cpu_sub_arch_name): Remove const.
	(cpu_arch): Add .vmx and .smx.
	(set_cpu_arch): Append cpu_sub_arch_name.
	(md_parse_option): Support -march=CPU[,+EXTENSION...].
	(md_show_usage): Updated.

	* config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c.
	(XXX_MNEM_SUFFIX): Likewise.
	(END_OF_INSN): Likewise.
	(templates): Likewise.
	(modrm_byte): Likewise.
	(rex_byte): Likewise.
	(DREX_XXX): Likewise.
	(drex_byte): Likewise.
	(sib_byte): Likewise.
	(processor_type): Likewise.
	(arch_entry): Likewise.

	* doc/as.texinfo: Update i386 -march option.

	* doc/c-i386.texi: Update -march= for ISA.

gas/testsuite/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10-1.l: New.
	* gas/i386/arch-10-1.s: Likewise.
	* gas/i386/arch-10-2.l: Likewise.
	* gas/i386/arch-10-2.s: Likewise.
	* gas/i386/arch-10-3.l: Likewise.
	* gas/i386/arch-10-3.s: Likewise.
	* gas/i386/arch-10-4.l: Likewise.
	* gas/i386/arch-10-4.s: Likewise.
	* gas/i386/arch-10.d: Likewise.
	* gas/i386/arch-10.s: Likewise.

	* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
	arch-10-3 and arch-10-4.

	* gas/i386/nops-2.s: Use movsbl instead of cmove.
	* gas/i386/nops-2-i386.d: Updated.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.

opcodes/

2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
	CPU_SMX_FLAGS.
	* i386-init.h: Regenerated.
2008-01-22 19:16:45 +00:00
Bob Wilson fb227da0a1 * config/tc-xtensa.c (xtensa_leb128): New function.
(md_pseudo_table): Use it for sleb128 and uleb128.
	(is_leb128_expr): New internal flag.
	(xtensa_symbol_new_hook): Check new flag.
2008-01-18 19:13:48 +00:00
Eric B. Weddington 982b62a030 /gas:
2008-01-03  Eric B. Weddington  <eric.weddington@atmel.com>

	* config/tc-avr.c (mcu_types): Change opcode set for avr3,
	at90usb82, at90usb162.
	* doc/c-avr.texi: Change architecture grouping for at90usb82,
	at90usb162.
	These changes support the new avr35 architecture group in gcc.

/include:
2008-01-03  Eric B. Weddington  <eric.weddington@atmel.com>

	* opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
	(AVR_ISA_AVR3): Likewise.
2008-01-16 17:59:07 +00:00
H.J. Lu 321fd21e2f gas/
2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Also zap movzx and movsx
	suffix for AT&T syntax.

gas/testsuite/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add more tests for movsx and movzx.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/inval.s: Remove tests for movsxw and movzxw.

	* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
	movsxl, movzxb and movzxw.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
	* i386-tbl.h: Regenerated.
2008-01-15 18:50:44 +00:00
H.J. Lu 5c07affcae gas/
2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_reg_size): New.
	(match_mem_size): Likewise.
	(operand_size_match): Likewise.
	(operand_type_match): Also clear all size fields.
	(match_template): Skip Intel syntax when in AT&T syntax.
	Call operand_size_match to check operand size.
	(i386_att_operand): Set the mem field to 1 for memory
	operand.
	(i386_intel_operand): Likewise.

gas/testsuite/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/i386.d: Updated.
	* gas/i386/inval.l: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IntelSyntax.
	(operand_types): Add Mem.

	* i386-opc.h (IntelSyntax): New.
	* i386-opc.h (Mem): New.
	(Byte): Updated.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add intelsyntax.
	(i386_operand_type): Add mem.

	* i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
	instructions.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-01-15 01:37:56 +00:00
H.J. Lu 7d5e4556a3 gas/testsuite/
2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/i386.s: Add tests for fnstsw and fstsw.
	* gas/i386/inval.s: Likewise.
	* gas/i386/x86_64.s: Likewise.

	* gas/i386/intel.s: Use word instead of dword on ss.

	* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
	and out.

	* gas/i386/prefix.s: Remove invalid fstsw.

	* gas/i386/inval.l: Updated.
	* gas/i386/intelbad.l: Likewise.
	* gas/i386/i386.d: Likewise.
	* gas/i386/x86_64.d: Likewise.
	* gas/i386/x86-64-inval.l: Likewise.
	* gas/i386/prefix.d: Updated.

gas/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (_i386_insn): Update comment.
	(operand_type_match): Also clear unspecified.
	(operand_type_register_match): Likewise.
	(parse_operands): Initialize unspecified.
	(i386_intel_operand): Likewise.
	(match_template): Check memory and accumulator operand size.
	(i386_att_operand): Clear unspecified on register operand.
	(intel_e11): Likewise.
	(intel_e09): Set operand size and clean unspecified for
	"XXX PTR".

opcodes/

2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (operand_type_init): Add Dword to
	OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
	(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
	Qword and Xmmword.
	(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
	Xmmword, Unspecified and Anysize.
	(set_bitfield): Make Mmword an alias of Qword.  Make Oword
	an alias of Xmmword.

	* i386-opc.h (CheckSize): Removed.
	(Byte): Updated.
	(Word): Likewise.
	(Dword): Likewise.
	(Qword): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(OTMax): Likewise.
	(i386_opcode_modifier): Remove checksize, byte, word, dword,
	qword and xmmword.
	(Fword): New.
	(TBYTE): Likewise.
	(Unspecified): Likewise.
	(Anysize): Likewise.
	(i386_operand_type): Add byte, word, dword, fword, qword,
	tbyte xmmword, unspecified and anysize.

	* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
	Tbyte, Xmmword, Unspecified and Anysize.

	* i386-reg.tbl: Add size for accumulator.

	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-01-12 16:05:42 +00:00
H.J. Lu 50aecf8c5f 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check processor support
	first.
2008-01-10 21:59:46 +00:00
H.J. Lu 2dbab7d572 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Continue if processor
	doesn't match.
2008-01-10 20:53:27 +00:00
Alexandre Oliva 417c21b7ba * config/tc-ia64.c (ia64_convert_frag): Zero-initialize room for
unwind personality function address.
2008-01-09 22:36:06 +00:00
H.J. Lu 45664ddbb0 2008-01-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check register size
	only when size of operands can be encoded the canonical way.
2008-01-09 16:55:14 +00:00
H.J. Lu a761937534 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_operand): Renamed to ...
	(i386_att_operand): This.
	(parse_operands): Updated.
2008-01-08 19:51:24 +00:00
H.J. Lu e1d4d8936f gas/
2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.

	* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
	only.
	(md_assemble): Remove Intel mode workaround.
	(match_template): Check support for old gcc, AT&T mnemonic
	and Intel Syntax.
	(md_parse_option): Don't set intel_mnemonic to 0 for
	OPTION_MOLD_GCC.

gas/testsuite/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
	fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.

	* gas/i386/intel.d: Updated.
	* gas/i386/intel.e: Likewise.

opcodes/

2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
	ATTSyntax.

	* i386-opc.h (IntelMnemonic): Renamed to ..
	(ATTSyntax): This
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
	and intelsyntax.

	* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
	on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
	* i386-tbl.h: Regenerated.
2008-01-05 17:07:25 +00:00
H.J. Lu 23117009d4 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h: Update copyright to 2008.
2008-01-04 18:19:12 +00:00
Nick Clifton b0e34bfe93 * config/tc-ppc.c (parse_cpu): Preserve the settings of the
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags.

* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
  command line options (-maltivec, -mspe) can be specified before
  CPU selection command line options.
* gas/ppc/altivec_and_spe.d: Expected disassembly.
* gas/ppc/ppc.exp: Run the new test
2008-01-04 14:53:50 +00:00
H.J. Lu aacd03c3bb 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead
	of SYSV386_COMPAT.
2008-01-04 01:27:01 +00:00
H.J. Lu 3629bb00a8 gas/
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (cpu_arch_flags_not): Removed.
	(cpu_flags_not): Likewise.
	(cpu_flags_match): Updated to check 64bit and arch.
	(set_code_flag): Remove cpu_arch_flags_not.
	(set_16bit_gcc_code_flag): Likewise.
	(set_cpu_arch): Likewise.
	(md_begin): Likewise.
	(parse_insn): Call cpu_flags_match to check 64bit and arch.
	(match_template): Likewise.

gas/testsuite/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-9.d: New file.
	* gas/i386/arch-9.s: Likewise.

	* gas/i386/i386.exp: Run arch-9.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
	CpuSSE4_2_Or_ABM.
	(cpu_flags): Likewise.

	* i386-opc.h (CpuSSE4_1_Or_5): Removed.
	(CpuSSE4_2_Or_ABM): Likewise.
	(CpuLM): Updated.
	(i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.

	* i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
	Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
	and CpuPadLock, respectively.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2008-01-04 01:05:45 +00:00
Jakub Jelinek 5dd15031dd * config/tc-i386.c (process_drex): Initialize modrm_reg and
modrm_regmem to 0 instead of None.
2008-01-03 20:19:29 +00:00
H.J. Lu 24995bd6e3 gas/
2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Use the xmmword field
	instead of no_xsuf.

opcodes/

2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove No_xSuf.

	* i386-opc.h (No_xSuf): Removed.
	(CheckSize): Updated.

	* i386-tbl.h: Regenerated.
2008-01-03 20:09:38 +00:00
H.J. Lu fc4adea1ba 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Fix a typo.
2008-01-02 23:55:45 +00:00
H.J. Lu 582d5eddfe gas/
2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
	Check memory size in Intel mode.
	(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
	(intel_e09): Likewise.

	* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.

gas/testsuite/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* gas/i386/intel.s: Use QWORD on movq instead of DWORD.

	* gas/i386/inval.s: Add tests for movq.
	* gas/i386/x86-64-inval.s: Likewise.

	* gas/i386/inval.l: Updated.
	* gas/i386/x86-64-inval.l: Likewise.

opcodes/

2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5534
	* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
	Byte, Word, Dword, QWord and Xmmword.

	* i386-opc.h (No_xSuf): New.
	(CheckSize): Likewise.
	(Byte): Likewise.
	(Word): Likewise.
	(Dword): Likewise.
	(QWord): Likewise.
	(Xmmword): Likewise.
	(FWait): Updated.
	(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
	Dword, QWord and Xmmword.

	* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
	used.
	* i386-tbl.h: Regenerated.
2008-01-02 21:43:34 +00:00
Catherine Moore e7c604dd09 * gas/mips/jalr.s: New test.
* gas/mips/jalr.l: New test output.
    * gas/mips/mips.exp: Run new test.
2008-01-02 20:59:47 +00:00
H.J. Lu ba104c838a 2007-12-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_show_usage): Add -mmnemonic, -msyntax,
	-mindex-reg, -mnaked-reg and -mold-gcc.
2007-12-29 14:15:20 +00:00
Dave Anglin 3a0d49fcec * config/tc-hppa.h (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
in parens.
2007-12-27 15:35:53 +00:00
H.J. Lu 5209009a1b Fix a typo in comment. 2007-12-24 06:10:17 +00:00
H.J. Lu 1efbbeb461 gas/
2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (set_intel_mnemonic): New.
	(intel_mnemonic): Likewise.
	(old_gcc): Likewise.
	(OPTION_MMNEMONIC): Likewise.
	(OPTION_MSYNTAX): Likewise.
	(OPTION_MINDEX_REG): Likewise.
	(OPTION_MNAKED_REG): Likewise.
	(OPTION_MOLD_GCC): Likewise.
	(md_pseudo_table): Add .intel_mnemonic and .att_mnemonic.
	(match_template): Don't allow AT&T/Intel mnemonic if Intel/AT&T
	mnemonic is specified.  Don't allow old gcc support if old_gcc
	is 0.
	(md_longopts): Add -mmnemonic, -msyntax, -mindex-reg,
	-mmnaked-reg and -mold-gcc.
	(md_parse_option): Handle OPTION_MMNEMONIC, OPTION_MSYNTAX,
	OPTION_MINDEX_REG, OPTION_MNAKED_REG and OPTION_MOLD_GCC.

	* doc/c-i386.texi: Docoument -mmnemonic, -msyntax, --mnaked-reg
	and AT&T mnemonic vs. Intel mnemonic.

gas/testsuite/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/compat-intel.d: Pass -mmnemonic=att to assembler.
	* gas/i386/compat.d: Likewise.

	* gas/i386/i386.exp: Pass -mmnemonic=att to assembler for
	"float".  Pass -mold-gcc to assembler for  "general".

opcodes/

2007-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add OldGcc, ATTMnemonic and
	IntelMnemonic.

	* i386-opc.h (OldGcc): New.
	(ATTMnemonic): Likewise.
	(IntelMnemonic): Likewise.
	(Opcode_Modifier_Max): Updated.
	(i386_opcode_modifier): Add oldgcc, attmnemonic and
	intelmnemonic.

	* i386-opc.tbl: Update fadd, fdiv, fdivp, fdivr, fdivrp, fmul,
	fsub, fsubp, fsubr and fsubrp with OldGcc, ATTMnemonic and
	IntelMnemonic.
	* i386-tbl.h: Regeneratd.
2007-12-24 05:27:39 +00:00
Bob Wilson 1f7efbae40 * config/tc-xtensa.c (xtensa_elf_cons): Set frag flags for
expressions without suffixes.
	(get_frag_property_flags): Preserve is_no_transform flag for frags
	not marked as either instructions or literals.
2007-12-20 17:21:07 +00:00
H.J. Lu 4746505869 2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use ARRAY_SIZE.
	(lex_got): Likewise.
2007-12-17 19:41:57 +00:00
H.J. Lu 4a3523fa63 2007-12-17 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (output_insn): Use FRAG_APPEND_1_CHAR
	instead of frag_more/md_number_to_chars.
	(md_short_jump_size): Removed.
	(md_long_jump_size): Likewise.
	(md_create_short_jump): Likewise.
	(md_create_long_jump): Likewise.
2007-12-17 18:53:06 +00:00
Bob Wilson 38f9cb7fe1 gas/
* config/tc-xtensa.c (xg_symbolic_immeds_fit): Relax for weak
	references but not weak definitions.
gas/testsuite/
	* gas/xtensa/all.exp: Run new weak-call test.
	* gas/xtensa/weak-call.d: New.
	* gas/xtensa/weak-call.s: New.
2007-12-13 19:03:45 +00:00
Bob Wilson 8e6bc631a9 * config/tc-xtensa.c (xg_symbolic_immeds_fit): Do not relax calls to weak symbols if longcalls are disabled. 2007-12-12 21:16:47 +00:00
Bob Wilson def13efb26 * config/tc-xtensa.c (frag_format_size): Handle frags that expand to
wide branches.
	(get_aligned_diff): For RELAX_ALIGN_NEXT_OPCODE, skip to the next
	non-empty frag to find the LOOP instruction.  Change comma typo to
	a semicolon.
	(relax_frag_immed, convert_frag_immed): Rename wide_insn variable to
	from_widen_insn.
2007-12-11 21:52:39 +00:00
Alan Modra 71ac351cf2 * config/tc-m32r.c (md_begin): Mark .sbss as being bss style section. 2007-12-10 23:33:46 +00:00
Richard Sandiford 742a56fee5 gas/
* config/tc-mips.h (mips_nop_opcode): Declare.
	(NOP_OPCODE): Define.
	(mips_segment_info): New structure.
	(TC_SEGMENT_INFO_TYPE): Use it instead of insn_label_list.
	* config/tc-mips.c (label_list): Adjust for new TC_SEGMENT_INFO_TYPE.
	(mips_record_mips16_mode): New function.
	(install_insn): Call it.
	(mips_align): Likewise.  Turn the fill argument into an "int *".
	Use frag_align_code for code segments if no fill data is given.
	(s_align): Adjust call accordingly.
	(mips_nop_opcode): New function.
	(mips_handle_align): Use the first variable byte to decide which
	nop sequence is needed.  Use md_number_to_chars and mips16_nop_insn.

gas/testsuite/
	* gas/mips/align2.s, gas/mips/align2.d, gas/mips/align2-el.d: New
	tests.
	* gas/mips/mips.exp: Run them.
2007-12-10 10:36:00 +00:00
Bob Wilson 1bbb5f219c 2007-12-07 Bob Wilson <bob.wilson@acm.org>
include/elf/
	* xtensa.h (R_XTENSA_32_PCREL): New.

bfd/
	* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
	(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
	(elf_xtensa_check_relocs): Use default case for all relocations that
	need nothing done here.
	(elf_xtensa_do_reloc): Compute self_address for all relocation types.
	Handle R_XTENSA_32_PCREL.
	(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
	symbols.
	(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.

gas/
	* config/tc-xtensa.c (O_pcrel): Define.
	(suffix_relocs): Add pcrel suffix.
	(md_pseudo_table): Add 4byte and 2byte directives.
	(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
	(xg_assemble_literal): Likewise.  Check for O_pcrel.
	(expression_maybe_register): Reorganize.  Handle BFD_RELOC_32_PCREL.
	(xg_valid_literal_expression): Allow O_pcrel.
	(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
	(tc_gen_reloc): Fix punctuation in error message.

gas/testsuite/
	* gas/xtensa/all.exp: Run new pcrel test.
	* gas/xtensa/err-pcrel.s: New.
	* gas/xtensa/pcrel.d: New.
	* gas/xtensa/pcrel.s: New.
	* gas/xtensa/xtensa-err.exp: New.
2007-12-07 22:52:10 +00:00
Bob Wilson 542f8b941d * config/tc-xtensa.c (xg_force_frag_space): Delete.
(xg_finish_frag, xg_assemble_literal_space): Replace calls to it.
        (xtensa_create_property_segments, xtensa_create_xproperty_segments):
        Set output_section for new property sections.  Use subseg_set and
        seg_info instead of retrieve_segment_info.  Adjust arguments to
        add_xt_block_frags and add_xt_prop_frags.  Use standard functions
        to create frags and fix records.
        (retrieve_segment_info): Delete.
        (add_xt_block_frags, add_xt_prop_frags): Replace calls to
        retrieve_segment_info.  Remove unused xt_block_sec arguments.
2007-12-07 01:07:33 +00:00
Alan Modra d13d401589 * config/tc-ppc.c (ppc_tc): Allow a space between toc symbol
name and bracket.
2007-12-03 23:14:24 +00:00
Bob Wilson ee6365aa9e gas/
* config/tc-xtensa.h (md_allow_eh_opt): Define.
gas/testsuite/
	* gas/elf/elf.exp: Disable ehopt test for Xtensa.
2007-11-30 23:47:55 +00:00
Mark Shinwell 350cc38db2 bfd/
* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
Martin Schwidefsky e6181b6abd 2007-11-29 Martin Schwidefsky <schwidefsky@de.ibm.com>
* config/tc-s390.c (md_begin): If the -mesa option is specified
	add zarch opcodes to the hash table only if there is no variant
	that is available for the esa mode as well.

2007-11-29  Martin Schwidefsky  <schwidefsky@de.ibm.com>

	* gas/s390/esa-z9-109.d: Add check for old version of sske.
	* gas/s390/esa-z9-109.s: Likewise.
2007-11-29 09:34:14 +00:00
Alan Modra ee21dcabf8 * config/tc-alpha.c (assemble_insn): Don't segv on NULL reloc_operand. 2007-11-26 01:43:43 +00:00
Bob Wilson b224e962a8 * config/xtensa-istack.h (tinsn_struct): Replace linenum field
with loc_directive_seen and debug_line.
	* config/tc-xtensa.c: Include xtensa-istack.h after dwarf2dbg.h.
	(xg_build_to_insn): Copy the new fields instead of linenum.
	(xg_build_token_insn): Likewise.  Abort on INSTR_LABEL_DEF and move
	common code out of the switch.
	(md_assemble): Set new tinsn fields from DWARF information.  Call
	dwarf2_consume_line_info.
	(xg_assemble_vliw_tokens): Update the code to select the "best" line
	number to use new information.  Call dwarf2_gen_line_info instead
	of dwarf2_emit_insn.
2007-11-19 19:40:55 +00:00
Bob Wilson 661ba50f53 * dwarf2dbg.c (dwarf2_consume_line_info): New.
(dwarf2_emit_insn): Use it here.
	(dwarf2_directive_loc): Fix check for consecutive .loc directives
	when debug_type is DEBUG_DWARF2.
	* dwarf2dbg.h (dwarf2_consume_line_info): New prototype.
	* config/tc-ia64.c (ia64_flush_insns): Call dwarf2_consume_line_info.
	(md_assemble): Likewise.
testsuite/
	* gas/lns/lns.exp: Run lns-common-1 with alternate source for ia64.
	* gas/lns/lns-common-1-ia64.s: New file.
2007-11-19 18:15:53 +00:00
Thiemo Seufer 4ffff32f75 * config/tc-mips.c (md_parse_option): Match mips_optimize to the -O
option supplied, but still keep mips_optimize == 2 as default value.
2007-11-17 14:19:19 +00:00
Eric B. Weddington ee50f563b9 2007-11-16 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add ATmega32HVB device.
	* doc/c-avr.texi: Likewise.
2007-11-16 17:39:22 +00:00
Eric B. Weddington 2221168ece 2007-11-16 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add ATmega1284P device.
	* doc/c-avr.texi: Likewise.
2007-11-16 17:25:28 +00:00
H.J. Lu 4f8631b1d4 gas/
2007-11-14  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ia64.c (AR_RUC): Defined.
	(ar): Add "ar.ruc".
	(specify_resource): Handle AR_RUC like AR_ITC.

gas/testsuite/

2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/ia64/dv-raw-err.s: Add tests for ar.ruc.
	* gas/ia64/dv-waw-err.s: Likewise.
	* gas/ia64/invalid-ar.s: Likewise.

	* gas/ia64/regs.s: Add tests for ar.ruc and ar44.

	* gas/ia64/dv-raw-err.l: Updated.
	* gas/ia64/dv-waw-err.l: Likewise.
	* gas/ia64/invalid-ar.l: Likewise.
	* gas/ia64/regs.d: Likewise.

opcodes/

2007-11-14  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-ic.tbl: Updated for Itanium 9100 series.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

2007-11-14  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Handle ar.ruc.
	* ia64-gen.c (lookup_regindex): Likewise.
2007-11-14 22:31:54 +00:00
Nick Clifton b5f5fd962e * config/tc-mn10300.c (mn10300_force_relocation): Force a reloc to be generated for alignment fixups.
* config/tc-mn10300.h (TC_FORCE_RELOCATION): Call mn10300_force_relocation.
* elf-m10300.c (mn10300_elf_final_link_relocate): Prevent the accidental termination of DWARF location list entries.
  (mn10300_elf_relax_delete_bytes): Stop deletion if an align reloc is encountered that is larger than or not a mutliple of the number of bytes being deleted.
  When adjusting symbols, any symbols inside the region being deleted must be moved to the end of the region.
  Move align relocs forward if there is room for them after the deletion of the region.
2007-11-13 10:40:29 +00:00
Nick Clifton 4247714778 PR gas/5269
* config/tc-frv.c (md_show_usage): Rewrite usage description to make it easier to translate.
* gas/po/gas.pot: Regenerate.
2007-11-12 10:57:33 +00:00
Alan Modra 2ad068bef2 * config/tc-ppc.c (md_assemble): If -mregnames, when parsing
PPC_OPERAND_CR always parse as expression to allow register name
	followed by an expression.
2007-11-12 00:27:53 +00:00
H.J. Lu 567e4e96bc 2007-11-09 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Re-order suffix check.
2007-11-09 13:53:13 +00:00
Bob Wilson 11ac267110 * config/tc-xtensa.c (relaxable_section): Check for .eh_frame. 2007-11-08 01:40:58 +00:00
Eric B. Weddington 71fe8fb398 2007-11-07 Eric B. Weddington <eweddington@cso.atmel.com>
* config/tc-avr.c (mcu_types): Add ATtiny88 device.
	* doc/c-avr.texi: Likewise.
2007-11-07 17:59:05 +00:00
Eric B. Weddington 5cc9c0ab34 2007-11-07 Anatoly Sokolov <aesok@post.ru>
* config/tc-avr.c (mcu_types): Add new devices: ATmega48P, ATmega88P,
	ATmega168P, Atmega328P
	* doc/c-avr.texi: Document new devices.
2007-11-07 17:24:59 +00:00
Tristan Gingold 8edcbfcd2e * config/tc-ppc.c (md_apply_fix): For PPC_TOC16 on XCOFF, uses offset
within the TOC instead of the VMA.

* gas/ppc/test1xcoff32.d: Updated to match RTOC bug fix.
2007-11-07 14:10:49 +00:00
Paul Brook 682b27ad2a 2007-11-06 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (do_mull): Allow overlapping Rm for armv6.

	gas/testsuite/
	* gas/arm/mul-overlap.s: Add umull and smlal.
	* gas/arm/mul-overlap.l: Update expected results.
2007-11-06 22:17:00 +00:00
Nick Clifton 8c7504802a * ehopt.c (check_eh_frame): If md_allow_eh_opt is defined, invoke it to see if the optimizations should be applied.
* config/tc-mn10300.h (md_allow_eh_opt): Define.  Only allow call frame optimization if linker relaxation is not enabled.
* gas/elf/elf.exp: Disable ehopt test for mn10300.
2007-11-06 17:15:10 +00:00
Bob Wilson 6a7eedfedc * config/tc-xtensa.c (xtensa_symbol_new_hook): New.
(xtensa_mark_difference_of_two_symbols): New.
	(xtensa_post_relax_hook): Call xtensa_mark_difference_of_two_symbols.
	* config/tc-xtensa.h (xtensa_symfield_type): Add next_expr_symbol.
	(tc_symbol_new_hook): Define.
2007-11-02 00:45:34 +00:00
H.J. Lu 7ce189b305 gas/
2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Replace no_xsuf with
	no_ldsuf.
	(match_template): Likewise.

opcodes/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Replace No_xSuf with
	No_ldSuf.
	* i386-opc.tbl: Likewise.

	* i386-opc.h (No_xSuf): Renamed to ...
	(No_ldSuf): This.
	(FWait): Updated.
2007-11-01 19:06:54 +00:00
H.J. Lu 4a146fc23c 2007-11-01 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (LONG_DOUBLE_MNEM_SUFFIX): Use a non-ascii
	letter.
2007-11-01 18:40:53 +00:00
H.J. Lu ca61edf2ff gas/
2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Check addrprefixop0 to
	see if the address size override prefix changes the size of the
	first operand.
	(check_byte_reg): Don't warn if byteokintel is set.
	(check_long_reg): Set i.suffix to QWORD_MNEM_SUFFIX if toqword
	is set.
	(check_qword_reg): Set i.suffix to LONG_MNEM_SUFFIX if todword
	is set.

gas/testsuite/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.d: New.
	* gas/i386/i386.s: Likewise.

	* gas/i386/i386.exp: Run i386.

	* gas/i386/x86_64.s: Add tests for movsx, movsbl, movsbq,
	movsbw, movswl, movswq, movzx, movzb, movzbl, movzbq,
	movzbw, movzwl and movzwq.
	* gas/i386/x86_64.d: Updated.

opcodes/

2007-11-01  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add ByteOkIntel, ToDword,
	ToQword and AddrPrefixOp0.

	* i386-opc.h (ByteOkIntel): New.
	(ToDword): Likewise.
	(ToQword): Likewise.
	(AddrPrefixOp0): Likewise.
	(IsPrefix): Updated.
	(i386_opcode_modifier): Add byteokintel, todword, toqword
	and addrprefixop0.

	* i386-opc.tbl (cvtss2si): Add ToQword.
	(cvttss2si): Likewise.
	(cvtsd2si): Add ToDword.
	(cvttsd2si): Likewise.
	(monitor): Add AddrPrefixOp0.
	(invlpga): Likewise.
	(vmload): Likewise.
	(vmrun): Likewise.
	(vmsave): Likewise.
	(pextrb): Add ByteOkIntel.
	(pinsrb): Likewise.
	* i386-tbl.h: Regenerated.
2007-11-01 16:27:08 +00:00
Eric B. Weddington 7f5ba16ddb 2007-10-31 Eric B. Weddington <eweddington@cso.atmel.com>
* config/tc-avr.c (mcu_types): Remove devices that were never produced:
	attiny10, atmega83, atmega85, atmega603.
	* doc/c-avr.texi: Likewise.
2007-10-31 18:11:28 +00:00
Nick Clifton 569006e582 * mn10300.h (R_MN10300_ALIGN): Define.
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
  Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
  sym_diff relocs should be generated.
  (md_apply_fix): Skip R_MN10300_ALIGN relocs.
  (mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
  (mn10300_handle_align): New function.  Generate R_MN10300_ALIGN
  relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
  R_MN10300_ALIGN relocs.
  (HANDLE_ALIGN): Define.  Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests.  Skip i126256 test if
  a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
2007-10-30 15:18:29 +00:00
H.J. Lu 9cfc3331a8 gas/
2007-10-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5221
	* config/obj-elf.c (obj_elf_section): Handle optional
	parameters for .pushsection.

	* doc/as.texinfo: Document optional parameters for
	.pushsection.

gas/testsuite/

2007-10-27  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/5221
	* gas/elf/elf.exp: Run section7.

	* gas/elf/section7.d: New.
	* gas/elf/section7.s: Likewise.
2007-10-27 17:45:53 +00:00
Nick Clifton bfff164249 Add MN10300 linker relaxation support for symbol differences 2007-10-19 17:31:31 +00:00