For the lui and auipc relaxations, since the symbol value of an undefined weak
symbol is always be zero, we can optimize the patterns into a single LI/MV/ADDI
instruction.
bfd/
* elfnn-riscv.c (riscv_pcgp_hi_reloc): Add new field undefined_weak.
(riscv_record_pcgp_hi_reloc): New parameter undefined_weak.
Set undefined_weak field from it.
(relax_func_t): New parameter undefined_weak.
(_bfd_riscv_relax_call): New ignored parameter undefined_weak.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_delete): Likewise.
(_bfd_riscv_relax_lui): New parameter undefined_weak. If true,
allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak.
(_bfd_riscv_relax_pc): New parameter undefined_weak. For LO12* relocs,
set undefined_weak from hi_reloc. If true, allow relaxing. For LO12*
relocs, set rs1 to x0 when undefined_weak and change to non-pcrel
reloc.
(_bfd_riscv_relax_section): New local undefined_weak. Set for
undef weak relocs that can be relaxed. Pass to relax_func call.
ld/
* testsuite/ld-riscv-elf/weakref32.s: Add relaxable undef weak code.
* testsuite/ld-riscv-elf/weakref64.s: Likewise.
* testsuite/ld-riscv-elf/weakref32.d: Updated.
* testsuite/ld-riscv-elf/weakref64.d: Updated.
This one exposed a bug in tic6x gas, found with inline function
parameter type checking. struct bfd_section and struct bfd_symbol
both have a flags field, so bfd_is_com_section (symbol) compiled OK
when bfd_is_com_section was a macro but didn't special case common
symbols.
bfd/
* bfd-in.h (bfd_section_name, bfd_section_size, bfd_section_vma),
(bfd_section_lma, bfd_section_alignment, bfd_section_flags),
(bfd_section_userdata, bfd_is_com_section, discarded_section),
(bfd_get_section_limit_octets, bfd_get_section_limit): Delete macros.
* bfd.c (bfd_get_section_limit_octets, bfd_get_section_limit),
(bfd_section_list_remove, bfd_section_list_append),
(bfd_section_list_prepend, bfd_section_list_insert_after),
(bfd_section_list_insert_before, bfd_section_removed_from_list):
New inline functions.
* section.c (bfd_is_und_section, bfd_is_abs_section),
(bfd_is_ind_section, bfd_is_const_section, bfd_section_list_remove),
(bfd_section_list_append, bfd_section_list_prepend),
(bfd_section_list_insert_after, bfd_section_list_insert_before),
(bfd_section_removed_from_list): Delete macros.
(bfd_section_name, bfd_section_size, bfd_section_vma),
(bfd_section_lma, bfd_section_alignment, bfd_section_flags),
(bfd_section_userdata, bfd_is_com_section, bfd_is_und_section),
(bfd_is_abs_section, bfd_is_ind_section, bfd_is_const_section),
(discarded_section): New inline functions.
* bfd-in2.h: Regenerate.
gas/
* config/tc-tic6x.c (tc_gen_reloc): Correct common symbol check.
ld/
* emultempl/xtensaelf.em (xtensa_get_section_deps): Comment.
Use bfd_section_userdata.
(xtensa_set_section_deps): Use bfd_set_section_userdata.
* ldlang.c (lang_output_section_get): Use bfd_section_userdata.
(sort_def_symbol): Likewise, and bfd_set_section_userdata.
(init_os): Use bfd_set_section_userdata.
(print_all_symbols): Use bfd_section_userdata.
* ldlang.h (get_userdata): Delete.
This patch corrects the set of dynamic relocations recognised by gold
as supported by glibc, and teaches ld.bfd to report an error similar
to the gold error. Note that ld --noinhibit-exec can be used to
produce an output, supporting older ld with newer glibc if the set of
supported glibc dynamic relocations changes.
bfd/
* elf64-ppc.c (ppc64_glibc_dynamic_reloc): New function.
(ppc64_elf_relocate_section): Error if emitting unsupported
dynamic relocations.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Move REL24
to 32-bit supported.
I get some spurious changes when running autoconf/automake for various
projects in the tree. This is likely because they were generated using
distro-patched tools last time.
I ran `autoreconf -f` in the various automake projects of the
binutils-gdb tree, and this is the result. The tools I am using have
been compiled from source, from the upstream release.
bfd/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
* doc/Makefile.in: Re-generate.
binutils/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
* doc/Makefile.in: Re-generate.
gas/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
* doc/Makefile.in: Re-generate.
gold/ChangeLog:
* testsuite/Makefile.in: Re-generate.
gprof/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
ld/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
opcodes/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
Fixes a few leaks in bfd and ld.
bfd/
* mach-o.c (bfd_mach_o_fat_member_init): Likewise. Replace
xstrdup and xmalloc with bfd_strdup and bfd_malloc. Return an
error status. Adjust calls.
* vms-lib.c (_bfd_vms_lib_get_module): Test mhd->id earlier.
Close bfd on failure. Replace xstrdup/bfd_alloc use with
bfd_malloc. Use bfd_set_filename.
gdb/
* solib-spu.c (spu_bfd_open): Use bfd_set_filename.
* spu-linux-nat.c (spu_bfd_open): Likewise.
ld/
* emultempl/pe.em (after_open): Use bfd_set_filename.
* emultempl/pep.em (after_open): Use bfd_set_filename.
Some versions of clang apparently generate non-PIC on powerpc64le to
access common symbols. Since a common symbol and a strong definition
with the same name should resolve to the strong definition we have the
possibility of non-PIC attempting to access shared library variables.
This is really a clanger since powerpc64le is supposed to be PIC by
default, but let's see if ld can cope by generating .dynbss copies.
* elf64-ppc.c (must_be_dyn_reloc): Return 0 for TOC16 relocs.
(ppc64_elf_check_relocs): Support dynamic/copy relocs for TOC16.
(ppc64_elf_adjust_dynamic_symbol): Don't keep dynamic reloc when
needs_copy even if all relocs are in rw sections.
(dec_dynrel_count): Handle TOC16 relocs.
(ppc64_elf_relocate_section): Support dynamic relocs for TOC16.
(ppc64_elf_finish_dynamic_symbol): Adjust to handle needs_copy
semantic change.
This introduces a new bfd_set_filename function, which is then used in
various spots in gdb. This allows for the removal of some casts.
bfd/ChangeLog
2019-09-11 Tom Tromey <tom@tromey.com>
* opncls.c (bfd_set_filename): New function.
* bfd-in2.h: Regenerate.
gdb/ChangeLog
2019-09-11 Tom Tromey <tom@tromey.com>
* symfile-mem.c (symbol_file_add_from_memory): Use
bfd_set_filename.
* solib-darwin.c (darwin_bfd_open): Use bfd_set_filename.
* solib-aix.c (solib_aix_bfd_open): Use bfd_set_filename.
PC-relative relocs typically use the addend in adjusting what they are
relative to. For example:
bcl 20,31,1f
1: mflr 12
addi 12,12,xxx-1b
generates "R_PPC64_REL16 xxx+0x4" for the addi (when little-endian).
The addend reflects the fact that you want the offset relative to the
previous insn not the current one in this case.
So the question is, will we ever want to do something like that for an
instruction using R_PPC64_GOT_PCREL34? I thought so at the time I
first implemented support in ld but at the time I think the hardware
was possibly going to support pcrel+offset+reg addressing. In which
case you might want something like:
load_big_offset_into_r2
pld 3,sym-big_offset@got@pcrel(2)
which would be a way of supporting more than 8G offsets from code to
the GOT. We could do the same with
load_big_offset_into_r2
pla 9,sym-big_offset@got@pcrel
ldx 3,9,2
However, this is really a poor version of TOC-pointer relative code.
So let's go with an addend on R_PPC64_GOT_PCREL34 meaning that
sym+addend should be put in a GOT entry, and the relocation calculate
the pc-relative offset to that GOT entry.
Note that this is an extension to the ABI, which says (by the
expression given for GOT relocs) that non-zero addends on GOT and PLT
relocs are ignored. This is true for all GOT/PLT relocs, not just the
pcrel ones.
* elf64-ppc.c (ppc64_elf_check_relocs): Interpret an addend in
GOT_PCREL and PLT_PCREL relocs as affecting the value stored
in the GOT/PLT entry rather than affecting the offset to that
GOI/PLT entry.
(ppc64_elf_edit_toc, ppc64_elf_relocate_section): Likewise.
The loads and stores handled in the second instruction of a sequence
marked by R_PPC64_PCREL_OPT may be a prefix instruction. For example:
pld ra,symbol@got@pcrel
0:
pld rt,off(ra)
.reloc 0b-8,R_PPC64_PCREL_OPT,(.-8)-(0b-8)
can be optimised to
pld rt,symbol+off@pcrel
pnop
* elf64-ppc.c (xlate_pcrel_opt): Handle prefix loads and stores
in second instruction.
(ppc64_elf_relocate_section): Likewise.
This patch fixes the worst of the cases where libbfd might terminate
a program due to calling xstrdup or xmalloc. I've also fixed some
error paths that didn't clean up properly.
PR 24955
* libbfd-in.h (bfd_strdup): New inline function.
* archive.c (_bfd_get_elt_at_filepos): Use bfd_strdup. Close
bfd on error.
* elfcode.h (_bfd_elf_bfd_from_remote_memory): Use bfd_strdup.
* opncls.c (bfd_fopen): Use bfd_strdup. Close fd and stream
on error.
(bfd_openstreamr): Use bfd_strdup.
(bfd_openr_iovec, bfd_openw, bfd_create): Likewise.
* plugin.c (try_load_plugin): Use bfd_malloc.
* libbfd.h: Regenerate.
This fixes a small leak of debug_filename. bfd_openr copies the file
name since git commit 1be5090bca.
PR 11983
* dwarf2.c (_bfd_dwarf2_slurp_debug_info): Free debug_filename
on success. Tidy.
The linker doesn't allocate memory space for sections that are only SEC_ALLOC
and SEC_THREAD_LOCAL. See the IS_TBSS test in ld/ldlang.c. So we need to
pretend that .tdata.dyn sections have contents to get the right result. It
will be marked this way anyways if there is a .tdata section to merge with.
bfd/
PR 23825
* elfnn-riscv.c (riscv_elf_create_dynamic_sections): Add SEC_LOAD,
SEC_DATA, and SEC_HAS_CONTENTS to .tdata.dyn section.
This was noticed while trying to test the compiler -msave-restore support.
Putting non-pic code in a shared library gives a linker error, but doesn't
stop the build.
rohan:2030$ cat libtmp.c
extern int sub2 (int);
int sub (int i) { return sub2 (i + 10); }
rohan:2031$ cat libtmp2.c
extern int sub (int);
int sub2 (int i) { return sub (i + 10); }
rohan:2032$ riscv64-unknown-linux-gnu-gcc --shared -o libtmp.so libtmp.c
rohan:2033$ riscv64-unknown-linux-gnu-gcc --shared -o libtmp2.so libtmp2.c libtmp.so
/home/jimw/FOSS/install-riscv64/lib/gcc/riscv64-unknown-linux-gnu/8.3.0/../../../../riscv64-unknown-linux-gnu/bin/ld: /tmp/cctrsIBe.o(.text+0x18): unresolvable R_RISCV_CALL relocation against symbol `sub'
rohan:2034$ echo $?
0
rohan:2035$ ls -lt libtmp2.so
-rwxr-xr-x 1 jimw jimw 6912 Aug 30 14:32 libtmp2.so
rohan:2036$
The patch fixes this by forcing a linker error. I now get this.
ohan:2059$ sh tmp.script
/home/jimw/FOSS/BINUTILS/X-riscv64-linux/ld/ld-new: libtmp2.o(.text+0x18): unresolvable R_RISCV_CALL relocation against symbol `sub'
/home/jimw/FOSS/BINUTILS/X-riscv64-linux/ld/ld-new: final link failed: bad value
rohan:2060$ echo $?
1
rohan:2061$ ls -lt libtmp2.so
ls: cannot access 'libtmp2.so': No such file or directory
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): For unresolvable reloc
error, call bfd_set_error, set ret to FALSE, and goto out label.
We need to copy BFD_COMPRESS, BFD_DECOMPRESS and BFD_COMPRESS_GABI flags
for thin archive.
PR ld/24951
* archive.c (_bfd_get_elt_at_filepos): Copy BFD_COMPRESS,
BFD_DECOMPRESS and BFD_COMPRESS_GABI flags for thin archive.
This removes a restriction on various R_PPC_EMB relocations that has
been present for ppc32 since 1996-04-26 git commit e25a798839. As far
as I know, only those relocs that would require addressing via r2 for
.sdata2/.sbss2 access are disallowed in shared libraries.
PR 24697
* elf32-ppc.c (ppc_elf_check_relocs): Call bad_shared_reloc
when !bfd_link_executable for R_PPC_EMB_SDA2I16 and
R_PPC_EMB_SDA2REL. Don't call bad_shared_reloc for any other
reloc.
We can easily support an offset on the second instruction of a
sequence marked with R_PPC64_PCREL_OPT. For example,
pla ra,symbol@pcrel
ld rt,off(ra)
can be optimised to
pld rt,symbol+off@pcrel
nop
* elf64-ppc.c (xlate_pcrel_opt): Add poff parameter. Allow offset
on second insn, return it in poff.
(ppc64_elf_relocate_section): Add offset to paddi addend for
PCREL_OPT.
This was broken when I changed how we compute the value for the gp register.
It used to be computed inside the sdata section. Now it is computed at the
end which makes it an abs section symbol. There is code that tries to use
the alignment of the section that the gp value is in, but this does not work
if it is in the abs section, as the abs section has alignment of 1 byte.
There are people using alternative linker scripts that still define it in the
sdata section, so the code is still useful. Thus adding a check to disable
this when gp is in the abs section.
bfd/
* elfnn-riscv.c (_bfd_riscv_relax_lui): Add check to exclude abs
section when setting max_alignment. Update comment.
(_bfd_riscv_relax_pc): Likewise.
BFD was leaking memory in bfd_check_format_matches. As part of
deciding the proper format of an archive, BFD looks at the format of
the first file stored. That file's bfd was left open for reasons
given in a comment removed in git commit 0e71e4955c that said:
/* We ought to close `first' here, but we can't, because
we have no way to remove it from the archive cache.
It's close to impossible to figure out when we can
release bfd_ardata. FIXME. */
Well, things have changed since that comment was true and we now can
remove files from the archive cache. Closing the first file is good
and cures some of the leaks. Other leaks are caused by
bfd_check_format_matches throwing away bfd tdata before trying a new
match. That lost the element cache set up when format checking the
first element in the archive. The easiest and cleanest fix is to
simply disable the caching when checking the first element.
PR 24891
* bfd.c (struct bfd): Add no_element_cache.
* archive.c (_bfd_get_elt_at_filepos): Don't add element to
archive cache when no_element_cache.
(bfd_generic_archive_p): Set no_element_cache when opening first
element to check format. Close first element too.
(do_slurp_bsd_armap): Don't zero ardata->cache here.
* bfd-in2.h: Regenerate.
Found on a GOT reference to __ehdr_start, which is tweaked to be
undefined weak at some stages of linking. SYMBOL_REFERENCES_LOCAL
isn't a sufficient test.
* elf64-ppc.c (ppc64_elf_edit_toc): Exclude undefined weak
symbols from GOT optimisation.
The PLT GOT entry should point to the first PLT entry which contains the
runtime linker function. It was pointing back to the symbol PLT entry
causing an infinite loop.
I found this when testing the OpenRISC glibc port which uses the runtime
dynamic linker. It seems other libc's we use so far have not been
making use of the initial PLT GOT entries.
bfd/ChangeLog:
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Use correct value for
PLT GOT entries.
PR 24456
* elf.c (bfd_section_from_shdr): Issue an informative warning
message and continue processing other sections after encountering
a reloc section for a section which already has other relocs
associated with it.
This patch adds support for following CPUs:
Cortex-M35P, Cortex-A77, Cortex-A76AE.
Related specifications can be found at https://developer.arm.com/ip-products/processors.
gas/ChangeLog:
* config/tc-arm.c: New entries for Cortex-M35P, Cortex-A77,
and Cortex-A76AE.
* doc/c-arm.texi: Document new processors.
* testsuite/gas/arm/cpu-cortex-a76ae.d: New test.
* testsuite/gas/arm/cpu-cortex-a77.d: New test.
* testsuite/gas/arm/cpu-cortex-m35p.d: New test.
bfd/ChangeLog:
* cpu-arm.c: New entries for Cortex-M35P, Cortex-A77, Cortex-A76AE.
This patch fixes a few linker crashes due to TLS code reaching an assert when it
shouldn't.
The first scenario is with weak TLS symbols that remain weak during linking. In
this case the mid-end would not have seen a TLS symbol and so wouldn't have
allocated the TLS section. We currently assert here and the linker crashes with
a not very useful message.
This patch changes this to return the value 0 for the TLS symbol in question
emulating what lld and gold and other BFD targets do. However because weak TLS
is implementation defined and we don't define any behavior for it I also emit a
warning to the user to inform them of such.
Secondly when a strong TLS reference is undefined. The linker crashes even after
it correctly reported that there is an undefined reference. This changes it so
that it gracefully exits and reports a useful error.
bfd/ChangeLog:
PR ld/24601
* elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS.
Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it.
* elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning
for weak TLS.
ld/ChangeLog:
PR ld/24601
* testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New.
* testsuite/ld-aarch64/undef-tls.d: New test.
* testsuite/ld-aarch64/undef-tls.s: New test.
* testsuite/ld-aarch64/weak-tls.d: New test.
* testsuite/ld-aarch64/weak-tls.s: New test.
This patch removes use of st_target_internal to cache the result of
comparing symbol names against CMSE_PREFIX. The problem with setting
a bit in st_target_internal in swap_symbol_in is that calling
bfd_elf_sym_name from swap_symbol_in requires symtab_hdr, and you
don't know for sure whether swap_symbol_in is operating on dynsyms
(and thus elf_tdata (abfd)->dynsymtab_hdr should be used) or on the
normal symtab (thus elf_tdata (abfd)->symtab_hdr). You can make an
educated guess based on abfd->flags & DYNAMIC but that relies on
knowing a lot about calls to bfd_elf_get_elf_syms, and is fragile in
the face of possible future changes.
include/
* elf/arm.h (ARM_GET_SYM_CMSE_SPCL, ARM_SET_SYM_CMSE_SPCL): Delete.
bfd/
* elf32-arm.c (cmse_scan): Don't use ARM_GET_SYM_CMSE_SPCL,
instead recognize CMSE_PREFIX in symbol name.
(elf32_arm_gc_mark_extra_sections): Likewise.
(elf32_arm_filter_cmse_symbols): Don't test ARM_GET_SYM_CMSE_SPCL.
(elf32_arm_swap_symbol_in): Don't invoke ARM_SET_SYM_CMSE_SPCL.
Related specifications can be found at
https://developer.arm.com/ip-products/processors.
gas * NEWS: Mention the Arm and AArch64 new processors.
* config/tc-aarch64.c: New entries for Cortex-A34, Cortex-A65,
Cortex-A77, cortex-A65AE, and Cortex-A76AE.
* doc/c-aarch64.texi: Document new CPUs.
* testsuite/gas/aarch64/cpu-cortex-a34.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a65.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a65ae.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a76ae.d: New test.
* testsuite/gas/aarch64/cpu-cortex-a77.d: New test.
* testsuite/gas/aarch64/nop-asm.s: New test.
bfd * cpu-aarch64.c: New entries for Cortex-A34, Cortex-A65,
Cortex-A77, cortex-A65AE, and Cortex-A76AE.
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc).
The NOP is never executed but may result in a performance penalty on some cores.
For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2
and adds a note to this in the source code for future reference.
bfd/ChangeLog:
* elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub,
elf32_arm_stub_long_branch_v4t_thumb_thumb,
elf32_arm_stub_long_branch_v4t_thumb_arm,
elf32_arm_stub_short_branch_v4t_thumb_arm,
elf32_arm_stub_long_branch_v4t_thumb_arm_pic,
elf32_arm_stub_long_branch_v4t_thumb_thumb_pic,
elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to
previous instruction.
ld/ChangeLog:
* testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase.
* testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
* testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
* testsuite/ld-arm/fix-arm1176-on.d: Likewise.
* testsuite/ld-arm/ifunc-10.dd: Likewise.
* testsuite/ld-arm/ifunc-2.dd: Likewise.
* testsuite/ld-arm/ifunc-4.dd: Likewise.
* testsuite/ld-arm/ifunc-6.dd: Likewise.
* testsuite/ld-arm/ifunc-8.dd: Likewise.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise.
* testsuite/ld-arm/mixed-app.d: Likewise.
* testsuite/ld-arm/thumb2-b-interwork.d: Likewise.
* testsuite/ld-arm/tls-longplt.d: Likewise.
* testsuite/ld-arm/tls-thumb1.d: Likewise.
A customer reported a case where addr2line was very slow. We tracked
this down to some N^2 behavior in _bfd_dwarf2_find_symbol_bias in the
unusual case where no function can be found.
This patch fixes the bug, and reduces the runtime for a particular
request from 127 seconds to 1 second.
bfd/ChangeLog
2019-08-19 Tom Tromey <tromey@adacore.com>
* dwarf2.c (_bfd_dwarf2_find_symbol_bias): Create hash table
holding symbols.
These are done in ppc64_elf_edit_toc, which now also garbage collects
unused GOT entries. The checks for legitimate instructions weren't
being done for the GOT relocs, unless the file also happened to have a
toc section.
* elf64-ppc.c (struct ppc64_elf_obj_tdata): Rename has_gotrel
to has_optrel.
(struct _ppc64_elf_section_data): Likewise.
(ppc64_elf_check_relocs): Set has_optrel for more relocs.
(ppc64_elf_edit_toc): Do ha/lo insn checks in GOT loop rather
than TOC loop. Check PLT16 insns too.
commit 83924b3846
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Feb 5 18:45:23 2019 -0800
x86-64: Restore PIC check for PCREL reloc against protected symbol
moved PIC check for PC-relative relocations to elf_x86_64_check_relocs.
Since linker defined symbols may not be processed at the time, we need
to move the check back to elf_x86_64_relocate_section.
bfd/
PR ld/24905
* elf64-x86-64.c (elf_x86_64_check_relocs): Move PIC check for
PC-relative relocations back to ...
(elf_x86_64_relocate_section): Here.
ld/
PR ld/24905
* testsuite/ld-x86-64/pr24905-x32.d: New file.
* testsuite/ld-x86-64/pr24905.d: Likewise.
* testsuite/ld-x86-64/pr24905.s: Likewise.
* testsuite/ld-x86-64/pr24905.t: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24905 and pr24905-x32.
2019-08-16 Martin Liska <mliska@suse.cz>
PR ld/24912
* elflink.c: Report error only for not relocatable.
* linker.c (_bfd_generic_link_add_one_symbol): Do not handle
here lto_slim_object as it's handled in caller.
2019-08-16 Martin Liska <mliska@suse.cz>
PR ld/24912
* object.cc (big_endian>::do_layout): Do not report error,
but only set a flag.
(big_endian>::do_add_symbols): Report error only for when
relocatable.
Given R_PPC_ADDR32 or R_PPC_UADDR32 relocs, this patch generates
R_PPC_ADDR32 or R_PPC_UADDR32 dynamic relocs from either type
depending on whether r_offset is 4-byte aligned, and similarly for
R_PPC_ADDR16/R_PPC_UADDR16.
* elf32-ppc.c (ppc_elf_relocate_section): Optimize unaligned relocs.
This fixes a problem originally reported at
https://github.com/riscv/riscv-binutils-gdb/issues/173
If you have code linked at address zero, you can have a lui instruction
loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1
followed by addi -0x800). Relaxation can reduce the value below 0x800 at which
point the c.lui 0x0 is no longer valid. We can fix this by converting the
c.lui to a c.li which can load 0.
bfd/
* elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If
RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction
to c.li instruction, and use ENCODE_RVC_IMM to set value.
ld/
* testsuite/ld-riscv-elf/c-lui-2.d: New.
* testsuite/ld-riscv-elf/c-lui-2.ld: New.
* testsuite/ld-riscv-elf/c-lui-2.s: New.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
A customer program had a DWARF CU that consisted of just a CU DIE,
without any children. In this situation, scan_unit_for_symbols will
try to read past the end of the current CU, and will take use the
first bytes of the next CU as an abbrev, printing an error message.
This patch fixes the bug by changing scan_unit_for_symbols to stop at
the end of the CU rather than the end of the .debug_info section.
bfd/ChangeLog
2019-08-15 Tom Tromey <tromey@adacore.com>
* dwarf2.c (scan_unit_for_symbols): Check for end of CU, not end
of section.
PR 24623
* dwarf2.c (stash_comp_unit): New function, extracted from..
(_bfd_dwarf2_find_nearest_line): ..here.
(find_abstract_instance): Parse comp units and decode line info
as needed.
This parameter might appear to be used to set up offset_size, but
since git commit 024b2372f5 offset_size is either set from the
debug_info data or is set to 4.
* dwarf2.c (_bfd_dwarf2_find_nearest_line): Remove addr_size parameter.
* libbfd-in.h (_bfd_dwarf2_find_nearest_line): Update prototype.
* coffgen.c (coff_find_nearest_line_with_names): Adjust
_bfd_dwarf2_find_nearest_line calls.
* elf.c (_bfd_elf_find_nearest_line, _bfd_elf_find_line): Likewise.
* elf32-arm.c (elf32_arm_find_nearest_line): Likewise.
* elf64-alpha.c (elf64_alpha_find_nearest_line): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_find_nearest_line): Likewise.
* elfxx-mips.c (_bfd_mips_elf_find_nearest_line): Likewise.
* mach-o.c (bfd_mach_o_find_nearest_line): Likewise.
* libbfd.h: Regenerate.
This patch is a reimplementation of [1] which was submitted in 2015 by
Neil Schellenberger. Copyright issue was sorted out [2] last year.
It proposed a new section (.gnu.xhash) and related dynamic tag
(DT_GNU_XHASH). The new section would be virtually identical to the
existing .gnu.hash except for the translation table (xlat) which would
contain correct MIPS .dynsym indexes corresponding to the hashvals in
chains. This is because MIPS ABI imposes a different ordering on the
dynsyms than the one expected by the .gnu.hash section. Another addition
would be a leading word (ngnusyms) which would contain the number of
entries in the translation table.
In this patch, the new section name and dynamic tag are changed to
reflect the fact that the section should be treated as MIPS-specific
(.MIPS.xhash and DT_MIPS_XHASH).
This patch addresses the alignment issue as reported in [3], which is
caused by the leading word added to the .MIPS.xhash section. Leading word
is removed in this patch, and the number of entries in the translation
table is now calculated using DT_MIPS_SYMTABNO dynamic tag (this is
addressed by the corresponding glibc patch).
Suggestions on coding style in [4] were taken into account. Existing
GNU hash testcase was covered, and another one was added in the MIPS
part of the testsuite.
The other major change is reserving MIPS ABI version 5 for .MIPS.xhash,
marking the need of support for .MIPS.xhash in the dynamic linker (again,
addressed in the corresponding glibc patch). This is something which I
am not sure of, especially after reading [5]. I am confused on whether
this ABI version is reserved for IFUNC, or it can be used for this
purpose.
Already mentioned glibc patch is submitted at:
https://sourceware.org/ml/libc-alpha/2019-06/msg00456.html
[1] https://sourceware.org/ml/binutils/2015-10/msg00057.html
[2] https://sourceware.org/ml/binutils/2018-03/msg00025.html
[3] https://sourceware.org/ml/binutils/2016-01/msg00006.html
[4] https://sourceware.org/ml/binutils/2016-02/msg00097.html
[5] https://sourceware.org/ml/libc-alpha/2016-12/msg00853.html
ld * emulparams/elf32bmip.sh: Add .MIPS.xhash section.
* emulparams/elf32bmipn32-defs.sh: Add .MIPS.xhash section.
* emulparams/elf64bmip-defs.sh: Add .MIPS.xhash section.
* emultempl/mipself.em: Remove mips_after_parse function.
* testsuite/ld-elf/hash.d: Update comment.
* testsuite/ld-mips-elf/hash1.d: New test.
* testsuite/ld-mips-elf/hash1.s: Ditto.
* testsuite/ld-mips-elf/hash1a.d: Remove.
* testsuite/ld-mips-elf/hash1b.d: Ditto.
* testsuite/ld-mips-elf/hash1c.d: Ditto
* testsuite/ld-mips-elf/hash2.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: New tests.
* testsuite/ld-mips-elf/start.s: New test.
bfd * elf-bfd.h (struct elf_backend_data): New members.
* elflink.c (_bfd_elf_link_create_dynamic_sections): Create
.gnu.hash section if necessary.
(struct collect_gnu_hash_codes): New member.
(elf_gnu_hash_process_symidx): New function name.
(elf_renumber_gnu_hash_syms): Ignore local and undefined
symbols. Record xlat location for every symbol which should have
a .MIPS.xhash entry.
(bfd_elf_size_dynamic_sections): Add DT_GNU_HASH dynamic tag to
dynamic section if necessary.
(GNU_HASH_SECTION_NAME): New define.
(bfd_elf_size_dynsym_hash_dynstr): Get .MIPS.xhash section.
Update the section size info.
* elfxx-mips.c (struct mips_elf_hash_sort_data): New members.
(struct mips_elf_link_hash_entry): New member.
(mips_elf_link_hash_newfunc): Initialize .MIPS.xhash translation
table location.
(mips_elf_sort_hash_table): Initialize the pointer to the
.MIPS.xhash section.
(mips_elf_sort_hash_table_f): Populate the .MIPS.xhash
translation table entry with the symbol dynindx.
(_bfd_mips_elf_section_from_shdr): Add SHT_MIPS_XHASH.
(_bfd_mips_elf_fake_sections): Initialize .MIPS.xhash section
info.
(_bfd_mips_elf_create_dynamic_sections): Create .MIPS.xhash
section.
(_bfd_mips_elf_size_dynamic_sections): Add DT_MIPS_XHASH tag to
dynamic section.
(_bfd_mips_elf_finish_synamic_sections): Add DT_MIPS_XHASH.
(_bfd_mips_elf_final_write_processing): Set .MIPS.xhash section
sh_link info.
(_bfd_mips_elf_get_target_dtag): Get DT_MIPS_XHASH tag.
(MIPS_LIBC_ABI_XHASH): New ABI version enum value.
(_bfd_mips_post_process_headers): Mark the ABI version as
MIPS_LIBC_ABI_XHASH if there exists a .MIPS.xhash section,
but not a .hash section.
(_bfd_mips_elf_record_xhash_symbol): New function. Record a
position in the translation table, associated with the hash
entry.
* elfxx-mips.h (literal_reloc_p): Define
elf_backend_record_xhash_symbol backend hook.
* elfxx-target.h: Initialize elf_backend_record_xhash_symbol
backend hook.
include * elf/mips.h (SHT_GNU_XHASH): New define.
(DT_GNU_XHASH): New define.
binutils * readelf.c (get_mips_dynamic_type): Return MIPS_XHASH dynamic type.
(get_mips_section_type_name): Return MI{S_XHASH name string.
(dynamic_section_mips_val): Initialize the .MIPS.xhash dynamic
info.
(process_symbol_table): Initialize the .MIPS.xhash section
pointer. Adjust the readelf output to support the new section.
(process_object): Set the .MIPS.xhash dynamic info to zero.
This patch changes the eBPF linker to provide a relocate_section
function instead of relying on using special functions in relocation
howtos.
Tested in x86_64 host.
No regressions.
bfd/ChangeLog:
2019-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf64-bpf.c (bpf_elf_relocate_section): New function.
(bpf_elf_insn_disp_reloc): Delete function.
(elf_backend_relocate_section): Define.
bfd/ChangeLog
Ilia Diachkov <ilia.diachkov@optimitech.com>
* elfnn-riscv.c (_bfd_riscv_relax_lui): Set lui relax safety area to
two pages in relro presence.
check_loop_aligned is used during link time relaxation to only allow
transformations that don't violate loop body alignment requirements.
Assembler can relax loops that have too long body by adding instructions
between the loop instruction and the loop body. check_loop_aligned must
check alignment of the first instruction of the actual loop body.
Detect loop / rsr.lend / wsr.lbeg sequence used in assembly time
relaxation and adjust alignment check when it's detected.
bfd/
2019-08-01 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (insn_num_slots, get_rsr_lend_opcode)
(get_wsr_lbeg_opcode): New functions.
(check_loop_aligned): Detect relaxed loops and adjust loop_len
and insn_len for the first actual instruction of the loop.
This fixes two cases where elf_link_add_object_symbols returns an
error, setting the catch-all bfd_error_bad_value without explaining
the error. The second one is an internal error that can only be
caused by a target elf_add_symbol_hook, so make that one abort. The
first one is my PR24339 fix. PR24339 is another of those fuzzing bugs
and the fix I made catches the problem when loading symbols, rather
than when symbols are used in relocs. While ld is correct to reject
the object file as not complying with the ELF standard, let's be a
little more forgiving for dynamic objects.
PR 24857
PR 24339
* elflink.c (elf_link_add_object_symbols): Report an informative
error on finding local symbols with index equal or greater than
symbol table sh_info. Correct comment. Allow such symbols in
dynamic objects. Abort on NULL section for symbol.
This field effectively became usused a long time ago, perhaps as early
as 1994.
* elf-bfd.h (struct output_elf_obj_tdata): Delete "linker" field.
(elf_linker): Don't define.
* elflink.c (bfd_elf_final_link): Don't set elf_linker.
Add linker relaxation. The first relaxation added is converting
GOTPC32 to PCREL relocations. This relaxation doesn't change the size of
the binary.
bfd/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* elf32-arc.c (bfd_get_32_me): New function.
(bfd_put_32_me): Likewise.
(arc_elf_relax_section): Likewise.
(bfd_elf32_bfd_relax_section): Define.
ld/testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* ld-arc/relax-local-pic.d: New test.
* ld-arc/relax-local-pic.s: New file.
I missed some early exits from final_write_processing that mean
_bfd_elf_final_write_processing could be missed.
* elf-vxworks.c (elf_vxworks_final_write_processing): Don't return
early.
* elf32-arc.c (arc_elf_final_write_processing): Likewise.
* elf32-xtensa.c (elf_xtensa_final_write_processing): Likewise.
When SHF_GNU_MBIND was added in the SHF_LOOS to SHF_HIOS range, it
should have required ELFOSABI_GNU since these flags are already in use
by other OSes. HPUX SHF_HP_TLS in fact has the same value. That
means no place in binutils should test SHF_GNU_MBIND without first
checking OSABI, and SHF_GNU_MBIND should not be set without also
setting OSABI. At least, that's the ideal, but the patch accepts
SHF_GNU_MBIND on ELFOSABI_NONE object files since gas didn't always
set OSABI. However, to reinforce the fact that SHF_GNU_MBIND isn't
proper without a non-zero OSABI, readelf will display the flag as
LOOS+0 if OSABI isn't set.
The clash with SHF_HP_TLS means that hppa64-linux either has that flag
on .tbss sections or supports GNU_MBIND, not both. (hppa64-linux
users, if there are any, may have noticed that GNU ld since 2017
mysteriously aligned their .tbss sections to a 4k boundary. That was
one consequence of SHF_HP_TLS being blindly interpreted as
SHF_GNU_MBIND.) Since it seems that binutils, gdb, gcc, glibc, and
the linux kernel don't care about SHF_HP_TLS I took that flag out of
.tbss for hppa64-linux.
bfd/
* elf-bfd.h (enum elf_gnu_osabi): Add elf_gnu_osabi_mbind.
* elf.c (_bfd_elf_make_section_from_shdr): Set elf_gnu_osabi_mbind.
(get_program_header_size): Formatting. Only test SH_GNU_MBIND
when elf_gnu_osabi_mbind is set.
(_bfd_elf_map_sections_to_segments): Likewise.
(_bfd_elf_init_private_section_data): Likewise.
(_bfd_elf_final_write_processing): Update comment.
* elf64-hppa.c (elf64_hppa_special_sections): Move .tbss entry.
(elf_backend_special_sections): Define without .tbss for linux.
binutils/
* readelf.c (get_parisc_segment_type): Split off hpux entries..
(get_ia64_segment_type): ..and these..
(get_hpux_segment_type): ..to here.
(get_segment_type): Condition GNU_MBIND on osabi. Use
get_hpux_segment_type.
(get_symbol_binding): Do not print UNIQUE for ELFOSABI_NONE.
(get_symbol_type): Do not print IFUNC for ELFOSABI_NONE.
gas/
* config/obj-elf.c (obj_elf_change_section): Don't emit a fatal
error for non-SHF_ALLOC SHF_GNU_MBIND here.
(obj_elf_parse_section_letters): Return SHF_GNU_MBIND in new
gnu_attr param.
(obj_elf_section): Adjust obj_elf_parse_section_letters call.
Formatting. Set SHF_GNU_MBIND and elf_osabi from gnu_attr.
Emit normal error for non-SHF_ALLOC SHF_GNU_MBIND and wrong osabi.
(obj_elf_type): Set elf_osabi for ifunc.
* testsuite/gas/elf/section12a.d: xfail msp430 and hpux.
* testsuite/gas/elf/section12b.d: Likewise.
* testsuite/gas/elf/section13.d: Likewise.
* testsuite/gas/elf/section13.l: Adjust expected error.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Condition
SHF_GNU_MBIND on osabi. Set output elf_gnu_osabi_mbind.
This patch supports using pcrel instructions in TLS code sequences. A
number of new relocations are needed, gas operand modifiers to
generate those relocations, and new TLS optimisation. For
optimisation it turns out that the new pcrel GD and LD sequences can
be distinguished from the non-pcrel GD and LD sequences by there being
different relocations on the new sequence. The final "add ra,rb,13"
on IE sequences similarly needs a new relocation, or as I chose, a
modification of R_PPC64_TLS. On pcrel IE code, the R_PPC64_TLS points
one byte into the "add" instruction rather than being on the
instruction boundary.
GD:
pla 3,z@got@tlsgd@pcrel # R_PPC64_GOT_TLSGD34
bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC
edited to IE
pld 3,z@got@tprel@pcrel
add 3,3,13
edited to LE
paddi 3,13,z@tprel
nop
LD:
pla 3,z@got@tlsld@pcrel # R_PPC64_GOT_TLSLD34
bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC
..
paddi 9,3,z2@dtprel
pld 10,z3@got@dtprel@pcrel
add 10,10,3
edited to LE
paddi 3,13,0x1000
nop
IE:
pld 9,z@got@tprel@pcrel # R_PPC64_GOT_TPREL34
add 3,9,z@tls@pcrel # R_PPC64_TLS at insn+1
ldx 4,9,z@tls@pcrel
lwax 5,9,z@tls@pcrel
stdx 5,9,z@tls@pcrel
edited to LE
paddi 9,13,z@tprel
nop
ld 4,0(9)
lwa 5,0(9)
std 5,0(9)
LE:
paddi 10,13,z@tprel
include/
* elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
(IS_PPC64_TLS_RELOC): Include new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34),
(BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34),
(BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34),
(BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs.
* elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs.
(ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs.
(must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64.
(ppc64_elf_check_relocs): Support pcrel tls relocs.
(ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",
"got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel".
(fixup_size, md_assemble): Handle pcrel tls relocs.
(ppc_force_relocation, ppc_fix_adjustable): Likewise.
(md_apply_fix, tc_gen_reloc): Likewise.
ld/
* testsuite/ld-powerpc/tlsgd.d,
* testsuite/ld-powerpc/tlsgd.s,
* testsuite/ld-powerpc/tlsie.d,
* testsuite/ld-powerpc/tlsie.s,
* testsuite/ld-powerpc/tlsld.d,
* testsuite/ld-powerpc/tlsld.s: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
It's not correct to use non-STT_TLS symbols with TLS relocation, not
that it matters much when editing relocs, but this edited reloc can be
output by --emit-relocs. So don't use a symbol on the reloc.
* elf64-ppc.c (ppc64_elf_relocate_section): Don't bother selecting
a TLS section symbol for edited relocs. Tighten TLS symbol/reloc
match test.
This saves a bit in tls_mask, and fixes a bug that could be triggered
in the unlikely case that both @got (usual ELF style) and @toc
(PowerOpen style) code was used to set up args for __tls_get_addr.
* elf64-ppc.c (TLS_EXPLICIT): Define as 256.
(ppc64_elf_check_relocs): Don't store TLS_EXPLICIT even if char
is more than 8 bits.
(ppc64_elf_tls_optimize): Likewise. Make tls_set, tls_clear, and
tls_type vars unsigned int.
(ppc64_elf_relocate_section): Use r_type rather than TLS_EXPLICIT
to select r_type edit.
Choose a better name, that reflects why the flag is set (GD to IE
optimisation) rather than what the flag produces (TPREL64 reloc on
a single GOT entry replacing a tls_index pair).
* elf32-ppc.c (TLS_GDIE): Rename from TLS_TPRELGD throughout file.
Correct comment.
* elf64-ppc.c (TLS_GDIE): Likewise.
I don't expect anyone will have hit this bug. You'd need a TLS
segment of 2G before you'd notice.
* elf64-ppc.c (ppc64_elf_tls_optimize): Correct test for allowed
range of tp-relative offsets.
> Building LLVM 6.0 on FreeBSD/powerpc (devel/llvm60 port) the assertion
> in the subject trips (displays twice) when linking libLTO.so.1. The
> issue has been filed in FreeBSD's bugzilla, at
> https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=237068 . It appears
> the 'llvm::hashing::detail::get_execution_seed()::seed@@JL_LLVM_6.0'
> symbol is being weakly aliased to an indirect symbol
> __bss_start@@JL_LLVM_6.0. Since __bss_start@@JL_LLVM_6.0 is an
> indirect symbol, it fails the assertion.
I haven't looked under a debugger at your testcase but I think I know
what is going on here. You have a shared library with a weakly
defined llvm::hashing::detail::get_execution_seed()::seed which
happens to be at the same location as __bss_start in that library. At
the time the linker loads symbols for that library, it sees they are
both versioned and thus introduces non-versioned indirect symbols for
them. The linker considers the symbols as possibly being aliases,
setting up h->u.alias and h->is_weakalias such that
__bss_start@@JL_LLVM_6.0 is the definition. No real problem so far,
the definition is bfd_link_hash_defined, except that the zero size, no
type __bss_start symbol possibly should not be considered an alias in
the first place.
Later, __bss_start as defined by the linker script is entered into the
linker symbol table. This is similar to __bss_start being defined by
a regular object file in that ELF symbol resolution rules say that the
value of __bss_start in the library is overridden by __bss_start in
the executable/library being produced. So to accomplish the override,
ld flips __bss_start from being an indirect symbol pointing at
__bss_start@@JL_LLVM_6.0 to __bss_start@@JL_LLVM_6.0 being an indirect
symbol pointing at __bss_start. That's how we get an unexpected
indirect symbol and hit the assert.
What should happen I think, is for the def->def_regular code above the
assert to run in this case. The symbols are no longer aliases.
* elflink.c (_bfd_elf_fix_symbol_flags): If the def for an
alias is no longer bfd_link_hash_defined, clear the alias.
It is possible to create shared libraries on PowerPC using
-ftls-model=inital-exec or -ftls-model=local-exec. The first is half
reasonable, getting you a shared library that can't be dlopen'd but
otherwise is reasonable. The second is quite bad. Not only do you
lose being able to dlopen, the library also has dynamic text
relocations. Worse, the TPREL16_LO, TPREL16_HA and other TPREL16
dynamic relocs emitted were wrong, resulting in wrong values being
applied by ld.so.
Using the first TLS section symbol in dynamic relocations for local
TLS symbols doesn't work. It's wrong because TLS symbols used by TLS
relocs have values relative to the TLS segment, whereas the TLS
section symbols are addresses. This patch instead uses a symbol index
of zero which is used elsewhere by PowerPC on dynamic TLS relocs.
It's not strictly ABI compliant to use a non-TLS symbol with TLS
relocs but symbol index zero can be interpreted as "no symbol". Not
using the first TLS section symbol means it doesn't need to be dynamic.
The patch also fixes a further problem with PowerPC32 dynamic TPREL16*
relocs, which shouldn't have the symbol value in the addend as we do
for non-TLS symbols.
bfd/
* elflink.c (_bfd_elf_omit_section_dynsym_default): Don't keep
tls_sec.
(_bfd_elf_init_1_index_section): Prefer not using TLS sections.
(_bfd_elf_init_2_index_sections): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): When emitting dynamic
relocations for local TLS symbols, use STN_UNDEF as the relocation
symbol.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise, and don't
leave TLS symbol value in the addend.
ld/
* testsuite/ld-powerpc/tlsso.r: Update.
* testsuite/ld-powerpc/tlsso32.g: Update.
* testsuite/ld-powerpc/tlsso32.r: Update.
* testsuite/ld-powerpc/tlstocso.r: Update.
* testsuite/ld-cris/tls-dso-dtpoffd2.d: Update.
* testsuite/ld-cris/tls-dso-dtpoffd4.d: Update.
* testsuite/ld-cris/tls-dso-tpoffgotcomm1.d: Update.
* testsuite/ld-cris/tls-gd-1.d: Update.
* testsuite/ld-cris/tls-gd-1h.d: Update.
* testsuite/ld-cris/tls-gd-2.d: Update.
* testsuite/ld-cris/tls-gd-2h.d: Update.
* testsuite/ld-cris/tls-ie-10.d: Update.
* testsuite/ld-cris/tls-ie-11.d: Update.
* testsuite/ld-cris/tls-ie-8.d: Update.
* testsuite/ld-cris/tls-ie-9.d: Update.
* testsuite/ld-cris/tls-js1.d: Update.
* testsuite/ld-cris/tls-ld-4.d: Update.
* testsuite/ld-cris/tls-ld-5.d: Update.
* testsuite/ld-cris/tls-ld-6.d: Update.
* testsuite/ld-cris/tls-ld-7.d: Update.
* testsuite/ld-cris/tls-ldgd-14.d: Update.
* testsuite/ld-cris/tls-ldgd-15.d: Update.
* testsuite/ld-cris/tls-ldgdx-14.d: Update.
* testsuite/ld-cris/tls-ldgdx-15.d: Update.
* testsuite/ld-cris/tls-local-54.d: Update.
* testsuite/ld-cris/tls-local-60.d: Update.
* testsuite/ld-cris/tls-local-61.d: Update.
* testsuite/ld-cris/tls-local-63.d: Update.
* testsuite/ld-cris/tls-local-64.d: Update.
* testsuite/ld-cris/tls-ok-30.d: Update.
* testsuite/ld-cris/tls-ok-32.d: Update.
* testsuite/ld-cris/tls-ok-34.d: Update.
* testsuite/ld-mips-elf/tls-multi-got-1.got: Update.
* testsuite/ld-mips-elf/tls-multi-got-1.r: Update.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.d: Update.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.got: Update.
* testsuite/ld-mips-elf/tlslib-o32-hidden.got: Update.
* testsuite/ld-mips-elf/tlslib-o32-ver.got: Update.
* testsuite/ld-mips-elf/tlslib-o32.got: Update.
* testsuite/ld-s390/tlspic.rd: Update.
* testsuite/ld-s390/tlspic_64.rd: Update.
* testsuite/ld-sparc/tlssunnopic32.rd: Update.
* testsuite/ld-sparc/tlssunnopic64.rd: Update.
* testsuite/ld-sparc/tlssunpic32.rd: Update.
* testsuite/ld-sparc/tlssunpic64.rd: Update.
PR 24717
* elf.c (is_debuginfo_file): New function.
(assign_file_positions_for_non_load_sections): Do not warn about
allocated sections outside of loadable segments if they are found
in a debuginfo file.
* elf-bfd.h (is_debuginfo_file): Prototype.
PR 24753
bfd * compress.c (bfd_get_full_section_contents): Do not complain
about linker created sections that are larger than the file size.
ld * emultempl/aarch64elf.em (_aarch64_add_stub_section): Include the
LINKER_CREATED section flag when creating the stub section.
As discussed in the PR, we do not support the case where CMSE stubs
are inserted too far from their destination. This would require an
intermediate long-branch stub, which is tricky in this context.
Instead of crashing, this patch emit an error message and exits.
2019-07-02 Christophe Lyon <christophe.lyon@linaro.org>
* bfd/elf32-arm.c (CMSE_STUB_NAME): New define.
(elf32_arm_get_stub_entry): Do not try to emit long-branch stubs
for CMSE stubs.
(arm_dedicated_stub_output_section_name): Use CMSE_STUB_NAME.
Change-Id: I6d4e1c0fdee6bb9f4b07e5e1b46700b5ba31c62e
Consider a file containing only Armv8-M secure entry functions.
This file is compiled and linked with "-march=armv8-m.main -mfloat-abi=hard
-mfpu=fpv5-sp-d16 -mcmse -static --specs=rdimon.specs
-Wl,--section-start,.gnu.sgstubs=0x190000 -ffunction-sections
-fdata-sections
-Wl,--gc-sections -g" options to generate an executable.
The executable generated does not contain any debug information of these
secure entry functions even though it contains secure entry functions in
the .text section. This patch fixes this problem.
PR 23839
bfd * elf32-arm.c (elf32_arm_update_relocs): Do not include the
section VMA in the offset used to update exidx relocs.
ld * testsuite/ld-arm/unwind-4.d: Adjust for corrected calculation of
exidx relocs.
PR 24708
* elf.c (_bfd_elf_slurp_version_tables): Check for an excessively
large version reference section.
* compress.c (bfd_get_full_section_contents): Check for an
uncompressed section whose size is larger than the file size.
This patch fixes failures with LTO on mingw32 targets. Since git
commit 7cf7fcc83c all possible targets (minus binary) are matched in
bfd_check_format_matches rather than lower priority targets being
excluded once a higher priority target matches. During linking that
results in the ld/plugin.c plugin_object_p function being called with
the input file xvec set to plugin_vec, which means
plugin_get_ir_dummy_bfd doesn't see the real format of the file
(pe-i386). It defaults to the output format instead, which happens to
be pei-i386, and this wrong choice persists for the dummy bfd.
pei-i386 isn't recognised as a valid linker input file.
So, omit recognizing a plugin object in bfd_check_format_matches when
some other object format matches, and make sure those other object
formats are checked first.
* format.c (bfd_check_format_matches): Don't match plugin target
if another target matches. Expand comment.
* targets.c (_bfd_target_vector): Move plugin_vec after all other
non-corefile targets, outside !SELECT_VECS.
* config.bfd: Don't handle targ=plugin here.
* configure.ac: Don't add plugin to enable_targets or handle in
target loop setting selvecs and other target vars.
* configure: Regenerate.
PR 24703
binutils* bucomm.c (bfd_nonfatal): If no bfd error code has been set then
indicate this in the output.
(bfd_nonfatal_message): Likewise.
bfd * mach-o-arm.c (bfd_mach_o_arm_canonicalize_one_reloc): Add error
messages for failures.
* mach-o.c (bfd_mach_o_canonicalize_relocs): Set an bfd error code
if returning an error value.
With my (oldish) gcc/glibc combination I'm seeing
.../bfd/elf-properties.c: In function elf_find_and_remove_property:
.../bfd/elf-properties.c:244: error: declaration of remove shadows a global declaration
/usr/include/stdio.h:157: error: shadowed declaration is here
2019-06-24 Ilia Diachkov <ilia.diachkov@optimitech.com>
bfd/
* elfnn-riscv.c (_bfd_riscv_relax_lui): Delete early exit when
SEC_MERGE or SEC_CODE flags are set.
(_bfd_riscv_relax_section): New local symtype. Set sym_sec and
symtype consistently. Don't include sec_addr (sym_sec) in symval.
Add check for SEC_INFO_TYPE_MERGE and call _bfd_merged_section_offset.
Add sec_addr (sym_sec) after handling merge sections.
commit d2ef37ebd9
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Dec 7 08:30:30 2018 -0800
elf: Report property change when merging properties
failed to remove the property after reporting it has been removed. This
patch corrects it.
bfd/
PR ld/24721
* elf-properties.c (elf_merge_gnu_property_list): Remove the
property after reporting property removal.
ld/
PR ld/24721
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/24721 tests.
* testsuite/ld-x86-64/pr24721-x32.d: New file.
* testsuite/ld-x86-64/pr24721.d: Likewise.
* testsuite/ld-x86-64/pr24721.map: Likewise.
* testsuite/ld-x86-64/pr24721a.s: Likewise.
* testsuite/ld-x86-64/pr24721b.s: Likewise.
While the skiboot linker script bears some culpability in this PR,
it's also true that the GOT indirect to GOT relative optimisation for
16-bit offsets isn't safe. At least, it isn't safe to remove the GOT
entry based on distance between the GOT pointer and symbol calculated
from the preliminary layout. So this patch removes that optimisation,
and reduces the range allowed for 32-bit and 34-bit offsets.
PR 24704
bfd/
* elf64-ppc.c (R_PPC64_GOT16_DS): Don't set has_gotrel.
(ppc64_elf_edit_toc): Don't remove R_PPC64_GOT16_DS got entries.
Reduce range of offsets allowed for other GOT relocs.
ld/
* testsuite/ld-powerpc/elfv2exe.d: Update.
* testsuite/ld-powerpc/elfv2so.d: Update.
Depending on optimisation level and gcc version, git commit 890f750a3b
introduces a false positive warning that i_shdrp may be used
uninitialized.
PR 24689
* elfcode.h (elf_object_p): Warning fix.
The testcase in the PR had a e_shstrndx section of type SHT_GROUP.
hdr->contents were initialized by setup_group rather than being read
from the file, thus last byte was not zero and string dereference ran
off the end of the buffer.
PR 24689
* elfcode.h (elf_object_p): Check type of e_shstrndx section.
Calls from functions that don't have a valid toc pointer in r2 (these
calls are marked with _NOTOC relocs) to functions that require r2
valid must go via the callee global entry point. This patch corrects
the condition the linker was using to detect functions that require r2
to be valid. Values of both zero and one in st_other local entry bits
mean a function doesn't care about r2.
* elf64-ppc.c (ppc64_elf_inline_plt): Correct st_other test for
functions that require r2 valid to use local entry.
(ppc64_elf_size_stubs, ppc64_elf_relocate_section): Likewise.
The loc_hash_table should only contain local ifunc symbols. The current
code already aborts if there is anything else and for defined ifunc
symbols elfNN_aarch64_allocate_dynrelocs is a no-op.
bfd/ChangeLog:
* elfnn-aarch64.c (elfNN_aarch64_allocate_local_dynrelocs): Remove.
(elfNN_aarch64_size_dynamic_sections): Remove loc_hash_table traversal
with elfNN_aarch64_allocate_local_dynrelocs.
These ilp32 relocations were missing for some reason.
bfd/ChangeLog:
* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
include/ChangeLog:
* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
(R_AARCH64_P32_MOVW_PREL_G1): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
* testsuite/ld-aarch64/emit-relocs-22.d: New test.
* testsuite/ld-aarch64/emit-relocs-22.s: New test.
* testsuite/ld-aarch64/emit-relocs-23.d: New test.
* testsuite/ld-aarch64/emit-relocs-23.s: New test.
"paddi rt,sym@pcrel" as an abbreviation for "paddi rt,0,sym@pcrel,1"
is invalid, so replace with "pla rt,sym@pcrel" which is a valid form
of "pla rt,sym@pcrel(0),1".
* elf64-ppc.c: Fix comments involving paddi.
PR 24643
* elf32-arm.c (arm_elf_find_function): Fail if the symol table is
absent, or the bfd is not in the ELF formart.
* elfnn-aarch64.c (aarch64_elf_find_function): Likewise.
PR 24650
* elf.c (elfcore_make_auxv_note_section): New function.
(elfcore_grok_note): Use it.
(elfcore_grok_freebsd_note): Likewise.
(elfcore_grok_openbsd_note): Likewise.
(elfcore_grok_netbsd_note): Likewise. Plus add support for
NT_NETBSDCORE_AUXV notes.
If the new GNU property section was being created by the linker
(this will happen only if none of the inputs have any GNU property
section but the command line to the linker forces a bti with
--force-bti), the alignment of the section and hence the program
header of PT_GNU_PROPERTY type was not being set correctly. This
patch fixes this issue.
bfd/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Set
alignment of the new gnu property section.
ld/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/property-bti-pac4-a.d: New test.
* testsuite/ld-aarch64/property-bti-pac4-b.d: New test.
* testsuite/ld-aarch64/property-bti-pac4.s: New test.
Overflow checks were removed for all hi16 relocations except PC-relative
high relocations per PR ld/16720. Remove overflow checks from %pcrel_hi
relocations so that we can correctly handle negative offsets from PC.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_PCHI16>:
Remove overflow check.
ld/
* testsuite/ld-mips-elf/undefweak-overflow.s: Remove test case
for pcrel_hi/pcrel_lo.
* testsuite/ld-mips-elf/undefweak-overflow.d: Update to match.
* testsuite/ld-mips-elf/reloc-pcrel-r6.s: New test source.
* testsuite/ld-mips-elf/reloc-pcrel-r6.d: New test linker script.
* testsuite/ld-mips-elf/reloc-pcrel-r6.ld: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
A plugin can change the element, so call the generic
bfd_link_add_symbols.
PR 24596
* cofflink.c (coff_link_check_archive_element): Don't assume
element is a coff object file after calling add_archive_element.
This patch cures a linker segfault, and "FAIL: Build pr22263-1".
PR 24596
* elf64-alpha.c (elf64_alpha_relocate_section): Don't attempt
to emit R_ALPHA_GOTTPREL in PIEs, for which no space is
allocated in alpha_dynamic_entries_for_reloc.
This doesn't fix the underlying bug, but an abort is better than a
segfault.
PR 24596
* elf32-m68k.c (elf_m68k_get_got_entry): Don't create a new
entry when MUST_FIND. Abort when MUST_FIND not found.
(elf_m68k_get_bfd2got_entry): Likewise.
(elf_m68k_relocate_section): Remove now useless assert.
One of the ld tests produces:
failed with: <Segmentation fault>, no expected output
FAIL: Discarded dynamic relocation section
This patch cures the segv. (The test still fails with ld producing
a really messed up output, DT_RELA at address 0!)
PR 24596
* elf64-hppa.c (elf64_hppa_finalize_dynreloc): Get the output bfd
from bfd_link_info, not an output section owner.
(elf64_hppa_finish_dynamic_symbol, elf64_hppa_finalize_opd): Likewise.
(elf_hppa_final_link_relocate): Likewise.
See also the FIXME. tic30-aout linker support is so bad (and has been
that way since the initial tic30-aout commit) that I'm obsoleting the
target. This patch fixes numerous linker testsuite segmentation faults.
PR 24596
* aout-tic30.c (MY_bfd_final_link): Don't segfault on missing
create_object_symbols_section, obj_textsec, obj_datasec or
obj_bsssec. Fix other errors in placement.
* config.bfd: Obsolete tic30-aout.
The XCOFF linker temporarily trims the output bfd section list,
without adjusting section_count to suit. This is a little rude, but
the dwarf line number code can easily cope with this situation. So
check for a NULL end of list as well as limiting the saved section
VMAs to the first section_count list entries.
Also fixes
-FAIL: Weak test 3 (main, static) (32-bit)
-FAIL: Weak test 3 (main, static) (64-bit)
PR 24596
* dwarf2.c (save_section_vma, section_vma_same): Check for NULL
end of section list as well as section_count.
* xcofflink.c (xcoff_link_add_symbols): Fix temporarily changed
section list before returning error.
After fixing the ld-elf/pr22836-1a segmentation fault we run into an
assertion failure due to the generic ELF target not removing empty
SHT_GROUP sections. Avoid that.
* elf.c (bfd_elf_set_group_contents): Exit on zero size section.
Even though the generic ELF target doesn't handle groups correctly,
this helps avoid a segfault in bfd_elf_set_group_contents seen on
d30v-elf, dlx-elf, pj-elf, and xgate-elf when linking the pr22836
testcase.
PR 24596
bfd/
* linker.c (_bfd_generic_link_output_symbols): Heed BSF_KEEP.
ld/
* emultempl/genelf.em (gld${EMULATION_NAME}_after_open): Set
BFS_KEEP on group signature symbol.
Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and
add DT_AARCH64_VARIANT_PCS dynamic tag if necessary.
Mismatching attributes are not diagnosed.
bfd/ChangeLog:
* elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function.
(struct elf_aarch64_link_hash_table): Add variant_pcs member.
(elfNN_aarch64_allocate_dynrelocs): Update variant_pcs.
(elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS.
(elf_backend_merge_symbol_attribute): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-now.d: New test.
* testsuite/ld-aarch64/variant_pcs-r.d: New test.
* testsuite/ld-aarch64/variant_pcs-shared.d: New test.
* testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Set has_gotrel for
R_PPC64_GOT_PCREL34.
(xlate_pcrel_opt): New function.
(ppc64_elf_edit_toc): Handle R_PPC64_GOT_PCREL34.
(ppc64_elf_relocate_section): Edit GOT indirect to GOT relative
for R_PPC64_GOT_PCREL34. Implement R_PPC64_PCREL_OPT optimisation.
ld/
* testsuite/ld-powerpc/pcrelopt.s,
* testsuite/ld-powerpc/pcrelopt.d,
* testsuite/ld-powerpc/pcrelopt.sec: New test.
* testsuite/ld-powerpc/powerpc.exp: Run it.
This patch avoids for bpf_elf64_le_vec to be referenced in targmatch.h
when building a BFD without BFD64, resulting in an undefined symbol.
This was a regression introduced along with the BPF target.
bfd/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* config.bfd (targ_cpu): Process bpf-*-none only if BFD64.
* configure.ac: Set target_size=64 for bpf_elf64_le_vec and
bpf_elf64_be_vec.
* configure: Regenerate.
The archive element cache needs tidying when closing an archive element.
This patch fixes these failures:
-FAIL: ar long file names (bfdtest1)
-FAIL: ar thin archive (bfdtest1)
-FAIL: ar thin archive with nested archive (bfdtest1)
* som.c (som_bfd_free_cached_info): Call
_bfd_generic_close_and_cleanup.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer
checks. Search the RELA table for n64 relocations.
ld/
* testsuite/ld-mips-elf/pic-reloc-5.d: New test.
* testsuite/ld-mips-elf/pic-reloc-6.d: New test.
* testsuite/ld-mips-elf/pic-reloc-7.d: New test.
* testsuite/ld-mips-elf/pic-reloc-5.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-6.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-7.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Add a new option to get the linker to emit PLTs that use compact
branches instead of delay slot branches.
bfd/
* elfxx-mips.c (LA25_BC): New macro.
(mips_elf_link_hash_table)<compact_branches>: New field.
(STUB_JALRC): New macro.
(mipsr6_o32_exec_plt0_entry_compact): New array.
(mipsr6_n32_exec_plt0_entry_compact): Likewise.
(mipsr6_n64_exec_plt0_entry_compact): Likewise.
(mipsr6_exec_plt_entry_compact): Likewise.
(mips_elf_create_la25_stub): Use BC instead of J for stubs
when compact_branches is true.
(_bfd_mips_elf_finish_dynamic_symbol): Choose the compact
PLT for MIPSR6 with compact_branches. Do not reorder the
compact branches PLT. Switch the lazy stub for MIPSR6
with compact_branches to use JALRC.
(mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6
when compact_branches is true.
(_bfd_mips_elf_compact_branches): New function.
* elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype.
ld/
* emultempl/mipself.em (compact_branches): New static variable.
(mips_create_output_section_statements): Call
_bfd_mips_elf_compact_branches.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and
OPTION_NO_COMPACT_BRANCHES.
(PARSE_AND_LIST_LONGOPTS): Add compact-branches,
no-compact-branches.
(PARSE_AND_LIST_OPTIONS): Add --compact-branches,
--no-compact-branches.
(PARSE_AND_LIST_ARGS_CASES): Handle the above.
* ld.texinfo: Document --compact-branches, --no-compact-branches.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`.
Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit
hosts.
Committed under the obvious rule.
bfd/ChangeLog:
PR ld/24373
* elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub):
Fix print formatter.
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:
1) If the address is within the range of an ADR instruction it rewrites the ADRP
into an ADR, and those doesn't need the use of a veneer.
2) If the address is not within range, it adds a branch to a veneer which will
execute the final bit of the erratum workaround and branch back to the call
site.
When we do this we always generate the veneers and we always align the size of
the text section to 4KB. This is because we only know which workaround we can
use after all linking has finished and all addresses are known. This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.
This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.
Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.
Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]
- full (default): Use both ADRP and ADR workaround. This is equivalent to not
specifying any options and is the default behavior before this
patch.
- adr: Only use the ADR workaround, this will not cause any increase in binary
size but linking will fail if the referenced address is out of range of
an ADR instruction.
- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.
In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.
bfd/ChangeLog:
PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.
ld/ChangeLog:
PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
The range check done to transform an absolute call/jump to a pc-relative one is
off-by-one, and that causes this shortening optimization to be missed if the
branch target is right at the range boundary.
In the non-shrinkable case, the range is what is mentioned in the ISA - -4094
bytes in the backward direction, and 4096 bytes in the positive direction.
In the shrinkable case, the forward jump range increases by two bytes (deleted
because of the shortening from call/jmp to rcall/rjmp), and therefore, the
range is -4094 in the reverse, and 4098 in the positive direction.
Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to
ensure jumps to max forward and backward ranges get relaxed to rjmp.
The current code to compute relative distance in the wrap around case does not
handle the edge case of the target (after adjusting for implicit PC increment)
being exactly half of the wrap around distance. This patch fixes that and adds a
testcase.
The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes
for the implicit PC increment)). If the target of the jump is at a distance of
4098 bytes, it is out of range for a forward jump - however, a backward jump can
still reach that address if pmem-wrap-around is 8192.
Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and
*without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will
jump to address 4096 (wrap around at 8192 and decreasing addresses from then
on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098.
avr_relative_distance_considering_wrap_around though, does the wrap around only
if the passed in distance is less than half of the wrap around distance. In this
case, it is exactly equal to half (original distance 4098, adjusted distance of
4096 and wraparound of 8192), and the bypassed wrap around causes the reloc
overflow error.
Fix by wrapping around even if adjusted distance is equal to half of wrap around
distance.
bfd/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Add case for Tag_MVE_arch.
binutils/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* readelf.c (arm_attr_tag_MVE_arch): New array for Tag_MVE_arch values.
(arm_attr_public_tag arm_attr_public_tags): Add case for Tag_MVE_arch.
elfcpp/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* arm.h (Tag_MVE_arch): Define new enum value.
gas/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (mve_ext, mve_fp_ext): New features.
(armv8_1m_main_ext_table): Add new extensions.
(aeabi_set_public_attributes): Translate new features to new build attributes.
(arm_convert_symbolic_attribute): Add Tag_MVE_arch.
* doc/c-arm.texi: Document new extensions and new build attribute.
include/ChangeLog:
2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
* elf/arm.h (Tag_MVE_arch): Define new enum value.
* opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
Fixes a failure seen with MALLOC_PERTURB_=1.
* elf32-arm.c (elf32_arm_write_section): Don't leave
error case of STM32L4XX_ERRATUM_BRANCH_TO_VENEER with
unitialised section contents.
PR 19921
binutils* objcopy.c: Add new option --verilog-data-width. Use it to set
the value of VerilogDataWidth.
* doc/binutils.texi: Document the new option.
* testsuite/binutils-all/objcopy.exp: Run tests of new option.
* testsuite/binutils-all/verilog-1.hex: New file.
* testsuite/binutils-all/verilog-2.hex: New file.
* testsuite/binutils-all/verilog-4.hex: New file.
* testsuite/binutils-all/verilog-8.hex: New file.
* NEWS: Mention the new feature.
bfd * verilog.c: (VerilogDataWidth): New variable.
(verilog_write_record): Emit bytes in VerilogDataWidth bundles.
This fixes the recently added ld-elf/pr24511 test failure on pj-elf.
Incidentally, pj-elf has failed its gas "pj" test since 2005-12-22
(git commit 54758c3e39). I think that makes the target ripe for
obsolescence.
bfd/
* elf32-pj.c (pj_elf_reloc): Don't report undefined weak as an error.
ld/
* testsuite/ld-undefined/weak-undef.exp: Don't xfail pj.
GOT and PLT relocs shouldn't have their symbols replaced with a
section symbol plus added. Nor should the HIGHA TLS relocations,
which failed to be caught by the range test in ppc_fix_adjustable.
bfd/
* reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA),
(BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA):
Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry.
gas/
* config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT
relocs, and VLE sdarel relocs.
* testsuite/gas/ppc/power4.d: Adjust.
This patch restricts the section names matched in coff_section_type,
a function that translates section names to symbol type, and arranges
to translate section flags to symbol type before looking at names.
The latter change resulted in various test failures due to improper
section flags being used in tests, and by the plugin support, so fix
that too.
The new test fails on many ELF targets that lack .init/fini_array
in their scripts. I've just xfailed those. pru-elf oddly defines
__init_array_begin rather than __init_array_start. I've left that
target as a FAIL, and pj-elf too which reports an error for undefined
weak symbols.
bfd/
PR 24511
* syms.c (coff_section_type): Only allow '.', '$' and numeric
following the standard section names.
(bfd_decode_symclass): Prioritize section flag tests in
decode_section_type before name tests in coff_section_type.
* plugin.c (bfd_plugin_canonicalize_symtab): Init fake_section
and fake_common_section using BFD_FAKE_SECTION. Use "fake" as
their names and choose standard .text section flags for
fake_section.
ld/
PR 24511
* testsuite/ld-elf/pr14156a.d: Allow for .init/.fini being a
data section on hppa64.
* testsuite/ld-elf/pr14156b.d: Likewise.
* testsuite/ld-scripts/pr18963.t: Map standard sections to set
output section flags.
* testsuite/ld-scripts/sane1.t: Likewise.
* testsuite/ld-elf/init-fini-arrays.s: Reference __init_array_start
and __fini_array_start. Define __start et al.
* testsuite/ld-elf/pr24511.d: New test.
When undefined non-weak references in IR objects are optimized out
by LTO, we can have weak dynamic referencs to symbols marked with
bfd_link_hash_undefined. We shouldn't complain such undefined weak
dynamic references.
bfd/
PR ld/24486
* elflink.c (elf_link_output_extsym): Don't complain undefined
weak dynamic reference.
ld/
PR ld/24486
* testsuite/ld-plugin/lto.exp: Run PR ld/24486 tests.
* testsuite/ld-plugin/pr24486a.c: New file.
* testsuite/ld-plugin/pr24486b.c: Likewise.
* testsuite/ld-plugin/pr24486c.c: Likewise.
This patch aims to improve the definitions of BTI and PAC based PLTs.
The following changes are made:
* PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1])
are readonly so they cannot be corrupted at runtime. Thus both PAC plt0
and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0
instead, respectively.
* We can remove the extra padding nops when we add the new bti instructions.
BTI plt0 and BTI TLSDESC plt are updated.
* For better performance PLTn could be padded to 24bytes. Both BTI pltn and
PAC pltn are updated.
*** bfd/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove.
(PLT_BTI_TLSDESC_ENTRY_SIZE): Remove.
(PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update.
(elfNN_aarch64_small_plt0_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_entry): Update.
(elfNN_aarch64_small_plt_bti_entry): Update.
(elfNN_aarch64_small_plt_pac_entry): Update.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update.
(setup_plt_values): Setup new entries.
(elfNN_aarch64_finish_dynamic_sections): Remove size change.
(elfNN_aarch64_plt_sym_val): Likewise.
*** ld/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/bti-pac-plt-1.d: Update.
* testsuite/ld-aarch64/bti-pac-plt-2.d: Update.
* testsuite/ld-aarch64/bti-plt-1.d: Update.
* testsuite/ld-aarch64/bti-plt-3.d: Update.
* testsuite/ld-aarch64/bti-plt-5.d: Update.
* testsuite/ld-aarch64/pac-plt-1.d: Update.
* testsuite/ld-aarch64/pac-plt-2.d: Update.
This tidies the remaining --no-print-map-discarded fails. h8300-elf
warns on a section without flags, and s12z doesn't support
--gc-sections.
bfd/
* elf32-s12z.c (elf_backend_can_gc_sections): Don't define
ld/
* testsuite/ld-gc/skip-map-discarded.s: Add section attributes.
* testsuite/lib/ld-lib.exp (check_gc_sections_available): Add
s12z to list of targets not supporting --gc-sections.
Alan Modra
Jim Wilson
Simon Marchi
Phil Blundell
Tom Tromey
Nick Clifton
H.J. Lu
Stafford Horne
Dennis Zhang
Tamar Christina
Tom Tromey
Martin Liska
Mihailo Stojanovic
Jose E. Marchesi
Max Filippov
YunQiang Su
Claudiu Zissulescu
Omar Majid
Christophe Lyon
Srinath Parvathaneni
Jan Beulich
Szabolcs Nagy
Adam Lackorzymski
Christos Zoulas
Sudakshina Das
Faraz Shahbazker
Matthew Fortune
Andre Vieira
Senthil Kumar Selvaraj
Jamey Hicks