03ee1b7f8e
PR gas/11013
...
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
and QDSUB.
* gas/arm/arch7em.d: Update expected disassembly.
* gas/arm/thumb32.d: Likewise.
* config/tc-arm.c (do_t_simd2): New function.
(insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
2009-12-02 20:26:30 +00:00
ccc5981b93
2009-11-17 Quentin Neill <quentin.neill@amd.com>
...
Sebastian Pop <sebastian.pop@amd.com>
gas/testsuite/
* gas/i386/x86-64-fma4.d: Add new patterns.
* gas/i386/x86-64-fma4.s: Same.
* gas/i386/x86-64-xop.d: Adjusted.
opcodes/
* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
decoding the second source operand from the immediate byte.
(OP_EX_VexW): Pass an extra integer to identify the second
and third source arguments.
2009-11-25 15:15:30 +00:00
18d0c96eb9
Allow lock on cmpxch16b.
...
gas/testsuite/
2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/lock-1.s: Add cmpxchg16b test.
* gas/i386/lock-1-intel.d: Updated.
* gas/i386/lock-1.d: Likewise.
opcodes/
2009-11-19 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.tbl: Add IsLockable to cmpxch16b.
* i386-tbl.h: Regenerated.
2009-11-19 15:26:42 +00:00
945ee43039
PR binutils/10924
...
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
instructions using Immediate Offset addressing with an offset of
zero.
* gas/arm/arch4t.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
tst instructions.
PR binutils/10924
* arm-dis.c (print_insn_arm): Do not print an offset of zero when
decoding Immediaate Offset addressing.
2009-11-19 14:07:11 +00:00
41effecb2d
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
opcodes/
PR binutils/10973
* i386-dis.c (get_vex_imm8): Do not increment codep.
Avoid incrementing bytes_before_imm when OP_E_memory
has already forwarded the codep pointer.
(OP_EX_VexW): Increment codep to skip mod/rm byte.
gas/testsuite/
* gas/i386/x86-64-xop.d: Update patterns.
2009-11-19 07:08:39 +00:00
f0ae4a24b0
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Remove cvt16.
(md_show_usage): Same.
* doc/c-i386.texi: Same.
gas/testsuite/
* gas/i386/cvt16.d: Removed.
* gas/i386/cvt16.s: Removed.
* gas/i386/x86-64-cvt16.d: Removed.
* gas/i386/x86-64-cvt16.s: Removed.
* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.
opcodes/
* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
(VEX_LEN_XOP_08_A1): Removed.
(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
VEX_LEN_XOP_08_A1.
(vex_len_table): Same.
* i386-gen.c (CPU_CVT16_FLAGS): Removed.
(cpu_flags): Remove field for CpuCVT16.
* i386-opc.h (CpuCVT16): Removed.
(i386_cpu_flags): Remove bitfield cpucvt16.
(i386-opc.tbl): Remove CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 20:28:59 +00:00
d72de478df
Remove suffix on fxsave.
...
2009-11-18 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rex.d: Remove suffix on fxsave.
2009-11-18 20:04:47 +00:00
5dd85c9970
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
gas/
* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
(build_vex_prefix): Handle xop08.
(md_assemble): Don't special case the constant 3 for insns using MODRM.
(build_modrm_byte): Handle vex2sources.
(md_show_usage): Add xop and cvt16.
* doc/c-i386.texi: Document fma4, xop, and cvt16.
gas/testsuite/
* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
* gas/i386/lwp.d: Update name of the testcase.
* gas/i386/x86-64-xop.d: New.
* gas/i386/x86-64-xop.s: New.
* gas/i386/xop.d: New.
* gas/i386/xop.s: New.
* gas/i386/cvt16.d: New.
* gas/i386/cvt16.s: New.
opcodes/
* i386-dis.c (OP_Vex_2src_1): New.
(OP_Vex_2src_2): New.
(Vex_2src_1): New.
(Vex_2src_2): New.
(XOP_08): Added.
(VEX_LEN_XOP_08_A0): Added.
(VEX_LEN_XOP_08_A1): Added.
(VEX_LEN_XOP_09_80): Added.
(VEX_LEN_XOP_09_81): Added.
(xop_table): Added an entry for XOP_08. Handle xop instructions.
(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
(get_valid_dis386): Handle XOP_08.
(OP_Vex_2src): New.
* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
(cpu_flags): Add CpuXOP and CpuCVT16.
(opcode_modifiers): Add XOP08, Vex2Sources.
* i386-opc.h (CpuXOP): Added.
(CpuCVT16): Added.
(i386_cpu_flags): Add cpuxop and cpucvt16.
(XOP08): Added.
(Vex2Sources): Added.
(i386_opcode_modifier): Add xop08, vex2sources.
* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 04:04:17 +00:00
aefd8a406c
* gas/arm/vfma1.d: Only run on ELF based targets.
...
PR binutils/10924
* gas/arm/arch4t-eabi.d: Update expected disassembly.
* gas/arm/arch4t.d: Likewise.
* gas/arm/archv6t2.d: Likewise.
* gas/arm/arm7t.d: Likewise.
* gas/arm/inst.d: Likewise.
* gas/arm/xscale.d: Likewise.
PR binutils/10924
* arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
instruction variants. Add pattern for MRS variant that was being
confused with CMP.
(arm_decode_shift): Place error message in a comment.
(print_insn_arm): Note that writing back to the PC is
unpredictable.
Only print 'p' variants of cmp/cmn/teq/tst instructions if
decoding for pre-V6 architectures.
2009-11-17 17:20:26 +00:00
9e3c6df664
2009-11-17 Paul Brook <paul@codesourcery.com>
...
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* doc/c-arm.texi: Document .arch armv7e-m.
* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
(insns): Put Thumb versions of v5TExP instructions into
arm_ext_v5exp also. Move some Thumb variants from
arm_ext_v6_notm to arm_ext_v6_dsp.
(arm_archs): Add armv7e-m architecture.
(aeabi_set_public_attributes): Handle -march=armv7e-m.
gas/testsuite/
* gas/arm/attr-march-armv7em.d: New test.
* gas/arm/arch7em-bad.d: New test.
* gas/arm/arch7em-bad.l: New test.
* gas/arm/arch7em.d: New test.
* gas/arm/arch7em.s: New test.
include/elf/
* arm.h (TAG_CPU_ARCH_V7E_M): Define.
include/opcode/
* arm.h (ARM_EXT_V6_DSP): Define.
(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.
bfd/
* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
2009-11-17 16:31:56 +00:00
27b4051da3
* gas/rx/macros.inc (creg): Remove cpen.
...
* gas/rx/mvfc.d: Remove expected uses of cpen register.
* gas/rx/mvtc.d: Likewise.
* gas/rx/popc.d: Likewise.
* gas/rx/pushc.d: Likewise.
2009-11-17 10:36:48 +00:00
f7c21dc7b8
* config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15.
...
(do_vmrs): New function.
(do_vmsr): New function.
(insns): Add vmrs and vmsr.
* gas/arm/vfp1xD.s: Add vmrs and vmsr instructions.
* gas/arm/vfp1xD.d: Update expected disassembly.
2009-11-16 11:47:36 +00:00
c1ba026631
Check destination operand for lockable instructions.
...
gas/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Check destination operand
for lockable instructions.
gas/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/lock-1-intel.d: Updated.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
2009-11-14 06:04:34 +00:00
2a70cca486
Check rex_ignored.
...
gas/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/rex.s: Add a test for VEX insn.
* gas/i386/rex.d: Updated.
opcodes/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (print_insn): Check rex_ignored.
2009-11-13 23:13:48 +00:00
f16cd0d502
Rewrite prefix processing.
...
gas/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1,
and x86-64-long-1-intel.
* gas/i386/long-1-intel.d: New.
* gas/i386/long-1.d: Likewise.
* gas/i386/long-1.s: Likewise.
* gas/i386/x86-64-long-1-intel.d: Likewise.
* gas/i386/x86-64-long-1.d: Likewise.
* gas/i386/x86-64-long-1.s: Likewise.
* gas/i386/jump16.d: Updated for prefix processing.
* gas/i386/naked.d: Likewise.
* gas/i386/nops-1-core2.d: Likewise.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-5-i686.d: Likewise.
* gas/i386/nops-5.d: Likewise.
* gas/i386/prefix.d: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/string-ok.d: Likewise.
* gas/i386/x86-64-addr32-intel.d: Likewise.
* gas/i386/x86-64-addr32.d: Likewise.
* gas/i386/x86-64-cbw-intel.d: Likewise.
* gas/i386/x86-64-cbw.d: Likewise.
* gas/i386/x86-64-io-intel.d: Likewise.
* gas/i386/x86-64-io-suffix.d: Likewise.
* gas/i386/x86-64-io.d: Likewise.
* gas/i386/x86-64-lwp.d: Likewise.
* gas/i386/x86-64-nops-1-core2.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86-64-stack-intel.d: Likewise.
* gas/i386/x86-64-stack-suffix.d: Likewise.
* gas/i386/x86-64-stack.d: Likewise.
ld/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/tlsbin.dd: Updated for prefix processing.
* ld-x86-64/tlsgdesc.dd: Likewise.
* ld-x86-64/tlsld1.dd: Likewise.
* ld-x86-64/tlspic.dd: Likewise.
opcodes/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (ckprefix): Updated to return 0 if number of
prefixes > 14 and record the last position for each prefix.
(lock_prefix): Removed.
(data_prefix): Likewise.
(addr_prefix): Likewise.
(repz_prefix): Likewise.
(repnz_prefix): Likewise.
(last_lock_prefix): New.
(last_repz_prefix): Likewise.
(last_repnz_prefix): Likewise.
(last_data_prefix): Likewise.
(last_addr_prefix): Likewise.
(last_rex_prefix): Likewise.
(last_seg_prefix): Likewise.
(MAX_CODE_LENGTH): Likewise.
(ADDR16_PREFIX): Likewise.
(ADDR32_PREFIX): Likewise.
(DATA16_PREFIX): Likewise.
(DATA32_PREFIX): Likewise.
(REP_PREFIX): Likewise.
(seg_prefix): Likewise.
(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
(get_valid_dis386): Updated.
(OP_C): Likewise.
(OP_Monitor): Likewise.
(REP_Fixup): Likewise.
(print_insn): Display all prefixes.
(putop): Set PREFIX_DATA on used_prefixes only if it is used.
(intel_operand_size): Likewise.
(OP_E_register): Likewise.
(OP_G): Likewise.
(OP_REG): Likewise.
(OP_IMREG): Likewise.
(OP_I): Likewise.
(OP_I64): Likewise.
(OP_sI): Likewise.
(CRC32_Fixup): Likewise.
(MOVBE_Fixup): Likewise.
(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
in 16bit mode.
(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
used_prefixes only if it is used.
2009-11-13 20:42:10 +00:00
c32fa91d70
gas/
...
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (LOCKREP_PREFIX): Removed.
(REP_PREFIX): New.
(LOCK_PREFIX): Likewise.
(PREFIX_GROUP): Likewise.
(REX_PREFIX): Updated.
(MAX_PREFIXES): Likewise.
(add_prefix): Updated. Return enum PREFIX_GROUP.
(md_assemble): Check for lock without a lockable instruction.
(parse_insn): Updated.
(output_insn): Likewise.
gas/testsuite/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.
* gas/i386/lock-1-intel.d: New.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
opcodes/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IsLockable.
* i386-opc.h (IsLockable): New.
(i386_opcode_modifier): Add islockable.
* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
xor, xadd and xchg.
* i386-tbl.h: Regenerated.
2009-11-12 18:57:14 +00:00
79862e4574
gas/testsuite/
...
* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
and expanded PC-relative offsets.
opcodes/
* arm-dis.c (coprocessor_opcodes): Use %A instead of %C. Remove
generic coprocessor instructions for FPA loads and stores.
(print_insn_coprocessor): Remove %C support. Display address for
PC-relative offsets in %A.
2009-11-12 14:49:45 +00:00
f310f33d50
gas/testsuite/
...
2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/prefix.d: Swap order of ADDR and REP prefixes.
* gas/i386/rep.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
opcodes/
2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (all_prefixes): New.
(ckprefix): Set all_prefixes.
(print_insn): Print all_prefixes instead of lock_prefix,
repz_prefix, repnz_prefix, addr_prefix and data_prefix.
2009-11-12 02:13:06 +00:00
c48244a521
2009-11-06 Sebastian Pop <sebastian.pop@amd.com>
...
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
the xop_table.
(get_valid_dis386): Removed unused condition (from cut/n/paste) for
XOP instructions.
* gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
patterns with r[8-15] registers.
* gas/testsuite/gas/i386/x86-64-lwp.d: Same.
2009-11-06 23:17:26 +00:00
f88c9eb030
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
(build_vex_prefix): Handle xop09 and xop0a.
(build_modrm_byte): Handle vexlwp.
(md_show_usage): Add lwp.
* gas/doc/c-i386.texi (i386-LWP): New section.
* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
run lwp in 32-bit mode.
* gas/testsuite/gas/i386/x86-64-lwp.d: New.
* gas/testsuite/gas/i386/x86-64-lwp.s: New.
* gas/testsuite/gas/i386/lwp.d: New.
* gas/testsuite/gas/i386/lwp.s: New.
* opcodes/i386-dis.c (OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
(USE_XOP_8F_TABLE): New.
(XOP_8F_TABLE): New.
(REG_XOP_LWPCB): New.
(REG_XOP_LWP): New.
(XOP_09): New.
(XOP_0A): New.
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
(xop_table): New.
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
to access to the vex_table.
(OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
(cpu_flags): Add CpuLWP.
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
* opcodes/i386-opc.h (CpuLWP): New.
(i386_cpu_flags): Add bit cpulwp.
(VexLWP): New.
(XOP09): New.
(XOP0A): New.
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
* opcodes/i386-opc.tbl (llwpcb): Added.
(lwpval): Added.
(lwpins): Added.
2009-11-05 23:40:05 +00:00
cdcf946711
* gas/i386/i386.exp (space1): Move test inside check for x86
...
target.
2009-11-05 11:02:16 +00:00
6c78a1f83e
2009-11-04 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/876
* gas/i386/i386.exp: Run space1.
* gas/i386/space1.l: New.
* gas/i386/space1.s: Likewise.
2009-11-04 18:52:03 +00:00
1ee6951580
2009-11-03 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_vfp_nsyn_mla_mls): Fix vmls excoding.
gas/testsuite/
* gas/arm/vfp-neon-syntax.d: Update expected results.
* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-11-03 12:37:45 +00:00
62f3b8c867
2009-11-02 Paul Brook <paul@codesourcery.com>
...
ld/testsuite/
* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
* ld-arm/attr-merge-vfp-1.d: New test.
* ld-arm/attr-merge-vfp-1r.d: New test.
* ld-arm/attr-merge-vfp-2.d: New test.
* ld-arm/attr-merge-vfp-2r.d: New test.
* ld-arm/attr-merge-vfp-3.d: New test.
* ld-arm/attr-merge-vfp-3r.d: New test.
* ld-arm/attr-merge-vfp-4.d: New test.
* ld-arm/attr-merge-vfp-4r.d: New test.
* ld-arm/attr-merge-vfp-5.d: New test.
* ld-arm/attr-merge-vfp-5r.d: New test.
* ld-arm/attr-merge-vfp-2.s: New test.
* ld-arm/attr-merge-vfp-3.s: New test.
* ld-arm/attr-merge-vfp-3-d16.s: New test.
* ld-arm/attr-merge-vfp-4.s: New test.
* ld-arm/attr-merge-vfp-4-d16.s: New test.
gas/
* doc/c-arm.texi: Document new -mfpu options.
* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
fpu_vfp_ext_fma): New.
(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
(insns): Move double precision load/store. Split out double
precision VFPv3 instrucitons. Add VFPv4 instructions.
(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
(aeabi_set_public_attributes): Set VFPv4 variants
gas/testsuite/
* gas/arm/attr-mfpu-vfpv4.d: New test.
* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
* gas/arm/neon-fma-cov.d: New test.
* gas/arm/neon-fma-cov.s: New test.
* gas/arm/vfp-fma-inc.s: New test.
* gas/arm/vfp-fma-arm.d: New test.
* gas/arm/vfp-fma-arm.s: New test.
* gas/arm/vfp-fma-thumb.d: New test.
* gas/arm/vfp-fma-thumb.s: New test.
* gas/arm/vfma1.d: New test.
* gas/arm/vfma1.s: New test.
* gas/arm/vfpv3xd.d: New test.
* gas/arm/vfpv3xd.s: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
FPU_ARCH_NEON_VFP_V4): Define.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
attributes.
opcodes/
* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
206c2556c2
gas/
...
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
2009-10-29 22:22:59 +00:00
e6655fdab4
2009-10-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes.
gas/testsuite/
* gas/arm/vfp-neon-syntax.d: Update expected results.
* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-10-29 18:01:13 +00:00
14610ad10e
PR gas/10856
...
* expr.c (resolve_expression): Only add "left" value to O_symbol
expression when the symbol is undefined and different from the
original symbol. Simplify negative logic.
* gas/i386/intelpic.d: Correct.
2009-10-28 08:21:45 +00:00
a39571ad49
* gas/z80/equ.d, gas/z80/equ.s: Added test of parsing equ directives.
...
* gas/z80/z80.exp: Run it.
* gas/z80/redef.d: Expect little endian output only.
2009-10-25 16:18:04 +00:00
4b06377fcc
gas/
...
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* doc/c-i386.texi: Mention movabs.
gas/testsuite/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* gas/i386/immed64.d: Updated.
* gas/i386/l1om.d: Likewise.
* gas/i386/x86-64-disp-intel.d: Likewise.
* gas/i386/x86-64-disp.d: Likewise.
* gas/i386/x86_64.d: Likewise.
opcodes/
2009-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10775
* i386-dis.c: Document LB, LS and LV macros.
(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
with the 64-bit displacement or immediate operand.
(putop): Handle LB, LS and LV macros.
2009-10-20 22:18:19 +00:00
23f5dfcb86
* config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set
...
correctly for all 16 bit relocs. Return BFD_RELOC_NONE if reloc
isn't recognized, not BFD_RELOC_XC16X_SOF.
testsuite:
* gas/xc16x/shlrol.s: Specify constant shift amount.
* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
2009-10-19 15:27:39 +00:00
76748ada53
Exclude more aout targets.
2009-10-18 07:43:04 +00:00
f19df8f73a
PR gas/1491
...
gas/
* macro.c: Delete unnecessary function declarations.
(buffer_and_nest): Support multiple labels per line for
LABELS_WITHOUT_COLONS targets if the labels do have colons.
(free_macro): Move so that we don't need forward declaration.
* read.c (read_a_source_file): Take a copy of macro expansion line
before we trim labels.
* listing.c (listing_newline): Adjust stdin line save for
input_line_pointer still at start of line.
gas/testsuite/
* gas/macros/dot.s: Don't start macro invocations is first column.
* gas/macros/dot.l: Update.
* gas/macros/macros.exp: Run dot test on more targets.
2009-10-15 10:58:34 +00:00
313c53d19e
gas/
...
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10740
* config/tc-i386-intel.c (i386_intel_operand): Handle call
and jump with 2 immediate operands.
* config/tc-i386.c (i386_finalize_immediate): Don't generate
error message if operand string is NULL.
gas/testsuite/
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10740
* gas/i386/jump.s: Add new tests.
* gas/i386/jump16.s: Likewise.
* gas/i386/jump.d: Updated.
* gas/i386/jump16.d: Likewise.
2009-10-13 16:23:25 +00:00
b2b7424819
gas:
...
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
located in data section an referencing a weak symbol.
gas/testsuite:
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* gas/m68k/all.exp: Added "p3041data".
* gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
from text section to all possible sections.
* gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
references from data section.
2009-10-13 08:55:31 +00:00
6f4c35a5fb
2009-10-08 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/10704
* gas/i386/intelok.s: Move 2 PIC tests to ...
* gas/i386/intelpic.s: Here.
* gas/i386/intelok.d: Updated.
* gas/i386/intelpic.d: Likewise.
2009-10-08 12:44:57 +00:00
5ef5585686
2009-10-07 H.J. Lu <hongjiu.lu@intel.com>
...
PR gas/10704
* gas/i386/intelok.s: Add 2 new tests.
* gas/i386/intelok.d: Updated.
2009-10-07 20:02:05 +00:00
9fe54b1ca1
gas/
...
* config/tc-ppc.c (md_show_usage): Document -m476.
* doc/c-ppc.texi (PowerPC-Opts): Document -m476.
gas/testsuite/
* gas/ppc/476.s: New test.
* gas/ppc/476.d: Likewise.
* gas/ppc/ppc.exp: Run the 476 test.
include/opcode/
* ppc.h (PPC_OPCODE_476): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "476" entry.
* ppc-opc.c (PPC476): Define.
(powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 14:42:42 +00:00
634b50f2a6
gas/
...
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
* gas/ppc/a2.d: Rename "ppca2" to "a2".
include/opcode/
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
opcodes/
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
* ppc-dis.c (ppc_opts): Likewise.
Rename "ppca2" to "a2".
2009-10-01 19:24:48 +00:00
c7927a3c0e
bfd
...
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
8765b55692
opcodes/
...
* ppc-opc.c (powerpc_opcodes): Remove support for the the "lxsdux",
"lxvd2ux", "lxvw4ux", "stxsdux", "stxvd2ux" and "stxvw4ux" opcodes.
gas/testsuite/
* gas/ppc/vsx.s ("lxsdux", "lxvd2ux", "lxvw4ux", "stxsdux",
"stxvd2ux", "stxvw4ux"): Remove tests.
* gas/ppc/vsx.d: Likewise.
* gas/ppc/power7.s: Likewise.
* gas/ppc/power7.d: Likewise.
2009-09-29 13:19:10 +00:00
f5d9e8160d
gas/
...
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10677
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Return true
for BFD_RELOC_X86_64_GOTPCREL.
gas/testsuite/
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10677
* gas/i386/i386.exp: Run x86-64-localpic.
* gas/i386/x86-64-localpic.d: New.
* gas/i386/x86-64-localpic.s: Likewise.
2009-09-24 14:36:48 +00:00
3bccaff786
2009-09-23 H.J. Lu <hongjiu.lu@intel.com>
...
* gas/i386/localpic.d: Updated.
2009-09-24 05:08:24 +00:00
2a86604a47
gas/
...
2009-09-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Don't check
BFD_RELOC_386_GOT32.
gas/testsuite/
2009-09-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run localpic.
* gas/i386/localpic.d: New.
* gas/i386/localpic.s: Likewise.
2009-09-24 03:23:52 +00:00
f9272224cd
Tolerate some whitespace differences in readelf output.
2009-09-23 03:12:28 +00:00
30c87b0590
* gas/ppc/a2.d: Match PPC64 relocs.
2009-09-22 03:10:25 +00:00
943fef64b2
* lib/gas-defs.exp (gas_test_error): Mark internal error/assertion
...
failures seen in output as fails. Also record output being
matched for fails.
2009-09-21 13:15:28 +00:00
26abf39f0f
* gas/mips/eret-1.d: Adjust regexps for robustness.
...
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
* gas/mips/eret-1.s: Reformat for readability. Add a label
at the beginning.
* gas/mips/eret-2.s: Add a label at the beginning.
2009-09-21 13:13:04 +00:00
0bcd05a426
* gas/mips/eret-1.s: Add trailing padding.
...
* gas/mips/eret-2.s: Likewise.
* gas/mips/eret-3.s: Likewise.
* gas/mips/eret-1.d: Adjust accordingly. Force a 32-bit ABI.
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
2009-09-21 13:10:07 +00:00
95d4c932e4
* gas/mips/mips.exp: Fix a typo.
2009-09-21 13:08:36 +00:00
e0d602ecff
gas/
...
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
2009-09-21 10:29:07 +00:00
Nick Clifton
Sebastian Pop
H.J. Lu
Paul Brook
Daniel Jacobowitz
Alan Modra
Arnold Metselaar
Doug Evans
Peter Bergner
Maciej W. Rozycki
Ben Elliston