ld/ChangeLog:
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* scripttempl/elf32msp430.sc: Add input section rules for
.upper.{text,data,rodata,bss}.
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
* testsuite/ld-msp430-elf/upper-input-sections.s: New test.
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* elfarcv2.sc : Allow interrupt vector table to be located at an
arbitrary address. Use DWARF.sc file.
* elfarc.sc: Use DWARF.sc file.
PR 25224
bfd * Makefile.am: Add z80-elf target support.
* configure.ac: Likewise.
* targets.c: Likewise.
* config.bfd: Add z80-elf target support and new arches: ez80 and z180.
* elf32-z80.c: New file.
* archures.c: Add new z80 architectures: eZ80 and Z180.
* coffcode.h: Likewise.
* cpu-z80.c: Likewise.
* bfd-in2.h: Likewise plus additional Z80 relocations.
* coff-z80.c: Add new relocations for Z80 target and local label check.
gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support
for assembler code generated by SDCC. Add new relocation types. Add
z80-elf target support.
* config/tc-z80.h: Add z80-elf target support. Enable dollar local
labels. Local labels starts from ".L".
* testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
* testsuite/gas/all/fwdexp.s: Likewise.
* testsuite/gas/z80/suffix.d: Fix failure on ELF target.
* testsuite/gas/z80/z80.exp: Add new tests
* testsuite/gas/z80/dollar.d: New file.
* testsuite/gas/z80/dollar.s: New file.
* testsuite/gas/z80/ez80_adl_all.d: New file.
* testsuite/gas/z80/ez80_adl_all.s: New file.
* testsuite/gas/z80/ez80_adl_suf.d: New file.
* testsuite/gas/z80/ez80_isuf.s: New file.
* testsuite/gas/z80/ez80_z80_all.d: New file.
* testsuite/gas/z80/ez80_z80_all.s: New file.
* testsuite/gas/z80/ez80_z80_suf.d: New file.
* testsuite/gas/z80/r800_extra.d: New file.
* testsuite/gas/z80/r800_extra.s: New file.
* testsuite/gas/z80/r800_ii8.d: New file.
* testsuite/gas/z80/r800_z80_doc.d: New file.
* testsuite/gas/z80/z180.d: New file.
* testsuite/gas/z80/z180.s: New file.
* testsuite/gas/z80/z180_z80_doc.d: New file.
* testsuite/gas/z80/z80_doc.d: New file.
* testsuite/gas/z80/z80_doc.s: New file.
* testsuite/gas/z80/z80_ii8.d: New file.
* testsuite/gas/z80/z80_ii8.s: New file.
* testsuite/gas/z80/z80_in_f_c.d: New file.
* testsuite/gas/z80/z80_in_f_c.s: New file.
* testsuite/gas/z80/z80_op_ii_ld.d: New file.
* testsuite/gas/z80/z80_op_ii_ld.s: New file.
* testsuite/gas/z80/z80_out_c_0.d: New file.
* testsuite/gas/z80/z80_out_c_0.s: New file.
* testsuite/gas/z80/z80_reloc.d: New file.
* testsuite/gas/z80/z80_reloc.s: New file.
* testsuite/gas/z80/z80_sli.d: New file.
* testsuite/gas/z80/z80_sli.s: New file.
ld * Makefile.am: Add new target z80-elf
* configure.tgt: Likewise.
* emultempl/z80.em: Add support for eZ80 and Z180 architectures.
* emulparams/elf32z80.sh: New file.
* emultempl/z80elf.em: Likewise.
* testsuite/ld-z80/arch_ez80_adl.d: Likewise.
* testsuite/ld-z80/arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/arch_r800.d: Likewise.
* testsuite/ld-z80/arch_z180.d: Likewise.
* testsuite/ld-z80/arch_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_z180.d: Likewise.
* testsuite/ld-z80/labels.s: Likewise.
* testsuite/ld-z80/relocs.s: Likewise.
* testsuite/ld-z80/relocs_b_ez80.d: Likewise.
* testsuite/ld-z80/relocs_b_z80.d: Likewise.
* testsuite/ld-z80/relocs_f_z80.d: Likewise.
* testsuite/ld-z80/z80.exp: Likewise.
opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
I think it is past time to remove CR16C support. CR16C was added in
2004, and only for ld. gas and binutils support is lacking, and there
have been no commits to bfd/elf32-cr16c.c other than warning fixes or
global maintainers making changes to all targets. I see no maintainer
listed for CR16C, and no commits from anyone at NSC supporting the
target. Furthermore, at the time the CR16 support was added in 2007,
config.sub was changed upstream to no longer recognise cr16c as a
valid cpu. That means the CR16C ld support is only available as a
secondary target by configuring with, for example,
--enable-targets=all or --enable-targets=cr16c-unknown-elf. No
testing of the CR16C target is possible.
include/
* elf/cr16c.h: Delete.
bfd/
* cpu-cr16c.c: Delete.
* elf32-cr16c.c: Delete.
* Makefile.am,
* archures.c,
* config.bfd,
* configure.ac,
* reloc.c,
* targets.c: Remove cr16c support.
* Makefile.in,
* bfd-in2.h,
* configure,
* libbfd.h,
* po/SRC-POTFILES.in: Regenerate.
ld/
* emulparams/elf32cr16c.sh: Delete.
* scripttempl/elf32cr16c.sc: Delete.
* Makefile.am,
* configure.tgt: Remove cr16c support.
* NEWS: Mention removal of cr16c.
* Makefile.in,
* po/BLD-POTFILES.in: Regenerate.
This patch makes the elf64bpf emulation to use it's own linker script,
based on elf.sc. At the moment, the only change is that the BPF
executable doesn't define an entry symbol (BPF programs feature
several entry points scattered in several sections.)
This is a step towards the goal of generating proper ELF executables
that would be loaded by the kernel's libbpf. We are not there yet:
BPF "programs" should still be linked with -r.
This change removes a warning while linking executables, decreases the
number of unsupported tests in the target from 47 to 29, and increases
the number of expected passes from 104 to 145.
Regtested in x86_64 for all targets.
No regressions.
ld/ChangeLog:
2019-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
* scripttempl/elf64bpf.sc: Adapted from elf.sc.
* emulparams/elf64bpf.sh (SCRIPT_NAME): Use elf64bpf.
(EMBEDDED): Define.
* testsuite/ld-bpf/call-1.d: Do not expect a warning regarding an
undefined entry symbol.
* testsuite/ld-bpf/jump-1.d: Likewise.
* testsuite/ld-undefined/undefined.exp: Do not pass '-e entry' to
ld in BPF targets, and do not expect line number information.
* testsuite/ld-srec/srec.exp (run_srec_test): xfail s-record tests
in BPF targets.
__rel[a]_iplt_start and __rel[a]_iplt_end are defined to handle IFUNC in
static executables. For PIE, since IFUNC is handled as the part of the
normal dynamic relocation processing, there is no need to define these
symbols in PIE.
* scripttempl/elf.sc (CREATE_PIC): New. Set for CREATE_SHLIB or
CREATE_PIE.
(__rel_iplt_start): Don't define for CREATE_PIC.
(__rel_iplt_end): Likewise.
(__rela_iplt_start): Likewise.
(__rela_iplt_end): Likewise.
The special case for .init and .fini in update_wild_statements is
ineffective for .init or .fini wildcards inside other output sections.
The special case needs to be on the wildcard, not the output section.
This patch is belt and braces, both fixing update_wild_statements and
the scripts.
* scripttempl/alpha.sc, * scripttempl/armbpabi.sc,
* scripttempl/crisaout.sc, * scripttempl/elf32cr16.sc,
* scripttempl/elf32crx.sc, * scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc, * scripttempl/elf32xc16xs.sc,
* scripttempl/elf64hppa.sc, * scripttempl/elf_chaos.sc,
* scripttempl/elfarc.sc, * scripttempl/elfarcv2.sc,
* scripttempl/elfd30v.sc, * scripttempl/elfm68hc11.sc,
* scripttempl/elfm68hc12.sc, * scripttempl/elfm9s12z.sc,
* scripttempl/elfmicroblaze.sc, * scripttempl/elfxgate.sc,
* scripttempl/elfxtensa.sc, * scripttempl/epiphany_4x4.sc,
* scripttempl/ft32.sc, * scripttempl/i386beos.sc,
* scripttempl/iq2000.sc, * scripttempl/mcorepe.sc,
* scripttempl/mep.sc, * scripttempl/mips.sc, * scripttempl/moxie.sc,
* scripttempl/pe.sc, * scripttempl/pep.sc, * scripttempl/ppcpe.sc,
* scripttempl/tic4xcoff.sc, * scripttempl/tic80coff.sc,
* scripttempl/v850.sc, * scripttempl/v850_rh850.sc,
* scripttempl/visium.sc, * scripttempl/xstormy16.sc: Add KEEP and
SORT_NONE to .init and .fini wildcards.
* scripttempl/elf32xc16x.sc,
* scripttempl/elf32xc16xl.sc,
* scripttempl/elf32xc16xs.sc: Add .fini wildcard.
* scripttempl/elf_chaos.sc: Add .init output section.
* scripttempl/elfd30v.sc: Remove duplicate .init.
* scripttempl/elfm68hc11.sc, * scripttempl/elfm68hc12.sc,
* scripttempl/elfm9s12z.sc, * scripttempl/elfxgate.sc: Remove
duplicate .init, and add .fini wildcard.
* scripttempl/ppcpe.sc (INIT, FINI): Delete.
* ldlang.c (update_wild_statements): Special case .init and
.fini in the wildcard, not the output section.
For ld -r, we generally set the VMA of sections to zero. This is done
to make the output of ld -r most similar to that output by the
assembler, which generally has sections starting at VMA zero. In some
cases that covers for backend bugs which would mis-handle relocatable
object files with non-zero section VMAs.
This patch fixes a few sections that didn't have zero VMAs for ld -r.
A missing zero on .note.gnu.build-id and .eh_frame_hdr doesn't matter
much since these are linker generated symbols only output on final
link, but it's good to be consistent.
* Makefile.am (ei386beos.c, ei386go32.c): Correct dependencies.
* Makefile.in: Regenerate.
* scripttempl/elf.sc (.note.gnu.build-id, .eh_frame_hdr): Set
address with ${RELOCATING-0}.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/armbpabi.sc: Likewise.
* scripttempl/avr.sc: Likewise.
* scripttempl/elf64hppa.sc: Likewise.
* scripttempl/elf_chaos.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfxtensa.sc: Likewise.
* scripttempl/mep.sc: Likewise.
* scripttempl/nds32elf.sc: Likewise.
* scripttempl/pru.sc: Likewise.
* scripttempl/elf32msp430.sc: Likewise, and for other sections.
* scripttempl/epiphany_4x4.sc: Similarly.
gold * layout.cc (section_name_mapping): Add an entry for
.gnu.build.attributes.
ld * scripttempl/elf.sc: Place .gnu.build.attributes sections with
other read-only sections.
bfd * Makefile.am: Add s12z files.
* Makefile.in: Regenerate.
* archures.c: Add bfd_s12z_arch.
* bfd-in.h: Add exports of bfd_putb24 and bfd_putl24.
* bfd-in2.h: Regenerate.
* config.bfd: Add s12z target.
* configure.ac: Add s12z target.
* configure: Regenerate.
* cpu-s12z.c: New file.
* elf32-s12z.c: New file.
* libbfd.c (bfd_putb24): New function.
(bfd_putl24): New function.
* libbfd.h: Regenerate.
* reloc.c: Add s12z relocations.
(bfd_get_reloc_size): Handle size 5 relocs.
* targets.c: Add s12z_elf32_vec.
opcodes * Makefile.am: Add support for s12z architecture.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* s12z-dis.c: New file.
* s12z.h: New file.
include * elf/s12z.h: New header.
ld * Makefile.am: Add support for s12z architecture.
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* emulparams/m9s12zelf.sh: New file.
* scripttempl/elfm9s12z.sc: New file.
* testsuite/ld-discard/static.d: Expect to fail for the s12z
target.
* testsuite/ld-elf/endsym.d: Likewise.
* testsuite/ld-elf/merge.d: Likewise.
* testsuite/ld-elf/pr14926.d: Skip for the s12z target.
* testsuite/ld-elf/sec64k.exp: Likewise.
* testsuite/ld-s12z: New directory.
* testsuite/ld-s12z/opr-linking.d: New file.
* testsuite/ld-s12z/opr-linking.s: New file.
* testsuite/ld-s12z/relative-linking.d: New file.
* testsuite/ld-s12z/relative-linking.s: New file.
* testsuite/ld-s12z/z12s.exp: New file.
gas * Makefile.am: Add support for s12z target.
* Makefile.in: Regenerate.
* NEWS: Mention the new support.
* config/tc-s12z.c: New file.
* config/tc-s12z.h: New file.
* configure.tgt: Add s12z support.
* doc/Makefile.am: Likewise.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add s12z documentation.
* doc/as.textinfo: Likewise.
* doc/c-s12z.texi: New file.
* testsuite/gas/s12z: New directory.
* testsuite/gas/s12z/abs.d: New file.
* testsuite/gas/s12z/abs.s: New file.
* testsuite/gas/s12z/adc-imm.d: New file.
* testsuite/gas/s12z/adc-imm.s: New file.
* testsuite/gas/s12z/adc-opr.d: New file.
* testsuite/gas/s12z/adc-opr.s: New file.
* testsuite/gas/s12z/add-imm.d: New file.
* testsuite/gas/s12z/add-imm.s: New file.
* testsuite/gas/s12z/add-opr.d: New file.
* testsuite/gas/s12z/add-opr.s: New file.
* testsuite/gas/s12z/and-imm.d: New file.
* testsuite/gas/s12z/and-imm.s: New file.
* testsuite/gas/s12z/and-opr.d: New file.
* testsuite/gas/s12z/and-opr.s: New file.
* testsuite/gas/s12z/and-or-cc.d: New file.
* testsuite/gas/s12z/and-or-cc.s: New file.
* testsuite/gas/s12z/bfext-special.d: New file.
* testsuite/gas/s12z/bfext-special.s: New file.
* testsuite/gas/s12z/bfext.d: New file.
* testsuite/gas/s12z/bfext.s: New file.
* testsuite/gas/s12z/bit-manip.d: New file.
* testsuite/gas/s12z/bit-manip.s: New file.
* testsuite/gas/s12z/bit.d: New file.
* testsuite/gas/s12z/bit.s: New file.
* testsuite/gas/s12z/bra-expression-defined.d: New file.
* testsuite/gas/s12z/bra-expression-defined.s: New file.
* testsuite/gas/s12z/bra-expression-undef.d: New file.
* testsuite/gas/s12z/bra-expression-undef.s: New file.
* testsuite/gas/s12z/bra.d: New file.
* testsuite/gas/s12z/bra.s: New file.
* testsuite/gas/s12z/brclr-symbols.d: New file.
* testsuite/gas/s12z/brclr-symbols.s: New file.
* testsuite/gas/s12z/brset-clr-opr-imm-rel.d: New file.
* testsuite/gas/s12z/brset-clr-opr-imm-rel.s: New file.
* testsuite/gas/s12z/brset-clr-opr-reg-rel.d: New file.
* testsuite/gas/s12z/brset-clr-opr-reg-rel.s: New file.
* testsuite/gas/s12z/brset-clr-reg-imm-rel.d: New file.
* testsuite/gas/s12z/brset-clr-reg-imm-rel.s: New file.
* testsuite/gas/s12z/brset-clr-reg-reg-rel.d: New file.
* testsuite/gas/s12z/brset-clr-reg-reg-rel.s: New file.
* testsuite/gas/s12z/clb.d: New file.
* testsuite/gas/s12z/clb.s: New file.
* testsuite/gas/s12z/clr-opr.d: New file.
* testsuite/gas/s12z/clr-opr.s: New file.
* testsuite/gas/s12z/clr.d: New file.
* testsuite/gas/s12z/clr.s: New file.
* testsuite/gas/s12z/cmp-imm.d: New file.
* testsuite/gas/s12z/cmp-imm.s: New file.
* testsuite/gas/s12z/cmp-opr-inc.d: New file.
* testsuite/gas/s12z/cmp-opr-inc.s: New file.
* testsuite/gas/s12z/cmp-opr-rdirect.d: New file.
* testsuite/gas/s12z/cmp-opr-rdirect.s: New file.
* testsuite/gas/s12z/cmp-opr-reg.d: New file.
* testsuite/gas/s12z/cmp-opr-reg.s: New file.
* testsuite/gas/s12z/cmp-opr-rindirect.d: New file.
* testsuite/gas/s12z/cmp-opr-rindirect.s: New file.
* testsuite/gas/s12z/cmp-opr-sxe4.d: New file.
* testsuite/gas/s12z/cmp-opr-sxe4.s: New file.
* testsuite/gas/s12z/cmp-opr-xys.d: New file.
* testsuite/gas/s12z/cmp-opr-xys.s: New file.
* testsuite/gas/s12z/cmp-s-imm.d: New file.
* testsuite/gas/s12z/cmp-s-imm.s: New file.
* testsuite/gas/s12z/cmp-s-opr.d: New file.
* testsuite/gas/s12z/cmp-s-opr.s: New file.
* testsuite/gas/s12z/cmp-xy.d: New file.
* testsuite/gas/s12z/cmp-xy.s: New file.
* testsuite/gas/s12z/com-opr.d: New file.
* testsuite/gas/s12z/com-opr.s: New file.
* testsuite/gas/s12z/complex-shifts.d: New file.
* testsuite/gas/s12z/complex-shifts.s: New file.
* testsuite/gas/s12z/db-tb-cc-opr.d: New file.
* testsuite/gas/s12z/db-tb-cc-opr.s: New file.
* testsuite/gas/s12z/db-tb-cc-reg.d: New file.
* testsuite/gas/s12z/db-tb-cc-reg.s: New file.
* testsuite/gas/s12z/dbCC.d: New file.
* testsuite/gas/s12z/dbCC.s: New file.
* testsuite/gas/s12z/dec-opr.d: New file.
* testsuite/gas/s12z/dec-opr.s: New file.
* testsuite/gas/s12z/dec.d: New file.
* testsuite/gas/s12z/dec.s: New file.
* testsuite/gas/s12z/div.d: New file.
* testsuite/gas/s12z/div.s: New file.
* testsuite/gas/s12z/eor.d: New file.
* testsuite/gas/s12z/eor.s: New file.
* testsuite/gas/s12z/exg.d: New file.
* testsuite/gas/s12z/exg.s: New file.
* testsuite/gas/s12z/ext24-ld-xy.d: New file.
* testsuite/gas/s12z/ext24-ld-xy.s: New file.
* testsuite/gas/s12z/inc-opr.d: New file.
* testsuite/gas/s12z/inc-opr.s: New file.
* testsuite/gas/s12z/inc.d: New file.
* testsuite/gas/s12z/inc.s: New file.
* testsuite/gas/s12z/inh.d: New file.
* testsuite/gas/s12z/inh.s: New file.
* testsuite/gas/s12z/jmp.d: New file.
* testsuite/gas/s12z/jmp.s: New file.
* testsuite/gas/s12z/jsr.d: New file.
* testsuite/gas/s12z/jsr.s: New file.
* testsuite/gas/s12z/ld-imm-page2.d: New file.
* testsuite/gas/s12z/ld-imm-page2.s: New file.
* testsuite/gas/s12z/ld-imm.d: New file.
* testsuite/gas/s12z/ld-imm.s: New file.
* testsuite/gas/s12z/ld-immu18.d: New file.
* testsuite/gas/s12z/ld-immu18.s: New file.
* testsuite/gas/s12z/ld-large-direct.d: New file.
* testsuite/gas/s12z/ld-large-direct.s: New file.
* testsuite/gas/s12z/ld-opr.d: New file.
* testsuite/gas/s12z/ld-opr.s: New file.
* testsuite/gas/s12z/ld-s-opr.d: New file.
* testsuite/gas/s12z/ld-s-opr.s: New file.
* testsuite/gas/s12z/ld-small-direct.d: New file.
* testsuite/gas/s12z/ld-small-direct.s: New file.
* testsuite/gas/s12z/lea-immu18.d: New file.
* testsuite/gas/s12z/lea-immu18.s: New file.
* testsuite/gas/s12z/lea.d: New file.
* testsuite/gas/s12z/lea.s: New file.
* testsuite/gas/s12z/mac.d: New file.
* testsuite/gas/s12z/mac.s: New file.
* testsuite/gas/s12z/min-max.d: New file.
* testsuite/gas/s12z/min-max.s: New file.
* testsuite/gas/s12z/mod.d: New file.
* testsuite/gas/s12z/mod.s: New file.
* testsuite/gas/s12z/mov.d: New file.
* testsuite/gas/s12z/mov.s: New file.
* testsuite/gas/s12z/mul-imm.d: New file.
* testsuite/gas/s12z/mul-imm.s: New file.
* testsuite/gas/s12z/mul-opr-opr.d: New file.
* testsuite/gas/s12z/mul-opr-opr.s: New file.
* testsuite/gas/s12z/mul-opr.d: New file.
* testsuite/gas/s12z/mul-opr.s: New file.
* testsuite/gas/s12z/mul-reg.d: New file.
* testsuite/gas/s12z/mul-reg.s: New file.
* testsuite/gas/s12z/mul.d: New file.
* testsuite/gas/s12z/mul.s: New file.
* testsuite/gas/s12z/neg-opr.d: New file.
* testsuite/gas/s12z/neg-opr.s: New file.
* testsuite/gas/s12z/not-so-simple-shifts.d: New file.
* testsuite/gas/s12z/not-so-simple-shifts.s: New file.
* testsuite/gas/s12z/opr-18u.d: New file.
* testsuite/gas/s12z/opr-18u.s: New file.
* testsuite/gas/s12z/opr-expr.d: New file.
* testsuite/gas/s12z/opr-expr.s: New file.
* testsuite/gas/s12z/opr-ext-18.d: New file.
* testsuite/gas/s12z/opr-ext-18.s: New file.
* testsuite/gas/s12z/opr-idx-24-reg.d: New file.
* testsuite/gas/s12z/opr-idx-24-reg.s: New file.
* testsuite/gas/s12z/opr-idx3-reg.d: New file.
* testsuite/gas/s12z/opr-idx3-reg.s: New file.
* testsuite/gas/s12z/opr-idx3-xysp-24.d: New file.
* testsuite/gas/s12z/opr-idx3-xysp-24.s: New file.
* testsuite/gas/s12z/opr-indirect-expr.d: New file.
* testsuite/gas/s12z/opr-indirect-expr.s: New file.
* testsuite/gas/s12z/opr-symbol.d: New file.
* testsuite/gas/s12z/opr-symbol.s: New file.
* testsuite/gas/s12z/or-imm.d: New file.
* testsuite/gas/s12z/or-imm.s: New file.
* testsuite/gas/s12z/or-opr.d: New file.
* testsuite/gas/s12z/or-opr.s: New file.
* testsuite/gas/s12z/p2-mul.d: New file.
* testsuite/gas/s12z/p2-mul.s: New file.
* testsuite/gas/s12z/page2-inh.d: New file.
* testsuite/gas/s12z/page2-inh.s: New file.
* testsuite/gas/s12z/psh-pul.d: New file.
* testsuite/gas/s12z/psh-pul.s: New file.
* testsuite/gas/s12z/qmul.d: New file.
* testsuite/gas/s12z/qmul.s: New file.
* testsuite/gas/s12z/rotate.d: New file.
* testsuite/gas/s12z/rotate.s: New file.
* testsuite/gas/s12z/s12z.exp: New file.
* testsuite/gas/s12z/sat.d: New file.
* testsuite/gas/s12z/sat.s: New file.
* testsuite/gas/s12z/sbc-imm.d: New file.
* testsuite/gas/s12z/sbc-imm.s: New file.
* testsuite/gas/s12z/sbc-opr.d: New file.
* testsuite/gas/s12z/sbc-opr.s: New file.
* testsuite/gas/s12z/shift.d: New file.
* testsuite/gas/s12z/shift.s: New file.
* testsuite/gas/s12z/simple-shift.d: New file.
* testsuite/gas/s12z/simple-shift.s: New file.
* testsuite/gas/s12z/single-ops.d: New file.
* testsuite/gas/s12z/single-ops.s: New file.
* testsuite/gas/s12z/specd6.d: New file.
* testsuite/gas/s12z/specd6.s: New file.
* testsuite/gas/s12z/st-large-direct.d: New file.
* testsuite/gas/s12z/st-large-direct.s: New file.
* testsuite/gas/s12z/st-opr.d: New file.
* testsuite/gas/s12z/st-opr.s: New file.
* testsuite/gas/s12z/st-s-opr.d: New file.
* testsuite/gas/s12z/st-s-opr.s: New file.
* testsuite/gas/s12z/st-small-direct.d: New file.
* testsuite/gas/s12z/st-small-direct.s: New file.
* testsuite/gas/s12z/st-xy.d: New file.
* testsuite/gas/s12z/st-xy.s: New file.
* testsuite/gas/s12z/sub-imm.d: New file.
* testsuite/gas/s12z/sub-imm.s: New file.
* testsuite/gas/s12z/sub-opr.d: New file.
* testsuite/gas/s12z/sub-opr.s: New file.
* testsuite/gas/s12z/tfr.d: New file.
* testsuite/gas/s12z/tfr.s: New file.
* testsuite/gas/s12z/trap.d: New file.
* testsuite/gas/s12z/trap.s: New file.
binutils* readelf.c: Add support for s12z architecture.
* testsuite/lib/binutils-common.exp (is_elf_format): Excluse s12z
targets.
My original implementation for LDI32 pseudo does not conform to
the TI ABI. I wrongly documented my TI PRU ELF object files inspection,
which got propagated into my binutils implementation.
Issue was exposed when running the GCC ABI testsuite against TI toolchain.
According to TI ABI, LDI32 must use first LDI instruction to load
the MSB 16bits, and second LDI instruction for the LSB 16bits.
This patch will break binary compatibility with previously released
binutils versions for PRU. Still, I think it is better to fix
binutils to conform to the chip vendor ABI.
bfd * elf32-pru.c (pru_elf32_do_ldi32_relocate): Make LDI32 relocation
conformant to TI ABI.
(pru_elf32_relax_section): Likewise.
(pru_elf_relax_delete_bytes): Fix offsets for new LDI32 code.
* elf32-pru.c (pru_elf32_do_ldi32_relocate): Ignore addend.
(pru_elf32_pmem_relocate): Trap - should not get here.
(pru_elf32_relocate_section): Add support for REL relocations.
(elf_info_to_howto_rel): Enable REL.
(elf_backend_may_use_rel_p): Likewise.
(elf_backend_may_use_rela_p): Likewise.
(elf_backend_default_use_rela_p): Likewise.
gas * config/tc-pru.c (md_apply_fix): Make LDI32 relocation conformant
to TI ABI.
(pru_assemble_arg_i): Likewise.
(output_insn_ldi32): Likewise.
* testsuite/gas/pru/ldi.d: Update test for the now fixed LDI32.
* gas/config/tc-pru.c (pru_assemble_arg_b): Check imm8 operand range.
* gas/testsuite/gas/pru/illegal2.l: New test.
* gas/testsuite/gas/pru/illegal2.s: New test.
* gas/testsuite/gas/pru/pru.exp: Register new illegal2 test.
ld * scripttempl/pru.sc: Add LD sections to allow linking TI
toolchain object files.
* scripttempl/pru.sc: Switch to init_array.
* testsuite/ld-pru/ldi32.d: Update LDI32 test to conform to TI ABI.
* testsuite/ld-pru/norelax_ldi32-data.d: Likewise.
* testsuite/ld-pru/norelax_ldi32-dis.d: Likewise.
* testsuite/ld-pru/relax_ldi32-data.d: Likewise.
* testsuite/ld-pru/relax_ldi32-dis.d: Likewise.
Define and handle TLS relocations for FDPIC in BFD and gas.
In gas, the new relocations are rejected if the --fdpic option was not
specified.
We also define the __tdata_start symbol to mark the start of the
.tdata section. This allows FDPIC static binaries to find the start of
.tdata section, since phdr->p_vaddr of TLS segment is not a valid
value for FDPIC.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/:
* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
(BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC): New
relocations.
* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC.
(struct elf32_arm_link_hash_table): Update comment.
(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
(IS_ARM_TLS_RELOC): Likewise.
(elf32_arm_check_relocs): Likewise.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_size_dynamic_sections): Update comment.
* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC.
gas/
* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
GOTTPOFF_FDIC relocations.
(md_apply_fix): Handle the new TLS FDPIC relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
include/
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
R_ARM_TLS_IE32_FDPIC.
ld/
* scripttempl/elf.sc: Define __tdata_start for .tdata section.
PR 22762
* scripttempl/pe.sc: Remove PROVIDE()s from __CTOR_LIST__ and
__DTOR_LIST__ symbols. Add a comment explaining why this is
necessary.
* scripttemp/pep.sc: Likewise.
* ld.texinfo (PROVIDE): Add a note about the effect of common
symbols.
The new "-z separate-code" option will generate separate code LOAD
segment which must be in wholly disjoint pages from any other data.
include/
PR ld/22393
* bfdlink.h (bfd_link_info): Add separate_code.
ld/
PR ld/22393
* NEWS: Mention "-z separate-code".
* emultempl/elf32.em (gld${EMULATION_NAME}_get_script): Get
builtin linker scripts and return linker scripts from disk for
"-z separate-code".
(gld${EMULATION_NAME}_handle_option): Handle "-z separate-code"
and "-z noseparate-code".
* genscripts.sh: Generate linker scripts for "-z separate-code".
(LD_FLAG): Set to *textonly for "-z separate-code".
* ld.texinfo: Document "-z separate-code".
* lexsup.c (elf_shlib_list_options): Add linker help messsages
for "-z separate-code" and "-z noseparate-code".
* scripttempl/elf.sc (SEPARATE_TEXT): New
(TEXT_SEGMENT_ALIGN): Likewise.
Use ${TEXT_SEGMENT_ALIGN} to align and pad text segment to
${MAXPAGESIZE}.
We must keep all PREINIT_ARRAY, INIT_ARRAY as well as FINI_ARRAY sections
for ld -r --gc-sections.
bfd/
PR ld/22677
* elflink.c (bfd_elf_gc_sections): Keep all PREINIT_ARRAY,
INIT_ARRAY as well as FINI_ARRAY sections for ld -r --gc-sections.
ld/
PR ld/22677
* scripttempl/elf.sc (PREINIT_ARRAY): New.
Don't add .preinit_array for ld -r.
* testsuite/ld-elf/pr22677.d: New file.
* testsuite/ld-elf/pr22677.s: Likewise.
elf.sc has
if test -n "${RODATA_ADDR}"; then
RODATA_ADDR="\
SEGMENT_START(\"rodata-segment\", ${RODATA_ADDR}) + SIZEOF_HEADERS"
else
RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
^^^^^^^^^^ Set RODATA_ADDR
RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${RODATA_ADDR})"
^^^^^^^^^^ Set RODATA_ADDR with ${RODATA_ADDR}
fi
if test -n "${SHLIB_RODATA_ADDR}"; then
SHLIB_RODATA_ADDR="\
SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR}) + SIZEOF_HEADERS"
else
SHLIB_RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR})"
^^^^^^^^^^ Set SHLIB_RODATA_ADDR
SHLIB_RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
^^^^^^^^^^ Override SHLIB_RODATA_ADDR
fi
The order should be:
if test -n "${SHLIB_RODATA_ADDR}"; then
SHLIB_RODATA_ADDR="\
SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR}) + SIZEOF_HEADERS"
else
SHLIB_RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
SHLIB_RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR})"
fi
PR ld/22696
* scripttempl/elf.sc: Fix the order of SHLIB_RODATA_ADDR.