Commit Graph

3216 Commits

Author SHA1 Message Date
Mike Frysinger
f2db709f4f sim: bfin: move model data into machs.h
Pull the model data (register addresses/sizes) out of the different model
files and into the machs.h header.  The models themselves don't care about
where they're mapped, only the mach code does.  This allows us to keep the
model headers from being included in the mach code which can cause issues
with model-specific names colliding.  Such as when a newer device model is
created, but with incompatible register names/layouts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:54:19 +00:00
Mike Frysinger
c43aadcaa6 sim: bfin: add a performance monitor stub
No counters get updated, but there is enough here for software to
poke things and work.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:41:29 +00:00
Mike Frysinger
dfb61fb66f sim: bfin: add bf526-0.2/bf54x-0.4 rom regions
Add regions for the on-chip roms on some newer Blackfin parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 12:35:05 +00:00
Mike Frysinger
dd931b2ff2 sim: glue: allow bitwise devices to only glue ints
Some Blackfin parts tie a bunch of interrupt lines into a single OR
gate before feeding the result into the SIC.  The glue-or device in
the sim provides a nice way of modeling this exact behavior.  At the
moment though, it requires the device to be mapped into the address
space so that things could write to it directly.  This is not needed
for the Blackfin usage, so make it optional.  Now the glue devices
can be used to simply tie interrupt lines together.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-23 23:00:35 +00:00
Mike Frysinger
0e31da218e sim: glue: implement or/xor funcs
The glue device has a bunch of "todos" for the misc bitwise devices.
So implement two for fun -- the glue-or and glue-xor.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-23 22:59:54 +00:00
Mike Frysinger
0641104b2e sim: tests: support .S/.c files
Rather than requiring all sim tests to be preprocessed .s files, add
support for .S and .c files so we can easily write code using a higher
level language like C.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-16 18:48:31 +00:00
Mike Frysinger
efac2223c4 sim: bfin: allow pushing of SP
The hardware respects this insn, and some code (like the on-chip bootrom)
uses it, so allow it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 16:00:37 +00:00
Mike Frysinger
28fe96b798 sim: bfin: implement loop back support in the UARTs
The UART has a LOOP_ENA bit in its MCR register where writes to the THR
go to the RBR.  Implement support for this mode.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-14 15:59:09 +00:00
Mike Frysinger
34b47c3828 sim: fix func call style (space before paren)
Committed this as obvious:
	-foo(...);
	+foo (...);

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-11 20:02:42 +00:00
Hans-Peter Nilsson
3fc8ee5409 PR sim/12737
* sim/arm/iwmmxt/wcmpgt.cgs, sim/arm/iwmmxt/wmac.cgs,
	sim/arm/iwmmxt/wsra.cgs, sim/arm/xscale/blx.cgs: Kfail.
2011-05-11 04:59:28 +00:00
Mike Frysinger
b44f3f638e sim: bfin: fix UART LSR read-only bit saturation
A few bits in the newer UART LSR register are not sticky, so make sure
we clear them when returning updated status rather than leaving them
always set.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-09 18:14:01 +00:00
Joseph Myers
4d393d60c4 gdb:
* configure.host (xscale*): Don't handle target.
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.

gdb/gdbserver:
	* README: Don't mention xscale*-*-linux*.
	* configure.srv (xscale*-*-linux*): Don't handle target.

gdb/testsuite:
	* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
	* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
	targets.
	* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
	handle targets.

sim:
	* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
	handle targets.
	* configure: Regenerate.

sim/testsuite:
	* configure: Regenerate.
	* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
	* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
	targets.
	* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
	xscale*-*-*.
	* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
	* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
	xscale*-*-*.
2011-05-04 19:28:16 +00:00
Mike Frysinger
2613074f8f sim: bfin: constify dmac pmap arrays
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-27 21:29:03 +00:00
Mike Frysinger
054c055baf sim: gpio: add output support
Make all of the pins bidirectional, and support sending signals when
software drives the pins as outputs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:47:14 +00:00
Mike Frysinger
5e0ba1a39e sim: gpio: update mask a/b signals better
When the mask a/b MMRs are written, the output signal might change levels
(as pins are [un]masked), so make sure we update the output level.

Further, make sure we handle edge ints correctly by first sending a high
signal followed by a low signal.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-26 05:46:02 +00:00
Mike Frysinger
af9f7da78b sim: add sim_complete_command stubs for non-common-using ports
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion.  These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 18:16:36 +00:00
Mike Frysinger
0427acfba0 sim: bfin: use store buffer with more 32bit insns
A bunch of 32bit insns were not using the store buffer, so when they were
used in parallel insns, they would incorrectly clobber a register early.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 17:37:55 +00:00
Mike Frysinger
5592f70ec8 gdb: sim: add style fixes lost between git->cvs 2011-04-15 16:23:19 +00:00
Mike Frysinger
56a9aa1d10 gdb: sim: add command line completion
For now, only the sub-command name is completed.  No support yet for
completing options to that command.  But even this is a huge step as
currently, nothing is completed, and the basic "help sim" is fairly
obtuse as to what exactly the "sim" command accepts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 03:43:46 +00:00
Mike Frysinger
d2cfa400a1 sim: bfin: handle implicit DISALGNEXCPT with video insns
When most video related insns are used in parallel with Ireg loads, the
DISALGNEXCPT insn behavior is implicitly in effect.

Reported-by: Anton Shokurov <shokurov.anton.v@yandex.ru>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-15 01:21:21 +00:00
Mike Frysinger
e10d6db33d sim: bfin: respect the port level on signals to the SIC
The SIC latches ints from peripherals to the CEC, but the peripherals
need to be able to tell the SIC when to stop.  So use the incoming level
to figure out when to set the int bits and when to clear it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:23:26 +00:00
Mike Frysinger
8aacdaf48d sim: bfin: add missing GPIO pin 15
Each GPIO block has 16 pins, and I only added 15 in the original
port list.  So add the missing 16th.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-11 05:22:23 +00:00
Mike Frysinger
d45bea91ec sim: dv-glue: fix up style a bit
This touches up the code a bit to match GNU style.  No functional changes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 06:02:51 +00:00
Mike Frysinger
12c4cbd553 sim: fix up style a bit
This touches up the code a bit to match GNU style.  No functional changes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-02 05:30:16 +00:00
Mike Frysinger
2b12772f43 sim: bfin: add OTP output port
This doesn't currently generate any interrupts (as there doesn't appear
to be any documentation to *when* it would even do so), but since the
HRM does say an interrupt line exists between the OTP and the SIC, add
one for completeness sake.  This will make a follow up patch easier.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-01 22:32:04 +00:00
Mike Frysinger
6294f8ea1e sim: bfin: regen configure to include new cfi device 2011-03-29 18:39:51 +00:00
Mike Frysinger
66ee273116 sim: cfi: new flash device simulation
This simulates a CFI flash.  Its pretty configurable via the device
tree.  For now, only basic read/write/erase operations are supported
for the Intel command set, but it's easy enough to extend support.
It's certainly enough to trick Das U-Boot into using it for probing,
reading, writing, and erasing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 17:57:21 +00:00
Mike Frysinger
1a3af0bfc3 sim: bfin: fix sign extension with 16bit acc add insns
The current implementation attempts to handle the 16bit sign extension
itself.  Unfortunately, it gets it right in some cases.  So rather than
fix that logic, just drop it in favor of using 16bit signed casts.  Now
gcc will take care of getting the logic right.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-29 01:41:49 +00:00
Mike Frysinger
36aef94270 sim: bfin: handle saturation with RND12 sub insns
The current handling of the subtraction insn with the RND12 modifier
works when saturation isn't involved.  So add handling for this edge
case to match the hardware.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-27 04:03:05 +00:00
Mike Frysinger
fcd1ee07d3 sim: bfin: add missing VS set with add/sub insns
The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the
V bit was also set.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-26 06:02:41 +00:00
Mike Frysinger
a31d4fd99d sim: bfin: add hw tracing to gpio/sic port events
Makes it a lot easier to find out what's going on with interrupt lines
if the ports have tracing output.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:13:57 +00:00
Mike Frysinger
b72cc8e145 sim: bfin: fix GPIO logic bugs when processing events
We need the DIR bit cleared, not set, in order for the pin to be treated
as an input.

When looking up the data value, we need to shift the "level" value over by
"my_port" rather than "bit" as the latter has already been shifted over.
We also should normalize the "level" coming in from the outside worlds to
the set of {0,1} since those are the only values that matter to GPIOs.

We need the BOTH bit set, not cleared, in order for the pin to trigger
on both edges.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:13:23 +00:00
Mike Frysinger
eaf863cd1e sim: bfin: fix clear/set/toggle GPIO handling
The clear/set/toggle MMRs aren't backed by "real" data; they implicitly
perform bit operations on the associated data register.  So when we go
to process writes to them, we need to adjust the pointer accordingly so
that the actual backing data is modified.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-25 00:12:47 +00:00
Mike Frysinger
b16a1f4c4f sim: bfin: document SIC limitation
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:18:17 +00:00
Mike Frysinger
9922f80319 sim: bfin: fix inverted W1C logic
When I originally wrote the w1c helper funcs, I used it in a few places.
Then I forgot how it worked and when I later documented it, I described
the 3rd arg in the exact opposite way it is actually used.  This error
propagated to a bunch of devices registers that were not explicitly
tested (a bunch of the devices are stubs which merely exist to say "no
device is connected" to make device drivers happy).

So once the documentation is unscrewed, fix all of the broken call sites.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:17:14 +00:00
Mike Frysinger
2d2bab5b21 sim: bfin: define more UART LSR bits
We'll need these bits in an upcoming patch, so map out the whole
LSR MMR now.

Fix up indentation style while we're here.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:16:50 +00:00
Mike Frysinger
972dbc8ade sim: bfin: fix typo in TWI stat reg
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:16:22 +00:00
Mike Frysinger
8e670c0a3f sim: bfin: update VIT_MAX behavior to match hardware when Acc.X bits are set
The Blackfin PRM says that the top 8 bits of the accumulator must be
cleared when using the VIT_MAX insn, so the sim has followed this spec.
Matching the hardware behavior though when the high bits are not cleared
is easy to do and doesn't break existing behavior, so go for it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:14:20 +00:00
Mike Frysinger
de0addfbef sim: bfin: always do 16bit sign extension with the SEARCH insn
The Blackfin PRM does not cover this case, but the hardware is clear: even
if the search criteria is not met (and thus a new 16bit value is loaded up
into the accumulator), the accumulator undergoes 16bit sign extension.  So
simply reload the low signed 16bits in that case.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:13:32 +00:00
Mike Frysinger
beb378a5f2 sim: bfin: update AV and AC ASTAT bits with acc negation
The Acc=-Acc insn can overflow or carry with edge values, so make sure
we update the ASTAT bits accordingly to match the hardware.  Also fix
a thinko where we always updated AC0 even when working with A1 regs.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:12:16 +00:00
Mike Frysinger
e4a861d14b sim: bfin: fix thinko in SIC pin encoding
When encoding the SIC/pin info into unique input port ids, I used bases
of 100 when I meant to use 0x100.  Rather than simply fix the decoding
math in the different functions, create a few helper macros to simplify
the SIC/pin encoding and decoding steps.  This makes the resulting tables
nice & clear.

And now that pins are clear, the 533 and 537 port_event handlers may
easily be merged into one.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:11:08 +00:00
Mike Frysinger
8d8a97461a sim: bfin: allow byteop[123]p src regs to be the same
The hardware allows the byteop[123]p insns to use the same src reg pair,
so remove the combination check in the sim.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:08:15 +00:00
Mike Frysinger
a9c3ef4760 sim: bfin: fix thinko in bfin_gpio bus addresses
The bus addresses have to be valid numbers, so 'g' and 'h' won't work.
Oddly, the common code silently ignored this which is why I didn't notice
in the first place.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24 03:07:33 +00:00
Kevin Buettner
165b70ea60 * gennltvals.sh: Search sys/_default_fcntl.h, in addition to
fcntl.h and sys/fcntl.h, for constants.
	* nltvals.def: Regenerate.
	* sim-io.c (sim_io_stat, sim_io_fstat): New functions.
	* sim-io.h (sys/types.h, sys/stat.h): Include.
	(sim_io_stat, sim_io_fstat): Declare.
2011-03-21 22:06:55 +00:00
Kevin Buettner
d0f0baa272 * simops (OP_10007E0): Update errno handling as most traps
do not invoke the host's functionality directly.  Invoke
	sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
	Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
2011-03-21 22:05:56 +00:00
Mike Frysinger
9e6584c9a0 sim: bfin: check for kill/pread
If the host system (like Windows) doesn't support these functions,
then make sure we don't use them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-17 19:03:30 +00:00
Mike Frysinger
b5215db0ff sim: bfin: add GPIO device simulation
This takes care of the MMR interface and pushing up interrupts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 21:01:45 +00:00
Mike Frysinger
81d126c3be sim: bfin: fix brace style 2011-03-15 20:55:11 +00:00
Mike Frysinger
990d19fd6d sim: bfin: fix brace style 2011-03-15 20:44:11 +00:00
Mike Frysinger
227d265839 sim: bfin: handle AZ updates with 16bit adds/subs
We weren't updating AZ when doing a 16bit add or sub insn.  Implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:10:40 +00:00
Mike Frysinger
e3809a37d4 sim: bfin: skip acc/ASTAT updates for moves
No point in moving unchanged acc values to the acc regs, and avoid
updating the acc ASTAT bits when only reading.  This fixes incorrect
changing of the ASTAT bits when they're only being read.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:10:12 +00:00
Mike Frysinger
86d3d8de68 sim: bfin: handle AN (negative overflows) in dsp mult insns
The current dsp mult handler does not take care of overflows which turn
values negative (and thus set AN in ASTAT).  So implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:39 +00:00
Mike Frysinger
9b7509d900 sim: bfin: handle V overflows in dsp mult insns
The current dsp mult handler does not take care of overflows and updating
the V ASTAT bit.  So implement it.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:09:09 +00:00
Mike Frysinger
bf416ccded sim: bfin: decode ASTAT on failure
When testing ASTAT regs, specific bit differences carry a lot more meaning
than when checking the value of a data register.  So automatically decode
the bits of the two values and print things out so that people don't have
to manually do it themselves every time.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:08:27 +00:00
Mike Frysinger
c9329594d4 sim: bfin: handle saturation with fract multiplications
The saturation behavior with fract modes differs from non-fract modes.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-15 20:04:04 +00:00
Mike Frysinger
028f651542 sim: common: trim trailing whitespace 2011-03-15 03:16:17 +00:00
Mike Frysinger
f4e33aa6c5 sim: bfin: forgot to cvs add the changelog 2011-03-14 22:24:30 +00:00
Mike Frysinger
ef016f835f sim: bfin: new port
This can boot Das U-Boot and a Linux kernel.  It also supports Linux
userspace FLAT and FDPIC (dynamic and static) ELFs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-06 00:20:21 +00:00
Kevin Buettner
fee17b3562 * callback.c (fdbad): Return EBADF rather than EINVAL for bad
file descriptors.
2011-02-25 22:28:57 +00:00
Mike Frysinger
d79fe0d643 sim: punt zfree()
The sim keeps track of which allocations are zero-ed internally (via
zalloc) and then calls a helper "zfree" function rather than "free".
But this "zfree" function simply calls "free" itself.  Since I can
see no point in this and it is simply useless overhead, punt it.

The only real change is in hw-alloc.c where we remove the zalloc_p
tracking, and sim-utils.c where zfree is delete.  The rest of the
changes are a simple `sed` from "zfree" to "free".

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-14 05:14:28 +00:00
Mike Frysinger
891e7fb179 sim: change to 64bit time keeping to avoid 32bit overflows
The sim-events code jumps through some hoops to avoid using 64bit math
to manage the current time.  One fundamental assumption here is that by
constantly scheduling the sim poll event a short time into the future,
the 64bit difference will always fall into a signed 32bit value.  This
does work most of the time, except for when processing the sim poll event
itself.

Normally, sim_events_process() will dequeue the sim poll event, update
the current time (time_from_event) according to the next pending event,
process the sim poll event (which will then requeue the sim poll event),
and then continue on.

The problem here of course is that the current time is updated in that
small window before the sim poll event gets a chance to reschedule itself.
So if the 64bit difference between the current time and the next event
does not fit into the signed 32bit value, time_from_event overflows, and
the internal assert at the end of update_time_from_event() triggers.

Since attempts at tweaking sim_events_process() logic introduced other
subtle bugs (due to tangled assumptions between most pieces of the sim
time keeping code), change the time_from_event to a real 64bit value.
Tests on my system between a 32bit ELF and a 64bit ELF show no practical
difference (it's all lost in the system noise).  Basically, I booted a
Linux kernel to userspace and then paniced it; this gave me a constant
sample size of about 18 million insns.

This was noticed when simulating Blackfin Das U-Boot.  The simulated core
timer is given the max unsigned timeout value possible on a 32bit processor
(0xffffffff).  This timeout value is used directly to schedule a hw event
in the sim future (the IRQ firing).  Once the sim poll event is kicked off,
the next pending event is the core timer event which is more than 2^31
ticks in the future, and the sim aborts with:
sim-events.c:435: assertion failed - current_time == sim_events_time (sd)

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-14 04:58:12 +00:00
Mike Frysinger
9bd90cce51 sim: enable hw_tree_delete in sim_hw_uninstall
I can't find any history for why the call to hw_tree_delete is commented
out, and the VCS history shows that this goes back to the original import
in 2009.  I did find some vague reference to it from 2000 (pretty close
to the original import of code), but no actual details.

Without this call, every new instance of the sim results in all old
previously allocated resources being leaked.  With some devices, this
isn't just memory, it's things like open file descriptors or mmaps.

So if there are pending issues with this, I'd rather we get the sims
sorted out rather than continuing to leak this stuff.  Especially since
the "let's wait for the sims to fix themselves" hasn't actually happened
in the last 10+ years.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-12 22:10:46 +00:00
Mike Frysinger
39a3ae0a21 sim: check asprintf return values
These are the last sources of build warnings (asprintf usage) that I see.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-12 21:58:08 +00:00
Mike Frysinger
3143e5a930 sim: allow memory maps to default to mapped files
I find it annoying when using --memory-mapfile that I also need to look
up and manually specify the file size to the following --memory-region
option.  So make a length of 0 in the following --memory-region trigger
an auto-sizing of the map to the length of the file being mapped.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-11 17:58:56 +00:00
Andrew Burgess
dae477fed8 http://sourceware.org/ml/gdb-patches/2010-11/msg00112.html
gdb/ChangeLog
	* remote-sim.c (gdbsim_store_register): Update API to
	sim_store_register to check more error conditions.
include/gdb/ChangeLog
	* remote-sim.h (sim_store_register): Update the API
	documentation for this function.
sim/erc32/ChangeLog
sim/h8300/ChangeLog
sim/m32c/ChangeLog
sim/mn10300/ChangeLog
sim/ppc/ChangeLog
sim/rx/ChangeLog
sim/v850/ChangeLog
	* ???.c (sim_store_register): Update return value to
	match new API.
2011-01-11 14:19:34 +00:00
Mike Frysinger
cb11d1f450 sim: fix handling of 2nd arg to SIM_AC_OPTION_HARDWARE
The 2nd arg to SIM_AC_OPTION_HARDWARE is described as "a space separated
list of devices that override the defaults" while the 3rd arg is "a space
separated list of extra target specific devices".  But the macro doesn't
seem to treat the 2nd arg this way.

Instead, it will always add the default list of devices, and only add the
extra target specific devices if the 2nd arg is not specified.  So rework
the logic slightly to handle the 2nd arg as documented.

This shouldn't affect any targets in the tree as no one passes in a non-
empty value as the 2nd arg.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10 21:53:27 +00:00
Mike Frysinger
5f78776ab1 sim: add noreturn markings to more hw abort/halt funcs
These functions either call abort() themselves, or call functions which
are already marked noreturn.  Either way, they don't return, so mark them
as such so calling code can assume this.  This fixes some uninitialized
warnings due to code paths that end in an abort function.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-10 21:52:08 +00:00
Hans-Peter Nilsson
e88b07bd4a * testutils.inc: Correct comment syntax fallout from
copyright update.
	* utils-dsp.inc, utils-fpu.inc, utils-mdmx.inc: Ditto.
2011-01-05 23:12:37 +00:00
Hans-Peter Nilsson
4f6ca12b0f * mips32-dsp.s: Update copyright year. 2011-01-05 23:10:39 +00:00
Mike Frysinger
85ab1af87c sim: ignore generated hw-config.h
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-05 17:17:44 +00:00
Mike Frysinger
cc25892bf4 sim: tweak load buffer type to avoid signed warnings
The sim_load_file func creates a buffer with arbitrary data in it (reads
it via the bfd).  It then passes it on to a sim_write_fn which expects a
unsigned char buffer.  Since sim_load_file itself doesn't care about the
contents, tweak the type to avoid signed mismatch warnings from gcc:

common/sim-load.c: In function ‘sim_load_file’:
common/sim-load.c:143: warning: pointer targets in passing argument 3 of ‘do_write’ differ in signedness
common/sim-load.c:143: note: expected ‘const unsigned char *’ but argument is of type ‘char *’

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-05 17:13:36 +00:00
Joel Brobecker
2e0ddd9263 Copyright year update in sim/ppc/psim.texinfo
sim/ppc/ChangeLog:

       * psim.texinfo: Copyright year update.
2011-01-05 06:01:36 +00:00
Joel Brobecker
449444484c Update the copyright year for most remaining files in GDB 2011-01-05 05:09:55 +00:00
Joel Brobecker
7b6bb8daac run copyright.sh for 2011. 2011-01-01 15:34:07 +00:00
Mike Frysinger
e71b81d85f sim: HW_NALLOC: new alloc helper
We have malloc (uninitialized buffer), zalloc (zeroed buffer), and
nzalloc (zeroed array).  But we don't have a way to allocate an
uninitialized array.  Add a HW_NALLOC to fill this gap.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-29 02:51:40 +00:00
Mike Frysinger
e61ddca7fa sim: HW_NZALLOC: fix arg handling
The HW_NZALLOC macro has all caps args for some reason (unlike the other
alloc helpers), and ends up not using the "ME" argument since its copy
and paste source uses "me".  Make all the args lowercase to match the
style of all the other args and make it use the correct "me".

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-29 02:50:35 +00:00
Mike Frysinger
fdb38a1c7f sim: start a gitignore 2010-12-23 21:15:25 +00:00
Mike Frysinger
bef6be3d9f sim: add --map-info option
There are options for listing the current device/hw tree and memory
regions, but no way to find out at run time all the current mappings.
So add a new --map-info option akin to the --memory-info option which
displays all the current mappings.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-12-15 11:50:46 +00:00
DJ Delorie
45eb4d476d (decode_opcode): RXO_branchrel is relative to the opcode's PC, not
the address following the opcode.
2010-12-14 23:39:03 +00:00
DJ Delorie
29cfc22f89 * rx.c (decode_opcode): For "MVFC PC,", use the address of the
opcode, not the address following the opcode.
2010-12-14 23:12:20 +00:00
Masaki Muranaka
cd006ce47a * Makefile.in: Use CC_FOR_BUILD to build opc2c. 2010-12-04 01:58:55 +00:00
Mike Frysinger
5be229c0d8 sim: profile: fix building with --disable-sim-profile
When the sim is configured with profile support disabled, the build fails:
./../common/sim-profile.c: In function 'profile_option_handler':
./../common/sim-profile.c:337:6: warning: implicit declaration of function 'PROFILE_PC_FREQ'
./../common/sim-profile.c:337:6: error: lvalue required as left operand of assignment
./../common/sim-profile.c:351:6: warning: implicit declaration of function 'PROFILE_PC_NR_BUCKETS'
./../common/sim-profile.c:351:6: error: lvalue required as left operand of assignment
./../common/sim-profile.c:381:6: warning: implicit declaration of function 'PROFILE_PC_SHIFT'
./../common/sim-profile.c:381:6: error: lvalue required as left operand of assignment
./../common/sim-profile.c:405:8: warning: implicit declaration of function 'PROFILE_PC_START'
./../common/sim-profile.c:405:8: error: lvalue required as left operand of assignment
./../common/sim-profile.c:406:8: warning: implicit declaration of function 'PROFILE_PC_END'
./../common/sim-profile.c:406:8: error: lvalue required as left operand of assignment
./../common/sim-profile.c: In function 'profile_uninstall':
./../common/sim-profile.c:1299:7: warning: implicit declaration of function 'PROFILE_INSN_COUNT'
./../common/sim-profile.c:1299:37: warning: comparison between pointer and integer
./../common/sim-profile.c:1300:2: warning: passing argument 1 of 'zfree' makes pointer from integer without a cast
../common/sim-utils.h:30:6: note: expected 'void *' but argument is of type 'int'
make[2]: *** [sim-profile.o] Error 1

So add some stubs similar to how some of the other subsystems are
stubbed out so things build correctly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-23 02:48:54 +00:00
Mike Frysinger
81c641e707 sim: cast away hw/device differences
When building with device and hw support, the sim-core code generates a
lot of build time warnings such as:

./../common/sim-core.c: In function 'sim_core_map_attach':
./../common/sim-core.c:198:7: warning: passing argument 1 of 'device_error' from incompatible pointer type
../common/sim-core.h:347:6: note: expected 'struct device *' but argument is of type 'struct hw *'
./../common/sim-core.c:235:7: warning: passing argument 1 of 'device_error' from incompatible pointer type
../common/sim-core.h:347:6: note: expected 'struct device *' but argument is of type 'struct hw *'

In reality, these two structures get cast back and forth in the core
code already and so are "compatible".  So tweak the three functions
that generate all of these warnings to include the casts automatically.
I know this isn't exactly clean, but the current device/hw ifdef
approach is full of landmines itself and I'm not entirely sure how
to unscrew it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-23 02:45:29 +00:00
Mike Frysinger
6ab5626b08 sim: dv-sockser: add a write buffer variant
Rather than having to bang out chunks of data one byte at a time over
the socket interface, add a write variant that accepts an arbitrarily
long buffer.  This speeds things up considerably when we have many
chars to send out at once.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-11-16 19:10:29 +00:00
DJ Delorie
5cbc4f2ea1 * rx.c (lsb_count): New.
(divu_cycles): New.
(div_cycles): New.
(decode_opcode): Fix cycle count math for div, divu, suntil, and
swhile.
2010-11-12 01:01:12 +00:00
Alan Modra
bfc85bc6fc Regenerate for bool -> bool_ change 2010-10-09 07:56:18 +00:00
Hans-Peter Nilsson
0bd15c7fb2 * callback.c (os_lseek): Call wrap on lseek result. 2010-10-06 23:45:44 +00:00
Hans-Peter Nilsson
7cf1d8af2f * traps.c (cris_break_13_handler): Pass lseek
offset parameter as sign-extended.
2010-10-06 23:44:33 +00:00
Hans-Peter Nilsson
1c3e1c03ee * sim/cris/c/seek3.c, sim/cris/c/seek4.c: New tests. 2010-10-06 23:41:20 +00:00
Kevin Buettner
e4dcb66415 * mem.c (rx_mem_ptr): When invalidating the decode cache, account
for the fact that the instruction decoder never uses swapped
	addresses.
2010-09-30 00:03:23 +00:00
Nick Clifton
5f79eb72c2 * rx.c (decode_opcode: RXO_int): Only break out of the emulation
loop if rx_syscall() does not return a RX_STEPPED result.
2010-09-29 15:47:45 +00:00
Kevin Buettner
e537977262 * rx.c (decode_opcode): Add cycle information for RXO_smovu. 2010-09-24 05:18:23 +00:00
Kevin Buettner
3c7be86bc0 Fix typo in ChangeLog entry. 2010-09-24 04:45:08 +00:00
Kevin Buettner
be380a3ea0 * cpu.h (reset_decoder): Declare.
* load.c (rx_load): Call `reset_decoder'.
	* rx.c (reset_decoder): New function.
2010-09-23 23:42:53 +00:00
Kevin Buettner
6607c80d6b * rx.c (decode_opcode): Declare `rx' as unsigned. 2010-09-23 23:26:42 +00:00
Kevin Buettner
8d794149aa * fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include. 2010-09-23 23:05:28 +00:00
Hans-Peter Nilsson
9a1ac77684 * sim/cris/asm/nonvcv32.ms: Neutralize changed &&-in-macro gas syntax. 2010-08-24 01:14:38 +00:00
DJ Delorie
f9c7014e9c [include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.

[opcodes]

* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.

[sim/rx]

* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New.  We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache.  Save
decoded opcode information and re-use.  Call DO_RETURN instead of
return throughout.  Remove ediv and edivu.
* mem.c (ptdc): New.  Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here.  Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-29 18:41:28 +00:00
DJ Delorie
8d94ec8331 Sort *alphabetically* this time 2010-07-28 22:31:09 +00:00
DJ Delorie
933786524e [sim/rx]
* README.txt: New.
* config.h (CYCLE_ACCURATE, CYCLE_STATS): New.
* configure.in (--enable-cycle-accurate, --enable-cycle-stats):
New.  Default to enabled.
* configure: Regenerate.

* cpu.h (regs_type): Add cycle tracking info.
(reset_pipeline_stats): Declare.
(halt_pipeline_stats): Declare.
(pipeline_stats): Declare.
* main.c (done): Call pipeline_stats().
* mem.h (rx_mem_ptr): Moved to here ...
* mem.c (mem_ptr): ... from here.  Rename throughout.
(mem_put_byte): Move LEDs to Port A.  Add Port B to control cycle
statistics.  Move UART to SCI4.
(mem_put_hi): Add TPU 1-2.  TPU 1 and 2 count CPU cycles.
* reg.c (init_regs): Set Rt reg to -1 (no reg).
* rx.c: Add cycle counting and statistics throughout.
(rx_get_byte): Optimize for speed.
(decode_opcode): Likewise.
(reset_pipeline_stats): New.
(halt_pipeline_stats): New.
(pipeline_stats): New.
* trace.c (sim_disasm_one): Print cycle count.

[include/opcode]
* rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-28 21:58:22 +00:00