Commit Graph

97 Commits

Author SHA1 Message Date
Jim Wilson 50b81f1903 Fix 3 DV bugs, and a few minor cleanups.
gas/
	* config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle
	postincrement modified registers.  Handle IA64_OPND_R3_2 addl
	source registers.
	(note_register_values): Handle IA64_OPND_R3_2 operands.
gas/testsuite/
	* gas/ia64/dv-raw-err.s: Add new tests for addl and postinc.
	* gas/ia64/dv-raw-err.l: Likewise.
	* gas/ia64/dv-waw-err.l: Update sed pattern.
	* gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment.
	* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
include/opcode/
	* ia64.h (IA64_OPCODE_POSTINC): New.
opcodes/
	* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds.  Delete
	break, mov-immediate, nop.
	* ia64-opc-f.c: Delete fpsub instructions.
	* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
	address operand.  Rewrite using macros to avoid long lines.
	* ia64-opc.h (POSTINC): Define.
	* ia64-asmtab.c: Regenerate.
2000-08-16 23:20:15 +00:00
H.J. Lu fc29466dba 2000-08-15 H.J. Lu <hjl@gnu.org>
* i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
	IgnoreSize change.
2000-08-16 17:29:23 +00:00
Jason Eckhardt 305d537e30 gas:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* config/tc-i860.h: Rework completely for BFD_ASSEMBLER.
	(i860_fix_info): New enum.
	(MD_APPLY_FIX3): Define.
	(WORKING_DOT_WORD): Define.
	(TC_HANDLES_FX_DONE): Define.
	(DIFF_EXPR_OK): Define.
	(LISTING_HEADER): Define.
	(TARGET_FORMAT): Select target format based on endian flag.
	(TARGET_BYTES_BIG_ENDIAN): Default to little endian.
	(target_big_endian): Add external declaration.

	* config/tc-i860.c: All existing code reworked completely. Other
	new code shown below.
	(SYNTAX_SVR4): Define.
	(target_warn_expand): New variable.
	(md_shortopts): Declare and define (-Qy, -Qn, and -V options).
	(md_longopts): Declare and define with new options (-EL, -EB,
	and -mwarn-expand).
	(md_show_usage): New function.
	(md_operand): New function.
	(obtain_reloc_for_imm16): New function.
	(md_apply_fix3): New function.
	(tc_gen_reloc): New function.

include:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* opcode/i860.h: Small formatting adjustments.

opcode:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* i860-dis.c (print_br_address): Change third argument from int
	to long.

bfd:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>
	* elf32-i860.c (elf32_i860_howto_table): Updated some fields.
2000-08-09 03:33:42 +00:00
Denis Chertykov 45ee1401ab * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
Move related opcodes closer to each other.
	Minor changes in comments, list undefined opcodes.
2000-08-06 14:09:14 +00:00
Jason Eckhardt 9d75133528 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
	to use sbroff ('r') instead of split16 ('s').
	(J, K, L, M): New operand types for 16-bit aligned fields.
	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
	use I, J, K, L, M instead of just I.
	(T, U): New operand types for split 16-bit aligned fields.
	(st.x): Changed these opcodes to use S, T, U instead of just S.
	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
	exist on the i860.
	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
	(pfeq.ss, pfeq.dd): New opcodes.
	(st.s): Fixed incorrect mask bits.
	(fmlow): Fixed incorrect mask bits.
	(fzchkl, pfzchkl): Fixed incorrect mask bits.
	(faddz, pfaddz): Fixed incorrect mask bits.
	(form, pform): Fixed incorrect mask bits.
	(pfld.l): Fixed incorrect mask bits.
	(fst.q): Fixed incorrect mask bits.
	(all floating point opcodes): Fixed incorrect mask bits for
	handling of dual bit.

	* include/elf/i860.h: New file.
	(elf_i860_reloc_type): Defined ELF32 i860 relocations.

	* bfd/cpu-i860.c: Added comments.

	* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
	bfd_elf32_i860_little_vec.
	(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
	(ELF_MAXPAGESIZE): Changed to 4096.

	* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
	new target.
	(bfd_target_vector): Added bfd_elf32_i860_little_vec.

	* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
	config for little endian elf32 i860.
	(targ_defvec): Define for the new config above
	as "bfd_elf32_i860_little_vec".
	(targ_selvecs): Define for the new config above
	as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"

	* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
	of new target vec.

	* bfd/configure: Regenerated.

	* opcodes/i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* opcodes/disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* include/dis-asm.h (print_insn_i860): Add prototype.

	* opcodes/Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* opcodes/configure.in: New bits for bfd_i860_arch.

	* opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
Dave Brolley 9d551405de 2000-07-26 Dave Brolley <brolley@redhat.com>
* cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
2000-07-26 22:44:42 +00:00
Hans-Peter Nilsson c848861769 cris.h: New file. 2000-07-20 15:39:41 +00:00
Nick Clifton 65aa24b6e8 Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR port. 2000-06-27 01:45:30 +00:00
Nick Clifton 60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Denis Chertykov 60a2978a70 * avr.h: clr,lsl,rol, ... moved after add,adc, ... 2000-06-09 18:02:05 +00:00
Denis Chertykov 68ab2dd99e * avr.h: New file with AVR opcodes. 2000-06-07 17:48:35 +00:00
Donald Lindsay f0662e279c Define the ALONE flag bit, for use in the opcode table. 2000-05-25 22:23:45 +00:00
Alan Modra b722f2be22 Allow d suffix on iret 2000-05-23 00:36:39 +00:00
Alan Modra f9e0cf0b83 Fix fild. 2000-05-17 00:47:51 +00:00
Frank Ch. Eigler f660ee8b2e * cgen/opcodes fix
* approved by nickc

[opcodes/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* fr30-desc.h: Partially regenerated to account for changed
	CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
	* m32r-desc.h: Ditto.

[include/opcode/ChangeLog]
2000-05-16  Frank Ch. Eigler  <fche@redhat.com>

	* cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32.  Check that
	it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
	(CGEN_MAX_IFMT_OPERANDS): Increase to 16.  Check that it exceeds
	CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
2000-05-16 19:28:07 +00:00
Alan Modra 558b0a60a8 Fix cpu_flags for sys{enter,exit} fx{save,restore} 2000-05-13 14:01:54 +00:00
Alan Modra e413e4e996 `.arch cpu_type' pseudo for x86. 2000-05-13 09:26:23 +00:00
Timothy Wall 5c84d377b6 Support for tic54x target. 2000-05-06 17:14:34 +00:00
J.T. Conklin 966f959b21 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
(PPC_OPERAND_VR): New operand flag for vector registers.
2000-05-03 22:19:45 +00:00
Jeff Law c5d05dbb5e * h8300.h (EOP): Add missing initializer. 2000-05-01 16:55:50 +00:00
Jeff Law a7fba0e099 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
        New operand types l,y,&,fe,fE,fx added to support above forms.
        (pa_opcodes): Replaced usage of 'x' as source/target for
        floating point double-word loads/stores with 'fx'.

Fr
2000-04-21 21:04:04 +00:00
Jim Wilson 800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Nick Clifton ba23e138c9 Fix value of SHORT_A1.
Move SHORT_AR to end of list of short instructions.
2000-03-27 20:17:02 +00:00
Alan Modra d0b4722035 Mostly cosmetic. Fixes to comments. Don't start as_bad and as_warn
messages with capital.  Don't malign Unixware, malign SysV386 instead.
2000-03-26 14:13:02 +00:00
Nick Clifton 866afedcb4 Apply patch for 100679 2000-03-02 23:01:40 +00:00
Alan Modra cc5ca5ce51 Extend the i386 gas testsuite to do some tests for intel_syntax. Fix all
the errors exposed by this addition.  These were intel mode
"fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al".
The failure with intel "out dx,al" was also present in att "out al,dx".
Extend testsuite to catch this case too.
2000-02-25 11:41:12 +00:00
Nick Clifton 68e324a2b8 Rename 'flags' to 'signed_overflow_ok_p' 2000-02-24 23:57:23 +00:00
Andrew Haley 60f036a265 2000-02-24 Andrew Haley <aph@cygnus.com>
* cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
        (CGEN_CPU_TABLE): flags: new field.
        Add prototypes for new functions.
2000-02-24 21:56:53 +00:00
Alan Modra 9b9b5cd47d Forgot Changelog for last i386.h change. 2000-02-24 12:41:54 +00:00
Alan Modra 7f3f1ea2a1 Correct intel_syntax fsub* and fdiv* handling. Oh, how I'd like to be rid
of UNIXWARE_COMPAT.
2000-02-24 12:40:45 +00:00
Alan Modra 5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Chandra Chavva 20609ff761 * opcode/d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation cannot
be combined in parallel with ADD/SUBppp.
2000-02-22 20:52:14 +00:00
Andrew Haley 87f398dd6a g2000-02-22 Andrew Haley <aph@cygnus.com>
* mips.h: (OPCODE_IS_MEMBER): Add comment.
2000-02-22 19:01:25 +00:00
Andrew Haley 9a1e79ca63 ChangeLog change only. 2000-02-22 16:59:39 +00:00
Andrew Haley 367c01aff9 1999-12-30 Andrew Haley <aph@cygnus.com>
* mips.h (OPCODE_IS_MEMBER): Add gp32 arg.
2000-02-22 14:39:20 +00:00
Alan Modra add0c67765 Cosmetic changes to tc-i386.[ch] + extend x86 gas testsuite jmp and
call tests + tweak intel mode far call and jmp.
2000-01-15 12:06:03 +00:00
Alan Modra 3138f287b1 x86 indirect jump/call syntax fixes. Disassembly fix for lcall. 1999-12-27 16:10:31 +00:00
Jeff Law ccecd07b7e * mn10300.h: Add new operand types. Add new instruction formats. 1999-12-01 10:05:24 +00:00
Jeff Law b37e19e99a * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
instruction.
1999-11-25 03:28:22 +00:00
Gavin Romig-Koch 5fce5ddfd3 For include/opcode:
* mips.h (INSN_ISA5): New.

For opcodes:

	* mips-opc.c (I5): New.
	(abs.ps,add.ps,alnv.ps,c.COND.ps,cvt.s.pl,cvt.s.pu,cvt.ps.s
	madd.ps,movf.ps,movt.ps,mul.ps,net.ps,nmadd.ps,nmsub.ps,
	pll.ps,plu.ps,pul.ps,puu.ps,sub.ps,suxc1,luxc1): New.
1999-11-18 19:53:48 +00:00
Gavin Romig-Koch 2bd7f1f332 For include/opcode:
* mips.h (OPCODE_IS_MEMBER): New.

For gas:

	* config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
	(mips_ip): Use OPCODE_IS_MEMBER.

For opcodes:

	* mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
1999-11-01 19:29:55 +00:00
Nick Clifton 4df2b5c55e Define SHORT_AR (fix for CR: 101340) 1999-10-29 09:49:04 +00:00
Michael Meissner 446a06c9b8 Add md expression support; Cleanup alpha warnings 1999-10-18 22:29:15 +00:00
Jeff Law eca04c6a4a * hppa.h (pa_opcodes): Add load and store cache control to
instructions.  Add ordered access load and store.

        * hppa.h (pa_opcode): Add new entries for addb and addib.

        * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.

        * hppa.h (pa_opcodes):  Add entries for cmpb and cmpib.
1999-10-10 07:55:25 +00:00
Diego Novillo c43185deeb Added seven new instructions ld, ld2w, sac, sachi, slae, st and
st2w for d10v. Created new testsuite for d10v to verify new
instructions.
1999-10-07 06:17:04 +00:00
Jeff Law 146e763ae3 Add missing initializer lost in last change. 1999-09-23 15:46:33 +00:00
Jeff Law 390f858d11 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
and "be" using completer prefixes.
1999-09-23 14:29:10 +00:00
Jeff Law 8c47ebd96b * hppa.h (pa_opcodes): Add initializers to silence compiler. 1999-09-23 13:14:33 +00:00
Jeff Law ec3533da58 * hppa.h: Update comments about character usage. 1999-09-23 13:10:07 +00:00
Jeff Law 18369bea46 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
up the new fstw & bve instructions.
1999-09-20 09:57:19 +00:00