Commit Graph

160229 Commits

Author SHA1 Message Date
David Malcolm 082284da9d Fix ICE for missing header fix-it hints with overlarge #line directives (PR c/84852)
PR c/84852 reports an ICE inside diagnostic_show_locus when printing
a diagnostic for a source file with a #line >= 2^31:

  #line 7777777777
  int foo (void) { return strlen(""); }

where we're attempting to print a fix-it hint at the top of the file
and underline the "strlen" (two "line spans").

The
  #line 7777777777
won't fix within the 32-bit linenum_type, and is truncated from
  0x1cf977871
to
   0xcf977871
i.e. 3482810481 in decimal.

Such a #line is reported by -pedantic and -pedantic-errors, but we
shouldn't ICE.

The ICE is an assertion failure within layout::calculate_line_spans,
where the line spans have not been properly sorted.

The layout_ranges are stored as int, rather than linenum_type,
giving line -812156815 for the error, and line 1 for the fix-it hint.

However, line_span uses linenum_type rather than int.

line_span::comparator compares these values as int, and hence
decides that (linenum_type)3482810481 aka (int)-812156815 is less
than line 1.

This leads to this assertion failing in layout::calculate_line_spans:

1105	      gcc_assert (next->m_first_line >= current->m_first_line);

since it isn't the case that 1 >= 3482810481.

The underlying problem is the mix of types for storing line numbers:
in parts of libcpp and diagnostic-show-locus.c we use linenum_type;
in other places (including libcpp's expanded_location) we use int.

I looked at using linenum_type throughout, but doing so turned into
a large patch, so this patch fixes the ICE in a less invasive way
by merely using linenum_type more consistently just within
diagnostic-show-locus.c, and fixing line_span::comparator to properly
handle line numbers (and line number differences) >= 2^31, by using
a new helper function for linenum_type differences, computing the
difference using long long, and using the sign of the difference
(as the difference might not fit in the "int" return type imposed
by qsort).

gcc/ChangeLog:
	PR c/84852
	* diagnostic-show-locus.c (class layout_point): Convert m_line
	from int to linenum_type.
	(line_span::comparator): Use linenum "compare" function when
	comparing line numbers.
	(test_line_span): New function.
	(layout_range::contains_point): Convert param "row" from int to
	linenum_type.
	(layout_range::intersects_line_p): Likewise.
	(layout::will_show_line_p): Likewise.
	(layout::print_source_line): Likewise.
	(layout::should_print_annotation_line_p): Likewise.
	(layout::print_annotation_line): Likewise.
	(layout::print_leading_fixits): Likewise.
	(layout::annotation_line_showed_range_p): Likewise.
	(struct line_corrections): Likewise for field m_row.
	(line_corrections::line_corrections): Likewise for param "row".
	(layout::print_trailing_fixits): Likewise.
	(layout::get_state_at_point): Likewise.
	(layout::get_x_bound_for_row): Likewise.
	(layout::print_line): Likewise.
	(diagnostic_show_locus): Likewise for locals "last_line" and
	"row".
	(selftest::diagnostic_show_locus_c_tests): Call test_line_span.
	* input.c (selftest::test_linenum_comparisons): New function.
	(selftest::input_c_tests): Call it.
	* selftest.c (selftest::test_assertions): Test ASSERT_GT,
	ASSERT_GT_AT, ASSERT_LT, and ASSERT_LT_AT.
	* selftest.h (ASSERT_GT): New macro.
	(ASSERT_GT_AT): New macro.
	(ASSERT_LT): New macro.
	(ASSERT_LT_AT): New macro.

gcc/testsuite/ChangeLog:
	PR c/84852
	* gcc.dg/fixits-pr84852-1.c: New test.
	* gcc.dg/fixits-pr84852-2.c: New test.

libcpp/ChangeLog:
	* include/line-map.h (compare): New function on linenum_type.

From-SVN: r258526
2018-03-14 13:58:13 +00:00
Segher Boessenkool 1422855a40 rs6000: Fix sanitizer frame unwind on 32-bit ABIs
This fixes more than half of our testcase failures on BE.


libsanitizer/
	* sanitizer_common/sanitizer_stacktrace.cc
	(BufferedStackTrace::FastUnwindStack): Use the correct frame offset
	for PowerPC SYSV ABI.

From-SVN: r258525
2018-03-14 14:46:03 +01:00
Segher Boessenkool def703386a combine: Don't make log_links for pc_rtx (PR84780 #c10)
distribute_links tries to place a log_link for whatever the destination
of the modified instruction is.  It shouldn't do that when that dest
is pc_rtx, which isn't actually a register.


	* combine.c (distribute_links): Don't make a link based on pc_rtx.

From-SVN: r258523
2018-03-14 13:24:21 +01:00
Martin Liska af1430196a Fix tree statistics with -fmem-report.
2018-03-14  Martin Liska  <mliska@suse.cz>

	* tree.c (record_node_allocation_statistics): Use
	get_stats_node_kind.
	(get_stats_node_kind): New function extracted from
	record_node_allocation_statistics.
	(free_node): Use get_stats_node_kind.

From-SVN: r258521
2018-03-14 11:17:01 +00:00
Richard Biener 70458d76db tree-ssa-pre.c (compute_antic_aux): Remove code that asserts that the value-set of ANTIC_IN doesn't grow.
2018-03-14  Richard Biener  <rguenther@suse.de>

	* tree-ssa-pre.c (compute_antic_aux): Remove code that asserts
	that the value-set of ANTIC_IN doesn't grow.

	Revert
	* tree-ssa-pre.c (struct bb_bitmap_sets): Add visited_with_visited_succs
	member.
	(BB_VISITED_WITH_VISITED_SUCCS): New define.
	(compute_antic): Initialize BB_VISITED_WITH_VISITED_SUCCS.

From-SVN: r258520
2018-03-14 10:55:45 +00:00
Thomas Preud'homme 7b06ad56de Fix FAIL display for some scan-*-times directives
scan-assembler-times and scan-tree-dump-times dejagnu directives show a
different output in the summary files depending on whether they PASS or
FAIL. This means that dg-cmp-results would not show a regression because
it would not see a connection between the two output.

The difference comes from the FAIL showing the number of actual times
the pattern was match, presumably to help debugging. This patch moves
the info regarding the actual number of times the pattern match in a
separate verbose message. This keeps the message unchanged but let
developers have the required debug message with -v.

2018-03-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * lib/scanasm.exp (scan-assembler-times): Move FAIL debug info into a
    separate verbose message.
    * lib/scandump.exp (scan-dump-times): Likewise.

From-SVN: r258519
2018-03-14 10:47:32 +00:00
Julia Koval 79ab536427 Split-up -march=icelake on -march=icelake-server and -march=icelake-client
Split-up -march=icelake on -march=icelake-server and -march=icelake-client
gcc/
	* config.gcc (icelake-client, icelake-server): New.
	(icelake): Remove.
	* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
	(initial_ix86_arch_features): Ditto.
	(PTA_SKYLAKE): Add SGX.
	(PTA_ICELAKE): Remove.
	(PTA_ICELAKE_CLIENT): New.
	(PTA_ICELAKE_SERVER): New.
	(ix86_option_override_internal): Split up icelake on icelake client and
	icelake server.
	(get_builtin_code_for_version): Ditto.
	(fold_builtin_cpu): Ditto.
	* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
	* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
	* config/i386/i386.h (processor_type): Ditto.
	* doc/invoke.texi: Ditto.

gcc/testsuite/
	* g++.dg/ext/mv16.C: Split up icelake on icelake client and
	icelake-server.
	* gcc.target/i386/funcspec-56.inc: Ditto.

libgcc/
	* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
	icelake-client and icelake-server.

From-SVN: r258518
2018-03-14 11:26:38 +01:00
Richard Sandiford 788949a374 [AArch64] Fix mul_highpart_1_run.c markup
2018-03-14  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
	* gcc.target/aarch64/sve/mul_highpart_1_run.c: Restrict to
	aarch64_sve_hw.

From-SVN: r258517
2018-03-14 09:12:55 +00:00
Jakub Jelinek be9dd15c70 re PR sanitizer/83392 (FAIL: c-c++-common/ubsan/ptr-overflow-sanitization-1.c scan-tree-dump-times)
PR sanitizer/83392
	* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Handle also
	INTEGER_CST offset, add it together with bitpos / 8 and
	sign extend based on POINTER_SIZE.

	* c-c++-common/ubsan/ptr-overflow-sanitization-1.c: Adjust expected
	check count from 17 to 14.

From-SVN: r258516
2018-03-14 09:50:23 +01:00
Jakub Jelinek 2062c40cb5 re PR target/84844 (ICE in extract_constrain_insn_cached, at recog.c:2217 (error: insn does not satisfy its constraints))
PR target/84844
	Revert
	2017-04-20  Uros Bizjak  <ubizjak@gmail.com>

	PR target/78090
	* config/i386/constraints.md (Yc): New register constraint.
	* config/i386/i386.md (*float<SWI48:mode><MODEF:mode>2_mixed):
	Use Yc constraint for alternative 2 of operand 0.  Remove
	preferred_for_speed attribute.

	* gcc.target/i386/pr84844.c: New test.

From-SVN: r258515
2018-03-14 09:48:40 +01:00
Richard Biener ec64ffc850 re PR tree-optimization/84830 (ICE in compute_antic, at tree-ssa-pre.c:2388)
2018-03-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/84830
	* tree-ssa-pre.c (compute_antic_aux): Intersect the new ANTIC_IN
	with the old one to avoid oscillations.

	* gcc.dg/torture/pr84830.c: New testcase.

From-SVN: r258514
2018-03-14 08:07:45 +00:00
Marek Polacek 8fef0dc6a9 re PR c++/84596 (internal compiler error: unexpected expression '(bool)c' of kind implicit_conv_expr (cxx_eval_constant_expression))
PR c++/84596
	* semantics.c (finish_static_assert): Check
	instantiation_dependent_expression_p instead of
	{type,value}_dependent_expression_p.

	* g++.dg/cpp0x/static_assert15.C: New test.

From-SVN: r258513
2018-03-14 06:14:57 +00:00
Paolo Carlini 024a6f45a7 PR c++/82336 - link error with list-init default argument.
* decl.c (check_default_argument): Unshare an initializer list.

Co-Authored-By: Jason Merrill <jason@redhat.com>

From-SVN: r258512
2018-03-13 21:03:13 -04:00
Steven G. Kargl 17164de4f8 check.c (gfc_check_kill_sub): Remove check for INTEGER(4) or (8).
2018-03-13  Steven G. Kargl  <kargl@gcc.gnu.org>

	* check.c (gfc_check_kill_sub):  Remove check for INTEGER(4) or (8).
	* intrinsic.c (add_functions): Remove reference to gfc_resolve_kill.
	(add_subroutines): Remove reference to gfc_resolve_kill_sub.
	* intrinsic.texi: Update documentation.
	* iresolve.c (gfc_resolve_kill, gfc_resolve_kill_sub): Remove.
	* trans-decl.c (gfc_build_intrinsic_function_decls):  Add
	gfor_fndecl_kill and gfor_fndecl_kill_sub
	* trans-intrinsic.c (conv_intrinsic_kill, conv_intrinsic_kill_sub): new
	functions.
	(gfc_conv_intrinsic_function): Use conv_intrinsic_kill.
        (gfc_conv_intrinsic_subroutine): Use conv_intrinsic_kill_sub.
	* trans.h: Declare gfor_fndecl_kill and gfor_fndecl_kill_sub.
 
2018-03-13  Steven G. Kargl  <kargl@gcc.gnu.org>

	* libgfortran/gfortran.map: Remove _gfortran_kill_i4,
	_gfortran_kill_i4_sub, _gfortran_kill_i8, and _gfortran_kill_i8_sub.
	Add _gfortran_kill and _gfortran_kill_sub.
	* libgfortran/intrinsics/kill.c: Eliminate _gfortran_kill_i4,
	_gfortran_kill_i4_sub, _gfortran_kill_i8, and _gfortran_kill_i8_sub.
	Add _gfortran_kill and _gfortran_kill_sub.

From-SVN: r258511
2018-03-14 00:56:48 +00:00
Steven G. Kargl 10f499af34 re PR fortran/61775 (Allocatable array initialized by implied-do loop array constructor gives invalid memory reference)
2018-03-13  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/61775
	* gfortran.dg/pr61775.f90: New test.

From-SVN: r258509
2018-03-14 00:45:45 +00:00
GCC Administrator d903fdfd09 Daily bump.
From-SVN: r258508
2018-03-14 00:16:27 +00:00
Vladimir Makarov 6027ea4cd7 re PR target/83712 ("Unable to find a register to spill" when compiling for thumb1)
2018-03-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/83712
	* lra-assigns.c (find_all_spills_for): Ignore uninteresting
	pseudos.
	(assign_by_spills): Return a flag of reload assignment failure.
	Do not process the reload assignment failures.  Do not spill other
	reload pseudos if they has the same reg class.  Update n if
	necessary.
	(lra_assign): Add a return arg.  Set up from the result of
	assign_by_spills call.
	(find_reload_regno_insns, lra_split_hard_reg_for): New functions.
	* lra-constraints.c (split_reg): Add a new arg.  Use it instead of
	usage_insns if it is not NULL.
	(spill_hard_reg_in_range): New function.
	(split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg.
	* lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New
	function prototypes.
	(lra_assign): Change prototype.
	* lra.c (lra): Add code to deal with fails by splitting hard reg
	live ranges.

From-SVN: r258504
2018-03-13 20:42:49 +00:00
Jakub Jelinek 949aab190a re PR c++/84843 (C++ ICE on builtin redefinition since r258391)
PR c++/84843
	* decl.c (duplicate_decls): For redefinition of built-in, use error
	and return error_mark_node.  For redeclaration, return error_mark_node
	rather than olddecl if !flag_permissive.

	* g++.dg/ext/pr84843-1.C: New test.
	* g++.dg/ext/pr84843-2.C: New test.

From-SVN: r258503
2018-03-13 21:32:54 +01:00
Jason Merrill 515f874faf PR c++/82565 - ICE with concepts and generic lambda.
* pt.c (instantiate_decl): Clear fn_context for lambdas.

From-SVN: r258502
2018-03-13 16:22:31 -04:00
Jason Merrill f71c1a187b PR c++/84720 - ICE with rvalue ref non-type argument.
* pt.c (convert_nontype_argument): Handle rvalue references.

From-SVN: r258501
2018-03-13 14:58:15 -04:00
Jason Merrill a651578441 PR c++/84839 - ICE with decltype of parameter pack.
* pt.c (tsubst_pack_expansion): Set cp_unevaluated_operand while
	instantiating dummy parms.

From-SVN: r258500
2018-03-13 14:57:10 -04:00
Palmer Dabbelt a7af848991 RISC-V: Add and document the "-mno-relax" option
RISC-V relies on aggressive linker relaxation to get good code size.  As
a result no text symbol addresses can be known until link time, which
means that alignment must be handled during the link.  This alignment
pass is essentially just another linker relaxation, so this has the
unfortunate side effect that linker relaxation is required for
correctness on many RISC-V targets.

The RISC-V assembler has supported an ".option norelax" for a long time
because there are situations in which linker relaxation is a bad idea --
the canonical example is when trying to materialize the initial value of
the global pointer into a register, which would otherwise be relaxed to
a NOP.  We've been relying on users who want to disable relaxation for
an entire link to pass "-Wl,--no-relax", but that still relies on the
linker relaxing R_RISCV_ALIGN to handle alignment despite it not being
strictly necessary.

This patch adds a GCC option, "-mno-relax", that disable linker
relaxation by adding ".option norelax" to the top of every generated
assembly file.  The assembler is smart enough to handle alignment at
assemble time for files that have never emitted a relaxable relocation,
so this is sufficient to really disable all relaxations in the linker,
which results in significantly faster link times for large objects.

This also has the side effect of allowing toolchains that don't support
linker relaxation (LLVM and the Linux module loader) to function
correctly.  Toolchains that don't support linker relaxation should
default to "-mno-relax" and error when presented with any R_RISCV_ALIGN
relocation as those need to be handled for correctness.

gcc/ChangeLog

2018-03-13  Palmer Dabbelt  <palmer@sifive.com>

        * config/riscv/riscv.opt (mrelax): New option.
        * config/riscv/riscv.c (riscv_file_start): Emit ".option
        "norelax" when riscv_mrelax is disabled.
        * doc/invoke.texi (RISC-V): Document "-mrelax" and "-mno-relax".

From-SVN: r258499
2018-03-13 18:35:06 +00:00
David Pagan ada6bad978 PR c/46921 Lost side effect when struct initializer expression uses comma operator
This patch fixes improper handling of comma operator expression in a
struct field initializer as described in:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46921

Currently, function output_init_element () does not evaluate the left
hand expression in a comma operator that's used for a struct
initializer field if the right hand side is zero-sized. However, the
left hand expression must be evaluated if it's found to have side
effects (for example, a function call).

Patch was successfully bootstrapped and tested on x86_64-linux.

gcc/c:
2018-03-13  David Pagan  <dave.pagan@oracle.com>

	PR c/46921
	* c-typeck.c (output_init_element): Ensure field initializer
	expression is always evaluated if there are side effects.

gcc/testsuite:
2018-03-13  David Pagan  <dave.pagan@oracle.com>

	PR c/46921
	* gcc.dg/pr46921.c: New test.

From-SVN: r258497
2018-03-13 18:10:09 +00:00
Aaron Sawdey b34f5c5e69 re PR target/84743 (default widths for parallel reassociation now hurt rather than help)
2018-03-13  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

	PR target/84743
	* config/rs6000/rs6000.c (rs6000_reassociation_width): Disable parallel
	reassociation for int modes.

From-SVN: r258495
2018-03-13 11:28:09 -05:00
Jason Merrill 1d500c2516 Pedwarn about auto parameter even without -Wpedantic.
* parser.c (cp_parser_simple_type_specifier): Pedwarn about auto
	parameter even without -Wpedantic.

From-SVN: r258494
2018-03-13 11:55:44 -04:00
Jason Merrill 426c1e2ec7 PR c++/84798 - ICE with auto in abstract function declarator.
* parser.c (cp_parser_parameter_declaration_clause): Check
	parser->default_arg_ok_p.

From-SVN: r258493
2018-03-13 11:55:07 -04:00
Martin Sebor f99309b288 PR tree-optimization/84725 - enable attribute nonstring for all narrow character types
gcc/c-family/ChangeLog:

	PR tree-optimization/84725
	* c-attribs.c (handle_nonstring_attribute): Allow attribute nonstring
	with all three narrow character types, including their qualified forms.

gcc/testsuite/ChangeLog:

	PR tree-optimization/84725
	* c-c++-common/Wstringop-truncation-4.c: New test.
	* c-c++-common/attr-nonstring-5.c: New test.

From-SVN: r258492
2018-03-13 09:33:16 -06:00
Richard Sandiford 9bfb28ed3c [SLP/AArch64] Fix unpack handling for big-endian SVE
I hadn't realised that on big-endian targets, VEC_UNPACK*HI_EXPR unpacks
the low-numbered lanes and VEC_UNPACK*LO_EXPR unpacks the high-numbered
lanes.  This meant that both the SVE patterns and the handling of
fully-masked loops were wrong.

The patch deals with that by making sure that all vec_unpack* optabs
are define_expands, using BYTES_BIG_ENDIAN to choose the appropriate
define_insn.  This in turn meant that we can get rid of the duplication
between the signed and unsigned patterns for predicates.  (We provide
implementations of both the signed and unsigned optabs because the sign
doesn't matter for predicates: every element contains only one
significant bit.)

Also, the float unpacks need to unpack one half of the input vector,
but the unpacked upper bits are "don't care".  There are two obvious
ways of handling that: use an unpack (filling with zeros) or use a ZIP
(filling with a duplicate of the low bits).  The code previously used
unpacks, but the sequence involved a subreg that is semantically an
element reverse on big-endian targets.  Using the ZIP patterns avoids
that, and at the moment there's no reason to prefer one over the other
for performance reasons, so the patch switches to ZIP unconditionally.
As the comment says, it would be easy to optimise this later if UUNPK
turns out to be better for some implementations.

2018-03-13  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks):
	Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR
	for big-endian.
	* config/aarch64/iterators.md (hi_lanes_optab): New int attribute.
	* config/aarch64/aarch64-sve.md
	(*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to...
	(aarch64_sve_<perm_insn><perm_hilo><mode>): ...this.
	(*extend<mode><Vwide>2): Rename to...
	(aarch64_sve_extend<mode><Vwide>2): ...this.
	(vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand,
	renaming the old pattern to...
	(aarch64_sve_punpk<perm_hilo>_<mode>): ...this.  Only define
	unsigned packs.
	(vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a
	define_expand, renaming the old pattern to...
	(aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this.
	(*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete.
	(vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into
	account when deciding which SVE instruction the optab should use.
	(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise.

gcc/testsuite/
	* gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Expect zips rather
	than unpacks.
	* gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise.
	* gcc.target/aarch64/sve/unpack_float_1.c: Likewise.

From-SVN: r258489
2018-03-13 15:13:37 +00:00
Richard Sandiford 80c13ac5ec [AArch64] Add a tlsdesc call pattern for SVE
tlsdesc calls are guaranteed to preserve all Advanced SIMD registers,
but are not guaranteed to preserve the SVE extension of them.
The calls also don't preserve the SVE predicate registers.

The long-term plan for handling the SVE vector registers is CLOBBER_HIGH,
which adds a clobber equivalent of TARGET_HARD_REGNO_CALL_PART_CLOBBERED.
The pattern can then directly model the fact that the low 128 bits are
preserved and the upper bits are clobbered.

However, it's too late now for that to be included in GCC 8, so this
patch conservatively treats the whole vector register as being clobbered.
This has the obvious disadvantage that compiling for SVE can make NEON
code worse, but I don't think there's much we can do about that until
CLOBBER_HIGH is in.

2018-03-13  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM)
	(V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM)
	(P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM)
	(P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants.
	(tlsdesc_small_<mode>): Turn a define_expand and use
	tlsdesc_small_sve_<mode> for SVE.  Rename original define_insn to...
	(tlsdesc_small_advsimd_<mode>): ...this.
	(tlsdesc_small_sve_<mode>): New pattern.

gcc/testsuite/
	* gcc.target/aarch64/sve/tls_1.c: New test.
	* gcc.target/aarch64/sve/tls_2.C: Likewise.

From-SVN: r258488
2018-03-13 15:12:59 +00:00
Richard Sandiford 11e9443f49 [AArch64] Add SVE mul_highpart patterns
One advantage of the new permute handling compared to the old way is
that we can now easily take advantage of the vectoriser's divmod patterns
for SVE.

2018-03-13  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART)
	(UNSPEC_UMUL_HIGHPART): New constants.
	(MUL_HIGHPART): New int iteraor.
	(su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART.
	* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New
	define_expand.
	(*<su>mul<mode>3_highpart): New define_insn.

gcc/testsuite/
	* gcc.target/aarch64/sve/mul_highpart_1.c: New test.
	* gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise.

From-SVN: r258487
2018-03-13 15:12:14 +00:00
Richard Sandiford c9b39302ef MAINTAINERS: Add entry for SVE maintainership.
2018-03-13  Richard Sandiford  <richard.sandiford@arm.com>

	* MAINTAINERS: Add entry for SVE maintainership.

From-SVN: r258486
2018-03-13 15:11:46 +00:00
Eric Botcazou 59a8062a6a re PR lto/84805 (ICE in get_odr_type, at ipa-devirt.c:2096 since r258133)
PR lto/84805
	* ipa-devirt.c (odr_subtypes_equivalent_p): Do not get the ODR type of
	incomplete types.

From-SVN: r258481
2018-03-13 10:04:51 +00:00
Martin Liska 0dbacfcfad Fix PTA info in IPA ICF (PR ipa/84658).
2018-03-13  Martin Liska  <mliska@suse.cz>

	PR ipa/84658.
	* (sem_item_optimizer::sem_item_optimizer): Initialize new
	vector.
	(sem_item_optimizer::~sem_item_optimizer): Release it.
	(sem_item_optimizer::merge_classes): Register variable aliases.
	(sem_item_optimizer::fixup_pt_set): New function.
	(sem_item_optimizer::fixup_points_to_sets): Likewise.
	* ipa-icf.h: Declare new variables and functions.
2018-03-13  Martin Liska  <mliska@suse.cz>

	PR ipa/84658.
	* g++.dg/ipa/pr84658.C: New test.

From-SVN: r258480
2018-03-13 08:20:27 +00:00
Jakub Jelinek 9e61e48e12 re PR middle-end/84834 (ICE: tree check: expected integer_cst, have complex_cst in to_wide, at tree.h:5527)
PR middle-end/84834
	* match.pd ((A & C) != 0 ? D : 0): Use INTEGER_CST@2 instead of
	integer_pow2p@2 and test integer_pow2p in condition.
	(A < 0 ? C : 0): Similarly for @1.

	* gcc.dg/pr84834.c: New test.

From-SVN: r258479
2018-03-13 09:12:59 +01:00
Jakub Jelinek cd471b26ca re PR middle-end/84831 (Invalid memory read in parse_output_constraint)
PR middle-end/84831
	* stmt.c (parse_output_constraint): If the CONSTRAINT_LEN (*p, p)
	characters starting at p contain '\0' character, don't look beyond
	that.

From-SVN: r258478
2018-03-13 09:12:07 +01:00
Jakub Jelinek ee6e130378 re PR target/84827 (ICE in extract_insn, at recog.c:2311)
PR target/84827
	* config/i386/i386.md (round<mode>2): For 387 fancy math, disable
	pattern if -ftrapping-math -fno-fp-int-builtin-inexact.

	* gcc.target/i386/pr84827.c: New test.

From-SVN: r258477
2018-03-13 09:05:58 +01:00
Jakub Jelinek fc31d739fb re PR target/84828 (ICE in verify_flow_info at gcc/cfghooks.c:265)
PR target/84828
	* reg-stack.c (change_stack): Change update_end var from int to
	rtx_insn *, if non-NULL don't update just BB_END (current_block), but
	also call set_block_for_insn on the newly added insns and rescan.

	* g++.dg/ext/pr84828.C: New test.

From-SVN: r258476
2018-03-13 09:04:54 +01:00
Jakub Jelinek 639e8522c0 re PR target/84786 ([miscompilation] vunpcklpd accessing xmm16-22 targeting KNL)
PR target/84786
	* config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v
	on the last operand.

	* gcc.target/i386/avx512f-pr84786-1.c: New test.
	* gcc.target/i386/avx512f-pr84786-2.c: New test.

From-SVN: r258475
2018-03-13 09:03:28 +01:00
GCC Administrator 1f4e9d223c Daily bump.
From-SVN: r258474
2018-03-13 00:16:25 +00:00
Jakub Jelinek fe217ba0ee re PR c++/84808 (ICE with constexpr and array)
PR c++/84808
	* constexpr.c (find_array_ctor_elt): Don't use elt reference after
	first potential CONSTRUCTOR_ELTS reallocation.  Convert dindex to
	sizetype.  Formatting fixes.

	* g++.dg/cpp1y/constexpr-84808.C: New test.

From-SVN: r258471
2018-03-13 00:40:20 +01:00
Jakub Jelinek 038df1baec re PR c++/84704 (internal compiler error: gimplification failed)
PR c++/84704
	* tree.c (stabilize_reference_1): Return save_expr (e) for
	STATEMENT_LIST even if it doesn't have side-effects.

	* g++.dg/debug/pr84704.C: New test.

From-SVN: r258470
2018-03-13 00:39:21 +01:00
Jonathan Wakely 97ca95ac6f PR libstdc++/84773 use aligned alloc functions for FreeBSD and MinGW cross-compilers
PR libstdc++/84773
	PR libstdc++/83662
	* crossconfig.m4: Check for aligned_alloc etc. on freebsd and mingw32.
	* configure: Regenerate.
	* include/c_global/cstdlib [_GLIBCXX_HAVE_ALIGNED_ALLOC]
	(aligned_alloc): Add using-declaration.
	* testsuite/18_support/aligned_alloc/aligned_alloc.cc: New test.

From-SVN: r258468
2018-03-12 22:52:16 +00:00
Eric Botcazou 50536fd5e8 re PR ada/82813 (warning: '.builtin_memcpy' writing between 2 and 6 bytes into a region of size 0 overflows the destination [-Wstringop-overflow=])
PR ada/82813
	* gcc-interface/misc.c (gnat_post_options): Disable string overflow
	warnings.

From-SVN: r258466
2018-03-12 22:40:05 +00:00
Jonathan Wakely a60a1d3d4b Fix spelling of -mclflushopt in manual
* doc/invoke.texi (-mclflushopt): Fix spelling of option.

From-SVN: r258462
2018-03-12 22:31:12 +00:00
Renlin Li 980902fba6 [PATCH][AARCH64]Fix immediate alternative of movhf_aarch64 pattern.
gcc/

2018-03-12  Renlin Li  <renlin.li@arm.com>

    * config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to
    aarch64_output_scalar_simd_mov_immediate.

gcc/testsuite/

2018-03-12  Renlin Li  <renlin.li@arm.com>

    * gcc.target/aarch64/movi_hf.c: New.
    * gcc.target/aarch64/f16_mov_immediate_1.c: Update.
    * gcc.target/aarch64/f16_mov_immediate_2.c: Update.

From-SVN: r258459
2018-03-12 19:49:24 +00:00
Martin Sebor e9b9fa4cda PR tree-optimization/83456 - -Wrestrict false positive on a non-overlapping memcpy in an inline function
gcc/ChangeLog:

	PR tree-optimization/83456
	* gimple-fold.c (gimple_fold_builtin_memory_op): Avoid warning
	for perfectly overlapping calls to memcpy.
	(gimple_fold_builtin_memory_chk): Same.
	(gimple_fold_builtin_strcpy): Handle no-warning.
	(gimple_fold_builtin_stxcpy_chk): Same.
	* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Handle no-warning.

gcc/c-family/ChangeLog:

	PR tree-optimization/83456
	* gcc/c-family/c-common.c (check_function_restrict): Return bool.
	Restore checking of bounded built-in functions.
	(check_function_arguments): Also return the result
	of warn_for_restrict.
	* gcc/c-family/c-common.c (check_function_restrict): Return bool.
	* gcc/c-family/c-warn.c (warn_for_restrict): Return bool.

gcc/testsuite/ChangeLog:

	PR tree-optimization/83456
	* c-c++-common/Wrestrict-2.c: Remove test cases.
	* c-c++-common/Wrestrict.c: Same.
	* gcc.dg/Wrestrict-12.c: New test.
	* gcc.dg/Wrestrict-14.c: New test.

From-SVN: r258455
2018-03-12 12:04:16 -06:00
Segher Boessenkool df4cfec554 rs6000: sysv: Don't pass SFmode in varargs in FPRs
This makes the float32-basic.c testcase work on sysv (32-bit Linux).

"float" is promoted to "double" for varargs.  The ABI also only defines
the use of double precision in varargs.  But _Float32 is not promoted.
Since there is no way of passing single-precision float in FPRs we
should pass SFmode in GPRs (or memory) instead.  This is similar to
the 64-bit ABI.

From-SVN: r258454
2018-03-12 18:37:39 +01:00
Joseph Myers 37f71cead0 * de.po, es.po, sv.po: Update.
From-SVN: r258453
2018-03-12 17:23:38 +00:00
Segher Boessenkool fb54f550a0 combine: Fix PR84780 (more LOG_LINKS trouble)
There still are situations where we have stale LOG_LINKS.  This causes
combine to try two-insn combinations I2->I3 where the register set by
I2 is used before I3 as well.  Not good.

This patch fixes it by checking for this situation in can_combine_p
(similar to what we already do for three and four insn combinations).

From-SVN: r258452
2018-03-12 16:26:16 +01:00
Jason Merrill d67b5d8d1d PR c++/84355 - ICE with deduction for member class template.
* pt.c (tsubst) [TEMPLATE_TYPE_PARM]: Always substitute into
	CLASS_PLACEHOLDER_TEMPLATE.

From-SVN: r258451
2018-03-12 10:40:45 -04:00