Commit Graph

986 Commits

Author SHA1 Message Date
Olivier Hainque fb9970973a t-vxworks (LIBGCC_INCLUDES): Add -I$(MULTIBUILDTOP)../../gcc/include.
2018-06-07  Olivier Hainque  <hainque@adacore.com>

        * config/t-vxworks (LIBGCC_INCLUDES): Add
        -I$(MULTIBUILDTOP)../../gcc/include.
        * config/t-vxworks7: Likewise. Reformat a bit to match
        the t-vxworks layout.

From-SVN: r261273
2018-06-07 13:31:24 +00:00
Olga Makhotina a548a5a1d6 config.gcc: Support "tremont".
2018-06-07  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

        * config.gcc: Support "tremont".
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect "tremont".
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        PROCESSOR_TREMONT.
        * config/i386/i386.c (m_TREMONT): Define.
        (processor_target_table): Add "tremont".
        (PTA_TREMONT): Define.
        (ix86_lea_outperforms): Add TARGET_TREMONT.
        (get_builtin_code_for_version): Handle PROCESSOR_TREMONT.
        (fold_builtin_cpu): Add M_INTEL_TREMONT, replace M_INTEL_GOLDMONT
        and M_INTEL_GOLDMONT_PLUS.
        (fold_builtin_cpu): Add "tremont".
        (ix86_add_stmt_cost): Add TARGET_TREMONT.
        (ix86_option_override_internal): Add "tremont".
        * config/i386/i386.h (processor_costs): Define TARGET_TREMONT.
        (processor_type): Add PROCESSOR_TREMONT.
        * config/i386/x86-tune.def: Add m_TREMONT.
        * doc/invoke.texi: Add tremont as x86 -march=/-mtune= CPU type.

gcc/testsuite/

        * gcc.target/i386/funcspec-56.inc: Test arch=tremont.

libgcc/

        * config/i386/cpuinfo.h (processor_types): Add INTEL_TREMONT.

From-SVN: r261270
2018-06-07 13:07:05 +02:00
Martin Liska 244aebfd6c Fix compilation of libgcov with GCOV_LOCKED=0.
2018-06-07  Martin Liska  <mliska@suse.cz>

	* libgcov-driver.c: Rename cs_all to all and assign it from
        all_prg.

From-SVN: r261261
2018-06-07 04:23:16 +00:00
Martin Liska 6c086e8c75 Fix libgcov-driver-system bootstrap failure (PR bootstrap/86057).
2018-06-07  Martin Liska  <mliska@suse.cz>

        PR bootstrap/86057
	* libgcov-driver-system.c (replace_filename_variables): Use
        memcpy instead of mempcpy.
	(allocate_filename_struct): Do not allocate filename, allocate
        prefix and set it.
	(gcov_exit_open_gcda_file): Allocate memory for gf->filename
        here and properly copy content into it.
	* libgcov-driver.c (struct gcov_filename): Remove max_length
        field, change prefix from size_t into char *.
	(compute_summary): Do not calculate longest filename.
	(gcov_do_dump): Release memory of gf.filename after each file.
	* libgcov-util.c (compute_summary): Use new signature of
        compute_summary.
	(calculate_overlap): Likewise.

From-SVN: r261260
2018-06-07 04:21:35 +00:00
Martin Liska 97a53d1d04 Support variables in expansion of -fprofile-generate option (PR gcov-profile/47618).
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/47618
	* doc/invoke.texi: Document how -fprofile-dir format
        is extended.
2018-06-05  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/47618
	* libgcov-driver-system.c (replace_filename_variables): New
        function.
	(gcov_exit_open_gcda_file): Use it.

From-SVN: r261199
2018-06-05 12:10:22 +00:00
Martin Liska 7f3577f528 Simplify gcov_histogram as it's used only for ARCS counters.
2018-06-05  Martin Liska  <mliska@suse.cz>

	* auto-profile.c (read_autofdo_file): Do not use
	gcov_ctr_summary struct.
	(afdo_callsite_hot_enough_for_early_inline): Likewise.
	* coverage.c (struct counts_entry): Likewise.
	(read_counts_file): Read just single summary entry.
	(get_coverage_counts): Use gcov_summary struct.
	* coverage.h (get_coverage_counts): Likewise.
	* gcov-dump.c (dump_working_sets): Likewise.
	(tag_summary): Dump just single summary.
	* gcov-io.c (gcov_write_summary): Write just histogram
	summary.
	(gcov_read_summary): Read just single summary.
	(compute_working_sets): Use gcov_summary struct.
	* gcov-io.h (GCOV_TAG_SUMMARY_LENGTH): Remove usage
	of GCOV_COUNTERS_SUMMABLE.
	(GCOV_COUNTERS_SUMMABLE): Remove.
	(GCOV_FIRST_VALUE_COUNTER): Replace with
	GCOV_COUNTER_V_INTERVAL.
	(struct gcov_ctr_summary): Remove.
	(struct gcov_summary): Directly use fields of former
	gcov_ctr_summary.
	(compute_working_sets): Use gcov_summary struct.
	* gcov.c (read_count_file): Do not use ctrs fields.
	* lto-cgraph.c (merge_profile_summaries): Use gcov_summary
	struct.
	* lto-streamer.h (struct GTY): Make profile_info gcov_summary
	struct.
	* profile.c: Likewise.
	* profile.h: Likewise.
2018-06-05  Martin Liska  <mliska@suse.cz>

	* libgcov-driver.c (gcov_compute_histogram): Remove usage
	of gcov_ctr_summary.
	(compute_summary): Do it just for a single summary.
	(merge_one_data): Likewise.
	(merge_summary): Simplify as we read just single summary.
	(dump_one_gcov): Pass proper argument.
	* libgcov-util.c (compute_one_gcov): Simplify as we have just
	single summary.
	(gcov_info_count_all_cold): Likewise.
	(calculate_overlap): Likewise.

From-SVN: r261189
2018-06-05 08:13:31 +00:00
Chung-Ju Wu cf3cd43d5a [NDS32] Support Linux target for nds32.
gcc/
	* config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt.
	(nds32le-*-*, nds32be-*-*): Integrate checking process.
	(nds32*-*-*): Add glibc and uclibc conditions.
	* common/config/nds32/nds32-common.c (nds32_except_unwind_info): New.
	(TARGET_EXCEPT_UNWIND_INFO): Define.
	* config/nds32/elf.h: New file.
	* config/nds32/linux.h: New file.
	* config/nds32/nds32-elf.opt: New file.
	* config/nds32/nds32-linux.opt: New file.
	* config/nds32/nds32-fp-as-gp.c
	(pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI.
	* config/nds32/nds32.c (nds32_conditional_register_usage): Consider
	TARGET_LINUX_ABI.
	(nds32_asm_file_end): Ditto.
	(nds32_print_operand): Ditto.
	(nds32_insert_attributes): Ditto.
	(nds32_init_libfuncs): New function.
	(TARGET_HAVE_TLS): Define.
	(TARGET_INIT_LIBFUNCS): Define.
	* config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax
	spec content.
	(TARGET_ELF): Apply different mcmodel setting.
	(LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has
	been migrated into elf.h and linux.h files.
	* config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI.
	* config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI.
	(mcmodel): The content has been migrated into nds32-elf.opt and
	nds32-linux.opt files.
	* config/nds32/t-elf: New file.
	* config/nds32/t-linux: New file.

libgcc/
	* config.host (nds32*-linux*): New.
	* config/nds32/linux-atomic.c: New file.
	* config/nds32/linux-unwind.h: New file.

Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r261116
2018-06-02 14:22:12 +00:00
Uros Bizjak 8b8003ed54 re PR target/85591 (__builtin_cpu_is() is not detecting bdver2 with Model = 0x02)
PR target/85591
	* config/i386/cpuinfo.c (get_amd_cpu): Return
	AMDFAM15H_BDVER2 for AMDFAM15H model 0x2.

From-SVN: r261036
2018-05-31 21:45:54 +02:00
Rasmus Villemoes bbdf026f43 * crtstuff.c: Remove declaration of _Jv_RegisterClasses.
From-SVN: r260980
2018-05-30 17:21:48 -06:00
Martin Liska 0e8f29daae libgcov: report about a different timestamp (PR gcov-profile/85759).
2018-05-29  Martin Liska  <mliska@suse.cz>

        PR gcov-profile/85759
	* doc/gcov.texi: Document GCOV_ERROR_FILE and GCOV_EXIT_AT_ERROR
	env variables.
2018-05-29  Martin Liska  <mliska@suse.cz>

        PR gcov-profile/85759
	* libgcov-driver-system.c (gcov_error): Introduce usage of
        GCOV_EXIT_AT_ERROR env. variable.
	* libgcov-driver.c (merge_one_data): Print error that we
        overwrite a gcov file with a different timestamp.

From-SVN: r260895
2018-05-29 12:11:21 +00:00
Kalamatee 54fd159056 lb1sf68.S (Laddsf$nf): Fix sign bit handling in path to Lf$finfty.
2018-05-23  Kalamatee  <kalamatee@gmail.com>

	* config/m68k/lb1sf68.S (Laddsf$nf): Fix sign bit handling in
	path to Lf$finfty.

From-SVN: r260626
2018-05-23 16:29:01 -06:00
Kito Cheng 09baee1ab1 RISC-V: Add RV32E support.
Kito Cheng <kito.cheng@gmail.com>
	Monk Chiang  <sh.chiang04@gmail.com>

	gcc/
	* common/config/riscv/riscv-common.c (riscv_parse_arch_string):
	Add support to parse rv32e*.  Clear MASK_RVE for rv32i and rv64i.
	* config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e.
	* config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define
	__riscv_32e when TARGET_RVE.  Handle ABI_ILP32E as soft-float ABI.
	* config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E.
	* config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE,
	compute save_libcall_adjustment properly.
	(riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E.
	(riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E.
	* config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E.
	(STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE.
	(GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise.
	(ABI_SPEC): Handle mabi=ilp32e.
	* config/riscv/riscv.opt (abi_type): Add ABI_ILP32E.
	(RVE): Add RVE mask.
	* doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info.
	<-march>: Add rv32e as an example.

	gcc/testsuite/
	* gcc.dg/stack-usage-1.c: Add support for rv32e.

	libgcc/
	* config/riscv/save-restore.S: Add support for rv32e.

Co-Authored-By: Jim Wilson <jimw@sifive.com>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r260384
2018-05-18 15:53:55 -07:00
Kyrylo Tkachov c3f808d3f8 [arm][1/2] Remove support for deprecated -march=armv5 and armv5e
The -march=armv5 and armv5e options have been deprecated in GCC 7 [1].
This patch removes support for them.
It's mostly mechanical stuff. The functionality that was previously
gated on arm_arch5 is now gated on arm_arch5t and the functionality
that was gated on arm_arch5e is now gated on arm_arch5te.

A path in TARGET_OS_CPP_BUILTINS for VxWorks is now unreachable and
therefore is deleted.

References to armv5 and armv5e are deleted/updated throughout the
source tree and testsuite.

Bootstrapped and tested on arm-none-linux-gnueabihf.
Also built a cc1 for arm-wrs-vxworks as a sanity check.

        * config/arm/arm-cpus.in (armv5, armv5e): Delete features.
        (armv5t, armv5te): New features.
        (ARMv5, ARMv5e): Delete fgroups.
        (ARMv5t, ARMv5te): Adjust for above changes.
        (ARMv6m): Likewise.
        (armv5, armv5e): Delete arches.
        * config/arm/arm.md (*call_reg_armv5): Use arm_arch5t instead of
        arm_arch5.
        (*call_reg_arm): Likewise.
        (*call_value_reg_armv5): Likewise.
        (*call_value_reg_arm): Likewise.
        (*call_symbol): Likewise.
        (*call_value_symbol): Likewise.
        (*sibcall_insn): Likewise.
        (*sibcall_value_insn): Likewise.
        (clzsi2): Likewise.
        (prefetch): Likewise.
        (define_split and define_peephole2 dependent on arm_arch5):
        Likewise.
        * config/arm/arm.h (TARGET_LDRD): Use arm_arch5te instead of
        arm_arch5e.
        (TARGET_ARM_QBIT): Likewise.
        (TARGET_DSP_MULTIPLY): Likewise.
        (enum base_architecture): Delete BASE_ARCH_5, BASE_ARCH_5E.
        (arm_arch5, arm_arch5e): Delete.
        (arm_arch5t, arm_arch5te): Declare.
        * config/arm/arm.c (arm_arch5, arm_arch5e): Delete.
        (arm_arch5t): Declare.
        (arm_option_reconfigure_globals): Update for the above.
        (arm_options_perform_arch_sanity_checks): Update comment, replace
        use of arm_arch5 with arm_arch5t.
        (use_return_insn): Likewise.
        (arm_emit_call_insn): Likewise.
        (output_return_instruction): Likewise.
        (arm_final_prescan_insn): Likewise.
        (arm_coproc_builtin_available): Likewise.
        * config/arm/arm-c.c (arm_cpu_builtins): Replace arm_arch5 and
        arm_arch5e with arm_arch5t and arm_arch5te.
        * config/arm/arm-protos.h (arm_arch5, arm_arch5e): Delete.
        (arm_arch5t, arm_arch5te): Declare.
        * config/arm/arm-tables.opt: Regenerate.
        * config/arm/t-arm-elf: Remove references to armv5, armv5e.
        * config/arm/t-multilib: Likewise.
        * config/arm/thumb1.md (*call_reg_thumb1_v5): Check arm_arch5t
        instead of arm_arch5.
        (*call_reg_thumb1): Likewise.
        (*call_value_reg_thumb1_v5): Likewise.
        (*call_value_reg_thumb1): Likewise.
        * config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Remove now
        unreachable path.
        * doc/invoke.texi (ARM Options): Remove references to armv5, armv5e.

        * gcc.target/arm/pr40887.c: Update comment.
        * lib/target-supports.exp: Don't generate effective target checks
        and related helpers for armv5.  Update comment.
        * gcc.target/arm/armv5_thumb_isa.c: Delete.
        * gcc.target/arm/di-longlong64-sync-withhelpers.c: Update effective
        target check and options.

        * config/arm/libunwind.S: Update comment relating to armv5.

From-SVN: r260362
2018-05-18 13:08:16 +00:00
Jerome Lambourg fcf4f8311e arm_cmse.h (cmse_nsfptr_create, [...]): Remove #include <stdint.h>.
2018-05-17  Jerome Lambourg  <lambourg@adacore.com>

	gcc/
	* config/arm/arm_cmse.h (cmse_nsfptr_create, cmse_is_nsfptr): Remove
	#include <stdint.h>.  Replace intptr_t with __INTPTR_TYPE__.

	libgcc/
	* config/arm/cmse.c (cmse_check_address_range): Replace
	UINTPTR_MAX with __UINTPTR_MAX__ and uintptr_t with __UINTPTR_TYPE__.

From-SVN: r260330
2018-05-17 16:36:36 +00:00
Olga Makhotina 74b2bb19f3 config.gcc: Support "goldmont-plus".
2018-05-17  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont-plus".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	"goldmont-plus".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT_PLUS.
	* config/i386/i386.c (m_GOLDMONT_PLUS): Define.
	(processor_target_table): Add "goldmont-plus".
	(PTA_GOLDMONT_PLUS): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS.
	(fold_builtin_cpu): Add "goldmont-plus".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS.
	(ix86_option_override_internal): Add "goldmont-plus".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS.
	(processor_type): Add PROCESSOR_GOLDMONT_PLUS.
	* config/i386/x86-tune.def: Add m_GOLDMONT_PLUS.
	* doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type.

libgcc/

	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont-plus.
	* gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus.

From-SVN: r260307
2018-05-17 10:13:23 +02:00
Olga Makhotina 50e461dfe3 config.gcc: Support "goldmont".
2018-05-08  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT.
	* config/i386/i386.c (m_GOLDMONT): Define.
	(processor_target_table): Add "goldmont".
	(PTA_GOLDMONT): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT.
	(fold_builtin_cpu): Add "goldmont".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT.
	(ix86_option_override_internal): Add "goldmont".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT.
	(processor_type): Add PROCESSOR_GOLDMONT.
	* config/i386/i386.md: Add CPU "glm".
	* config/i386/glm.md: New file.
	* config/i386/x86-tune.def: Add m_GOLDMONT.
	* doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type.

libgcc/
	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont.
	* gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and
	arch=silvermont.

From-SVN: r260042
2018-05-08 14:23:08 +02:00
Amaan Cheval e5f1cdb1b0 config.host (x86_64-*-rtems*): Build crti.o and crtn.o.
2018-05-07  Amaan Cheval  <amaan.cheval@gmail.com>

	* config.host (x86_64-*-rtems*): Build crti.o and crtn.o.

From-SVN: r260007
2018-05-07 16:32:09 +00:00
Andreas Tobler 8f479d7a35 re PR libgcc/84292 (__sync_add_and_fetch returns the old value instead of the new value)
2018-04-27  Andreas Tobler  <andreast@gcc.gnu.org>
	    Maryse Levavasseur <maryse.levavasseur@stormshield.eu>

	PR libgcc/84292
	* config/arm/freebsd-atomic.c (SYNC_OP_AND_FETCH_N): Fix the
	op_and_fetch to return the right result.

Co-Authored-By: Maryse Levavasseur <maryse.levavasseur@stormshield.eu>

From-SVN: r259722
2018-04-27 21:14:05 +02:00
Alan Modra ae0432915e PR85532, crtend.o built without --enable-initfini-array has bad .eh_frame
PR libgcc/85532
	* config/rs6000/t-crtstuff (CRTSTUFF_T_CFLAGS): Add
	-fno-asynchronous-unwind-tables.

From-SVN: r259702
2018-04-27 18:36:39 +09:30
Chung-Ju Wu ba169b7424 [NDS32] Fix incorrect settings in sfp-machine.h and t-nds32-newlib for hard fp.
libgcc/
	* config/nds32/sfp-machine.h: Fix settings for NDS32_ABI_2FP_PLUS.
	* config/nds32/t-nds32-newlib (HOST_LIBGCC2_CFLAGS): Use -fwrapv.

From-SVN: r259645
2018-04-25 12:08:14 +00:00
H.J. Lu ffc2fc06e3 x86: Update __CET__ check
__CET__ has been changed by revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

to

    (__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full
    (__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full

We should check (__CET__ & 2) != 0 for shadow stack.

libgcc/

	* config/i386/linux-unwind.h: Add (__CET__ & 2) != 0 check
	when including "config/i386/shadow-stack-unwind.h".

libitm/

	* config/x86/sjlj.S (_ITM_beginTransaction): Add
	(__CET__ & 2) != 0 check for shadow stack.
	(GTM_longjmp): Likewise.

From-SVN: r259621
2018-04-24 15:15:51 -07:00
H.J. Lu 7b47ecf2f7 Regenerate configure of target libraries
* configure: Regenerated.

From-SVN: r259610
2018-04-24 09:45:26 -07:00
Michael Meissner 661eb8f9e5 re PR target/85456 (PowerPC: Using -mabi=ieeelongdouble calls wrong function for __builtin_powi.)
[libgcc]
2018-04-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85456
	* config/rs6000/_powikf2.c: New file.  Add support for the
	__builtin_powil function when long double is IEEE 128-bit floating
	point.
	* config/rs6000/float128-ifunc.c (__powikf2_resolve): Add
	__powikf2 support.
	(__powikf2): Likewise.
	* config/rs6000/quad-float128.h (__powikf2_sw): Likewise.
	(__powikf2_hw): Likewise.
	(__powikf2): Likewise.
	* config/rs6000/t-float128 (fp128_ppc_funcs): Likewise.
	* config/rs6000/t-float128-hw (fp128_hw_func): Likewise.
	(_powikf2-hw.c): Likewise.

[gcc]
2018-04-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85456
	* config/rs6000/rs6000.c (init_float128_ieee): Add support to call
	__powikf2 when long double is IEEE 128-bit.

[gcc/testsuite]
2018-04-20  Michael Meissner  <meissner@linux.ibm.com>

	PR target/85456
	* gcc.target/powerpc/pr85456.c: New test.

From-SVN: r259533
2018-04-20 21:27:08 +00:00
H.J. Lu 5707be3c7d libgcc/CET: Skip signal frames when unwinding shadow stack
When -fcf-protection -mcet is used, I got

FAIL: g++.dg/eh/sighandle.C

(gdb) bt
 #0  _Unwind_RaiseException (exc=exc@entry=0x416ed0)
    at /export/gnu/import/git/sources/gcc/libgcc/unwind.inc:140
 #1  0x00007ffff7d9936b in __cxxabiv1::__cxa_throw (obj=<optimized out>,
    tinfo=0x403dd0 <typeinfo for int@@CXXABI_1.3>, dest=0x0)
    at /export/gnu/import/git/sources/gcc/libstdc++-v3/libsupc++/eh_throw.cc:90
 #2  0x0000000000401255 in sighandler (signo=11, si=0x7fffffffd6f8,
    uc=0x7fffffffd5c0)
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:9
 #3  <signal handler called> <<<< Signal frame which isn't on shadow stack
 #4  dosegv ()
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:14
 #5  0x00000000004012e3 in main ()
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:30
(gdb) p frames
$6 = 5
(gdb)

frame count should be 4, not 5.  This patch skips signal frames when
unwinding shadow stack.

gcc/testsuite/

	PR libgcc/85334
	* g++.dg/torture/pr85334.C: New test.

libgcc/

	PR libgcc/85334
	* unwind-generic.h (_Unwind_Frames_Increment): New.
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
	Likewise.
	* unwind.inc (_Unwind_RaiseException_Phase2): Increment frame
	count with _Unwind_Frames_Increment.
	(_Unwind_ForcedUnwind_Phase2): Likewise.

From-SVN: r259502
2018-04-19 10:05:39 -07:00
H.J. Lu 5f9ca0b8bf libgcc/CET: Add _CET_ENDBR to __stack_split_initialize
Program received signal SIGSEGV, Segmentation fault.
__stack_split_initialize ()
    at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751
751		leaq	-16000(%rsp),%rax	# We should have at least 16K.
Missing separate debuginfos, use: dnf debuginfo-install libgcc-8.0.1-0.21.0.fc28.x86_64
(gdb) disass
Dump of assembler code for function __stack_split_initialize:
=> 0x0000000000402858 <+0>:	lea    -0x3e80(%rsp),%rax
   0x0000000000402860 <+8>:	mov    %rax,%fs:0x70
   0x0000000000402869 <+17>:	sub    $0x8,%rsp
   0x000000000040286d <+21>:	mov    %rsp,%rdi
   0x0000000000402870 <+24>:	mov    $0x3e80,%esi
   0x0000000000402875 <+29>:	callq  0x401810 <__generic_morestack_set_initial_sp>
   0x000000000040287a <+34>:	add    $0x8,%rsp
   0x000000000040287e <+38>:	retq
End of assembler dump.
(gdb)

This patch adds the missing ENDBR to __stack_split_initialize.

	PR libgcc/85379
	* config/i386/morestack.S (__stack_split_initialize): Add
	_CET_ENDBR.

From-SVN: r259497
2018-04-19 08:22:27 -07:00
Jakub Jelinek a0e1df888d cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace --enable-cet=default with --enable-cet=auto.
* config/cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace
	--enable-cet=default with --enable-cet=auto.

	* doc/install.texi: Document --disable-cet being the default and
	--enable-cet=auto.

	* configure: Regenerated.

From-SVN: r259487
2018-04-19 09:45:51 +02:00
David Malcolm 001ddaa852 re PR jit/85384 (libgccjit does not work if --with-gcc-major-version is used)
PR jit/85384
	* acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.

	* configure.ac (gcc-driver-name.h): Honor --with-gcc-major-version
	by using gcc_base_ver to generate a gcc_driver_version, and use
	it when generating GCC_DRIVER_NAME.
	* configure: Regenerate.

	* configure: Regenerate.

From-SVN: r259462
2018-04-18 11:46:58 +02:00
Jakub Jelinek a57f99ba1c re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/cpuinfo.c (set_feature): Wrap into do while (0) to avoid
	-Wdangling-else warnings.  Mask shift counts to avoid
	-Wshift-count-negative and -Wshift-count-overflow false positives.

From-SVN: r259398
2018-04-16 13:22:40 +02:00
Ruslan Bukin 4d47fe5a8f RISC-V: Support for FreeBSD.
gcc/
	* config.gcc (riscv*-*-freebsd*): Add RISC-V FreeBSD support.
	* config/riscv/freebsd.h: New.
	libgcc/
	* config.host (riscv*-*-freebsd*): Add RISC-V FreeBSD support.

From-SVN: r259190
2018-04-06 13:04:17 -07:00
H.J. Lu 059cc8aca7 i386: Enable AVX/AVX512 features only if supported by OSXSAVE
Enable AVX and AVX512 features only if their states are supported by
OSXSAVE.

	PR target/85100
	* config/i386/cpuinfo.c (XCR_XFEATURE_ENABLED_MASK): New.
	(XSTATE_FP): Likewise.
	(XSTATE_SSE): Likewise.
	(XSTATE_YMM): Likewise.
	(XSTATE_OPMASK): Likewise.
	(XSTATE_ZMM): Likewise.
	(XSTATE_HI_ZMM): Likewise.
	(XCR_AVX_ENABLED_MASK): Likewise.
	(XCR_AVX512F_ENABLED_MASK): Likewise.
	(get_available_features): Enable AVX and AVX512 features only
	if their states are supported by OSXSAVE.

From-SVN: r258954
2018-03-29 06:14:06 -07:00
Igor Tsimbalist f262038551 Fix PR85025: libgcc/config/i386/shadow-stack-unwind.h is wrong.
PR target/85025
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Extra):
	Fix a typo, tmp => 255.

From-SVN: r258763
2018-03-22 12:22:31 +01:00
Jakub Jelinek ae6dca8c65 re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/i386.c (fold_builtin_cpu): For features above 31
	use __cpu_features2 variable instead of __cpu_model.__cpu_features[0].
	Use 1U instead of 1.  Formatting fixes.

	* gcc.target/i386/pr84945.c: New test.

	* config/i386/cpuinfo.h (__cpu_features2): Declare.
	* config/i386/cpuinfo.c (__cpu_features2): New variable for
	ifndef SHARED only.
	(set_feature): Define.
	(get_available_features): Use set_feature macro.  Set __cpu_features2
	to the second word of features ifndef SHARED.

From-SVN: r258673
2018-03-20 09:14:42 +01:00
Julia Koval c36b04c146 Add builtin_cpu for cannonlake and new isa features.
gcc/
	* config/i386/i386.c (F_AVX512VBMI2, F_GFNI, F_VPCLMULQDQ,
	F_AVX512VNNI, F_AVX512BITALG): New.

gcc/testsuite/
	* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
	cannonlake.
	(check_features): Add avx512vbmi2, gfni, vpclmulqdq, avx512vnni,
	avx512bitalg.

libgcc/
	* config/i386/cpuinfo.c (get_available_features): Add
	FEATURE_AVX512VBMI2, FEATURE_GFNI, FEATURE_VPCLMULQDQ,
	FEATURE_AVX512VNNI, FEATURE_AVX512BITALG.
	* config/i386/cpuinfo.h (processor_features) Add
	FEATURE_AVX512VBMI2, FEATURE_GFNI, FEATURE_VPCLMULQDQ,
	FEATURE_AVX512VNNI, FEATURE_AVX512BITALG.

From-SVN: r258551
2018-03-15 08:52:36 +01:00
Julia Koval 79ab536427 Split-up -march=icelake on -march=icelake-server and -march=icelake-client
Split-up -march=icelake on -march=icelake-server and -march=icelake-client
gcc/
	* config.gcc (icelake-client, icelake-server): New.
	(icelake): Remove.
	* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
	(initial_ix86_arch_features): Ditto.
	(PTA_SKYLAKE): Add SGX.
	(PTA_ICELAKE): Remove.
	(PTA_ICELAKE_CLIENT): New.
	(PTA_ICELAKE_SERVER): New.
	(ix86_option_override_internal): Split up icelake on icelake client and
	icelake server.
	(get_builtin_code_for_version): Ditto.
	(fold_builtin_cpu): Ditto.
	* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
	* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
	* config/i386/i386.h (processor_type): Ditto.
	* doc/invoke.texi: Ditto.

gcc/testsuite/
	* g++.dg/ext/mv16.C: Split up icelake on icelake client and
	icelake-server.
	* gcc.target/i386/funcspec-56.inc: Ditto.

libgcc/
	* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
	icelake-client and icelake-server.

From-SVN: r258518
2018-03-14 11:26:38 +01:00
John David Anglin 66a00b11a0 fptr.c (_dl_read_access_allowed): New.
* config/pa/fptr.c (_dl_read_access_allowed): New.
	(__canonicalize_funcptr_for_compare): Use it.

From-SVN: r258310
2018-03-07 00:17:32 +00:00
Jakub Jelinek ce579a4fe0 re PR debug/83917 (with -mcall-ms2sysv-xlogues, stepping into x86 tail-call restore stub gives bad backtrace)
PR debug/83917
	* configure.ac (AS_HIDDEN_DIRECTIVE): AC_DEFINE_UNQUOTED this to
	$asm_hidden_op if visibility ("hidden") attribute works.
	(HAVE_AS_CFI_SECTIONS): New AC_DEFINE.
	* config/i386/i386-asm.h: Don't include auto-host.h.
	(PACKAGE_VERSION, PACKAGE_NAME, PACKAGE_STRING, PACKAGE_TARNAME,
	PACKAGE_URL): Don't undefine.
	(USE_GAS_CFI_DIRECTIVES): Don't use nor define this macro, instead
	guard cfi_startproc only on ifdef __GCC_HAVE_DWARF2_CFI_ASM.
	(FN_HIDDEN): Change guard from #ifdef HAVE_GAS_HIDDEN to
	#ifdef AS_HIDDEN_DIRECTIVE, use AS_HIDDEN_DIRECTIVE macro in the
	definition instead of hardcoded .hidden.
	* config/i386/cygwin.S: Include i386-asm.h first before .cfi_sections
	directive.  Use #ifdef HAVE_AS_CFI_SECTIONS rather than
	#ifdef HAVE_GAS_CFI_SECTIONS_DIRECTIVE to guard .cfi_sections.
	(USE_GAS_CFI_DIRECTIVES): Don't define.
	* configure: Regenerated.
	* config.in: Likewise.

From-SVN: r258057
2018-02-28 09:59:15 +01:00
Jakub Jelinek e586831971 re PR debug/83917 (with -mcall-ms2sysv-xlogues, stepping into x86 tail-call restore stub gives bad backtrace)
PR debug/83917
	* config/i386/i386-asm.h (PACKAGE_VERSION, PACKAGE_NAME,
	PACKAGE_STRING, PACKAGE_TARNAME, PACKAGE_URL): Undefine between
	inclusion of auto-target.h and auto-host.h.
	(USE_GAS_CFI_DIRECTIVES): Define if not defined already based on
	__GCC_HAVE_DWARF2_CFI_ASM.
	(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
	cfi_def_cfa_register, cfi_def_cfa, cfi_register, cfi_offset, cfi_push,
	cfi_pop): Define.
	* config/i386/cygwin.S: Don't include auto-host.h here, just
	define USE_GAS_CFI_DIRECTIVES to 1 or 0 and include i386-asm.h.
	(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
	cfi_def_cfa_register, cfi_register, cfi_push, cfi_pop): Remove.
	* config/i386/resms64fx.h: Add cfi_* directives.
	* config/i386/resms64x.h: Likewise.

From-SVN: r258010
2018-02-26 20:46:34 +01:00
Max Filippov faef260ee8 libgcc: xtensa: fix build with -mtext-section-literals
libgcc/
2018-02-20  Max Filippov  <jcmvbkbc@gmail.com>

	* config/xtensa/ieee754-df.S (__adddf3_aux): Add
	.literal_position directive.
	* config/xtensa/ieee754-sf.S (__addsf3_aux): Likewise.

From-SVN: r257862
2018-02-20 20:55:56 +00:00
Igor Tsimbalist 14e335edc8 CET shouldn't be enabled in 32-bit run-time libraries by defualt
ENDBR32 and RDSSPD are multi-byte NOPs on x86-64 processors and
newer x86 processors, starting Pentium Pro.  They are UD on older
32-bit processors. Detect this at configure time and adjust the
default value for enable_cet. GCC will enable CET in 32-bit run-time
libraries in any case if --enable-cet is used to configure GCC.

	PR target/84148
	* config/cet.m4: Check if target support multi-byte NOPS (SSE).
	* libatomic/configure: Regenerate.
	* libbacktrace/configure: Likewise.
	* libgcc/configure: Likewise.
	* libgfortran/configure: Likewise.
	* libgomp/configure: Likewise.
	* libitm/configure: Likewise.
	* libmpx/configure: Likewise.
	* libobjc/configure: Likewise.
	* libquadmath/configure: Likewise.
	* libsanitizer/configure: Likewise.
	* libssp/configure: Likewise.
	* libstdc++-v3/configure: Likewise.
	* libvtv/configure: Likewise.

From-SVN: r257809
2018-02-19 17:25:49 +01:00
Igor Tsimbalist 95df04335b Additional fix for PR 84239.
PR target/84239
	* libgcc/config/i386/shadow-stack-unwind.h (_Unwind_Frames_Extra):
	Include cetintrin.h not x86intrin.h.

From-SVN: r257730
2018-02-16 11:19:14 +01:00
Igor Tsimbalist f8de876d8c Reimplement CET intrinsics for rdssp/incssp insn.
Introduce a couple of new CET intrinsics for reading and updating a
shadow stack pointer (_get_ssp and _inc_ssp). They replace the existing
_rdssp[d|q] and _incssp[d|q] instrinsics.

	PR target/84239
	* gcc/config/i386/cetintrin.h: Remove _rdssp[d|q] and
	add _get_ssp intrinsics. Remove argument from
	__builtin_ia32_rdssp[d|q].
	* gcc/config/i386/i386-builtin-types.def: Add UINT_FTYPE_VOID.
	* gcc/config/i386/i386-builtin.def: Remove argument from
	__builtin_ia32_rdssp[d|q].
	* gcc/config/i386/i386.c: Use UINT_FTYPE_VOID. Use
	ix86_expand_special_args_builtin for _rdssp[d|q].
	* gcc/config/i386/i386.md: Remove argument from rdssp[si|di] insn.
	Clear register before usage.
	* doc/extend.texi: Remove argument from __builtin_ia32_rdssp[d|q].
	Add documentation for new _get_ssp and _inc_ssp intrinsics.
	* testsuite/gcc.target/i386/cet-intrin-3.c: Use new _get_ssp and
	_inc_ssp intrinsics.
	* testsuite/gcc.target/i386/cet-intrin-4.c: Likewise.
	* testsuite/gcc.target/i386/cet-rdssp-1.c: Remove argument from
	__builtin_ia32_rdssp[d|q].
	* libgcc/config/i386/shadow-stack-unwind.hi (_Unwind_Frames_Extra):
	Use new _get_ssp and _inc_ssp intrinsics.

From-SVN: r257660
2018-02-14 16:06:21 +01:00
Julia Koval 02da1e9cae Add -march=icelake.
gcc/
	* config.gcc: Add -march=icelake.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect icelake.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle icelake.
	* config/i386/i386.c (processor_costs): Add m_ICELAKE.
	(PTA_ICELAKE, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES, PTA_AVX512VBMI2,
	PTA_VPCLMULQDQ, PTA_RDPID, PTA_AVX512BITALG): New.
	(processor_target_table): Add icelake.
	(ix86_option_override_internal): Handle new PTAs.
	(get_builtin_code_for_version): Handle icelake.
	(M_INTEL_COREI7_ICELAKE): New.
	(fold_builtin_cpu): Handle icelake.
	* config/i386/i386.h (TARGET_ICELAKE, PROCESSOR_ICELAKE): New.
	* doc/invoke.texi: Add -march=icelake.
gcc/testsuite/
	* gcc.target/i386/funcspec-56.inc: Handle new march.
	* g++.dg/ext/mv16.C: Ditto.
libgcc/
	* config/i386/cpuinfo.h (processor_subtypes): Add INTEL_COREI7_ICELAKE.

From-SVN: r257331
2018-02-02 14:45:57 +01:00
Claudiu Zissulescu 048c6a9adc [ARC] Add support for reduced register file set
gcc/
2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc-arches.def: Option mrf16 valid for all
        architectures.
        * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
        * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
        * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
        * config/arc/arc-tables.opt: Regenerate.
        * config/arc/arc.c (arc_conditional_register_usage): Handle
        reduced register file case.
        (arc_file_start): Set must have build attributes.
        * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
        mrf16 option value.
        * config/arc/arc.opt (mrf16): Add new option.
        * config/arc/elf.h (ATTRIBUTE_PCS): Define.
        * config/arc/genmultilib.awk: Handle new mrf16 option.
        * config/arc/linux.h (ATTRIBUTE_PCS): Define.
        * config/arc/t-multilib: Regenerate.
        * doc/invoke.texi (ARC Options): Document mrf16 option.

libgcc/
2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/lib1funcs.S (__udivmodsi4): Use safe version for RF16
        option.
        (__divsi3): Use RF16 safe registers.
        (__modsi3): Likewise.

From-SVN: r257083
2018-01-26 12:34:00 +01:00
Max Filippov 0889f16859 libgcc: xtensa: fix NaN return from add/sub/mul/div helpers
libgcc/
2018-01-23  Max Filippov  <jcmvbkbc@gmail.com>

	* config/xtensa/ieee754-df.S (__addsf3, __subsf3, __mulsf3)
	(__divsf3): Make NaN return value quiet.
	* config/xtensa/ieee754-sf.S (__adddf3, __subdf3, __muldf3)
	(__divdf3): Make NaN return value quiet.

From-SVN: r257002
2018-01-23 21:42:52 +00:00
Sebastian Perta bc8b0d0428 rl78.md: New define_expand "anddi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "anddi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/anddi3.S: New assembly file.
	* config/rl78/t-rl78: Added anddi3.S to LIB2ADD.

From-SVN: r256958
2018-01-22 19:23:15 +00:00
Sebastian Perta 99cc06ea06 rl78.md: New define_expand "umindi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "umindi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/umindi3.S: New assembly file.
	* config/rl78/t-rl78: Added umindi3.S to LIB2ADD.

From-SVN: r256957
2018-01-22 18:51:28 +00:00
Sebastian Perta 6e9007a093 rl78.md: New define_expand "smindi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "smindi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/smindi3.S: New assembly file.
	* config/rl78/t-rl78: Added smindi3.S to LIB2ADD.

From-SVN: r256954
2018-01-22 18:17:09 +00:00
Sebastian Perta d975e49487 rl78.md: New define_expand "smaxdi3".
2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "smaxdi3".

2018-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 
	* config/rl78/smaxdi3.S: New assembly file.
	* config/rl78/t-rl78: Added smaxdi3.S to LIB2ADD.

From-SVN: r256953
2018-01-22 17:38:26 +00:00
Sebastian Perta 6a18c14681 fixed year in gcc/ChangeLog and libgcc/ChangeLog
From-SVN: r256949
2018-01-22 15:05:59 +00:00
Sebastian Perta 5dd16013d4 rl78.md: New define_expand "umaxdi3".
2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>

	* config/rl78/rl78.md: New define_expand "umaxdi3".

2017-01-22  Sebastian Perta  <sebastian.perta@renesas.com>
 
	* config/rl78/umaxdi3.S: New assembly file.
	* config/rl78/t-rl78: Added umaxdi3.S to LIB2ADD.

From-SVN: r256948
2018-01-22 15:00:59 +00:00