Neil Booth
231b51a160
arm.c (arm_pr_long_calls, [...]): Use struct.
...
* config/arm/arm.c (arm_pr_long_calls, arm_pr_no_long_calls,
arm_pr_long_calls_off): Use struct.
* config/h8300/h8300.c (h8300_pr-interrupt, h8300_pr_saveall)
: Similarly.
Don't include cpplib.h.
* config/sh/sh.c (sh_pr_interrupt, sh_pr_trapa,
sh_pr_nosave_low_regs): Similarly.
From-SVN: r60757
2003-01-01 19:39:19 +00:00
Zack Weinberg
4977bab6ed
Merge basic-improvements-branch to trunk
...
From-SVN: r60174
2002-12-16 18:23:00 +00:00
J"orn Rennecke
d9da94a1f0
*** empty log message ***
...
From-SVN: r60103
2002-12-13 20:20:28 +00:00
J"orn Rennecke
ec555f3273
sh.c (reg_class_from_letter): No longer const.
...
* sh.c (reg_class_from_letter): No longer const. Add 'e' entry.
(sh_register_move_cost): Add clause for SImode fp-fp moves.
Increase cost for moves involving multiple general purpose registers.
* sh.h (OVERRIDE_OPTIONS): Set reg_class_from_letter['e'] according to
TARGET_FMOVD.
(HARD_REGNO_MODE_OK): Allow V2SFmode and V4SFmode in general purpose
registers, and SImode in fp registers, for ! TARGET_SHMEDIA.
(enum reg_class reg_class_from_letter): No longer const.
(SECONDARY_OUTPUT_RELOAD_CLASS): Use REGCLASS_HAS_FP_REG /
REGCLASS_HAS_GENERAL_REG.
Handle SImode moves from/to fp registers.
! TARGET_SHMEDIA && TARGET_FMOVD.
(SECONDARY_INPUT_RELOAD_CLASS): Use REGCLASS_HAS_FP_REG.
* sh.md (movsi_ie): Add alternatives to move from / to fp regisyters.
From-SVN: r60076
2002-12-12 17:11:13 +00:00
Joern Rennecke
95c0af870b
sh.h (REG_CLASS_HAS_FP_REG): New.
...
Wed Dec 11 19:05:05 2002 J"orn Rennecke <joern.rennecke@superh.com>
* sh.h (REG_CLASS_HAS_FP_REG): New.
(REGISTER_MOVE_COST) Use it. Put body into a function and
move it into:
* sh.c (sh_register_move_cost).
* sh-protos.h (sh_register_move_cost): Declare.
* sh.c (sh_expand_builtin): Abort for unexpected nop values.
(sh_adjust_cost): Always return a value.
From-SVN: r60075
2002-12-12 16:40:49 +00:00
Dhananjay R. Deshpande
7144b2d89a
sh.c (calc_live_regs): Save fpscr only if target has FPU.
...
2002-12-06 Dhananjay Deshpande <dhananjayd@kpit.com>
* gcc/config/sh/sh.c (calc_live_regs): Save fpscr only if target has
FPU.
(push): Generate push_fpscr.
(pop): Generate pop_fpscr.
* gcc/config/sh/sh.md : Add define_expand "push_fpscr", "pop_fpscr".
(fpu_switch): Add alternative to push fpscr. Enable for TARGET_SH3E.
From-SVN: r59893
2002-12-06 20:10:50 +00:00
J"orn Rennecke
aa06e8f5d2
sh.c (dump_table): DImode pool constants need only 32 bit alignment.
...
* sh.c (dump_table): DImode pool constants need only 32 bit alignment.
DFmode alignment depends on TARGET_FMOVD && TARGET_ALIGN_DOUBLE.
From-SVN: r59891
2002-12-06 19:43:22 +00:00
Daniel Jacobowitz
85af47b9e6
sh.c (gen_shl_and): Revert previous patch.
...
* config/sh/sh.c (gen_shl_and): Revert previous patch.
* config/sh/sh.md (ashrdi3+1, ashrdi3+2): Predicate on
reload_completed.
From-SVN: r59269
2002-11-19 18:27:01 +00:00
Richard Sandiford
ea4210ef82
sh-protos.h (sh_mark_label): Declare.
...
* config/sh/sh-protos.h (sh_mark_label): Declare.
* config/sh/sh.c (sh_mark_label): New function, taken from
movdi_const, but fixing the case when the address has an addend.
* config/sh/sh.md (movdi_const, movdi_const_32bit): Use it.
From-SVN: r59217
2002-11-18 14:01:23 +00:00
Richard Sandiford
3503150c4c
sh.c (pool_node): New field: part_of_sequence_p.
...
* config/sh/sh.c (pool_node): New field: part_of_sequence_p.
(add_constant): Set it.
(dump_table): Don't reorder a constant if part_of_sequence_p.
(machine_dependent_reorg): Assume that float constants will
stay in their original order if used as a sequence.
From-SVN: r59213
2002-11-18 12:46:48 +00:00
Richard Sandiford
180bde4f78
sh.c (calc_live_regs): Update check for PIC liveness in compact code.
...
* config/sh/sh.c (calc_live_regs): Update check for PIC liveness
in compact code.
From-SVN: r59212
2002-11-18 12:35:15 +00:00
Daniel Jacobowitz
d2b2c7cd3d
sh.c (gen_shl_and): Don't create a zero_extend if the operand is not an arith_reg_operand.
...
* sh.c (gen_shl_and): Don't create a zero_extend if the operand
is not an arith_reg_operand.
From-SVN: r59201
2002-11-17 22:33:31 +00:00
Aldy Hernandez
cff9f8d509
hard-reg-set.h (REG_CANNOT_CHANGE_MODE_P): New.
...
2002-11-04 Aldy Hernandez <aldyh@redhat.com>
* hard-reg-set.h (REG_CANNOT_CHANGE_MODE_P): New.
* config/rs6000/rs6000.h (CLASS_CANNOT_CHANGE_MODE_P): Remove.
(CLASS_CANNOT_CHANGE_MODE): Remove.
(CANNOT_CHANGE_MODE_CLASS): New.
* config/alpha/alpha.h: Same.
* config/ia64/ia64.h: Same.
* config/mips/mips.h: Same.
* config/s390/s390.h: Same.
* config/sh/sh.h: Same.
* config/pa/pa64-regs.h: Same.
* config/sh/sh-protos.h (sh_cannot_change_mode_class): Add prototype.
* config/sh/sh.c (sh_cannot_change_mode_class): New.
* config/mips/mips-protos.h (mips_cannot_change_mode_class): Add
prototype.
* config/mips/mips.c (mips_cannot_change_mode_class): New.
* doc/tm.texi (Register Classes): Remove
CLASS_CANNOT_CHANGE_MODE and CLASS_CANNOT_CHANGE_MODE_P.
Document CANNOT_CHANGE_MODE_CLASS.
* reload.c (push_reload): Use CANNOT_CHANGE_MODE_CLASS.
(push_reload): Same.
* simplify-rtx.c (simplify_subreg): Same.
* reload1.c (choose_reload_regs): Same.
* recog.c (register_operand): Same.
* regrename.c (mode_change_ok): Change to use new
CANNOT_CHANGE_MODE_CLASS infrastructure.
* regclass.c (cannot_change_mode_set_regs): New.
Declare subregs_of_mode.
(regclass): Use subregs_of_mode.
Remove references to reg_changes_mode.
(init_reg_sets_1): Remove class_can_change_mode and
reg_changes_mode code.
(invalid_mode_change_p): New.
(dump_regclass): Use invalid_mode_change_p instead of
class_can_change_mode.
(regclass): Same.
(record_operand_costs): Do not set reg_changes_mode.
* local-alloc.c (struct qty): Remove changes_mode field.
(alloc_qty): Remove changes_mode initialization.
(update_qty_class): Remove set of changes_mode.
(find_free_reg): Use subregs_of_mode.
* global.c (find_reg): Use subregs_of_mode info.
* rtl.h (cannot_change_mode_set_regs): New prototype.
(invalid_mode_change_p): Same.
(REG_CANNOT_CHANGE_MODE_P): New macro.
* flow.c (mark_used_regs): Calculate subregs_of_mode. Remove
REG_CHANGES_MODE.
(life_analysis): Clear subregs_of_mode.
* combine.c (subst): Pass class to CLASS_CANNOT_CHANGE_MODE_P.
Remove use of CLASS_CANNOT_CHANGE_MODE.
(simplify_set): Same.
(gen_lowpart_for_combine): Calculate subregs_of_mode. Remove
REG_CHANGES_MODE.
* regs.h: Add extern for subregs_of_mode;
Include hard-reg-set and basic-block.
(REG_CHANGES_MODE): Delete.
From-SVN: r58794
2002-11-04 16:58:39 +00:00
J"orn Rennecke
ff881d5229
sh.h (binary_logical_operator): Declare.
...
* sh.h (binary_logical_operator): Declare.
* sh.c (binary_logical_operator): New function.
* sh.md (xordi3+1): New combiner splitter pattern.
From-SVN: r58675
2002-10-31 12:53:06 +00:00
Kazu Hirata
5e7a8ee032
s390.c: Follow spelling convention.
...
* config/s390/s390.c: Follow spelling convention.
* config/sh/lib1funcs.asm: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.h: Likewise.
* config/sparc/sparc.c: Likewise.
* config/sparc/sparc.h: Likewise.
* config/sparc/sparc.md: Likewise.
* config/stormy16/stormy16.c: Likewise.
* config/stormy16/stormy16.h: Likewise.
* config/v850/v850.c: Likewise.
* config/v850/v850.h: Likewise.
* config/vax/vax.c: Likewise.
* config/vax/vax.h: Likewise.
From-SVN: r57276
2002-09-18 11:43:45 +00:00
Kazu Hirata
a920aefe8d
fr30.h: Fix comment typos.
...
* config/fr30/fr30.h: Fix comment typos.
* config/frv/frv.c: Likewise.
* config/i386/xmmintrin.h: Likewise.
* config/mips/mips.c: Likewise.
* config/sh/sh.c: Likewise.
From-SVN: r57144
2002-09-14 13:39:55 +00:00
Kazu Hirata
88cad84baf
haifa-sched.c: Follow spelling conventions.
...
* haifa-sched.c: Follow spelling conventions.
* regclass.c: Likewise.
* regrename.c: Likewise.
* config/fp-bit.c: Likewise.
* config/frv/frv.h: Likewise.
* config/m88k/m88k.c: Likewise.
* config/mcore/mcore.c: Likewise.
* config/rs6000/darwin.h: Likewise.
* config/rs6000/gnu.h: Likewise.
* config/rs6000/linux.h: Likewise.
* config/rs6000/linux64.h: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rs6000/rs6000.h: Likewise.
* config/sh/sh.c: Likewise.
* config/sparc/sparc.c: Likewise.
* config/sparc/ultra1_2.md: Likewise.
From-SVN: r57143
2002-09-14 13:12:56 +00:00
J"orn Rennecke
3578cf6341
sh.c (sh_expand_builtin): Return early if encountering an error_mark for a type.
...
* sh.c (sh_expand_builtin): Return early if encountering an
error_mark for a type.
From-SVN: r56844
2002-09-05 16:31:24 +01:00
Richard Henderson
44bb111a78
expr.h (enum block_op_methods): New.
...
* expr.h (enum block_op_methods): New.
(emit_block_move): Update prototype.
* expr.c (block_move_libcall_safe_for_call_parm): New.
(emit_block_move_via_loop): New.
(emit_block_move): Use them. New argument METHOD.
(emit_push_insn): Always respect the given alignment.
(expand_assignment): Update call to emit_block_move.
(store_expr, store_field, expand_expr): Likewise.
* builtins.c (expand_builtin_apply): Likewise.
(expand_builtin_memcpy, expand_builtin_va_copy): Likewise.
* function.c (expand_function_end): Likewise.
* config/sh/sh.c (sh_initialize_trampoline): Likewise.
* config/sparc/sparc.c (sparc_va_arg): Likewise.
* calls.c (expand_call, emit_library_call_value_1): Likewise.
(save_fixed_argument_area): Use emit_block_move with
BLOCK_OP_CALL_PARM instead of move_by_pieces.
(restore_fixed_argument_area): Likewise.
(store_one_arg): Fix alignment parameter to emit_push_insn.
From-SVN: r56661
2002-08-29 12:20:01 -07:00
J"orn Rennecke
58ab7171be
sh.c (calc_live_regs): Save FPSCR_REG in an interrupt handler if it is ever live.
...
* sh.c (calc_live_regs): Save FPSCR_REG in an interrupt handler
if it is ever live.
* sh.c (sh_handle_interrupt_handler_attribute): Reject interrupt_handler
attribute for SHCOMPACT.
* sh.h (OVERRIDE_OPTIONS): If align_function isn't set, set it
appropriately.
(FUNCTION_BOUNDARY): Specify only the minimum alignment required
by the ABI.
* sh.h (SH5_WOULD_BE_PARTIAL_NREGS): Also handle TImode case.
From-SVN: r56637
2002-08-28 18:37:54 +01:00
J"orn Rennecke
c49439f112
Scheduling revamp:
...
* sh.md (attribute type): Add types mt_group, fload, pcfload, fpul_gp,
mac_gp ftrc_s and cwb. Add / Adjust definitions in individual insn
accordingly.
(attribute insn_class): Provide default definitions based on type.
Remove all insn-specific settings.
(various function units): Remove old SH4 scheduling.
(branch_zero, dfp_comp, late_fp_use, any_fp_comp, any_int_load):
New attributes. Set them where appropriate.
(cpu unit FS): Don't define / use.
(F3, load_store): New cpu units.
(F01): New reservation.
(all insn_reservations): Make dependent on sh4 pipeline model.
Fix latencies.
(nil, reg_mov, freg_mov, sh4_fpul_gp, sh4_call): New insn_reservations.
(sh4_mac_gp, fp_arith_ftrc, arith3, arith3b): Likewise.
(mt insn_reservation): Use type mt_group.
(insn_reservation load_store): Split into sh4_load, sh4_load_si,
sh4_fload and sh4_store.
(insn_reservation branch_zero and branch): Replace with sh4_branch.
(insn_reservation branch_far): Replace with sh4_return.
(insn_reservation return_from_exp): Rename to:
(sh4_return_from_exp). Change to be just d_lock*5.
(insn_reservation lds_to_pr): Rename to:
(sh4_lds_to_pr). Change to be just d_lock*2.
(insn_reservation ldsmem_to_pr, sts_from_pr): Change to be just
d_lock*2.
(insn_reservation prload_mem): Rename to:
(sh4_prstore_mem). Change to d_lock*2,nothing,memory.
(insn_reservation fpscr_store): Rename to:
(fpscr_load). Change to d_lock,nothing,F1*3.
(insn_reservation fpscr_store_mem): Rename to:
(fpscr_load_mem). Change to d_lock,nothing,(F1+memory),F1*2.
(insn_reservation multi): Change to
d_lock,(d_lock+f1_1),(f1_1|f1_2)*3,F2.
(insn_reservation fp_arith): Change to issue,F01,F2.
(insn_reservation fp_div: Change to issue,F01+F3,F2+F3,F3*7,F1+F3,F2.
(insn_reservation dp_float): Change to issue,F01,F1+F2,F2.
(insn_reservation fp_double_arith): Change to issue,F01,F1+F2,fpu*4,F2.
(insn_reservation fp_double_cmp): Change to
d_lock,(d_lock+F01),F1+F2,F2.
(insn_reservation dp_div): Change to
issue,F01+F3,F1+F2+F3,F2+F3,F3*16,F1+F3,(fpu+F3)*2,F2.
* sh.c (flow_dependent_p, flow_dependent_p_1): New functions.
(sh_adjust_cost, SHcompact): Differentiate between different
kinds of dependencies. Drop factor of ten for superscalar.
Use new instruction types. Add new exception rules.
Two small bug fixes:
* sh.md (mulhisi3, umulhisi3: Add a REG_EQUAL note.
* sh.md (mperm_w): Add DONE.
From-SVN: r56601
2002-08-27 16:31:02 +01:00
J"orn Rennecke
8202c8c4e9
sh.c (sh_init_builtins): Add PARAMS to declaration.
...
* sh.c (sh_init_builtins): Add PARAMS to declaration.
(sh_media_init_builtins, sh_expand_builtin): Likewise.
(sh_expand_unop_v2sf): Use PARAMS for variable declaration.
(sh_expand_binop_v2sf): Likewise.
* sh-protos.h (sh_expand_unop_v2sf): Add PARAMS to declaration.
(sh_expand_binop_v2sf, sh_cfun_interrupt_handler_p): Likewise.
(sh_initialize_trampoline): Likewise.
From-SVN: r56259
2002-08-13 17:52:27 +01:00
Kaveh R. Ghazi
ab2877a39b
arc.c (arc_init): Don't use ISO C style function definitions.
...
* arc.c (arc_init): Don't use ISO C style function definitions.
* arm.c (count_insns_for_constant, thumb_far_jump_used_p,
arm_get_strip_length, arm_strip_name_encoding): Likewise.
* avr.h (progmem_section): Likewise.
* h8300.c h8300_asm_insn_count): Likewise.
* m32r.c (init_idents): Likewise.
* s390.c (s390_split_branches, s390_chunkify_pool): Likewise.
* sh.c (sh_cfun_interrupt_handler_p): Likewise.
* xtensa.c (xtensa_build_va_list): Likewise.
From-SVN: r56209
2002-08-11 18:48:52 +00:00
Stephen Clarke
5615d8fd50
sh.c (prepare_move_operands): Only call target_reg_operand if TARGET_SHMEDIA.
...
2002-08-08 Stephen Clarke <stephen.clarke@superh.com>
* config/sh/sh.c (prepare_move_operands): Only call
target_reg_operand if TARGET_SHMEDIA.
From-SVN: r56139
2002-08-08 22:57:52 +01:00
J"orn Rennecke
c608a68464
sh.md (cond_delay_slot): New attribute.
...
* sh.md (cond_delay_slot): New attribute.
(cbranch delay): Use it for anulled-true case.
(stuff_delay_slot): New pattern.
* sh.c (print_operand, case '.'): Don't print .s / /s fore zero-length
delay slot insn.
(gen_far_branch): Emit stuff_delay_slot pattern.
From-SVN: r55878
2002-07-30 18:39:27 +01:00
J"orn Rennecke
e69d142219
sh-protos.h (sh_expand_unop_v2sf): Move inside #ifdef RTX_CODE guard.
...
* sh-protos.h (sh_expand_unop_v2sf): Move inside #ifdef RTX_CODE guard.
(sh_expand_binop_v2sf): Likewise.
* sh.c (machine_dependent_reorg): Add move for UNSPEC_MOVA.
(int_gpr_dest, trunc_hi_operand): New functions.
* sh.h (PREDICATE_CODES): Add any_register_operand, int_gpr_dest and
trunc_hi_operand.
(SPECIAL_MODE_PREDICATES, any_register_operand): Define.
* sh.md (cmpeqdi_t+1): Remove comments that genrecog warns about.
(adddi3_compact+1, subdi3_compact+1, ashlsi3_n+1, ashlhi3+1): Likewise.
(ashrsi2_16+1, ashrsi2_31+1, lshrsi3_n+1, ashrdi3+[12]): Likewise.
(and_shl_scratch+[12], zero_extendhidi2+1): Likewise.
(zero_extendhisi2_media+1, extendhidi2+1, extendqidi2+1): Likewise.
(extendhisi2_media+1, extendqisi2_media+1): Likewise.
(movsi_media_nofpu+[12], movhi_media+1, movdi_media_nofpu+1): Likewise.
(movdi_const_16bit+[12], movdf_i4+[123], reload_outdf+[2-5]): Likewise.
(movsf_ie+1): Likewise.
(loaddi_trunc): Use int_gpr_dest predicate.
(use_sfunc_addr, indirect_jump_scratch, sibcall_compact): Add mode(s).
(mova, mova_const, GOTaddr2picreg, ptrel, casesi_worker_0): Likewise.
(casesi_worker_0+[12], casesi_worker): Likewise.
(shcompact_preserve_incoming_args): Likewise.
(mov_nop): Use any_register_operand predicate.
(mperm_w0): Use trunc_hi_operand predicate.
From-SVN: r55564
2002-07-18 20:26:07 +01:00
J"orn Rennecke
d042370eb0
sh.c (barrier_align, push): Shut up compiler warnings.
...
* sh.c (barrier_align, push): Shut up compiler warnings.
(initial_elimination_offset,sh_media_init_builtins): Likewise.
(reg_no_subreg_operand): Delete.
From-SVN: r55555
2002-07-18 13:47:34 +01:00
J"orn Rennecke
ca903bba77
lib1funcs.asm (init_trampoline): New entry point.
...
* config/sh/lib1funcs.asm (init_trampoline): New entry point.
* sh-protos.h (sh_initialize_trampoline): Declare.
* sh.c (sh_initialize_trampoline): New function.
* sh.h (TRAMPOLINE_SIZE): Only 24 for TARGET_SHMEDIA32.
(TRAMPOLINE_ALIGNMENT): Need cache-line alignment for TARGET_SHMEDIA.
(INITIALIZE_TRAMPOLINE): Call sh_initialize_trampoline.
(TRAMPOLINE_ADJUST_ADDRESS): Not needed for SHcompact.
* sh.md (initialize_trampoline, double_shori): New patterns.
(initialize_trampoline_compact): Likewise.
(shmedia32_initialize_trampoline_big): Remove.
(shmedia32_initialize_trampoline_little): Likewise.
From-SVN: r55529
2002-07-17 16:43:18 +01:00
J"orn Rennecke
0ac785173d
sh-protos.h (binary_float_operator): Remove declaration.
...
* sh-protos.h (binary_float_operator): Remove declaration.
(sh_expand_unop_v2sf, sh_expand_binop_v2sf): Declare.
* sh.c (print_operand, case 'N'): Check against CONST0_RTX.
(unary_float_operator, sh_expand_unop_v2sf): New functions.
(sh_expand_binop_v2sf): Likewise.
(zero_vec_operand): Delete.
(SH_BLTIN_UDI): New builtin shared signature define. Renumbered
all non-shared ones.
(bdesc): Change all the mextr builtins to use SH_BLTIN_UDI.
Enable nsb and byterev.
* sh.h (CONDITIONAL_REGISTER_USAGE): Initialize DF_HI_REGS.
(HARD_REGNO_MODE_OK): Allow TImode in fp regs. Allow V2SFmode
in general regs.
(enum reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add DF_HI_REGS.
(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise. Remove clause for
immediate operands.
(SECONDARY_INPUT_RELOAD_CLASS): Add clause for immediate operands.
Add DF_HI_REGS.
(CLASS_CANNOT_CHANGE_MODE, CLASS_CANNOT_CHANGE_MODE_P): Allow
lowpart fp regs - only for big endian for now.
(LEGITIMATE_CONSTANT_P): Don't allow non-zero float vectors
when FPU is in use.
(EXTRA_CONTRAINT_U): Check against CONST0_RTX.
(LOAD_EXTEND_OP): NIL for SImode.
(REGISTER_MOVE_COST): Add DF_HI_REGS. Const for moves between
general and fp registers is 4.
PREDICATE_CODES: Amend binary_float_operator entry.
Remove zero_vec_operand. Add unary_float_operator.
* sh.md (udivsi3_i4_media): Use truncate instead of paradoxical
subreg SET_DEST.
(truncdisi2, truncdihi2, movv2sf): Allow memory destinations.
(truncdiqi2): Do sign extension.
(movsi_media, movdi_media): Allow to use r63 to an fp register.
(movdf_media, movsf_media): Likewise.
(movv2sf_i, movv2sf_i+1): Don't use f{ld,st}.p or SUBREGS.
Collapse to one define_insn_and_split. Allow immediate sources.
(addv2sf3, subv2sf3, mulv2sf3, divv2sf3): New patterns.
(movv4sf_i): Allow immediate sources. Use simplify_gen_subreg.
(movv4sf): Allow immediate sources.
(movsf_media_nofpu+1): Don't split moves to FP registers.
(unary_sf_op, binary_sf_op, mshflo_w_x, concat_v2sf): New patterns.
(movv8qi_i+3): Check against CONST0_RTX.
(mextr1, mextr2. mextr3. mextr4, mextr5, mextr6, mextr7): Use DImode
for input and output operands. Fix argument 3 to gen_mextr_rl.
(mmul23_wl, mmul01_wl, mmulsum_wq_i): s/const_vector/parallel/
(msad_ubq_i, mshf4_b, mshf0_b, mshf4_l, mshf0_l, mshf4_w): Likewise.
(mshf0_w, fipr, ftrv): Likewise.
(mshfhi_l_di): Now insn_and_split. Can handle FP regs.
From-SVN: r55528
2002-07-17 16:15:04 +01:00
Zack Weinberg
e5faf155c9
builtins.c (std_expand_builtin_va_start): Remove unused first argument.
...
* builtins.c (std_expand_builtin_va_start): Remove unused
first argument.
(expand_builtin_va_start): Call EXPAND_BUILTIN_VA_START and
std_expand_builtin_va_start with just two arguments.
* expr.h: Update prototypes.
* alpha-protos.h, alpha.h, alpha.c, arc-protos.h, arc.h,
arc.c, d30v-protos.h, d30v.h, d30v.c, i386-protos.h, i386.h,
i386.c, i960-protos.h, i960.h, i960.c, m88k-protos.h, m88k.h,
m88k.c, mips-protos.h, mips.h, mips.c, mn10300-protos.h,
mn10300.h, mn10300.c, pa-protos.h, pa.h, pa.c,
rs6000-protos.h, rs6000.h, rs6000.c, s390-protos.h, s390.h,
s390.c, sh-protos.h, sh.h, sh.c, sparc-protos.h, sparc.h,
sparc.c, stormy16-protos.h, stormy16.h, stormy16.c,
xtensa-protos.h, xtensa.h, xtensa.c: Remove unused first
argument from all implementations of EXPAND_BUILTIN_VA_START
and all uses of std_expand_builtin_va_start.
From-SVN: r55495
2002-07-16 20:59:08 +00:00
Zack Weinberg
6c535c69ee
varargs.h: Replace with stub which issues #error.
...
* ginclude/varargs.h: Replace with stub which issues #error.
* ginclude/stdarg.h: __builtin_stdarg_start is renamed
__builtin_va_start.
* builtins.def (BUILT_IN_VARARGS_START): Delete.
(BUILT_IN_VA_START): New.
* builtins.c (expand_builtin_va_start): Eliminate first
argument and code to implement pre-ISO varargs.
(std_expand_builtin_va_start): Ignore first argument; it is
always 1.
(expand_builtin): Handle BUILT_IN_VA_START and
BUILT_IN_STDARG_START identically. Delete
BUILT_IN_VARARGS_START case.
* function.c (assign_parms): Delete hide_last_arg and all
its uses.
(mark_varargs): Delete function.
* function.h (struct function): Delete 'varargs' bit.
(current_function_varargs): Delete macro.
* tree.h: Don't declare mark_varargs.
* c-decl.c (c_function_varargs, c_mark_varargs): Delete.
(c_expand_body): Don't call mark_varargs.
* c-objc-common.c: Handle BUILT_IN_VA_START and
BUILT_IN_STDARG_START identically. Delete
BUILT_IN_VARARGS_START case.
* c-tree.h: Don't declare c_mark_varargs.
* c-parse.in: Remove grammar rules for '&...' (which has been
commented out since before 2.7.2) and for '...' in K+R
argument declarations.
* builtins.c, function.c, integrate.c, sibcall.c,
config/alpha/unicosmk.h, config/arc/arc.c, config/arc/arc.h,
config/avr/avr.c, config/cris/cris.c, config/fr30/fr30.c,
config/i960/i960.c, config/i960/i960.md, config/m32r/m32r.c,
config/m32r/m32r.h, config/m88k/m88k.c, config/m88k/m88k.h,
config/mips/mips.c, config/mmix/mmix.c, config/mmix/mmix.h,
config/mn10300/mn10300.c, config/pa/som.h, config/s390/s390.c,
config/sh/sh.c, config/sh/sh.h, config/sparc/sparc.h,
config/stormy16/stormy16.c: Delete all references to
current_function_varargs, and code predicated on that flag.
* config/alpha/alpha.c (alpha_va_start),
config/arc/arc.c (arc_va_start),
config/i386/i386.c (ix86_va_start),
config/mips/mips.c (mips_va_start),
config/mn10300/mn10300.c (mn10300_va_start),
config/rs6000/rs6000.c (rs6000_va_start),
config/s390/s390.c (s390_va_start),
config/sh/sh.c (sh_va_start),
Ignore first argument; it is always 1.
* config/c4x/c4x-protos.h, config/c4x/c4x.c: Delete c4x_va_start.
* config/ia64/ia64-protos.h, config/ia64/ia64.c: Delete ia64_va_start.
* config/m68hc11/m68hc11-protos.h, config/m68hc11/m68hc11.c:
Delete m68hc11_va_start.
* config/c4x/c4x.h, config/ia64/ia64.h, config/m68hc11/m68hc11.h:
No need to define EXPAND_BUILTIN_VA_START.
* doc/invoke.texi, doc/sourcebuild.texi, doc/tm.texi,
doc/trouble.texi: Remove references to GCC-provided <varargs.h>.
testsuite:
* c-torture/execute/991216-3.c, c-torture/execute/strct-varg-1.c,
c-torture/execute/va-arg-7.c, c-torture/execute/va-arg-8.c,
c-torture/execute/va-arg-15.c, c-torture/execute/va-arg-16.c,
c-torture/execute/va-arg-17.c, c-torture/execute/va-arg-19.c:
Convert to use <stdarg.h>.
* c-torture/execute/va-arg-3.c, c-torture/execute/va-arg-3.x:
Delete.
* gcc.dg/va-arg-2.c: New.
* lib/gcc.exp, lib/objc.exp: Remove code to set -DNO_VARARGS.
From-SVN: r55472
2002-07-16 02:16:47 +00:00
Stephen Clarke
2ad65b0e91
sh.c (sh_adjust_cost): Special handling of SHMEDIA code.
...
Tue Jul 9 22:37:44 2002 Stephen Clarke <stephen.clarke@superh.com>
J"orn Rennecke <joern.rennecke@superh.com>
* sh.c (sh_adjust_cost): Special handling of SHMEDIA code.
* sh.md (attribute issues): Replace with:
(attribute pipe_model). All users changed.
(attribute type): Change pt / ptabs to pt_media / ptabs_media.
All users changed.
(function units sh5issue, sh5fds): New.
(attribute is_mac_media): New.
(adddi3_media, subdi3_media, divsi3_i1_media, anddi3): Add type.
(andcdi3, iordi3, xordi3, ashldi3_media, lshrdi3_media): Likewise.
(ashrdi3_media, negdi_media, extendsidi2, movqi_media): Likewise.
(movhi_media, shori_media, movv2sf_i, jump_media): Likewise.
(call_media, call_value_media, sibcall_media): Likewise.
(casesi_jump_media, casesi_shift_media, casesi_load_media): Likewise.
(return_media_i, addsf3_media, subsf3_media, mulsf3_media): Likewise.
(mac_media, divsf3_media, floatdisf2, floatsisf2_media): Likewise.
(fix_truncsfdi2, fix_truncsfsi2_media, cmpeqsf_media): Likewise.
(cmpgtsf_media, cmpgesf_media, cmpunsf_media, negsf2_media): Likewise.
(sqrtsf2_media, abssf2_media, adddf3_media, subdf3_media): Likewise.
(muldf3_media, divdf3_media, floatdidf2, floatsidf2_media): Likewise.
(fix_truncdfdi2, fix_truncdfsi2_media, cmpeqdf_media): Likewise.
(cmpgtdf_media, cmpgedf_media,cmpundf_media, negdf2_media): Likewise.
(sqrtdf2_media, absdf2_media, extendsfdf2_media): Likewise.
(truncdfsf2_media): Likewise.
(movsi_media, movsi_media_nofpu, movdi_media): Use new types.
(movdi_media_nofpui, movdf_media, movdf_media_nofpu): Likewise.
Co-Authored-By: J"orn Rennecke <joern.rennecke@superh.com>
From-SVN: r55346
2002-07-09 23:04:34 +01:00
J"orn Rennecke
b6d3398326
sh.h (PREDICATE_CODES): Add general_extend_operand and inqhi_operand.
...
* sh.h (PREDICATE_CODES): Add general_extend_operand and inqhi_operand.
* sh.c (general_extend_operand, inqhi_operand): New functions.
* sh.md (cmpeqdi_media, cmpgtdi_media, cmpgtudi_media): Collapse
alternatives using 'N' modifier. Add type.
(adddi3z_media): Likewise. Enable generator function generation.
(movdicc_false, movdicc_true, addsi3_media, subsi3_media): Use more
exact predicates / constraints. Add type.
(subsi3): Allow 0 for SHMEDIA.
(udivsi3_i4_media): Use match_operand for input values
rather than hard registers.
(udivsi3 - TARGET_SHMEDIA_FPU case): Don't ferry values
unnecessarily through hard registers. Keep copies of pseudo
registers outside of the libcall sequence.
(mulsidi3_media, umulsidi3_media): Use more exact predicates. Add type.
(ashlsi3_media, ashrsi3_media, lshrsi3_media): Likewise.
(zero_extendsidi2, zero_extendhidi2, zero_extendqidi2): Likewise.
(extendhidi2, extendqidi2): Likewise.
(andsi3_compact): Name.
(andcdi3): Enable generator function generation.
(zero_extendhisi2, zero_extendqisi2): Rename to
(zero_extendhisi2_compact, zero_extendqisi2_compact).
(extendhisi2, extendqisi2): Rename to
(extendhisi2_compact, extendqisi2_compact).
(rotldi3, rotldi3_mextr, rotrdi3, rotrdi3_mextr): New patterns.
(loaddi_trunc, zero_extendhisi2, zero_extendhisi2_media): Likewise.
(zero_extendhisi2_media+1, zero_extendqisi2): Likewise.
(zero_extendqisi2_media, extendhisi2, extendhisi2_media): Likewise.
(extendhisi2_media, extendhisi2_media+1, extendqisi2): Likewise.
(extendqisi2_media, extendqisi2_media+1, truncdisi2): Likewise.
(truncdihi2, truncdiqi2, reload_inqi, reload_inhi): Likewise.
(shmedia32_initialize_trampoline_big): Likewise.
(shmedia32_initialize_trampoline_little): Likewise.
(nsb, nsbsi, nsbdi, ffsdi2, ffssi2, byterev): Likewise.
(negdi2): Remove spurious T clobber.
(zero_extendhidi2+1, extendhidi2+1, extendqidi2+1): Handle TRUNCATE.
(movsi_media, movsi_media_nofpu): Remove spurious *k after b.
(movdi_media, movdi_media_nofpu, pt, ptb): Likewise.
(movsi_media_nofpu+2, movhi_media+1): Only do split after reload.
(ic_invalidate_line_media): Write back data cache before invalidating
instruction cache. Add type.
(movsf_media): Sign-extend when the destination is a general
purpose register. Add type.
(bgt_media, bge_media, bgtu_media, bgeu_media, blt_media_i): Allow 0.
(casesi_worker_0+1): Only increment ref count for proper label.
(casesi_worker_0+2): Likewise.
From-SVN: r55345
2002-07-09 22:30:32 +01:00
J"orn Rennecke
c8cc4417e4
sh.h (PRINT_OPERAND_PUNCT_VALID_P): Allow '\''.
...
* sh.h (PRINT_OPERAND_PUNCT_VALID_P): Allow '\''.
(PREDICATE_CODES): Add entries for equality_comparison_operator,
greater_comparison_operator and less_comparison_operator.
* sh.c (print_operand): Add '\'' code. Make 'o' handle
more operators.
(equality_comparison_operator): New function.
(greater_comparison_operator, less_comparison_operator): Likewise.
* sh.md (beq_media_i): Disable generator function generation.
Use match_operator to handle a whole class of comparisons. Add
modifier in output template to provide branch prediction. Add type.
(bgt_media_i, ble_media_i): Likewise. Allow zero operands.
(bne_media_i, bge_media_i, bgtu_media_i, bgeu_media_i): Delete.
(blt_media_i, bleu_media_i, bltu_media_i): Likewise.
(bgt, blt, ble, bge, bgtu, bltu, bgeu, bleu): Allow zero operands.
From-SVN: r55305
2002-07-07 20:56:31 +01:00
J"orn Rennecke
52702ae16e
sh.c (print_operand, case 'N'): Allow zero vector.
...
Tue Jul 2 18:45:45 2002 J"orn Rennecke <joern.rennecke@superh.com>
* sh.c (print_operand, case 'N'): Allow zero vector.
(arith_reg_or_0_operand): Likewise.
(zero_vec_operand): Check for CONST_VECTOR, not PARALLEL.
* sh.h (CONST_COSTS): 0 has 0 cost. Check OUTER_CODE for
IOR, XOR, PLUS and SET and take their respective constant
ranges into account.
(PREDICATE_CODES, arith_reg_or_0_operand): Can be CONST_VECTOR.
* sh.md (subdi3, subdi3_media): Allow zero operand.
(movv8qi_i+3): Only vector that is not split is the zero vector.
Fix operand 3 to simplify_subreg.
(movv2si_i): Split alternative 1.
(mshfhi_l_di_rev+1): New splitter.
Index: config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.155
diff -p -r1.155 sh.c
*** config/sh/sh.c 2 Jul 2002 04:01:04 -0000 1.155
--- config/sh/sh.c 2 Jul 2002 17:45:37 -0000
*************** print_operand (stream, x, code)
*** 434,440 ****
break;
case 'N':
! if (x == const0_rtx)
{
fprintf ((stream), "r63");
break;
--- 434,441 ----
break;
case 'N':
! if (x == const0_rtx
! || (GET_CODE (x) == CONST_VECTOR && zero_vec_operand (x, VOIDmode)))
{
fprintf ((stream), "r63");
break;
*************** arith_reg_or_0_operand (op, mode)
*** 5940,5946 ****
if (arith_reg_operand (op, mode))
return 1;
! if (GET_CODE (op) == CONST_INT && CONST_OK_FOR_N (INTVAL (op)))
return 1;
return 0;
--- 5941,5947 ----
if (arith_reg_operand (op, mode))
return 1;
! if (EXTRA_CONSTRAINT_U (op))
return 1;
return 0;
*************** zero_vec_operand (v, mode)
*** 6222,6228 ****
{
int i;
! if (GET_CODE (v) != PARALLEL
|| (GET_MODE (v) != mode && mode != VOIDmode))
return 0;
for (i = XVECLEN (v, 0) - 1; i >= 0; i--)
--- 6223,6229 ----
{
int i;
! if (GET_CODE (v) != CONST_VECTOR
|| (GET_MODE (v) != mode && mode != VOIDmode))
return 0;
for (i = XVECLEN (v, 0) - 1; i >= 0; i--)
Index: config/sh/sh.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.h,v
retrieving revision 1.154
diff -p -r1.154 sh.h
*** config/sh/sh.h 1 Jul 2002 19:41:53 -0000 1.154
--- config/sh/sh.h 2 Jul 2002 17:45:37 -0000
*************** while (0)
*** 2689,2698 ****
case CONST_INT: \
if (TARGET_SHMEDIA) \
{ \
if ((OUTER_CODE) == AND && and_operand ((RTX), DImode)) \
return 0; \
if (CONST_OK_FOR_J (INTVAL (RTX))) \
! return COSTS_N_INSNS (1); \
else if (CONST_OK_FOR_J (INTVAL (RTX) >> 16)) \
return COSTS_N_INSNS (2); \
else if (CONST_OK_FOR_J ((INTVAL (RTX) >> 16) >> 16)) \
--- 2689,2704 ----
case CONST_INT: \
if (TARGET_SHMEDIA) \
{ \
+ if (INTVAL (RTX) == 0) \
+ return 0; \
if ((OUTER_CODE) == AND && and_operand ((RTX), DImode)) \
return 0; \
+ if (((OUTER_CODE) == IOR || (OUTER_CODE) == XOR \
+ || (OUTER_CODE) == PLUS) \
+ && CONST_OK_FOR_P (INTVAL (RTX))) \
+ return 0; \
if (CONST_OK_FOR_J (INTVAL (RTX))) \
! return COSTS_N_INSNS ((OUTER_CODE) != SET); \
else if (CONST_OK_FOR_J (INTVAL (RTX) >> 16)) \
return COSTS_N_INSNS (2); \
else if (CONST_OK_FOR_J ((INTVAL (RTX) >> 16) >> 16)) \
*************** extern int rtx_equal_function_value_matt
*** 3225,3231 ****
{"arith_operand", {SUBREG, REG, CONST_INT}}, \
{"arith_reg_dest", {SUBREG, REG}}, \
{"arith_reg_operand", {SUBREG, REG}}, \
! {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
{"binary_float_operator", {PLUS, MULT}}, \
{"commutative_float_operator", {PLUS, MULT}}, \
{"extend_reg_operand", {SUBREG, REG, TRUNCATE}}, \
--- 3231,3237 ----
{"arith_operand", {SUBREG, REG, CONST_INT}}, \
{"arith_reg_dest", {SUBREG, REG}}, \
{"arith_reg_operand", {SUBREG, REG}}, \
! {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}}, \
{"binary_float_operator", {PLUS, MULT}}, \
{"commutative_float_operator", {PLUS, MULT}}, \
{"extend_reg_operand", {SUBREG, REG, TRUNCATE}}, \
Index: config/sh/sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.107
diff -p -r1.107 sh.md
*** config/sh/sh.md 1 Jul 2002 19:41:54 -0000 1.107
--- config/sh/sh.md 2 Jul 2002 17:45:38 -0000
***************
*** 546,552 ****
;; There is no way to model this with gcc's function units. This problem is
;; actually mentioned in md.texi. Tackling this problem requires first that
;; it is possible to speak about the target in an open discussion.
! ;;
;; However, simple double-precision operations always conflict.
(define_function_unit "fp" 1 0
--- 546,552 ----
;; There is no way to model this with gcc's function units. This problem is
;; actually mentioned in md.texi. Tackling this problem requires first that
;; it is possible to speak about the target in an open discussion.
! ;;
;; However, simple double-precision operations always conflict.
(define_function_unit "fp" 1 0
***************
*** 1048,1054 ****
"@
addz.l %1, %2, %0
addz.l %1, r63, %0")
!
(define_insn "adddi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(plus:DI (match_operand:DI 1 "arith_reg_operand" "%0")
--- 1048,1054 ----
"@
addz.l %1, %2, %0
addz.l %1, r63, %0")
!
(define_insn "adddi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(plus:DI (match_operand:DI 1 "arith_reg_operand" "%0")
***************
*** 1122,1128 ****
"@
add.l %1, %2, %0
addi.l %1, %2, %0")
!
(define_insn "*addsi3_compact"
[(set (match_operand:SI 0 "arith_reg_operand" "=r")
(plus:SI (match_operand:SI 1 "arith_operand" "%0")
--- 1122,1128 ----
"@
add.l %1, %2, %0
addi.l %1, %2, %0")
!
(define_insn "*addsi3_compact"
[(set (match_operand:SI 0 "arith_reg_operand" "=r")
(plus:SI (match_operand:SI 1 "arith_operand" "%0")
***************
*** 1138,1162 ****
(define_expand "subdi3"
[(set (match_operand:DI 0 "arith_reg_operand" "")
! (minus:DI (match_operand:DI 1 "arith_reg_operand" "")
(match_operand:DI 2 "arith_reg_operand" "")))]
""
"
{
if (TARGET_SH1)
{
emit_insn (gen_subdi3_compact (operands[0], operands[1], operands[2]));
DONE;
}
}")
!
(define_insn "*subdi3_media"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
! (minus:DI (match_operand:DI 1 "arith_reg_operand" "r")
(match_operand:DI 2 "arith_reg_operand" "r")))]
"TARGET_SHMEDIA"
! "sub %1, %2, %0")
!
(define_insn "subdi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(minus:DI (match_operand:DI 1 "arith_reg_operand" "0")
--- 1138,1163 ----
(define_expand "subdi3"
[(set (match_operand:DI 0 "arith_reg_operand" "")
! (minus:DI (match_operand:DI 1 "arith_reg_or_0_operand" "")
(match_operand:DI 2 "arith_reg_operand" "")))]
""
"
{
if (TARGET_SH1)
{
+ operands[1] = force_reg (DImode, operands[1]);
emit_insn (gen_subdi3_compact (operands[0], operands[1], operands[2]));
DONE;
}
}")
!
(define_insn "*subdi3_media"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
! (minus:DI (match_operand:DI 1 "arith_reg_or_0_operand" "rN")
(match_operand:DI 2 "arith_reg_operand" "r")))]
"TARGET_SHMEDIA"
! "sub %N1, %2, %0")
!
(define_insn "subdi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(minus:DI (match_operand:DI 1 "arith_reg_operand" "0")
***************
*** 1558,1564 ****
: \"__sdivsi3\")));
if (TARGET_SHMEDIA)
! last = gen_divsi3_i1_media (operands[0],
Pmode == DImode
? operands[3]
: gen_rtx_SUBREG (DImode, operands[3],
--- 1559,1565 ----
: \"__sdivsi3\")));
if (TARGET_SHMEDIA)
! last = gen_divsi3_i1_media (operands[0],
Pmode == DImode
? operands[3]
: gen_rtx_SUBREG (DImode, operands[3],
***************
*** 1771,1777 ****
(sign_extend:DI (match_operand:SI 2 "arith_reg_operand" "r"))))]
"TARGET_SHMEDIA"
"muls.l %1, %2, %0")
!
(define_insn "mulsidi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(mult:DI
--- 1772,1778 ----
(sign_extend:DI (match_operand:SI 2 "arith_reg_operand" "r"))))]
"TARGET_SHMEDIA"
"muls.l %1, %2, %0")
!
(define_insn "mulsidi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(mult:DI
***************
*** 1841,1847 ****
(zero_extend:DI (match_operand:SI 2 "arith_reg_operand" "r"))))]
"TARGET_SHMEDIA"
"mulu.l %1, %2, %0")
!
(define_insn "umulsidi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(mult:DI
--- 1842,1848 ----
(zero_extend:DI (match_operand:SI 2 "arith_reg_operand" "r"))))]
"TARGET_SHMEDIA"
"mulu.l %1, %2, %0")
!
(define_insn "umulsidi3_compact"
[(set (match_operand:DI 0 "arith_reg_operand" "=r")
(mult:DI
***************
*** 3440,3446 ****
(set_attr "type" "pcload,move,load,store,move,pcload,move,move")])
;; If the output is a register and the input is memory or a register, we have
! ;; to be careful and see which word needs to be loaded first.
(define_split
[(set (match_operand:DI 0 "general_movdst_operand" "")
--- 3441,3447 ----
(set_attr "type" "pcload,move,load,store,move,pcload,move,move")])
;; If the output is a register and the input is memory or a register, we have
! ;; to be careful and see which word needs to be loaded first.
(define_split
[(set (match_operand:DI 0 "general_movdst_operand" "")
***************
*** 4195,4201 ****
}")
;; If the output is a register and the input is memory or a register, we have
! ;; to be careful and see which word needs to be loaded first.
(define_split
[(set (match_operand:DF 0 "general_movdst_operand" "")
--- 4196,4202 ----
}")
;; If the output is a register and the input is memory or a register, we have
! ;; to be careful and see which word needs to be loaded first.
(define_split
[(set (match_operand:DF 0 "general_movdst_operand" "")
***************
*** 4392,4398 ****
DONE;
}"
[(set_attr "length" "8")])
!
(define_expand "movv4sf"
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=f,f,m")
(match_operand:V4SF 1 "nonimmediate_operand" "f,m,f"))]
--- 4393,4399 ----
DONE;
}"
[(set_attr "length" "8")])
!
(define_expand "movv4sf"
[(set (match_operand:V4SF 0 "nonimmediate_operand" "=f,f,m")
(match_operand:V4SF 1 "nonimmediate_operand" "f,m,f"))]
***************
*** 4444,4450 ****
DONE;
}"
[(set_attr "length" "32")])
!
(define_expand "movv16sf"
[(set (match_operand:V16SF 0 "nonimmediate_operand" "=f,f,m")
(match_operand:V16SF 1 "nonimmediate_operand" "f,m,f"))]
--- 4445,4451 ----
DONE;
}"
[(set_attr "length" "32")])
!
(define_expand "movv16sf"
[(set (match_operand:V16SF 0 "nonimmediate_operand" "=f,f,m")
(match_operand:V16SF 1 "nonimmediate_operand" "f,m,f"))]
***************
*** 4499,4505 ****
REAL_VALUE_FROM_CONST_DOUBLE (value, operands[1]);
REAL_VALUE_TO_TARGET_SINGLE (value, values);
operands[2] = GEN_INT (values);
!
operands[3] = gen_rtx_REG (DImode, true_regnum (operands[0]));
}")
--- 4500,4506 ----
REAL_VALUE_FROM_CONST_DOUBLE (value, operands[1]);
REAL_VALUE_TO_TARGET_SINGLE (value, values);
operands[2] = GEN_INT (values);
!
operands[3] = gen_rtx_REG (DImode, true_regnum (operands[0]));
}")
***************
*** 5410,5416 ****
if (! SYMBOL_REF_FLAG (operands[0]))
{
rtx reg = gen_reg_rtx (Pmode);
!
emit_insn (gen_symGOTPLT2reg (reg, operands[0]));
operands[0] = reg;
}
--- 5411,5417 ----
if (! SYMBOL_REF_FLAG (operands[0]))
{
rtx reg = gen_reg_rtx (Pmode);
!
emit_insn (gen_symGOTPLT2reg (reg, operands[0]));
operands[0] = reg;
}
***************
*** 5634,5640 ****
if (! SYMBOL_REF_FLAG (operands[1]))
{
rtx reg = gen_reg_rtx (Pmode);
!
emit_insn (gen_symGOTPLT2reg (reg, operands[1]));
operands[1] = reg;
}
--- 5635,5641 ----
if (! SYMBOL_REF_FLAG (operands[1]))
{
rtx reg = gen_reg_rtx (Pmode);
!
emit_insn (gen_symGOTPLT2reg (reg, operands[1]));
operands[1] = reg;
}
***************
*** 5841,5847 ****
if (! SYMBOL_REF_FLAG (operands[0]))
{
rtx reg = gen_reg_rtx (Pmode);
!
/* We must not use GOTPLT for sibcalls, because PIC_REG
must be restored before the PLT code gets to run. */
emit_insn (gen_symGOT2reg (reg, operands[0]));
--- 5842,5848 ----
if (! SYMBOL_REF_FLAG (operands[0]))
{
rtx reg = gen_reg_rtx (Pmode);
!
/* We must not use GOTPLT for sibcalls, because PIC_REG
must be restored before the PLT code gets to run. */
emit_insn (gen_symGOT2reg (reg, operands[0]));
***************
*** 6167,6173 ****
(use (label_ref (match_operand 1 "" "")))]
"TARGET_SHMEDIA"
"blink %0, r63")
!
;; Call subroutine returning any type.
;; ??? This probably doesn't work.
--- 6168,6174 ----
(use (label_ref (match_operand 1 "" "")))]
"TARGET_SHMEDIA"
"blink %0, r63")
!
;; Call subroutine returning any type.
;; ??? This probably doesn't work.
***************
*** 6284,6290 ****
tr = gen_rtx_SUBREG (GET_MODE (operands[0]), tr, 0);
insn = emit_move_insn (operands[0], tr);
!
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, equiv,
REG_NOTES (insn));
--- 6285,6291 ----
tr = gen_rtx_SUBREG (GET_MODE (operands[0]), tr, 0);
insn = emit_move_insn (operands[0], tr);
!
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, equiv,
REG_NOTES (insn));
***************
*** 6370,6379 ****
if (TARGET_SHMEDIA)
{
rtx reg = operands[2];
!
if (GET_MODE (reg) != DImode)
reg = gen_rtx_SUBREG (DImode, reg, 0);
!
if (flag_pic > 1)
emit_insn (gen_movdi_const_32bit (reg, operands[1]));
else
--- 6371,6380 ----
if (TARGET_SHMEDIA)
{
rtx reg = operands[2];
!
if (GET_MODE (reg) != DImode)
reg = gen_rtx_SUBREG (DImode, reg, 0);
!
if (flag_pic > 1)
emit_insn (gen_movdi_const_32bit (reg, operands[1]));
else
***************
*** 6391,6397 ****
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, XVECEXP (XEXP (operands[1],
0), 0, 0),
REG_NOTES (insn));
!
DONE;
}")
--- 6392,6398 ----
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, XVECEXP (XEXP (operands[1],
0), 0, 0),
REG_NOTES (insn));
!
DONE;
}")
***************
*** 7231,7237 ****
(match_dup 2))))
(set (reg:SI T_REG)
(ne:SI (ior:SI (match_dup 1) (match_dup 2))
! (const_int 0)))])]
""
"
{
--- 7232,7238 ----
(match_dup 2))))
(set (reg:SI T_REG)
(ne:SI (ior:SI (match_dup 1) (match_dup 2))
! (const_int 0)))])]
""
"
{
***************
*** 7282,7288 ****
(match_dup 2))))
(set (reg:SI T_REG)
(ne:SI (ior:SI (match_operand 1 "" "") (match_dup 2))
! (const_int 0)))])]
"TARGET_SH1"
"operands[2] = gen_reg_rtx (SImode);")
--- 7283,7289 ----
(match_dup 2))))
(set (reg:SI T_REG)
(ne:SI (ior:SI (match_operand 1 "" "") (match_dup 2))
! (const_int 0)))])]
"TARGET_SH1"
"operands[2] = gen_reg_rtx (SImode);")
***************
*** 8279,8285 ****
;; "#"
;; [(set_attr "length" "4")
;; (set_attr "fp_mode" "double")])
! ;;
;; (define_split
;; [(set (match_operand:SI 0 "arith_reg_operand" "=r")
;; (fix:SI (match_operand:DF 1 "arith_reg_operand" "f")))
--- 8280,8286 ----
;; "#"
;; [(set_attr "length" "4")
;; (set_attr "fp_mode" "double")])
! ;;
;; (define_split
;; [(set (match_operand:SI 0 "arith_reg_operand" "=r")
;; (fix:SI (match_operand:DF 1 "arith_reg_operand" "f")))
***************
*** 8320,8326 ****
"* return output_ieee_ccmpeq (insn, operands);"
[(set_attr "length" "4")
(set_attr "fp_mode" "double")])
!
(define_insn "cmpeqdf_media"
[(set (match_operand:DI 0 "register_operand" "=r")
(eq:DI (match_operand:DF 1 "fp_arith_reg_operand" "f")
--- 8321,8327 ----
"* return output_ieee_ccmpeq (insn, operands);"
[(set_attr "length" "4")
(set_attr "fp_mode" "double")])
!
(define_insn "cmpeqdf_media"
[(set (match_operand:DI 0 "register_operand" "=r")
(eq:DI (match_operand:DF 1 "fp_arith_reg_operand" "f")
***************
*** 8806,8815 ****
"TARGET_SHMEDIA && reload_completed
&& GET_MODE (operands[0]) == GET_MODE (operands[1])
&& VECTOR_MODE_SUPPORTED_P (GET_MODE (operands[0]))
! && XVECEXP (operands[1], 0, 0) != const0_rtx
! && (HOST_BITS_PER_WIDE_INT >= 64
! || HOST_BITS_PER_WIDE_INT >= GET_MODE_BITSIZE (GET_MODE (operands[0]))
! || sh_1el_vec (operands[1], VOIDmode))"
[(set (match_dup 0) (match_dup 1))]
"
{
--- 8807,8813 ----
"TARGET_SHMEDIA && reload_completed
&& GET_MODE (operands[0]) == GET_MODE (operands[1])
&& VECTOR_MODE_SUPPORTED_P (GET_MODE (operands[0]))
! && ! zero_vec_operand (operands[1], VOIDmode)"
[(set (match_dup 0) (match_dup 1))]
"
{
***************
*** 8819,8825 ****
operands[0] = gen_rtx_REG (new_mode, true_regnum (operands[0]));
operands[1]
! = simplify_subreg (new_mode, operands[1], GET_MODE (operands[0]), 0);
}")
(define_expand "movv2hi"
--- 8817,8823 ----
operands[0] = gen_rtx_REG (new_mode, true_regnum (operands[0]));
operands[1]
! = simplify_subreg (new_mode, operands[1], GET_MODE (operands[1]), 0);
}")
(define_expand "movv2hi"
***************
*** 8878,8884 ****
|| register_operand (operands[1], V2SImode))"
"@
add %1, r63, %0
! movi %1, %0
#
ld%M1.q %m1, %0
st%M0.q %m0, %1"
--- 8876,8882 ----
|| register_operand (operands[1], V2SImode))"
"@
add %1, r63, %0
! #
#
ld%M1.q %m1, %0
st%M0.q %m0, %1"
***************
*** 9641,9647 ****
/* These are useful to expand ANDs and as combiner patterns. */
(define_insn "mshfhi_l_di"
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
! (ior:DI (lshiftrt:DI (match_operand:DI 1 "arith_reg_or_0_operand" "rU")
(const_int 32))
(and:DI (match_operand:DI 2 "arith_reg_or_0_operand" "rU")
(const_int -4294967296))))]
--- 9639,9645 ----
/* These are useful to expand ANDs and as combiner patterns. */
(define_insn "mshfhi_l_di"
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
! (ior:DI (lshiftrt:DI (match_operand:DI 1 "arith_reg_or_0_operand" "rU")
(const_int 32))
(and:DI (match_operand:DI 2 "arith_reg_or_0_operand" "rU")
(const_int -4294967296))))]
***************
*** 9653,9663 ****
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
(ior:DI (and:DI (match_operand:DI 1 "arith_reg_or_0_operand" "rU")
(const_int -4294967296))
! (lshiftrt:DI (match_operand:DI 2 "arith_reg_or_0_operand" "rU")
(const_int 32))))]
"TARGET_SHMEDIA"
"mshfhi.l %N2, %N1, %0"
[(set_attr "type" "arith_media")])
(define_insn "mshflo_l_di"
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
--- 9651,9680 ----
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
(ior:DI (and:DI (match_operand:DI 1 "arith_reg_or_0_operand" "rU")
(const_int -4294967296))
! (lshiftrt:DI (match_operand:DI 2 "arith_reg_or_0_operand" "rU")
(const_int 32))))]
"TARGET_SHMEDIA"
"mshfhi.l %N2, %N1, %0"
[(set_attr "type" "arith_media")])
+
+ (define_split
+ [(set (match_operand:DI 0 "arith_reg_dest" "")
+ (ior:DI (zero_extend:DI (match_operand:SI 1
+ "extend_reg_or_0_operand" ""))
+ (and:DI (match_operand:DI 2 "arith_reg_or_0_operand" "")
+ (const_int -4294967296))))
+ (clobber (match_operand:DI 3 "arith_reg_dest" ""))]
+ "TARGET_SHMEDIA"
+ [(const_int 0)]
+ "
+ {
+ emit_insn (gen_ashldi3_media (operands[3],
+ simplify_gen_subreg (DImode, operands[1],
+ SImode, 0),
+ GEN_INT (32)));
+ emit_insn (gen_mshfhi_l_di (operands[0], operands[3], operands[2]));
+ DONE;
+ }")
(define_insn "mshflo_l_di"
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
From-SVN: r55189
2002-07-02 19:45:49 +01:00
Roger Sayle
a3acdc0cc1
sh.c (sh_media_init_builtins): Change use of poisoned identifier "bzero" to "memset".
...
* config/sh/sh.c (sh_media_init_builtins): Change use of poisoned
identifier "bzero" to "memset". Pass extra NULL_TREE argument to
builtin_function.
From-SVN: r55171
2002-07-02 04:01:04 +00:00
J"orn Rennecke
c1b92d0906
sh.c (langhooks.h): Include.
...
* sh.c (langhooks.h): Include.
(sh_init_builtins, sh_media_init_builtins): New functions.
(sh_expand_builtin, arith_reg_dest,and_operand): Likewise.
(mextr_bit_offset, extend_reg_operand, zero_vec_operand): Likewise.
(sh_rep_vec, sh_1el_vec, sh_const_vec): Likewise.
(builtin_description): New struct tag.
(signature_args, bdesc): New arrays.
(TARGET_INIT_BUILTINS, TARGET_EXPAND_BUILTIN): Undef / define.
(print_operand): Add 'N' modifier.
* sh.h (VECTOR_MODE_SUPPORTED_P): Add SHmedia vector modes.
(EXTRA_CONSTRAINT_U, EXTRA_CONSTRAINT_W): New macros.
(EXTRA_CONSTRAINT): Add 'U' and 'W' cases.
(CONST_COSTS): Add special case for SHmedia AND.
(PREDICATE_CODES): Add and_operand, arith_reg_dest,
extend_reg_operand, extend_reg_or_0_operand, mextr_bit_offset,
sh_const_vec, sh_1el_vec, sh_rep_vec, zero_vec_operand.
target_operand can also be const or unspec.
* sh.md (UNSPEC_INIT_TRAMP, UNSPEC_FCOSA UNSPEC_FSRRA): New constants.
(UNSPEC_FSINA, UNSPEC_NSB, UNSPEC_ALLOCO): Likewise.
(attribute type): Add new types.
(anddi3): Add splitter.
(movdi_const_16bit+1): Add code to handle vector constants and
bitmasks efficiently.
(shori_media): Have generator function made.
(movv8qi, movv8qi_i, movv8qi_i+1, movv8qi_i+2): New patterns.
(movv8qi_i+3, movv2hi, movv2hi_i, movv4hi, movv4hi_i): Likewise.
(movv2si, movv2si_i, absv2si2, absv4hi2, addv2si3, addv4hi3): Likewise.
(ssaddv2si3, usaddv8qi3, ssaddv4hi3, negcmpeqv8qi): Likewise.
(negcmpeqv2si, negcmpeqv4hi, negcmpgtuv8qi, negcmpgtv2si): Likewise.
(negcmpgtv4hi, mcmv, mcnvs_lw, mcnvs_wb, mcnvs_wub): Likewise.
(mextr_rl, mextr_lr, mextr1, mextr2, mextr3, mextr4, mextr5): Likewise.
(mextr6, mextr7, mmacfx_wl, mmacfx_wl_i, mmacnfx_wl): Likewise.
(mmacnfx_wl_i, mulv2si3, mulv4hi3, mmulfx_l, mmulfx_w): Likewise.
(mmulfxrp_w, mmulhi_wl, mmullo_wl, mmul23_wl, mmul01_wl): Likewise.
(mmulsum_wq, mmulsum_wq_i, mperm_w, mperm_w_little): LIkewise.
(mperm_w_big, mperm_w0, msad_ubq, msad_ubq_i, mshalds_l): Likewise.
(mshalds_w, ashrv2si3, ashrv4hi3, mshards_q, mshfhi_b): Likewise.
(mshflo_b, mshf4_b, mshf0_b, mshfhi_l, mshflo_l, mshf4_l): Likewsie.
(mshf0_l, mshfhi_w, mshflo_w, mshf4_w, mshf0_w, mshfhi_l_di): Likewise.
(mshfhi_l_di_rev, mshflo_l_di, mshflo_l_di_rev): Likewise.
(mshflo_l_di_x, mshflo_l_di_x_rev, ashlv2si3, ashlv4hi3): Likewise.
(lshrv2si3, lshrv4hi3, subv2si3, subv4hi3, sssubv2si3): Likewise.
(ussubv8qi3, sssubv4hi3, fcosa_s, fsina_s, fipr, fsrra_s): Likewise.
(ftrv): Likewise.
(fpu_switch+1, fpu_switch+2): Remove constraint.
From-SVN: r55147
2002-07-01 20:41:54 +01:00
J"orn Rennecke
e3ba8d11f8
sh-protos.h (sh_pr_interrupt): Declare.
...
* sh-protos.h (sh_pr_interrupt): Declare.
* sh.c (sh_pr_interrupt): New function.
(print_operand, calc_live_regs, sh_expand_prologue): Use it.
(sh_hard_regno_rename_ok): Likewise.
* sh.h (NORMAL_MODE): FP_MODE_NONE for interupt handlers.
From-SVN: r54756
2002-06-18 20:03:18 +01:00
Dhananjay R. Deshpande
03b8ec294f
sh.h: Define HARD_REGNO_RENAME_OK
...
Fri Jun 14 12:04:02 2002 Dhananjay R. Deshpande <dhananjayd@kpit.com>
* sh.h: Define HARD_REGNO_RENAME_OK
* sh.c: sh_hard_regno_rename_ok: New. If current function has
interrupt_handler attribute, only registers saved on stack are OK.
* sh-protos.h: Declare sh_hard_regno_rename_ok.
From-SVN: r54612
2002-06-14 12:06:38 +01:00
J"orn Rennecke
9d7ed8065d
sh.c (calc_live_regs): Don't use initial_value optimization for PR_MEDIA_REG.
...
* config/sh/sh.c (calc_live_regs): Don't use initial_value
optimization for PR_MEDIA_REG.
From-SVN: r54600
2002-06-13 22:31:58 +01:00
David S. Miller
2f937369fa
Delete SEQUENCE rtl usage outside of reorg and ssa passes.
...
2002-06-05 David S. Miller <davem@redhat.com>
Delete SEQUENCE rtl usage outside of reorg and ssa passes.
* rtl.h (gen_sequence, emit_insns, emit_insns_before,
emit_insns_before_scope, emit_insns_after,
emit_insns_after_scope): Delete declaration.
* ada/misc.c (insert_code_for): Use emit_insn* instead of
emit_insns_foo.
* config/alpha/alpha.c (alpha_set_memflags_1): Abort on SEQUENCE.
(alpha_set_memflags): Fix comment.
(set_frame_related_p): Use get_insns instead of gen_sequence.
* config/alpha/alpha.md (setjmp receiver splitter): Avoid
emitting no insns.
* config/arm/arm.c (arm_finalize_pic): Use get_insns instead of
gen_sequence.
(arm_gen_load_multiple, arm_gen_store_multiple): Likewise.
* config/fr30/fr30.c (fr30_move_double): Likewise.
* config/i386/i386.c (ix86_expand_int_movcc, ix86_expand_movstr):
Likewise.
* config/ia64/ia64.c (spill_restore_mem): Likewise.
* config/ia64/ia64.md (conditional move spliiter): Avoid emitting
no insns.
* config/m32r/m32r.c (gen_split_move_double): Use get_insns
instead of gen_sequence.
* config/mips/mips.c (embedded_pic_fnaddr_reg): Likewise.
(mips_expand_prologue, mips16_gp_pseudo_reg): Likewise.
* config/sh/sh.c (sh_need_epilogue): Likewise.
* config/sparc/sparc.md (current_function_calls_alloca, flat): New
attributes.
(setjmp pattern and split): Use them to avoid splitter which emits
no RTL.
* genattrtab.c (main): Emit include of function.h
* config/stormy16/stormy16.c (xstormy16_split_cbranch): Use
get_insns instead of gen_sequence.
* config/cris/cris.c (cris_split_movdx): Likewise.
* emit-rtl.c (emit_insns*): Kill.
(try_split): Expect insn list instead of SEQUENCE.
(make_jump_insn_raw, make_call_insn_raw): Fix comments.
(emit_*insn*): Reimplement to work with INSN lists and PATTERNs.
Make them abort if a SEQUENCE is given and RTL checking is
enabled.
(emit_*_scope): Don't forget to set scope on final insn.
(gen_sequence): Move from here...
* ssa.c (gen_sequence): To here as private function.
* builtins.c (expand_builtin_apply_args): Use emit_insn_foo, fix
comments.
(expand_builtin_return, expand_builtin_mathfn): Likewise.
(expand_builtin_strlen): Use get_insns instead of gen_sequence.
(expand_builtin_saveregs): Use emit_insn_foo, fix comments.
(expand_builtin_expect_jump): Use get_insns and fix comments.
* calls.c (try_to_integrate): Use emit_insn_foo.
(expand_call, emit_library_call_value_1): Likewise.
* expr.c (emit_queue): Handle insn lists instead of SEQUENCE.
(emit_move_insn_1): Use get_insns instead of gen_sequence.
(expand_expr): Use emit_insn_foo.
* cfgrtl.c (commit_one_edge_insertion): Use emit_insn_foo.
* except.c (build_post_landing_pads): Likewise.
* flow.c (attempt_auto_inc): Likewise.
* stmt.c (expand_fixup, fixup_gotos, expand_nl_handler_label,
expand_nl_goto_receivers, expand_decl_cleanup): Likewise.
* function.c (fixup_var_refs_insn): Use get_insns instead of
gen_sequence.
(fixup_var_refs_1): Likewise and expect insn list from gen_foo.
(fixup_memory_subreg): Use get_insns instead of gen_sequence.
(fixup_stack_1, purge_addressof_1, expand_main_function,
get_arg_pointer_save_area): Likewise.
(optimize_bit_field, instantiate_virtual_regs_1, assign_parms,
expand_function_end): Use emit_insn_foo.
(record_insns, keep_stack_depressed): Work with insn list instead
of SEQUENCE, fix comments.
* ifcvt.c (noce_emit_store_flag, noce_try_store_flag,
noce_try_store_flag_constants, noce_try_store_flag_inc,
noce_try_store_flag_mask, noce_emit_cmove, noce_try_cmove_arith,
noce_try_minmax, noce_try_abs): Use emit_insn_foo.
(noce_process_if_block): Use get_insns instead of gen_sequence.
* optabs.c (add_equal_note): Work with insn list, fix comments.
(expand_binop): Expect insn list from GEN_FCN(), use emit_insn_foo.
(expand_unop, expand_complex_abs, expand_unop_insn,
expand_no_conflict_block): Likewise.
(gen_move_insn): Use get_insns instead of gen_sequence.
(gen_cond_trap): Likewise.
* integrate.c (copy_rtx_and_substitute): Likewise.
(emit_initial_value_sets): Use emit_insn_foo.
* reload1.c (emit_output_reload_insns, emit_reload_insns): Likewise.
(fixup_abnormal_edges): Avoid losing REG_NOTES more intelligently
now that RTL generators give insn lists.
* sibcall.c (replace_call_placeholder): Use emit_insn_foo.
* doloop.c (doloop_modify, doloop_modify_runtime): Use get_insns
instead of gen_sequence.
(doloop_optimize): Work with insn lists instead of SEQUENCE rtl.
* explow.c (emit_stack_save, emit_stack_restore): Use get_insns
instead of gen_sequence.
* loop.c (move_movables, emit_prefetch_instructions,
gen_add_mult, check_dbra_loop, gen_load_of_final_value):
Likewise.
(loop_regs_update): Work with insn list instead of SEQUENCE rtl.
(product_cheap_p): Likewise, and add commentary about RTL wastage
here.
* lcm.c (optimize_mode_switching): Use get_insns instead of
gen_sequence.
* profile.c (gen_edge_profiler): Likewise.
* regmove.c (copy_src_to_dest): Likewise.
* reg-stack.c (compensate_edge): Likewise and fix comment.
* gcse.c (process_insert_insn): Likewise.
(insert_insn_end_bb): Work with insn list instead of SEQUENCE rtl.
* jump.c (delete_prior_computation): Update comment.
* genemit.c (gen_expand, gen_split, main): Use get_insns instead
of gen_sequence, update comments to match.
* recog.c (peephole2_optimize): Work with insn lists instead of
SEQUENCE rtl.
* sched-vis.c (print_pattern): Abort on SEQUENCE.
* unroll.c (unroll_loop, find_splittable_givs, final_giv_value):
Use get_insns instead of gen_sequence.
(copy_loop_body): Likewise and don't emit dummy NOTE.
* genrecog.c: Don't mention SEQUENCE rtl in comments.
* combine.c (try_combine): Expect insn lists from split generator.
* reorg.c (relax_delay_slots): Emit SEQUENCE into insn list by
hand.
From-SVN: r54497
2002-06-11 05:22:48 -07:00
J"orn Rennecke
2754d3c5ac
Fix cfi generation for SH[1-4]:
...
* sh.c (frame_insn): New function.
(output_stack_adjust): Add parameter emit_fn. All callers changed.
(push): Now returns rtx. Use frame_insn.
(sh_expand_prologue): Clear RTX_FRAME_RELATED_P for second push
of a DF register.
* sh.h (INCOMING_RETURN_ADDR_RTX, DWARF_FRAME_RETURN_COLUMN): Define.
From-SVN: r54445
2002-06-10 18:15:13 +01:00
J"orn Rennecke
eaeb7de8cb
sh.c (machine_dependent_reorg): Don't set RTX_UNCHANGING_P on an UNSPEC.
...
* sh.c (machine_dependent_reorg): Don't set RTX_UNCHANGING_P
on an UNSPEC.
From-SVN: r54318
2002-06-06 16:14:39 +01:00
Geoffrey Keating
e2500fedef
Merge from pch-branch up to tag pch-commit-20020603.
...
From-SVN: r54232
2002-06-04 07:11:05 +00:00
Toshiyasu Morita
62526ec32f
* config/sh/sh.c: Include real.h for REAL_VALUE_TYPE.
...
From-SVN: r53975
2002-05-28 23:43:31 +01:00
J"orn Rennecke
f1a58d928b
config/sh reorganization to factor out endianness and coff:
...
* config/sh/little.h: New file.
* config/sh/sh.h (TARGET_ENDIAN_DEFAULT): If not already
defined, define to 0 to select big-endian.
(SUBTARGET_ASM_ENDIAN_SPEC): Define according to TARGET_ENDIAN_DEFAULT.
(TARGET_DEFAULT): Include TARGET_ENDIAN_DEFAULT.
* config/sh/sh64.h (TARGET_DEFAULT): Include TARGET_ENDIAN_DEFAULT.
* config/sh/t-be: New file.
* config/sh/t-le: New file.
* sh.h (SDB_DEBUGGING_INFO, #include "dbxcoff.h"): Moved to sh/coff.h.
(SDB_DELIM, MAX_OFILE_ALIGNMENT, IDENT_ASM_OP): Likewise.
(TARGET_ASM_NAMED_SECTION, ASM_OUTPUT_SKIP): Likewise.
(USER_LABEL_PREFIX, LOCAL_LABEL_PREFIX): Likewise.
(ASM_GENERATE_INTERNAL_LABEL, ASM_OUTPUT_INTERNAL_LABEL): Likewise.
(ASM_OUTPUT_COMMON, ASM_OUTPUT_LOCAL): Likewise.
(ASM_FILE_END, ASM_DECLARE_FUNCTION_NAME): Deleted.
(CPP_SPEC, SUBTARGET_CPP_ENDIAN_SPEC): Likewise.
(SUBTARGET_CPP_SPEC, CPP_DEFAULT_CPU_SPEC, CPP_PREDEFINES): Likewise.
(EXTRA_SPECS): Remove SUBTARGET_CPP_ENDIAN_SPEC and
CPP_DEFAULT_CPU_SPEC. Add LINK_EMUL_PREFIX, LINK_DEFAULT_CPU_EMUL,
SUBTARGET_LINK_EMUL_SUFFIX and SUBTARGET_LINK_SPEC.
(LINK_SPEC): Define to SH_LINK_SPEC.
(TARGET_CPU_CPP_BUILTINS, SH_LINK_SPEC): Define.
(LINK_EMUL_PREFIX, LINK_DEFAULT_CPU_EMUL): Likewise.
(SUBTARGET_LINK_EMUL_SUFFIX, SUBTARGET_LINK_SPEC): Likewise.
(CPP_SPEC): Reduce to %(subtarget_cpp_spec).
(TARGET_ENDIAN_DEFAULT): Define if not already defined.
* config/sh/coff.h: New file.
(TARGET_ASM_NAMED_SECTION): Now default_coff_asm_named_section
(TARGET_OBJFMT_CPP_BUILTINS): Define.
* config/sh/elf.h (IDENT_ASM_OP): No need to #undef at the start.
(ASM_FILE_END, ASM_OUTPUT_SOURCE_LINE): Likewise.
(DBX_OUTPUT_MAIN_SOURCE_FILE_END, TARGET_ASM_NAMED_SECTION): Likewise.
(ASM_DECLARE_FUNCTION_NAME, MAX_OFILE_ALIGNMENT, SIZE_TYPE): Likewise.
(PTRDIFF_TYPE): Likewise.
("dbxelf.h", "elfos.h", "svr4.h"): Don't #include.
(CPP_PREDEFINES): Don't define.
(TARGET_OBJFMT_CPP_BUILTINS): Define.
(LINK_SPEC): Define to SH_LINK_SPEC.
(LINK_EMUL_PREFIX): Redefine.
* config/sh/linux.h: (SUBTARGET_CPP_SPEC): Remove -fpic / -fPIC cases.
(SUBTARGET_CPP_ENDIAN_SPEC, CPP_DEFAULT_CPU_SPEC): Remove redefinition.
(CPP_PREDEFINES, SUBTARGET_ASM_ENDIAN_SPEC): Likewise.
(CC1_SPEC, CC1PLUS_SPEC, LINK_SPEC): Likewise.
(TARGET_OS_CPP_BUILTINS): Define.
(TARGET_DEFAULT): Redefine.
(SUBTARGET_LINK_EMUL_SUFFIX, SUBTARGET_LINK_SPEC): Likewise.
* config/sh/sh64.h (CPP_DEFAULT_CPU_SPEC): Remove.
(LINK_SPEC): Don't redefine.
(LINK_DEFAULT_CPU_EMUL): Redefine.
(TARGET_DEFAULT): Include TARGET_ENDIAN_DEFAULT.
* sh.c (sh_asm_named_section): Don't declare / define.
* t-linux (MULTILIB_OPTIONS): Rely on pre-set endianness option.
* config.gcc (sh-*-elf* tm_file): Add dbxelf.h elfos.h svr4.h.
(sh64-*-elf* tm_file): Likewise.
(sh-*-rtemself* tm_file): Likewise.
(sh-*-linux* tm_file): Likewise. Add sh/little.h.
(sh-*-linux* tmake_file): Add sh/t-le.
(sh-*-rtems* tm_file): Add sh/coff.h
(sh-*-* tm_file): Likewise.
* sh.h (LEGITIMATE_PIC_OPERAND_P): Check for SYMBOL_REF before using
CONSTANT_POOL_ADDRESS_P.
* coff.h (HAS_INIT_SECTION, INVOKE__MAIN): Define.
Co-Authored-By: Jason R. Thorpe <thorpej@wasabisystems.com>
From-SVN: r53974
2002-05-28 23:26:43 +01:00
Richard Henderson
47754fd548
target-def.h (TARGET_BINDS_LOCAL_P): New.
...
* target-def.h (TARGET_BINDS_LOCAL_P): New.
* target.h (struct gcc_target): Move boolean fields to the end.
Add binds_local_p.
* varasm.c (default_binds_local_p): New.
* output.h: Declare it.
* config/alpha/alpha.c (alpha_encode_section_info): Use the new hook.
* config/cris/cris.c (cris_encode_section_info): Likewise.
* config/i386/i386.c (i386_encode_section_info): Likewise.
* config/ia64/ia64.c (ia64_encode_section_info): Likewise.
* config/sh/sh.c (sh_encode_section_info): Likewise.
* doc/tm.texi (TARGET_IN_SMALL_DATA_P): New.
(TARGET_BINDS_LOCAL_P): New.
From-SVN: r53620
2002-05-19 02:50:27 -07:00
Richard Henderson
772c526579
system.h (STRIP_NAME_ENCODING): Poison it.
...
* system.h (STRIP_NAME_ENCODING): Poison it.
* output.h (STRIP_NAME_ENCODING): Remove.
(default_strip_name_encoding): Declare.
* target-def.h (TARGET_STRIP_NAME_ENCODING): New.
* target.h (strip_name_encoding): New.
* varasm.c (default_strip_name_encoding): New.
* dwarf2asm.c, varasm.c, config/darwin.c, config/darwin.h,
config/alpha/alpha.c, config/arm/pe.c, config/avr/avr.c,
config/cris/cris.c, config/i386/cygwin.h, config/i386/interix.c,
config/i386/winnt.c, config/m32r/m32r.h, config/mcore/mcore-elf.h,
config/mcore/mcore-pe.h, config/mcore/mcore.c, config/mcore/mcore.h,
config/mips/mips.c, config/mn10200/mn10200.h, config/mn10300/mn10300.h,
config/pa/pa.c, config/pa/pa.h, config/pa/som.h,
config/rs6000/rs6000.c, config/rs6000/sysv4.h, config/rs6000/xcoff.h,
config/v850/v850.h: Use the hook, not the macro.
* config/darwin-protos.h, config/darwin.c, config/darwin.h,
config/alpha/alpha.c, config/alpha/alpha.h, config/h8300/h8300.c,
config/h8300/h8300.h, config/i386/cygwin.h, config/i386/i386-interix.h,
config/i386/i386-protos.h, config/i386/win32.h, config/i386/winnt.c,
config/ia64/ia64.c, config/ia64/ia64.h, config/m32r/m32r.c,
config/m32r/m32r.h, config/mcore/mcore.c, config/mcore/mcore.h,
config/pa/pa.c, config/rs6000/rs6000.c, config/rs6000/sysv4.h,
config/rs6000/xcoff.h, config/sh/sh.c, config/sh/sh.h,
config/v850/v850.c, config/v850/v850.h:
Move STRIP_NAME_ENCODING to out-of-line function and add
TARGET_STRIP_NAME_ENCODING.
* config/arm/arm.c, config/arm/arm.h, config/mmix/mmix-protos.h,
config/mmix/mmix.c, config/mmix/mmix.h: Replace STRIP_NAME_ENCODING
with TARGET_STRIP_NAME_ENCODING referencing existing function;
make function static.
* xcoffout.c: Include target.h
* Makefile.in (xcoffout.o): Update.
* config/avr/avr.c (avr_encode_section_info): Correct prototype.
* config/avr/avr.h (STRIP_NAME_ENCODING): Remove.
* config/rs6000/rs6000.c (rs6000_xcoff_unique_section): Mark
reloc argument unused.
* config/sh/sh.c (TARGET_ENCODE_SECTION_INFO): New.
* doc/tm.texi (TARGET_STRIP_NAME_ENCODING): Update from previous
STRIP_NAME_ENCODING docs.
From-SVN: r53615
2002-05-19 00:55:48 -07:00
Richard Henderson
fb49053ffd
system.h (ENCODE_SECTION_INFO): Poison it.
...
* system.h (ENCODE_SECTION_INFO): Poison it.
* target-def.h (TARGET_ENCODE_SECTION_INFO): New.
* target.h (encode_section_info): New.
* varasm.c (make_decl_rtl, output_constant_def): Use it.
* hooks.c (hook_tree_int_void): New.
* hooks.h: Declare it.
* config/darwin.h, config/alpha/alpha-protos.h, config/alpha/alpha.c,
config/alpha/alpha.h, config/arm/pe.h, config/avr/avr-protos.h,
config/avr/avr.c, config/avr/avr.h, config/c4x/c4x-protos.h,
config/c4x/c4x.c, config/c4x/c4x.h, config/cris/cris-protos.h,
config/cris/cris.c, config/cris/cris.h, config/i386/cygwin.h,
config/i386/win32.h, config/ia64/ia64-protos.h, config/ia64/ia64.c,
config/ia64/ia64.h, config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m32r/m32r.h, config/m68hc11/m68hc11-protos.h,
config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.h, config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mmix/mmix.h, config/rs6000/rs6000-protos.h,
config/rs6000/sysv4.h, config/stormy16/stormy16-protos.h,
config/stormy16/stormy16.c, config/stormy16/stormy16.h:
Replace ENCODE_SECTION_INFO with TARGET_ENCODE_SECTION_INFO
referencing existing function. Make function static.
* config/a29k/a29k.c, config/a29k/a29k.h, config/arc/arc.c,
config/arc/arc.h, config/arm/arm.c, config/arm/arm.h,
config/h8300/h8300.c, config/h8300/h8300.h, config/i370/i370.c,
config/i370/i370.h, config/i386/i386-interix.h, config/i386/i386.c,
config/i386/i386.h, config/i386/interix.c, config/m88k/m88k.c,
config/m88k/m88k.h, config/mips/mips.c, config/mips/mips.h,
config/ns32k/ns32k.c, config/ns32k/ns32k.h, config/pa/pa.c,
config/pa/pa.h, config/romp/romp.c, config/romp/romp.h,
config/rs6000/linux64.h, config/rs6000/xcoff.h, config/s390/s390.c,
config/s390/s390.h, config/sh/sh.c, config/sh/sh.h,
config/sparc/sparc.c, config/sparc/sparc.h, config/v850/v850.c,
config/v850/v850.h, config/vax/vax.c, config/vax/vms.h,
config/xtensa/xtensa.c, config/xtensa/xtensa.h:
Move ENCODE_SECTION_INFO to out-of-line function and add
TARGET_ENCODE_SECTION_INFO.
* config/darwin.h (ASM_DECLARE_FUNCTION_NAME): Use hook, not macro.
(ASM_DECLARE_OBJECT_NAME, ASM_OUTPUT_ALIGNED_DECL_LOCAL): Likewise.
* config/arm/pe.h (EXTRA_SECTIONS, EXTRA_SECTION_FUNCTIONS): Rename
from SUBTARGET_*
(switch_to_section): Replace in_rdata case with in_readonly_data.
* config/h8300/h8300.c (h8300_encode_label): Make static.
* config/h8300/h8300-protos.h: Update.
* config/rs6000/rs6000.c (rs6000_elf_encode_section_info): Rename
from rs6000_encode_section_info; make static.
(rs6000_xcoff_encode_section_info): New.
* config/v850/v850.c (v850_encode_data_area): Make static.
* config/v850/v850-protos.h: Update.
* config/vax/vax.c: Include flags.h.
(vms_select_section): Fix typo.
* doc/tm.texi (TARGET_ENCODE_SECTION_INFO): Update from previous
ENCODE_SECTION_INFO docs.
From-SVN: r53606
2002-05-18 22:23:27 -07:00
J"orn Rennecke
f78ec36a71
sh.c (sh_builtin_saveregs): If starting with an odd fp register...
...
* sh.c (sh_builtin_saveregs): If starting with an odd fp register,
make sure that buffer starts on odd word address.
(sh_va_arg): Skip odd fp registers when reading a double precision
value.
From-SVN: r53337
2002-05-09 18:41:56 +01:00