Commit Graph

214 Commits

Author SHA1 Message Date
Iain Sandoe
ea4e901fa3 libgcc, X86, Darwin: Handle symbols for HF cases.
This reorganises the Darwin symbol vers files to include
the generic ones at the top level; allowing for arch ports
to override (via either exclusion or inclusion as needed).

We add an X86-specific vers file containing the new HF
symbols.  Note that although Darwin does not use ELF-style
symbol versioning - the parser that produces the map can
consume it.  Using the ELF-style description will help us
know at which rev the symbols were introduced.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

libgcc/ChangeLog:

	* config/i386/t-darwin: Add in a vers file for X86-specific
	symbols.
	* config/t-darwin: Add the generic symbol maps here...
	* config/t-slibgcc-darwin: ... removing from here.
	* config/i386/libgcc-darwin.ver: New file.
2021-09-19 19:41:31 +01:00
Iain Sandoe
1297a40fb3 libgcc, X86: Exclude rules for libgcc2 __{div,mul}hc3.
We want to override the libgcc2 generic version of these functions
for X86.  First exclude the original and the add in the replacements.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

libgcc/ChangeLog:

	* config/i386/t-softfp: Exclude libgcc2 versions of __divhc3
	and __mulhc3.
2021-09-19 19:38:04 +01:00
liuhongt
6576ad5add Compile __{mul,div}hc3 into libgcc_s.so.1.
libgcc/ChangeLog:

	* config/i386/t-softfp: Compile __{mul,div}hc3 into
	libgcc_s.so.1.
2021-09-08 19:18:15 +08:00
Jakub Jelinek
87d55da7d7 libgcc, i386: Export *hf* and *hc* from libgcc_s.so.1
The following patch exports it for Linux from config/i386/*.ver where it
IMNSHO belongs, aarch64 already exports some of those at GCC_11* and other
targets might add them at completely different gcc versions.

2021-09-08  Jakub Jelinek  <jakub@redhat.com>
	    Iain Sandoe  <iain@sandoe.co.uk>

	* config/i386/libgcc-glibc.ver: Add %inherit GCC_12.0.0 GCC_7.0.0
	and export *hf* and *hc* functions at GCC_12.0.0.
2021-09-08 11:34:45 +02:00
liuhongt
637dfcf43c Explicitly add -msse2 to compile HF related libgcc source file.
For 32-bit libgcc configure w/o sse2, there's would be an error since
GCC only support _Float16 under sse2. Explicitly add -msse2 for those
HF related libgcc functions, so users can still link them w/ the
upper configuration.

libgcc/ChangeLog:

	* Makefile.in: Adjust to support specific CFLAGS for each
	libgcc source file.
	* config/i386/64/t-softfp: Explicitly add -msse2 for HF
	related libgcc source files.
	* config/i386/t-softfp: Ditto.
	* config/i386/_divhc3.c: New file.
	* config/i386/_mulhc3.c: New file.
2021-09-06 15:13:14 +08:00
Iain Sandoe
3ccb523bdd libgcc, soft-float: Fix strong_alias macro use for Darwin.
Darwin does not support strong symbol aliases and a work-
around is provided in sfp-machine.h where a second function
is created that simply calls the original.  However this
needs the arguments to the synthesized function to track
the mode of the original function.

So the fix here is to match known floating point modes from
the incoming function and apply the one found to the new
function args.

The matching is highly specific to the current set of modes
and will need adjusting should more cases be added.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>

libgcc/ChangeLog:

	* config/i386/sfp-machine.h (alias_HFtype, alias_SFtype
	alias_DFtype, alias_TFtype): New.
	(ALIAS_SELECTOR): New.
	(strong_alias): Use __typeof and a _Generic selector to
	provide the type to the synthesized function.
2021-09-03 16:25:40 +01:00
liuhongt
b387e664cf libgcc: Enable hfmode soft-sf/df/xf/tf extensions and truncations.
libgcc/ChangeLog:

	* config/i386/32/sfp-machine.h (_FP_NANFRAC_H): New macro.
	* config/i386/64/sfp-machine.h (_FP_NANFRAC_H): Ditto.
	* config/i386/sfp-machine.h (_FP_NANSIGN_H): Ditto.
	* config/i386/t-softfp: Add hf soft-fp.
	* config.host: Add i386/64/t-softfp.
	* config/i386/64/t-softfp: New file.
2021-09-02 14:11:59 +08:00
Richard Sandiford
de7a795c32 libgcc: Add missing runtime exception notices
Quoting from https://gcc.gnu.org/pipermail/gcc/2021-July/236716.html:

--------------------------------------------------------------------
It was pointed out to me off-list that config/aarch64/value-unwind.h
is missing the runtime exception.  It looks like a few other files
are too; a fuller list is:

libgcc/config/aarch64/value-unwind.h
libgcc/config/frv/frv-abi.h
libgcc/config/i386/value-unwind.h
libgcc/config/pa/pa64-hpux-lib.h

Certainly for the aarch64 file this was simply a mistake;
it seems to have been copied from the i386 version, both of which
reference the runtime exception but don't actually include it.
--------------------------------------------------------------------

Similarly, frv-abi.h referenced the exception but didn't include it.
pa64-hpux-lib.h was missing any reference to the exception.

The decision was that this was simply a mistake
[https://gcc.gnu.org/pipermail/gcc/2021-July/236717.html]:

--------------------------------------------------------------------
[…] It generally is
considered a textual omission.  The runtime library components of GCC
are intended to be licensed under the runtime exception, which was
granted and approved at the time of introduction.
--------------------------------------------------------------------

and that we should simply change all of the files above
[https://gcc.gnu.org/pipermail/gcc/2021-July/236719.html]:

--------------------------------------------------------------------
Please correct the text in the files. The files in libgcc used in the
GCC runtime are intended to be licensed with the runtime exception and
GCC previously was granted approval for that licensing and purpose.

[…]

The runtime exception explicitly was intended for this purpose and
usage at the time that GCC received approval to apply the exception.
--------------------------------------------------------------------

libgcc/
	* config/aarch64/value-unwind.h: Add missing runtime exception
	paragraph.
	* config/frv/frv-abi.h: Likewise.
	* config/i386/value-unwind.h: Likewise.
	* config/pa/pa64-hpux-lib.h: Likewise.
2021-08-31 10:56:34 +01:00
Jonathan Yong
0012f921b6 cygming-crtend.c: fix build warnings
libgcc/Changelog:

	* config/i386/cygming-crtend.c: Fix register_frame_ctor
	and register_frame_dtor warnings.

Signed-off-by: Jonathan Yong <10walls@gmail.com>
2021-08-26 01:32:33 +00:00
Jakub Jelinek
686b1cdfdc libgcc, i386: Add .note.GNU-stack sections to the ms sse/avx sav/res
On Linux, GCC emits .note.GNU-stack sections when compiling code to mark
the code as not needing or needing executable stack, missing section means
unknown.  But assembly files need to be marked manually.  We already
mark various *.S files in libgcc manually, but the
avx_resms64f.o
avx_resms64fx.o
avx_resms64.o
avx_resms64x.o
avx_savms64f.o
avx_savms64.o
sse_resms64f.o
sse_resms64fx.o
sse_resms64.o
sse_resms64x.o
sse_savms64f.o
sse_savms64.o
files aren't marked, so when something links it in, it will require
executable stack.  Nothing in the assembly requires executable stack though.

2021-01-27  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/savms64.h: Add .note.GNU-stack section on Linux.
	* config/i386/savms64f.h: Likewise.
	* config/i386/resms64.h: Likewise.
	* config/i386/resms64f.h: Likewise.
	* config/i386/resms64x.h: Likewise.
	* config/i386/resms64fx.h: Likewise.
2021-01-27 11:50:13 +01:00
Samuel Thibault
2b356e689c hurd: libgcc unwinding over signal trampolines with SIGINFO
When the application sets SA_SIGINFO, the signal trampoline parameters
are different to follow POSIX.

	libgcc/
	* config/i386/gnu-unwind.h (x86_gnu_fallback_frame_state): Add the
	posix siginfo case to struct handler_args. Detect between legacy
	and siginfo from the second parameter, which is a small sigcode in
	the legacy case, and a pointer in the siginfo case.
2021-01-13 11:54:54 +01:00
Jakub Jelinek
99dee82307 Update copyright years. 2021-01-04 10:26:59 +01:00
H.J. Lu
59a95143dd x86: Add <x86gprintrin.h>
For sources which can't use any vector instructions, <x86intrin.h> and
<immintrin.h> cannot be included for compiler intrinsics:

$ echo "#include <x86intrin.h>" | gcc -S -O2 -mno-sse -mno-mmx -x c -
In file included from /usr/include/stdlib.h:1013,
                 from /usr/lib/gcc/x86_64-redhat-linux/10/include/mm_malloc.h:27,
                 from /usr/lib/gcc/x86_64-redhat-linux/10/include/xmmintrin.h:34,
                 from /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:29,
                 from /usr/lib/gcc/x86_64-redhat-linux/10/include/x86intrin.h:32,
                 from <stdin>:1:
/usr/include/bits/stdlib-float.h: In function ‘atof’:
/usr/include/bits/stdlib-float.h:26:1: error: SSE register return with SSE disabled
   26 | {
      | ^
$

libgcc/config/i386/shadow-stack-unwind.h has a workaround:

/* NB: We need _get_ssp and _inc_ssp from <cetintrin.h>.  But we can't
   include <x86intrin.h> which ends up including <mm_malloc.h>, which
   includes <stdlib.h> and <errno.h> unconditionally.  But we can't
   include any libc system headers unconditionally from libgcc.  Avoid
   including <mm_malloc.h> here by defining _IMMINTRIN_H_INCLUDED.  */
 #define _IMMINTRIN_H_INCLUDED
 #include <cetintrin.h>
 #undef _IMMINTRIN_H_INCLUDED

Add a standalone intrinsic header file, <x86gprintrin.h>, to provide
integer only intrinsics.  All integer only intrinsics are placed in
<x86gprintrin.h>.  <x86intrin.h> and <immintrin.h> simply include
<x86gprintrin.h>.

gcc/

	PR target/97148
	* config.gcc (extra_headers): Add x86gprintrin.h.
	* config/i386/adxintrin.h: Check _X86GPRINTRIN_H_INCLUDED for
	<x86gprintrin.h>.
	* config/i386/bmi2intrin.h: Likewise.
	* config/i386/bmiintrin.h: Likewise.
	* config/i386/cetintrin.h: Likewise.
	* config/i386/cldemoteintrin.h: Likewise.
	* config/i386/clflushoptintrin.h: Likewise.
	* config/i386/clwbintrin.h: Likewise.
	* config/i386/enqcmdintrin.h: Likewise.
	* config/i386/fxsrintrin.h: Likewise.
	* config/i386/ia32intrin.h: Likewise.
	* config/i386/lwpintrin.h: Likewise.
	* config/i386/lzcntintrin.h: Likewise.
	* config/i386/movdirintrin.h: Likewise.
	* config/i386/pconfigintrin.h: Likewise.
	* config/i386/pkuintrin.h: Likewise.
	* config/i386/rdseedintrin.h: Likewise.
	* config/i386/rtmintrin.h: Likewise.
	* config/i386/serializeintrin.h: Likewise.
	* config/i386/tbmintrin.h: Likewise.
	* config/i386/tsxldtrkintrin.h: Likewise.
	* config/i386/waitpkgintrin.h: Likewise.
	* config/i386/wbnoinvdintrin.h: Likewise.
	* config/i386/xsavecintrin.h: Likewise.
	* config/i386/xsaveintrin.h: Likewise.
	* config/i386/xsaveoptintrin.h: Likewise.
	* config/i386/xsavesintrin.h: Likewise.
	* config/i386/xtestintrin.h: Likewise.
	* config/i386/immintrin.h: Include <x86gprintrin.h> instead of
	<fxsrintrin.h>, <xsaveintrin.h>, <xsaveoptintrin.h>,
	<xsavesintrin.h>, <xsavecintrin.h>, <lzcntintrin.h>,
	<bmiintrin.h>, <bmi2intrin.h>, <xtestintrin.h>, <cetintrin.h>,
	<movdirintrin.h>, <sgxintrin.h, <pconfigintrin.h>,
	<waitpkgintrin.h>, <cldemoteintrin.h>, <enqcmdintrin.h>,
	<serializeintrin.h>, <tsxldtrkintrin.h>, <adxintrin.h>,
	<clwbintrin.h>, <clflushoptintrin.h>, <wbnoinvdintrin.h> and
	<pkuintrin.h>.
	(_wbinvd): Moved to config/i386/x86gprintrin.h.
	(_rdrand16_step): Likewise.
	(_rdrand32_step): Likewise.
	(_rdpid_u32): Likewise.
	(_readfsbase_u32): Likewise.
	(_readfsbase_u64): Likewise.
	(_readgsbase_u32): Likewise.
	(_readgsbase_u64): Likewise.
	(_writefsbase_u32): Likewise.
	(_writefsbase_u64): Likewise.
	(_writegsbase_u32): Likewise.
	(_writegsbase_u64): Likewise.
	(_rdrand64_step): Likewise.
	(_ptwrite64): Likewise.
	(_ptwrite32): Likewise.
	* config/i386/x86gprintrin.h: New file.
	* config/i386/x86intrin.h: Include <x86gprintrin.h>.  Don't
	include <ia32intrin.h>, <lwpintrin.h>, <tbmintrin.h>,
	<popcntintrin.h>, <mwaitxintrin.h> and <clzerointrin.h>.

gcc/testsuite/

	* gcc.target/i386/avx-1.c (__builtin_ia32_lwpval32): New to
	support <lwpintrin.h> included in <x86gprintrin.h>.
	(__builtin_ia32_lwpval64): Likewise.
	(__builtin_ia32_lwpins32): Likewise.
	(__builtin_ia32_lwpins64): Likewise.
	(__builtin_ia32_bextri_u32): New to support <tbmintrin.h>
	included in <x86gprintrin.h>.
	(__builtin_ia32_bextri_u64): Likewise.
	* gcc.target/i386/x86gprintrin-1.c: New test.
	* gcc.target/i386/x86gprintrin-2.c: Likewise.
	* gcc.target/i386/x86gprintrin-3.c: Likewise.
	* gcc.target/i386/x86gprintrin-4.c: Likewise.
	* gcc.target/i386/x86gprintrin-4a.c: Likewise.
	* gcc.target/i386/x86gprintrin-5.c: Likewise.
	* gcc.target/i386/x86gprintrin-5a.c: Likewise.
	* gcc.target/i386/x86gprintrin-5b.c: Likewise.
	* gcc.target/i386/x86gprintrin-6.c: Likewise.

libgcc/

	PR target/97148
	* config/i386/shadow-stack-unwind.h: Include <x86gprintrin.h>
	instead of <cetintrin.h>.
2020-10-09 05:08:41 -07:00
Ian Lance Taylor
2b6a53238f libgcc: increase required stack space for x86_64 -fsplit-stack
This accomodates increased space required by use of the xsavec
instruction in the dynamic linker trampoline.

libgcc/ChangeLog:

	* config/i386/morestack.S (BACKOFF) [x86_64]: Add 2048 bytes.
2020-08-03 16:01:59 -07:00
H.J. Lu
1890f2f0e2 x86: Move cpuinfo.h from libgcc to common/config/i386
Both x86 backend and libgcc define enum processor_features.  libgcc sets
enum processor_feature and x86 backend checks enum processor_feature.
They are very easy out of sync and it has happened multiple times in the
past.

1. Move cpuinfo.h from libgcc to common/config/i386 so that we can share
the same enum processor_features in x86 backend and libgcc.
2. Change __cpu_features2 to an array to support more processor features.
3. Add more processor features to enum processor_features.

gcc/

	PR target/95259
	* common/config/i386/cpuinfo.h: New file.
	(__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
	(__processor_model2): New.
	(CHECK___builtin_cpu_is): New.  Defined as empty if not defined.
	(has_cpu_feature): New function.
	(set_cpu_feature): Likewise.
	(get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c.  Use
	CHECK___builtin_cpu_is.  Return AMD CPU name.
	(get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c.  Use
	Use CHECK___builtin_cpu_is.  Return Intel CPU name.
	(get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
	Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
	FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
	FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
	FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
	FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
	FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
	FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
	FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
	FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
	FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
	FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
	FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
	FEATURE_XSAVEOPT and FEATURE_XSAVES
	(cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
	Also update cpu_model2.
	* common/config/i386/i386-cpuinfo.h (processor_vendor): Add
	Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
	(processor_features): Moved from gcc/config/i386/i386-builtins.c.
	Renamed F_XXX to FEATURE_XXX.  Add FEATURE_3DNOW, FEATURE_3DNOWP,
	FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
	FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
	FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
	FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
	FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
	FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
	FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
	FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
	FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
	FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
	FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
	FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
	FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
	(SIZE_OF_CPU_FEATURES): New.
	* config/i386/i386-builtins.c (processor_features): Removed.
	(isa_names_table): Replace F_XXX with FEATURE_XXX.
	(fold_builtin_cpu): Change __cpu_features2 to an array.

libgcc/

	PR target/95259
	* config/i386/cpuinfo.c: Don't include "cpuinfo.h".  Include
	"common/config/i386/i386-cpuinfo.h" and
	"common/config/i386/cpuinfo.h".
	(__cpu_features2): Changed to array.
	(get_amd_cpu): Removed.
	(get_intel_cpu): Likewise.
	(get_available_features): Likewise.
	(__cpu_indicator_init): Call cpu_indicator_init.
	* config/i386/cpuinfo.h: Removed.
2020-06-24 05:47:34 -07:00
Samuel Thibault
5e2eebc80d hurd: libgcc unwinding support over signal trampolines
libgcc/
	* config.host (md_unwind_header) <i[34567]86-*-gnu*>: Set to
	'i386/gnu-unwind.h'
	* config/i386/gnu-unwind.h: New file.

Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
2020-06-18 00:01:27 +02:00
Uros Bizjak
832c1192eb i386: Add __attribute__ ((gcc_struct)) to struct fenv [PR95418]
Windows ABI (MinGW) is different than Linux ABI when bitfileds are involved.
The following patch adds __attribute__ ((gcc_struct)) to struct fenv in order
to match the layout of x87 state image in memory.

2020-06-01  Uroš Bizjak  <ubizjak@gmail.com>

libatomic/ChangeLog:
	* config/x86/fenv.c (struct fenv): Add __attribute__ ((gcc_struct)).

libgcc/ChangeLog:
	* config/i386/sfp-exceptions.c (struct fenv):
	Add __attribute__ ((gcc_struct)).

libgfortran/ChangeLog:
	PR libfortran/95418
	* config/fpu-387.h (struct fenv): Add __attribute__ ((gcc_struct)).
2020-06-01 22:29:20 +02:00
H.J. Lu
5855bdfa06 libgcc: Move FEATURE_AVX512VP2INTERSECT after FEATURE_AVX512BF16
Move FEATURE_AVX512VP2INTERSECT after FEATURE_AVX512BF16 to avoid
changing libgcc ABI.

gcc/

	PR target/95212
	* config/i386/i386-builtins.c (processor_features): Move
	F_AVX512VP2INTERSECT after F_AVX512BF16.
	(isa_names_table): Likewise.

libgcc/

	PR target/95212
	* config/i386/cpuinfo.h (processor_features): Move
	FEATURE_AVX512VP2INTERSECT after FEATURE_AVX512BF16.
2020-05-21 05:33:11 -07:00
H.J. Lu
1e46a443f2 x86: Update VPCLMULQDQ check
Update VPCLMULQDQ check to support processors with AVX version of
VPCLMULQDQ.

	PR target/91695
	* config/i386/cpuinfo.c (get_available_features): Fix VPCLMULQDQ
	check.
2020-05-20 04:12:58 -07:00
H.J. Lu
453954451b x86: Add FEATURE_AVX512VP2INTERSECT and update GFNI check
Add FEATURE_AVX512VP2INTERSECT to libgcc so that enum processor_features
in libgcc matches enum processor_features in i386-builtins.c.  Update
GFNI check to support processors with SSE and AVX versions of GFNI.

	PR target/95212
	PR target/95220
	* config/i386/cpuinfo.c (get_available_features): Fix
	FEATURE_GFNI check.  Also check FEATURE_AVX512VP2INTERSECT.
	* config/i386/cpuinfo.h (processor_features): Add
	FEATURE_AVX512VP2INTERSECT.
2020-05-19 14:42:22 -07:00
Uros Bizjak
d3a1459cd4 i386: Use generic division to generate INEXACT exception
Introduce math_force_eval_div to use generic division to generate
INEXACT as well as INVALID and DIVZERO exceptions.

libgcc/ChangeLog:

	* config/i386/sfp-exceptions.c (__math_force_eval): Remove.
	(__math_force_eval_div): New define.
	(__sfp_handle_exceptions): Use __math_force_eval_div to use
	generic division to generate INVALID, DIVZERO and INEXACT
	exceptions.

libatomic/ChangeLog:

	* config/x86/fenv.c (__math_force_eval): Remove.
	(__math_force_eval_div): New define.
	(__atomic_deraiseexcept): Use __math_force_eval_div to use
	generic division to generate INVALID, DIVZERO and INEXACT
	exceptions.

libgfortran/ChangeLog:

	* config/fpu-387.h (__math_force_eval): Remove.
	(__math_force_eval_div): New define.
	(local_feraiseexcept): Use __math_force_eval_div to use
	generic division to generate INVALID, DIVZERO and INEXACT
	exceptions.
	(struct fenv): Define named struct instead of typedef.
2020-05-06 23:01:32 +02:00
Uros Bizjak
afb9b71081 i386: Use generic division to generate INVALID and DIVZERO exceptions
Introduce math_force_eval to evaluate generic division to generate
INVALID and DIVZERO exceptions.

libgcc/ChangeLog:

	* config/i386/sfp-exceptions.c (__math_force_eval): New define.
	(__sfp_handle_exceptions): Use __math_force_eval to evaluete
	generic division to generate INVALID and DIVZERO exceptions.

libatomic/ChangeLog:

	* config/x86/fenv.c (__math_force_eval): New define.
	(__atomic_feraiseexcept): Use __math_force_eval to evaluete
	generic division to generate INVALID and DIVZERO exceptions.

libgfortran/ChangeLog:

	* config/fpu-387.h (__math_force_eval): New define.
	(local_feraiseexcept): Use __math_force_eval to evaluete
	generic division to generate INVALID and DIVZERO exceptions.
2020-05-01 19:20:57 +02:00
Uros Bizjak
df73e5842f i386: Remove unneeded assignments when triggering SSE exceptions
According to "Intel 64 and IA32 Arch SDM, Vol. 3:

"Because SIMD floating-point exceptions are precise and occur immediately,
the situation does not arise where an x87 FPU instruction, a WAIT/FWAIT
instruction, or another SSE/SSE2/SSE3 instruction will catch a pending
unmasked SIMD floating-point exception."

Remove unneeded assignments to volatile memory.

libgcc/ChangeLog:

	* config/i386/sfp-exceptions.c (__sfp_handle_exceptions) [__SSE_MATH__]:
	Remove unneeded assignments to volatile memory.

libatomic/ChangeLog:

	* config/x86/fenv.c (__atomic_feraiseexcept) [__SSE_MATH__]:
	Remove unneeded assignments to volatile memory.

libgfortran/ChangeLog:

	* config/fpu-387.h (local_feraiseexcept) [__SSE_MATH__]:
	Remove unneeded assignments to volatile memory.
2020-04-19 14:27:12 +02:00
H.J. Lu
bf6465d046 i386: Properly pop restore token in signal frame
Linux CET kernel places a restore token on shadow stack for signal
handler to enhance security.  The restore token is 8 byte and aligned
to 8 bytes.  It is usually transparent to user programs since kernel
will pop the restore token when signal handler returns.  But when an
exception is thrown from a signal handler, now we need to pop the
restore token from shadow stack.  For x86-64, we just need to treat
the signal frame as normal frame.  For i386, we need to search for
the restore token to check if the original shadow stack is 8 byte
aligned.  If the original shadow stack is 8 byte aligned, we just
need to pop 2 slots, one restore token, from shadow stack.  Otherwise,
we need to pop 3 slots, one restore token + 4 byte padding, from
shadow stack.

This patch also includes 2 tests, one has a restore token with 4 byte
padding and one without.

Tested on Linux/x86-64 CET machine with and without -m32.

libgcc/

	PR libgcc/85334
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
	New.

gcc/testsuite/

	PR libgcc/85334
	* g++.target/i386/pr85334-1.C: New test.
	* g++.target/i386/pr85334-2.C: Likewise.
2020-02-10 07:59:10 -08:00
Jakub Jelinek
8d9254fc8a Update copyright years.
From-SVN: r279813
2020-01-01 12:51:42 +01:00
Hongtao Liu
a9fcfec30f Add TIGERLAKE and COOPERLAKE to GCC.
2019-08-20  Lili Cui  <lili.cui@intel.com>

gcc/
	* common/config/i386/i386-common.c
	(processor_names): Add tigerlake and cooperlake.
	(processor_alias_table): Add tigerlake and cooperlake.
	* config.gcc: Add -march=tigerlake and cooperlake.
	* config/i386/driver-i386.c
	(host_detect_local_cpu): Detect tigerlake and cooperlake.
	Add "has_avx" to classify processor.
	* config/i386/i386-builtins.c (processor_model):
	Add M_INTEL_COREI7_TIGERLAKE and M_INTEL_COREI7_COOPERLAKE.
	(arch_names_table): Add tigerlake and cooperlake.
	(get_builtin_code_for_version) : Handle PROCESSOR_TIGERLAKE and
	PROCESSOR_COOPERLAKE.
	* config/i386/i386-c.c
	(ix86_target_macros_internal): Handle tigerlake and cooperlake.
	* config/i386/i386-options.c
	(m_TIGERLAKE)  : Define.
	(m_COOPERLAKE) : Ditto.
	(m_CORE_AVX512): Ditto.
	(processor_cost_table): Add cascadelake.
	(ix86_option_override_internal): Hadle PTA_MOVDIRI, PTA_MOVDIR64B.
	* config/i386/i386.h
	(ix86_size_cost) : Define TARGET_TIGERLAKE and TARGET_COOPERLAKE.
	(processor_type) : Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
	(PTA_MOVDIRI): Ditto.
	(PTA_MOVDIR64B): Ditto.
	(PTA_COOPERLAKE) : Ditto.
	(PTA_TIGERLAKE)  : Ditto.
	(processor_type) : Add PROCESSOR_TIGERLAKE and PROCESSOR_COOPERLAKE.
	* doc/extend.texi: Add tigerlake and cooperlake.
	* doc/invoke.texi: Add tigerlake and cooperlake.

gcc/testsuite/
	* gcc.target/i386/funcspec-56.inc: Handle new march.
	* g++.target/i386/mv16.C: Handle new march

libgcc/
	* config/i386/cpuinfo.h: Add INTEL_COREI7_TIGERLAKE and
	INTEL_COREI7_COOPERLAKE.

From-SVN: r274693
2019-08-20 07:06:03 +00:00
Rainer Orth
ccd1242eec Remove obsolete Solaris 10 support
libstdc++-v3:
	* config/os/solaris/solaris2.10: Move to ...
	* config/os/solaris: ... this.
	* configure.host (os_include_dir): Adapt.
	(abi_baseline_pair): Remove Solaris 10 handling.
	* config/abi/post/i386-solaris2.10: Remove.
	* config/abi/post/sparc-solaris2.10: Remove.
	* config/abi/post/i386-solaris2.11: Rename to ...
	* config/abi/post/i386-solaris: ... this.
	* config/abi/post/sparc-solaris2.11: Rename to ...
	* config/abi/post/sparc-solaris: ... this.

	* libsupc++/new_opa.cc [_GLIBCXX_HAVE_MEMALIGN] [__sun]: Remove
	workaround.

	* testsuite/ext/enc_filebuf/char/13598.cc: Remove *-*-solaris2.10
	xfail.

	libsanitizer:
	* configure.ac (have_dl_iterate_phdr): Remove *-*-solaris2.10*
	handling.
	* configure: Regenerate.

	libgcc:
	* config.host: Simplify various *-*-solaris2.1[0-9]* to
	*-*-solaris2*.
	* configure.ac: Likewise.
	* configure: Regenerate.

	* config/i386/sol2-unwind.h (x86_fallback_frame_state): Remove
	Solaris 10 and Solaris 11 < snv_125 handling.

	libbacktrace:
	* configure.ac (have_dl_iterate_phdr): Remove *-*-solaris2.10*
	handling.
	* configure: Regenerate.

	gcc/testsuite:
	* gcc.dg/atomic/c11-atomic-exec-4.c: Simplify triplet to
	*-*-solaris2*.
	* gcc.dg/atomic/c11-atomic-exec-5.c: Likewise.
	* gcc.dg/c99-math-double-1.c: Likewise.
	* gcc.dg/c99-math-float-1.c: Likewise.
	* gcc.dg/c99-math-long-double-1.c: Likewise.
	* gcc.misc-tests/linkage.exp: Simplify triplet to
	x86_64-*-solaris2*.

	* gcc.target/i386/mcount_pic.c: Remove *-*-solaris2.10* && !gld
	xfail.
	* gcc.target/i386/pr63620.c: Likewise.

	* lib/target-supports.exp (check_sse_os_support_available): Remove
	Solaris 9/x86 workaround.

	gcc:
	* config.gcc: Move *-*-solaris2.10* from obsolete configurations
	to unsupported ones.
	Simplify x86_64-*-solaris2.1[0-9]* to x86_64-*-solaris2*.
	* config.host: Likewise.
	* config/i386/sol2.h (ASM_COMMENT_START): Remove.
	* config/sparc/driver-sparc.c (host_detect_local_cpu) [__sun__ &&
	__svr4__]: Remove "brand" fallback.
	[!KSTAT_DATA_STRING]: Remove.
	* configure.ac (gcc_cv_ld_hidden): Simplify *-*-solaris2.1[0-9]*
	to *-*-solaris2*.
	(comdat_group): Likewise.
	(set_have_as_tls): Likewise.
	(gcc_cv_target_dl_iterate_phdr): Likewise.
	(gcc_cv_as_shf_merge): Remove Solaris 10/x86 workaround.
	(gcc_cv_ld_aligned_shf_merge): Remove Solaris 10/SPARC workaround.
	* configure: Regenerate.
	* doc/install.texi: Simplify Solaris target triplets.
	(Specific, i?86-*-solaris2*): Remove Solaris 10 references.
	(Specific, *-*-solaris2*): Document Solaris 10 removal.
	Remove Solaris 10 references.
	Remove obsolete Solaris bug reference.
	(Specific, sparc-sun-solaris2.10): Remove.

From-SVN: r271183
2019-05-14 17:17:23 +00:00
Hongtao Liu
4f0e90fae9 Enable support for bfloat16 which will be in Future Cooper Lake.
There are 3 instructions for AVX512BF16: VCVTNE2PS2BF16, VCVTNEPS2BF16 and
DPBF16PS instructions, which are Vector Neural Network Instructions
supporting:
    
- VCVTNE2PS2BF16: Convert Two Packed Single Data to One Packed BF16 Data.
- VCVTNEPS2BF16: Convert Packed Single Data to Packed BF16 Data.
- VDPBF16PS: Dot Product of BF16 Pairs Accumulated into Packed Single Precision.

2019-05-07  Wei Xiao  <wei3.xiao@intel.com>

	* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512BF16_SET
	OPTION_MASK_ISA_AVX512BF16_UNSET, OPTION_MASK_ISA2_AVX512BW_UNSET): New.
	(OPTION_MASK_ISA2_AVX512F_UNSET): Add OPTION_MASK_ISA_AVX512BF16_UNSET.
	(ix86_handle_option): Handle -mavx512bf16.
	* config.gcc: Add avx512bf16vlintrin.h and avx512bf16intrin.h
	to extra_headers.
	* config/i386/avx512bf16vlintrin.h: New.
	* config/i386/avx512bf16intrin.h: New.
	* config/i386/cpuid.h (bit_AVX512BF16): New.
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect BF16.
	* config/i386/i386-builtin-types.def: Add new types.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__AVX512BF16__.
	* config/i386/i386-option.c (ix86_target_string): Add -mavx512bf16.
	(ix86_option_override_internal): Handle BF16.
	(ix86_valid_target_attribute_inner_p): Ditto.
	* config/i386/i386-expand.c (ix86_expand_args_builtin): Ditto.
	* config/i386/i386-builtin.c (enum processor_features): Add
	F_AVX512BF16.
	(static const _isa_names_table isa_names_table): Ditto.
	* config/i386/i386.h (TARGET_AVX512BF16, TARGET_AVX512BF16_P): New.
	(PTA_AVX512BF16): Ditto.
	* config/i386/i386.opt: Add -mavx512bf16.
	* config/i386/immintrin.h: Include avx512bf16intrin.h
	and avx512bf16vlintrin.h.
	* config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode><mask_name>,
	avx512f_cvtneps2bf16_<mode><mask_name>,
	avx512f_dpbf16ps_<mode><mask_half_name>): New define_insn patterns.
	* config/i386/subst.md (mask_half): Add new subst.
	* doc/invoke.texi: Document -mavx512bf16.

2019-05-07  Wei Xiao  <wei3.xiao@intel.com>

	* gcc.target/i386/avx512bf16-vcvtne2ps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16-vcvtneps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16-vdpbf16ps-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vcvtne2ps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vcvtneps2bf16-1.c: New test.
	* gcc.target/i386/avx512bf16vl-vdpbf16ps-1.c: New test.
	* gcc.target/i386/builtin_target.c: Handle avx512bf16.
	* gcc.target/i386/sse-12.c: Add -mavx512bf16.
	* gcc.target/i386/sse-13.c: Ditto.
	* gcc.target/i386/sse-14.c: Ditto.
	* gcc.target/i386/sse-22.c: Ditto.
	* gcc.target/i386/sse-23.c: Ditto.
	* g++.dg/other/i386-2.C: Ditto.
	* g++.dg/other/i386-3.C: Ditto.

2019-05-07  Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/cpuinfo.c (get_available_features): Detect BF16.
	* config/i386/cpuinfo.h (enum processor_features): Add
	FEATURE_AVX512BF16.

From-SVN: r271006
2019-05-08 10:21:40 +00:00
Uros Bizjak
d1ac2471e7 sfp-exceptions.c (__sfp_handle_exceptions): Remove stray semicolon.
* config/i386/sfp-exceptions.c (__sfp_handle_exceptions):
	Remove stray semicolon.

From-SVN: r268405
2019-01-31 00:09:40 +01:00
Jakub Jelinek
a554497024 Update copyright years.
From-SVN: r267494
2019-01-01 13:31:55 +01:00
Wei Xiao
5d54c79858 driver-i386.c (host_detect_local_cpu): Detect cascadelake.
gcc/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* config/i386/driver-i386.c (host_detect_local_cpu): Detect cascadelake.
	* config/i386/i386.c (fold_builtin_cpu): Handle cascadelake.
	* doc/extend.texi: Add cascadelake.

gcc/testsuite/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* g++.target/i386/mv16.C: Handle new march.
	* gcc.target/i386/builtin_target.c: Ditto.

libgcc/ChangeLog
2018-12-18  Wei Xiao  <wei3.xiao@intel.com>

	* config/i386/cpuinfo.c (get_intel_cpu): Handle cascadelake.
	* config/i386/cpuinfo.h: Add INTEL_COREI7_CASCADELAKE.

From-SVN: r267226
2018-12-18 03:41:44 +00:00
Venkataramanan Kumar
2901f42f4b Enable support for next generation AMD Zen CPU, via -march=znver2.
gcc/ChangeLog:
	* common/config/i386/i386-common.c (processor_alias_table): Add znver2 entry.
	* config.gcc (i[34567]86-*-linux* | ...): Add znver2.
	(case ${target}): Add znver2.
	* config/i386/driver-i386.c: (host_detect_local_cpu): Let
	-march=native recognize znver2 processors.
	* config/i386/i386-c.c (ix86_target_macros_internal): Add znver2.
	* config/i386/i386.c (m_znver2): New definition.
	(m_ZNVER): New definition.
	(m_AMD_MULTIPLE): Includes m_znver2.
	(processor_cost_table): Add znver2 entry.
	(processor_target_table): Add znver2 entry.
	(get_builtin_code_for_version): Set priority for
	PROCESSOR_ZNVER2.
	(processor_model): Add M_AMDFAM17H_ZNVER2.
	(arch_names_table): Ditto.
	(ix86_reassociation_width): Include znver2. 
	* config/i386/i386.h (TARGET_znver2): New definition.
	(struct ix86_size_cost): Add TARGET_ZNVER2.
	(enum processor_type): Add PROCESSOR_ZNVER2.
	* config/i386/i386.md (define_attr "cpu"): Add znver2.
	* config/i386/x86-tune-costs.h: (processor_costs) Add znver2 costs.
	* config/i386/x86-tune-sched.c: (ix86_issue_rate): Add znver2.
	(ix86_adjust_cost): Add znver2.
	* config/i386/x86-tune.def:  Replace m_ZNVER1 by m_ZNVER
	* gcc/doc/extend.texi: Add details about znver2.
	* gcc/doc/invoke.texi: Add details about znver2.

libgcc/ChangeLog
	* config/i386/cpuinfo.c: (get_amd_cpu): Add znver2.
	* config/i386/cpuinfo.h(processor_subtypes): Ditto.

From-SVN: r265775
2018-11-04 11:17:54 +00:00
Uros Bizjak
0a76bba487 crtprec.c (set_precision): Use fnstcw instead of fstcw.
* config/i386/crtprec.c (set_precision): Use fnstcw instead of fstcw.

From-SVN: r264649
2018-09-26 17:25:15 +02:00
H.J. Lu
b72e71a39c i386: Remove _Unwind_Frames_Increment
CET kernel has been changed to place a restore token on shadow stack for
signal handler to enhance security.  It is usually transparent to user
programs since kernel will pop the restore token when signal handler
returns.  But when an exception is thrown from a signal handler, now
we need to remove _Unwind_Frames_Increment to pop the the restore token
from shadow stack.  Otherwise, we get

FAIL: g++.dg/torture/pr85334.C   -O0  execution test
FAIL: g++.dg/torture/pr85334.C   -O1  execution test
FAIL: g++.dg/torture/pr85334.C   -O2  execution test
FAIL: g++.dg/torture/pr85334.C   -O3 -g  execution test
FAIL: g++.dg/torture/pr85334.C   -Os  execution test
FAIL: g++.dg/torture/pr85334.C   -O2 -flto -fno-use-linker-plugin -flto-partition=none  execution test

	PR libgcc/85334
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
	Removed.

From-SVN: r263030
2018-07-27 07:40:47 -07:00
Olga Makhotina
a548a5a1d6 config.gcc: Support "tremont".
2018-06-07  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

        * config.gcc: Support "tremont".
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect "tremont".
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        PROCESSOR_TREMONT.
        * config/i386/i386.c (m_TREMONT): Define.
        (processor_target_table): Add "tremont".
        (PTA_TREMONT): Define.
        (ix86_lea_outperforms): Add TARGET_TREMONT.
        (get_builtin_code_for_version): Handle PROCESSOR_TREMONT.
        (fold_builtin_cpu): Add M_INTEL_TREMONT, replace M_INTEL_GOLDMONT
        and M_INTEL_GOLDMONT_PLUS.
        (fold_builtin_cpu): Add "tremont".
        (ix86_add_stmt_cost): Add TARGET_TREMONT.
        (ix86_option_override_internal): Add "tremont".
        * config/i386/i386.h (processor_costs): Define TARGET_TREMONT.
        (processor_type): Add PROCESSOR_TREMONT.
        * config/i386/x86-tune.def: Add m_TREMONT.
        * doc/invoke.texi: Add tremont as x86 -march=/-mtune= CPU type.

gcc/testsuite/

        * gcc.target/i386/funcspec-56.inc: Test arch=tremont.

libgcc/

        * config/i386/cpuinfo.h (processor_types): Add INTEL_TREMONT.

From-SVN: r261270
2018-06-07 13:07:05 +02:00
Uros Bizjak
8b8003ed54 re PR target/85591 (__builtin_cpu_is() is not detecting bdver2 with Model = 0x02)
PR target/85591
	* config/i386/cpuinfo.c (get_amd_cpu): Return
	AMDFAM15H_BDVER2 for AMDFAM15H model 0x2.

From-SVN: r261036
2018-05-31 21:45:54 +02:00
Olga Makhotina
74b2bb19f3 config.gcc: Support "goldmont-plus".
2018-05-17  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont-plus".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect
	"goldmont-plus".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT_PLUS.
	* config/i386/i386.c (m_GOLDMONT_PLUS): Define.
	(processor_target_table): Add "goldmont-plus".
	(PTA_GOLDMONT_PLUS): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS.
	(fold_builtin_cpu): Add "goldmont-plus".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS.
	(ix86_option_override_internal): Add "goldmont-plus".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS.
	(processor_type): Add PROCESSOR_GOLDMONT_PLUS.
	* config/i386/x86-tune.def: Add m_GOLDMONT_PLUS.
	* doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type.

libgcc/

	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont-plus.
	* gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus.

From-SVN: r260307
2018-05-17 10:13:23 +02:00
Olga Makhotina
50e461dfe3 config.gcc: Support "goldmont".
2018-05-08  Olga Makhotina  <olga.makhotina@intel.com>

gcc/

	* config.gcc: Support "goldmont".
	* config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont".
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	PROCESSOR_GOLDMONT.
	* config/i386/i386.c (m_GOLDMONT): Define.
	(processor_target_table): Add "goldmont".
	(PTA_GOLDMONT): Define.
	(ix86_lea_outperforms): Add TARGET_GOLDMONT.
	(get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT.
	(fold_builtin_cpu): Add M_INTEL_GOLDMONT.
	(fold_builtin_cpu): Add "goldmont".
	(ix86_add_stmt_cost): Add TARGET_GOLDMONT.
	(ix86_option_override_internal): Add "goldmont".
	* config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT.
	(processor_type): Add PROCESSOR_GOLDMONT.
	* config/i386/i386.md: Add CPU "glm".
	* config/i386/glm.md: New file.
	* config/i386/x86-tune.def: Add m_GOLDMONT.
	* doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type.

libgcc/
	* config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT.
	* config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont.

gcc/testsuite/

	* gcc.target/i386/builtin_target.c: Test goldmont.
	* gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and
	arch=silvermont.

From-SVN: r260042
2018-05-08 14:23:08 +02:00
H.J. Lu
ffc2fc06e3 x86: Update __CET__ check
__CET__ has been changed by revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

to

    (__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full
    (__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full

We should check (__CET__ & 2) != 0 for shadow stack.

libgcc/

	* config/i386/linux-unwind.h: Add (__CET__ & 2) != 0 check
	when including "config/i386/shadow-stack-unwind.h".

libitm/

	* config/x86/sjlj.S (_ITM_beginTransaction): Add
	(__CET__ & 2) != 0 check for shadow stack.
	(GTM_longjmp): Likewise.

From-SVN: r259621
2018-04-24 15:15:51 -07:00
H.J. Lu
5707be3c7d libgcc/CET: Skip signal frames when unwinding shadow stack
When -fcf-protection -mcet is used, I got

FAIL: g++.dg/eh/sighandle.C

(gdb) bt
 #0  _Unwind_RaiseException (exc=exc@entry=0x416ed0)
    at /export/gnu/import/git/sources/gcc/libgcc/unwind.inc:140
 #1  0x00007ffff7d9936b in __cxxabiv1::__cxa_throw (obj=<optimized out>,
    tinfo=0x403dd0 <typeinfo for int@@CXXABI_1.3>, dest=0x0)
    at /export/gnu/import/git/sources/gcc/libstdc++-v3/libsupc++/eh_throw.cc:90
 #2  0x0000000000401255 in sighandler (signo=11, si=0x7fffffffd6f8,
    uc=0x7fffffffd5c0)
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:9
 #3  <signal handler called> <<<< Signal frame which isn't on shadow stack
 #4  dosegv ()
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:14
 #5  0x00000000004012e3 in main ()
    at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:30
(gdb) p frames
$6 = 5
(gdb)

frame count should be 4, not 5.  This patch skips signal frames when
unwinding shadow stack.

gcc/testsuite/

	PR libgcc/85334
	* g++.dg/torture/pr85334.C: New test.

libgcc/

	PR libgcc/85334
	* unwind-generic.h (_Unwind_Frames_Increment): New.
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
	Likewise.
	* unwind.inc (_Unwind_RaiseException_Phase2): Increment frame
	count with _Unwind_Frames_Increment.
	(_Unwind_ForcedUnwind_Phase2): Likewise.

From-SVN: r259502
2018-04-19 10:05:39 -07:00
H.J. Lu
5f9ca0b8bf libgcc/CET: Add _CET_ENDBR to __stack_split_initialize
Program received signal SIGSEGV, Segmentation fault.
__stack_split_initialize ()
    at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751
751		leaq	-16000(%rsp),%rax	# We should have at least 16K.
Missing separate debuginfos, use: dnf debuginfo-install libgcc-8.0.1-0.21.0.fc28.x86_64
(gdb) disass
Dump of assembler code for function __stack_split_initialize:
=> 0x0000000000402858 <+0>:	lea    -0x3e80(%rsp),%rax
   0x0000000000402860 <+8>:	mov    %rax,%fs:0x70
   0x0000000000402869 <+17>:	sub    $0x8,%rsp
   0x000000000040286d <+21>:	mov    %rsp,%rdi
   0x0000000000402870 <+24>:	mov    $0x3e80,%esi
   0x0000000000402875 <+29>:	callq  0x401810 <__generic_morestack_set_initial_sp>
   0x000000000040287a <+34>:	add    $0x8,%rsp
   0x000000000040287e <+38>:	retq
End of assembler dump.
(gdb)

This patch adds the missing ENDBR to __stack_split_initialize.

	PR libgcc/85379
	* config/i386/morestack.S (__stack_split_initialize): Add
	_CET_ENDBR.

From-SVN: r259497
2018-04-19 08:22:27 -07:00
Jakub Jelinek
a57f99ba1c re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/cpuinfo.c (set_feature): Wrap into do while (0) to avoid
	-Wdangling-else warnings.  Mask shift counts to avoid
	-Wshift-count-negative and -Wshift-count-overflow false positives.

From-SVN: r259398
2018-04-16 13:22:40 +02:00
H.J. Lu
059cc8aca7 i386: Enable AVX/AVX512 features only if supported by OSXSAVE
Enable AVX and AVX512 features only if their states are supported by
OSXSAVE.

	PR target/85100
	* config/i386/cpuinfo.c (XCR_XFEATURE_ENABLED_MASK): New.
	(XSTATE_FP): Likewise.
	(XSTATE_SSE): Likewise.
	(XSTATE_YMM): Likewise.
	(XSTATE_OPMASK): Likewise.
	(XSTATE_ZMM): Likewise.
	(XSTATE_HI_ZMM): Likewise.
	(XCR_AVX_ENABLED_MASK): Likewise.
	(XCR_AVX512F_ENABLED_MASK): Likewise.
	(get_available_features): Enable AVX and AVX512 features only
	if their states are supported by OSXSAVE.

From-SVN: r258954
2018-03-29 06:14:06 -07:00
Igor Tsimbalist
f262038551 Fix PR85025: libgcc/config/i386/shadow-stack-unwind.h is wrong.
PR target/85025
	* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Extra):
	Fix a typo, tmp => 255.

From-SVN: r258763
2018-03-22 12:22:31 +01:00
Jakub Jelinek
ae6dca8c65 re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: shift exponent 32 is too large for 32-bit type 'int')
PR target/84945
	* config/i386/i386.c (fold_builtin_cpu): For features above 31
	use __cpu_features2 variable instead of __cpu_model.__cpu_features[0].
	Use 1U instead of 1.  Formatting fixes.

	* gcc.target/i386/pr84945.c: New test.

	* config/i386/cpuinfo.h (__cpu_features2): Declare.
	* config/i386/cpuinfo.c (__cpu_features2): New variable for
	ifndef SHARED only.
	(set_feature): Define.
	(get_available_features): Use set_feature macro.  Set __cpu_features2
	to the second word of features ifndef SHARED.

From-SVN: r258673
2018-03-20 09:14:42 +01:00
Julia Koval
c36b04c146 Add builtin_cpu for cannonlake and new isa features.
gcc/
	* config/i386/i386.c (F_AVX512VBMI2, F_GFNI, F_VPCLMULQDQ,
	F_AVX512VNNI, F_AVX512BITALG): New.

gcc/testsuite/
	* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
	cannonlake.
	(check_features): Add avx512vbmi2, gfni, vpclmulqdq, avx512vnni,
	avx512bitalg.

libgcc/
	* config/i386/cpuinfo.c (get_available_features): Add
	FEATURE_AVX512VBMI2, FEATURE_GFNI, FEATURE_VPCLMULQDQ,
	FEATURE_AVX512VNNI, FEATURE_AVX512BITALG.
	* config/i386/cpuinfo.h (processor_features) Add
	FEATURE_AVX512VBMI2, FEATURE_GFNI, FEATURE_VPCLMULQDQ,
	FEATURE_AVX512VNNI, FEATURE_AVX512BITALG.

From-SVN: r258551
2018-03-15 08:52:36 +01:00
Julia Koval
79ab536427 Split-up -march=icelake on -march=icelake-server and -march=icelake-client
Split-up -march=icelake on -march=icelake-server and -march=icelake-client
gcc/
	* config.gcc (icelake-client, icelake-server): New.
	(icelake): Remove.
	* config/i386/i386.c (initial_ix86_tune_features): Extend to 64 bit.
	(initial_ix86_arch_features): Ditto.
	(PTA_SKYLAKE): Add SGX.
	(PTA_ICELAKE): Remove.
	(PTA_ICELAKE_CLIENT): New.
	(PTA_ICELAKE_SERVER): New.
	(ix86_option_override_internal): Split up icelake on icelake client and
	icelake server.
	(get_builtin_code_for_version): Ditto.
	(fold_builtin_cpu): Ditto.
	* config/i386/driver-i386.c (config/i386/driver-i386.c): Ditto.
	* config/i386/i386-c.c (ix86_target_macros_internal): Ditto
	* config/i386/i386.h (processor_type): Ditto.
	* doc/invoke.texi: Ditto.

gcc/testsuite/
	* g++.dg/ext/mv16.C: Split up icelake on icelake client and
	icelake-server.
	* gcc.target/i386/funcspec-56.inc: Ditto.

libgcc/
	* config/i386/cpuinfo.h (processor_subtypes): Split up icelake on
	icelake-client and icelake-server.

From-SVN: r258518
2018-03-14 11:26:38 +01:00
Jakub Jelinek
ce579a4fe0 re PR debug/83917 (with -mcall-ms2sysv-xlogues, stepping into x86 tail-call restore stub gives bad backtrace)
PR debug/83917
	* configure.ac (AS_HIDDEN_DIRECTIVE): AC_DEFINE_UNQUOTED this to
	$asm_hidden_op if visibility ("hidden") attribute works.
	(HAVE_AS_CFI_SECTIONS): New AC_DEFINE.
	* config/i386/i386-asm.h: Don't include auto-host.h.
	(PACKAGE_VERSION, PACKAGE_NAME, PACKAGE_STRING, PACKAGE_TARNAME,
	PACKAGE_URL): Don't undefine.
	(USE_GAS_CFI_DIRECTIVES): Don't use nor define this macro, instead
	guard cfi_startproc only on ifdef __GCC_HAVE_DWARF2_CFI_ASM.
	(FN_HIDDEN): Change guard from #ifdef HAVE_GAS_HIDDEN to
	#ifdef AS_HIDDEN_DIRECTIVE, use AS_HIDDEN_DIRECTIVE macro in the
	definition instead of hardcoded .hidden.
	* config/i386/cygwin.S: Include i386-asm.h first before .cfi_sections
	directive.  Use #ifdef HAVE_AS_CFI_SECTIONS rather than
	#ifdef HAVE_GAS_CFI_SECTIONS_DIRECTIVE to guard .cfi_sections.
	(USE_GAS_CFI_DIRECTIVES): Don't define.
	* configure: Regenerated.
	* config.in: Likewise.

From-SVN: r258057
2018-02-28 09:59:15 +01:00
Jakub Jelinek
e586831971 re PR debug/83917 (with -mcall-ms2sysv-xlogues, stepping into x86 tail-call restore stub gives bad backtrace)
PR debug/83917
	* config/i386/i386-asm.h (PACKAGE_VERSION, PACKAGE_NAME,
	PACKAGE_STRING, PACKAGE_TARNAME, PACKAGE_URL): Undefine between
	inclusion of auto-target.h and auto-host.h.
	(USE_GAS_CFI_DIRECTIVES): Define if not defined already based on
	__GCC_HAVE_DWARF2_CFI_ASM.
	(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
	cfi_def_cfa_register, cfi_def_cfa, cfi_register, cfi_offset, cfi_push,
	cfi_pop): Define.
	* config/i386/cygwin.S: Don't include auto-host.h here, just
	define USE_GAS_CFI_DIRECTIVES to 1 or 0 and include i386-asm.h.
	(cfi_startproc, cfi_endproc, cfi_adjust_cfa_offset,
	cfi_def_cfa_register, cfi_register, cfi_push, cfi_pop): Remove.
	* config/i386/resms64fx.h: Add cfi_* directives.
	* config/i386/resms64x.h: Likewise.

From-SVN: r258010
2018-02-26 20:46:34 +01:00
Igor Tsimbalist
95df04335b Additional fix for PR 84239.
PR target/84239
	* libgcc/config/i386/shadow-stack-unwind.h (_Unwind_Frames_Extra):
	Include cetintrin.h not x86intrin.h.

From-SVN: r257730
2018-02-16 11:19:14 +01:00