Commit Graph

91814 Commits

Author SHA1 Message Date
John Snow
25de7f5012 python/aqmp: fix ConnectError string method
When ConnectError is used to wrap an Exception that was initialized
without an error message, we are treated to a traceback with a rubbish
line like this:

... ConnectError: Failed to establish session:

Correct this to use the name of an exception as a fallback message:

... ConnectError: Failed to establish session: EOFError

Better!

Signed-off-by: John Snow <jsnow@redhat.com>
Reported-by: Thomas Huth <thuth@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-id: 20211111143719.2162525-3-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-11-16 14:26:36 -05:00
John Snow
f26bd6ff21 python/aqmp: Fix disconnect during capabilities negotiation
If we receive ConnectionResetError (ECONNRESET) while attempting to
perform capabilities negotiation -- prior to the establishment of the
async reader/writer tasks -- the disconnect function is not aware that
we are in an error pathway.

As a result, when attempting to close the StreamWriter, we'll see the
same ConnectionResetError that caused us to initiate a disconnect in the
first place, which will cause the disconnect task itself to fail, which
emits a CRITICAL logging event.

I still don't know if there's a smarter way to check to see if an
exception received at this point is "the same" exception as the one that
caused the initial disconnect, but for now the problem can be avoided by
improving the error pathway detection in the exit path.

Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: John Snow <jsnow@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-id: 20211111143719.2162525-2-jsnow@redhat.com
Signed-off-by: John Snow <jsnow@redhat.com>
2021-11-16 14:26:36 -05:00
Richard Henderson
2b22e7540d m68k pull request 20211109
Add virt machine types for 6.1 and 6.2
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Merge tag 'm68k-for-6.2-pull-request' of git://github.com/vivier/qemu-m68k into staging

m68k pull request 20211109

Add virt machine types for 6.1 and 6.2

# gpg: Signature made Tue 09 Nov 2021 12:14:39 PM CET
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]

* tag 'm68k-for-6.2-pull-request' of git://github.com/vivier/qemu-m68k:
  hw: m68k: virt: Add compat machine for 6.2
  hw: m68k: virt: Add compat machine for 6.1

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-09 13:16:56 +01:00
Laurent Vivier
6ed25621f2 hw: m68k: virt: Add compat machine for 6.2
Add the missing machine type for m68k/virt

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20211106194158.4068596-3-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 12:14:18 +01:00
Laurent Vivier
6837f29976 hw: m68k: virt: Add compat machine for 6.1
Add the missing machine type for m68k/virt

Cc: qemu-stable@nongnu.org
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20211106194158.4068596-2-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 12:14:07 +01:00
Richard Henderson
21cc2bda7f Trivial branch patches pull request 20211109
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Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request' into staging

Trivial branch patches pull request 20211109

# gpg: Signature made Tue 09 Nov 2021 10:12:04 AM CET
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]

* remotes/vivier/tags/trivial-branch-for-6.2-pull-request:
  docs/about/deprecated: Remove empty 'related binaries' section
  tests/qtest/virtio-net: fix hotplug test case
  meson: Fix 'interpretor' typo
  .mailmap: Fix more contributor entries
  hw/m68k: Fix typo in SPDX tag
  hmp: Add shortcut to stop command to match cont

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-09 11:34:30 +01:00
Philippe Mathieu-Daudé
66d96a1901 docs/about/deprecated: Remove empty 'related binaries' section
Commit 497a30dbb0 ("qemu-img: Require -F with -b backing image")
removed the content of the "Related binaries" section but forgot
to remove the section title. Since it is now empty, remove it too.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Yanan Wang <wangyanan55@huawei.com>
Reviewed-by: Joaquin de Andres <me@xcancerberox.com.ar>
Message-Id: <20211105142656.145791-1-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 10:11:27 +01:00
Laurent Vivier
4a778dac9e tests/qtest/virtio-net: fix hotplug test case
virtio-net-test has an hotplug testcase that is never executed.

This is because the testcase is attached to virtio-pci interface
rather than to virtio-net-pci.

  $ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -l | grep hotplug
  /x86_64/.../pci-ohci-tests/ohci_pci-test-hotplug
  /x86_64/.../e1000e/e1000e-tests/hotplug
  /x86_64/.../virtio-blk-pci/virtio-blk-pci-tests/hotplug
  /x86_64/.../vhost-user-blk-pci/vhost-user-blk-pci-tests/hotplug
  /x86_64/.../virtio-rng-pci/virtio-rng-pci-tests/hotplug
  /x86_64/.../virtio-scsi/virtio-scsi-tests/hotplug
  /x86_64/.../virtio-serial/virtio-serial-tests/hotplug

With this fix:

  $ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -l | grep hotplug
  ...
  /x86_64/.../vhost-user-blk-pci/vhost-user-blk-pci-tests/hotplug
  /x86_64/.../virtio-net-pci/virtio-net-pci-tests/hotplug
  /x86_64/.../virtio-rng-pci/virtio-rng-pci-tests/hotplug
  ...
  $ QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/qos-test -p /x86_64/.../virtio-net-pci-tests/hotplug
  /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-net-pci/virtio-net-pci-tests/hotplug: OK

Fixes: 6ae333f91b ("qos-test: virtio-net test node")
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20211028173014.139692-1-lvivier@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 10:11:27 +01:00
Philippe Mathieu-Daudé
1c282da395 meson: Fix 'interpretor' typo
Fix a typo from commit fa2f7b0b9b ("meson: Warn when TCI is
selected but TCG backend is available").

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210521103423.2780345-1-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 10:11:27 +01:00
Philippe Mathieu-Daudé
63a0eb6987 .mailmap: Fix more contributor entries
These authors have some incorrect author email field.

Acked-by: Pan Nengyuan <pannengyuan@huawei.com>
Reviewed-by: Alex Chen <alex.chen@huawei.com>
Reviewed-by: Hyman Huang <huangy81@chinatelecom.cn>
Reviewed-by: Haibin Zhang <haibinzhang@tencent.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211027043254.1248097-1-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 10:11:27 +01:00
Philippe Mathieu-Daudé
65b4c8c759 hw/m68k: Fix typo in SPDX tag
Fix 'Identifer' -> 'Identifier' typo.

Cc: Laurent Vivier <laurent@vivier.eu>
Fixes: 8c6df16ff6 ("hw/char: add goldfish-tty")
Fixes: 8785559390 ("hw/intc: add goldfish-pic")
Fixes: 2fde99ee31 ("m68k: add an interrupt controller")
Fixes: 0791bc02b8 ("m68k: add a system controller")
Fixes: e1cecdca55 ("m68k: add Virtual M68k Machine")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20211103105311.3399293-1-f4bug@amsat.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 10:11:27 +01:00
BALATON Zoltan
de4cf848b1 hmp: Add shortcut to stop command to match cont
Some commands such as quit or cont have one letter alternatives but
stop is missing that. Add stop|s to match cont|c for consistency and
convenience.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20211030095225.513D4748F48@zero.eik.bme.hu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2021-11-09 10:11:27 +01:00
Richard Henderson
8554920455 Migration Pull request
Hi
 
 This pull request includes:
 - fix sample-pages doc by hyman
 - cleanup colo pages by contiguous blocks by Rao
 - reset auto-converge by checkpoint by Rao.
 
 Please, apply.
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Merge remote-tracking branch 'remotes/juanquintela/tags/migration-20211109-pull-request' into staging

Migration Pull request

Hi

This pull request includes:
- fix sample-pages doc by hyman
- cleanup colo pages by contiguous blocks by Rao
- reset auto-converge by checkpoint by Rao.

Please, apply.

# gpg: Signature made Tue 09 Nov 2021 09:02:37 AM CET
# gpg:                using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723
# gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [full]
# gpg:                 aka "Juan Quintela <quintela@trasno.org>" [full]

* remotes/juanquintela/tags/migration-20211109-pull-request:
  Reset the auto-converge counter at every checkpoint.
  Reduce the PVM stop time during Checkpoint
  docs: fix 'sample-pages' option tag

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-09 09:41:31 +01:00
Rao, Lei
91fe9a8dbd Reset the auto-converge counter at every checkpoint.
if we don't reset the auto-converge counter,
it will continue to run with COLO running,
and eventually the system will hang due to the
CPU throttle reaching DEFAULT_MIGRATE_MAX_CPU_THROTTLE.

Signed-off-by: Lei Rao <lei.rao@intel.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Lukas Straub <lukasstraub2@web.de>
Tested-by: Lukas Straub <lukasstraub2@web.de>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
2021-11-09 08:48:36 +01:00
Rao, Lei
a6a83cef9c Reduce the PVM stop time during Checkpoint
When flushing memory from ram cache to ram during every checkpoint
on secondary VM, we can copy continuous chunks of memory instead of
4096 bytes per time to reduce the time of VM stop during checkpoint.

Signed-off-by: Lei Rao <lei.rao@intel.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Lukas Straub <lukasstraub2@web.de>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Tested-by: Lukas Straub <lukasstraub2@web.de>
Signed-off-by: Juan Quintela <quintela@redhat.com>
2021-11-09 08:46:30 +01:00
Hyman Huang(黄勇)
adc903a6c0 docs: fix 'sample-pages' option tag
commit f78d4ed701 has fixed qemu tag, making 'sample-pages' option tag
involved by accident, which introduced since 6.1 in commit 7afa08cd8f.
revert this line.

Signed-off-by: Hyman Huang(黄勇) <huangy81@chinatelecom.cn>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>
2021-11-09 08:38:06 +01:00
Richard Henderson
f10e7b9f6f ppc patch queue for 2021-11-09
Here's the latest set of ppc related patches for qemu-6.2, which I
 hope will squeeze in just barely before the hard freeze.
 
 This set includes a change to MAINTAINERS moving maintainership of ppc
 from myself and Greg Kurz to Cédric le Goater and Daniel Henrique
 Barboza.  So, I expect this to be my last pull request as ppc
 maintainer.  It's been great, but it's time I moved onto other things.
 
 Apart from that, this patchset is mostly a lot of updates to TCG
 implementations of ISA 3.1 (POWER10) instructions from the El Dorado
 team.  There are also a handful of other fixes.
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Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-6.2-20211109' into staging

ppc patch queue for 2021-11-09

Here's the latest set of ppc related patches for qemu-6.2, which I
hope will squeeze in just barely before the hard freeze.

This set includes a change to MAINTAINERS moving maintainership of ppc
from myself and Greg Kurz to Cédric le Goater and Daniel Henrique
Barboza.  So, I expect this to be my last pull request as ppc
maintainer.  It's been great, but it's time I moved onto other things.

Apart from that, this patchset is mostly a lot of updates to TCG
implementations of ISA 3.1 (POWER10) instructions from the El Dorado
team.  There are also a handful of other fixes.

# gpg: Signature made Tue 09 Nov 2021 05:14:33 AM CET
# gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]

* remotes/dgibson/tags/ppc-for-6.2-20211109: (54 commits)
  spapr_numa.c: FORM2 table handle nodes with no distance info
  target/ppc, hw/ppc: Change maintainers
  target/ppc: cntlzdm/cnttzdm implementation without brcond
  target/ppc: Implement lxvkq instruction
  target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions
  target/ppc: implemented XXSPLTIDP instruction
  target/ppc: Implemented XXSPLTIW using decodetree
  target/ppc: implemented XXSPLTI32DX
  target/ppc: moved XXSPLTIB to using decodetree
  target/ppc: moved XXSPLTW to using decodetree
  target/ppc: added the instructions PLXVP and PSTXVP
  target/ppc: added the instructions PLXV and PSTXV
  target/ppc: added the instructions LXVPX and STXVPX
  target/ppc: added the instructions LXVP and STXVP
  target/ppc: moved stxvx and lxvx from legacy to decodtree
  target/ppc: moved stxv and lxv from legacy to decodtree
  target/ppc: receive high/low as argument in get/set_cpu_vsr
  target/ppc: Introduce REQUIRE_VSX macro
  target/ppc: Implement Vector Extract Double to VSR using GPR index insns
  target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-09 07:18:33 +01:00
Nicholas Piggin
71e6fae3a9 spapr_numa.c: FORM2 table handle nodes with no distance info
A configuration that specifies multiple nodes without distance info
results in the non-local points in the FORM2 matrix having a distance of
0. This causes Linux to complain "Invalid distance value range" because
a node distance is smaller than the local distance.

Fix this by building a simple local / remote fallback for points where
distance information is missing.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20211105135137.1584840-1-npiggin@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
David Gibson
14fe3222e5 target/ppc, hw/ppc: Change maintainers
As our day jobs and interests have moved onto other things, Greg and I have
been struggling to keep on top of maintainership of target/ppc and
associated pieces like the pseries and powernv machine types, with their
platform specific devices.

We've therefore discussed and plan to transfer maintainership to Cédric Le
Goater (primary) and Daniel Henrique Barboza (backup).  Cédric and Daniel
have been actively contributing to the area for some time, and they're
supported in this by their current employer, IBM, who has an obvious
interest in the platform.

Greg and I do plan to stay around in some capacity for at least the next
6 months, providing reviews and advice to assist the new maintainers into
the role.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: Cédric Le Goater <clg@kaod.org>
2021-11-09 10:32:53 +11:00
Matheus Ferst
ab1e25ad2f target/ppc: cntlzdm/cnttzdm implementation without brcond
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-26-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Matheus Ferst
6e26b85de5 target/ppc: Implement lxvkq instruction
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-25-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Matheus Ferst
788c63998c target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-24-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Bruno Larsen (billionai)
236a628599 target/ppc: implemented XXSPLTIDP instruction
Implemented the instruction XXSPLTIDP using decodetree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-23-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Bruno Larsen (billionai)
ec10f73eb9 target/ppc: Implemented XXSPLTIW using decodetree
Implemented the XXSPLTIW instruction, using decodetree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-22-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Bruno Larsen (billionai)
aa4592fab7 target/ppc: implemented XXSPLTI32DX
Implemented XXSPLTI32DX emulation using decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-21-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Bruno Larsen (billionai)
6166fced10 target/ppc: moved XXSPLTIB to using decodetree
Changed the function that handles XXSPLTIB emulation to using
decodetree, but still use the same logic as before

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-20-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Bruno Larsen (billionai)
30dfca8d8f target/ppc: moved XXSPLTW to using decodetree
Changed the function that handles XXSPLTW emulation to using decodetree,
but still using the same logic.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-19-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Lucas Mateus Castro (alqotel)
dcbf48316f target/ppc: added the instructions PLXVP and PSTXVP
Implemented the instructions plxvp and pstxvp using decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-18-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Lucas Mateus Castro (alqotel)
5301d0219c target/ppc: added the instructions PLXV and PSTXV
Implemented the instructions plxv and pstxv using decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-17-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Lucas Mateus Castro (alqotel)
226ce506b1 target/ppc: added the instructions LXVPX and STXVPX
Implemented the instructions lxvpx and stxvpx using decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-16-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Lucas Mateus Castro (alqotel)
96fa263247 target/ppc: added the instructions LXVP and STXVP
Implemented the instructions lxvp and stxvp using decodetree

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-15-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Lucas Mateus Castro (alqotel)
70426b5bb7 target/ppc: moved stxvx and lxvx from legacy to decodtree
Moved stxvx and lxvx implementation from the legacy system to
decodetree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-14-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Lucas Mateus Castro (alqotel)
72b70d5c3c target/ppc: moved stxv and lxv from legacy to decodtree
Moved stxv and lxv implementation from the legacy system to
decodetree.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.castro@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-13-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:53 +11:00
Matheus Ferst
c2aecae108 target/ppc: receive high/low as argument in get/set_cpu_vsr
Changes get_cpu_vsr to receive a new argument indicating whether the
high or low part of the register is being accessed. This change improves
consistency between the interfaces used to access Vector and VSX
registers and helps to handle endianness in some cases.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-12-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Bruno Larsen (billionai)
8226cb2d9c target/ppc: Introduce REQUIRE_VSX macro
Introduce the macro to centralize checking if the VSX facility is
enabled and handle it correctly.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-11-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
28110b72a8 target/ppc: Implement Vector Extract Double to VSR using GPR index insns
Implement the following PowerISA v3.1 instructions:
vextdubvlx: Vector Extract Double Unsigned Byte to VSR using
            GPR-specified Left-Index
vextduhvlx: Vector Extract Double Unsigned Halfword to VSR using
            GPR-specified Left-Index
vextduwvlx: Vector Extract Double Unsigned Word to VSR using
            GPR-specified Left-Index
vextddvlx: Vector Extract Double Doubleword to VSR using
           GPR-specified Left-Index
vextdubvrx: Vector Extract Double Unsigned Byte to VSR using
            GPR-specified Right-Index
vextduhvrx: Vector Extract Double Unsigned Halfword to VSR using
            GPR-specified Right-Index
vextduwvrx: Vector Extract Double Unsigned Word to VSR using
            GPR-specified Right-Index
vextddvrx: Vector Extract Double Doubleword to VSR using
           GPR-specified Right-Index

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-10-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
b422c2cb52 target/ppc: Move vinsertb/vinserth/vinsertw/vinsertd to decodetree
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-9-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
2c9f795841 target/ppc: Implement Vector Insert from VSR using GPR index insns
Implements the following PowerISA v3.1 instructions:
vinsbvlx: Vector Insert Byte from VSR using GPR-specified Left-Index
vinshvlx: Vector Insert Halfword from VSR using GPR-specified
          Left-Index
vinswvlx: Vector Insert Word from VSR using GPR-specified Left-Index
vinsbvrx: Vector Insert Byte from VSR using GPR-specified Right-Index
vinshvrx: Vector Insert Halfword from VSR using GPR-specified
          Right-Index
vinswvrx: Vector Insert Word from VSR using GPR-specified Right-Index

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-8-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
23832ae6d5 target/ppc: Implement Vector Insert Word from GPR using Immediate insns
Implements the following PowerISA v3.1 instructions:
vinsw: Vector Insert Word from GPR using immediate-specified index
vinsd: Vector Insert Doubleword from GPR using immediate-specified
       index

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-7-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
2cc12af399 target/ppc: Implement Vector Insert from GPR using GPR index insns
Implements the following PowerISA v3.1 instructions:
vinsblx: Vector Insert Byte from GPR using GPR-specified Left-Index
vinshlx: Vector Insert Halfword from GPR using GPR-specified Left-Index
vinswlx: Vector Insert Word from GPR using GPR-specified Left-Index
vinsdlx: Vector Insert Doubleword from GPR using GPR-specified
         Left-Index
vinsbrx: Vector Insert Byte from GPR using GPR-specified Right-Index
vinshrx: Vector Insert Halfword from GPR using GPR-specified
         Right-Index
vinswrx: Vector Insert Word from GPR using GPR-specified Right-Index
vinsdrx: Vector Insert Doubleword from GPR using GPR-specified
         Right-Index

The helpers and do_vinsx receive i64 to allow code sharing with the
future implementation of Vector Insert from VSR using GPR Index.

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-6-matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
2c716b4da5 target/ppc: Implement vsldbi/vsrdbi instructions
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-5-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
00a16569eb target/ppc: Implement vpdepd/vpextd instruction
pdepd and pextd helpers are moved out of #ifdef (TARGET_PPC64) to allow
them to be reused as GVecGen3.fni8.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-4-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
a2c975e119 target/ppc: Implement vclzdm/vctzdm instructions
The signature of do_cntzdm is changed to allow reuse as GVecGen3i.fni8.
The method is also moved out of #ifdef TARGET_PPC64, as PowerISA doesn't
say vclzdm and vctzdm are 64-bit only.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-3-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Matheus Ferst
6e0bbc4048 target/ppc: Move vcfuged to vmx-impl.c.inc
There's no reason to keep vector-impl.c.inc separate from
vmx-impl.c.inc. Additionally, let GVec handle the multiple calls to
helper_cfuged for us.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Message-Id: <20211104123719.323713-2-matheus.ferst@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
BALATON Zoltan
88adcbf280 ppc/pegasos2: Suppress warning when qtest enabled
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20211101151023.F0D02748F5A@zero.eik.bme.hu>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Cédric Le Goater
957c52aed5 ppc/pnv: Fix check on block device before updating drive contents
Test is wrong and the backend can never updated. It could have led to
a QEMU crash but since the firmware deactivates flash access if a valid
layout is not detected, it went unnoticed.

Reported-by: Coverity CID 1465223
Fixes: 35dde57662 ("ppc/pnv: Add a PNOR model")
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211102162905.762078-1-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Luis Pires
a23297479c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree
Move the following instructions to decodetree:
ddedpd:  DFP Decode DPD To BCD
ddedpdq: DFP Decode DPD To BCD Quad
denbcd:  DFP Encode BCD To DPD
denbcdq: DFP Encode BCD To DPD Quad
dscli:   DFP Shift Significand Left Immediate
dscliq:  DFP Shift Significand Left Immediate Quad
dscri:   DFP Shift Significand Right Immediate
dscriq:  DFP Shift Significand Right Immediate Quad

Also deleted dfp-ops.c.inc, now that all PPC DFP instructions were
moved to decodetree.

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029192417.400707-16-luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Luis Pires
c8ef4d1ec0 target/ppc: Move dct{dp,qpq},dr{sp,dpq},dc{f,t}fix[q],dxex[q] to decodetree
Move the following instructions to decodetree:
dctdp:   DFP Convert To DFP Long
dctqpq:  DFP Convert To DFP Extended
drsp:    DFP Round To DFP Short
drdpq:   DFP Round To DFP Long
dcffix:  DFP Convert From Fixed
dcffixq: DFP Convert From Fixed Quad
dctfix:  DFP Convert To Fixed
dctfixq: DFP Convert To Fixed Quad
dxex:    DFP Extract Biased Exponent
dxexq:   DFP Extract Biased Exponent Quad

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029192417.400707-15-luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Luis Pires
a8f4bce6f8 target/ppc: Move dqua[q], drrnd[q] to decodetree
Move the following instructions to decodetree:
dqua:   DFP Quantize
dquaq:  DFP Quantize Quad
drrnd:  DFP Reround
drrndq: DFP Reround Quad

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029192417.400707-14-luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00
Luis Pires
78464edb8f target/ppc: Move dquai[q], drint{x,n}[q] to decodetree
Move the following instructions to decodetree:
dquai:   DFP Quantize Immediate
dquaiq:  DFP Quantize Immediate Quad
drintx:  DFP Round to FP Integer With Inexact
drintxq: DFP Round to FP Integer With Inexact Quad
drintn:  DFP Round to FP Integer Without Inexact
drintnq: DFP Round to FP Integer Without Inexact Quad

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211029192417.400707-13-luis.pires@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2021-11-09 10:32:52 +11:00