Commit Graph

35 Commits

Author SHA1 Message Date
Andreas Färber 0c591eb0a9 cputlb: Change tlb_set_page() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Andreas Färber a47dddd734 exec: Change cpu_abort() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:28 +01:00
Andreas Färber 0ea8cb8895 cpu-exec: Change cpu_resume_from_signal() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:48 +01:00
Andreas Färber b3310ab338 exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argument
Use CPUState. Allows to clean up CPUArchState in gdbstub.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:48 +01:00
Andreas Färber 75a34036d4 exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argument
Use CPUState. This lets us drop a few local env usages.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:48 +01:00
Andreas Färber f0c3c505a8 cpu: Move breakpoints field from CPU_COMMON to CPUState
Most targets were using offsetof(CPUFooState, breakpoints) to determine
how much of CPUFooState to clear on reset. Use the next field after
CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:47 +01:00
Andreas Färber ff4700b05c cpu: Move watchpoint fields from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:47 +01:00
Andreas Färber 27103424c4 cpu: Move exception_index field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:46 +01:00
Andreas Färber 7510454e3e cpu: Turn cpu_handle_mmu_fault() into a CPUClass hook
Note that while such functions may exist both for *-user and softmmu,
only *-user uses the CPUState hook, while softmmu reuses the prototype
for calling it directly.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:46 +01:00
Andreas Färber 9262685b81 cpu: Factor out cpu_generic_init()
All targets using it gain the ability to set -cpu name,key=value,...
options via the default TYPE_CPU CPUClass::parse_features() implementation.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:20:46 +01:00
Michael Walle 3dd3a2b965 target-lm32: add breakpoint/watchpoint support
This patch adds in-target breakpoint and watchpoint support.

Signed-off-by: Michael Walle <michael@walle.cc>
2014-02-04 19:47:06 +01:00
Michael Walle 34f4aa83f9 target-lm32: move model features to LM32CPU
This allows us to completely remove CPULM32State from DisasContext.
Instead, copy the fields we need to DisasContext.

Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michael Walle <michael@walle.cc>
2014-02-04 19:34:30 +01:00
Andreas Färber 00b941e581 cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.

Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd().

Prepares for changing cpu_memory_rw_debug() argument to CPUState.

Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23 02:41:33 +02:00
Andreas Färber a0762859ae log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb2 (cpu: Turn
cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no
longer needed.

Add documentation and make the functions available through qemu/log.h
outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h
was not yet possible due to convoluted include paths, so that some
devices grow an implicit and unneeded dependency on qom/cpu.h for now.

Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Reviewed-by: Richard Henderson <rth@twiddle.net>
[AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09 21:33:04 +02:00
Michael Walle b92e062a6f target-lm32: fix debug memory access
CPU models which have the LM32_FLAG_IGNORE_MSB flag set will shadow the
lower 2GB to the upper 2GB memory space. This will fix the debug memory
access used by qemu console and GDB to match this behaviour.

Signed-off-by: Michael Walle <michael@walle.cc>
2013-03-18 19:40:34 +01:00
Andreas Färber 97a8ea5a3a cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one step
closer to compiling multiple targets into one executable.

It will also allow to override the interrupt handling for certain CPU
families.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12 10:35:55 +01:00
Andreas Färber 868e282427 target-lm32: Move TCG initialization to LM32CPU initfn
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16 14:50:58 +01:00
Andreas Färber 9c23169e8c target-lm32: Introduce QOM realizefn for LM32CPU
Introduce a realizefn and set realized = true in cpu_lm32_init().

Also move cpu_reset() call from initfn to realizefn.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16 14:50:57 +01:00
Paolo Bonzini 1de7afc984 misc: move include files to include/qemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19 08:32:39 +01:00
Avi Kivity a8170e5e97 Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-23 08:58:25 -05:00
Andreas Färber b7e516ce04 Kill off cpu_state_reset()
In commit 1bba0dc932 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris)
Acked-by: Alexander Graf <agraf@suse.de> (for ppc)
Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04 23:00:45 +02:00
Andreas Färber 0347d689f7 target-lm32: Let cpu_lm32_init() return LM32CPU
Make the include paths for cpu-qom.h consistent to allow using LM32CPU
in cpu.h.

Turn cpu_init macro into a static inline function returning CPULM32State
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-06-04 23:00:41 +02:00
Andreas Färber 3eab169085 target-lm32: QOM'ify CPU reset
Move code from cpu_state_reset() into QOM lm32_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:08:04 +02:00
Andreas Färber 8d7d505add target-lm32: QOM'ify CPU init
Move code from cpu_lm32_init() to an initfn; call cpu_reset()
instead of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:07:59 +02:00
Andreas Färber fc0ced2fbd target-lm32: QOM'ify CPU
Embed CPULM32State as first member of QOM LM32CPU.
Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc>
2012-04-12 01:07:41 +02:00
Michael Walle de89fd2b88 target-lm32: init tcg only if available
Once qtest support for target-lm32 arrives, tcg may be disabled.

Signed-off-by: Michael Walle <michael@walle.cc>
2012-03-31 19:56:03 +02:00
Andreas Färber 6393c08de2 target-lm32: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPULM32State/g" target-lm32/*.[hc]
  sed -i "s/#define CPULM32State/#define CPUState/" target-lm32/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Andreas Färber 1bba0dc932 Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:24 +01:00
Stefan Weil 60ed8d298e target-lm32: Clean includes
config.h was missing in cpu.h.

Acked-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-28 22:33:42 +01:00
Michael Walle 27f930c5f0 lm32: add missing qemu_init_vcpu() call
Signed-off-by: Michael Walle <michael@walle.cc>
2011-10-03 12:44:22 +02:00
Anthony Liguori 7267c0947d Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-20 23:01:08 -05:00
Blue Swirl 97b348e7d2 Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07 09:32:01 +00:00
Blue Swirl 2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Michael Walle ecbe1de823 lm32: fix exception handling
Global interrupt enable bit is already saved within the exception handler
helper routine. Thus remove extra code in translation routines.

Additionally, debug exceptions has always DEBA as base address.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-05-03 10:48:40 +02:00
Michael Walle 17c0fa3d57 lm32: translation routines
This patch adds the main translation routine. All opcodes of the
LatticeMico32 processor are supported and translated to TCG ops.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-03-07 13:42:36 +01:00