OpenE2K/qemu-e2k
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337 Commits

Author SHA1 Message Date
Richard Henderson
bacf43c62e target-s390: Optimize get_address 
Don't load the displacement into a register first, add it second
so that tcg_gen_addi_i64 can eliminate zeros.  Don't mask the
displacement first so that we don't turn small negative numbers
into large positive numbers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:46 -08:00
Richard Henderson
c95ec459c6 target-s390: Optimize ADDC/SUBB 
Giving the proper mask to disas_jcc allows us to generate an inline
comparison generating the carry/borrow with setcond.

In the very worst case, when we must use the external helper to compute
a value for CC, we generate (cc > 1) instead of (cc >> 1), which is only
very slightly slower on common cpus.

In the very best case, when the CC comes from a COMPARE insn and the
compiler is using ALCG with zero, everything folds out to become just
the setcond that the compiler wanted.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:46 -08:00
Richard Henderson
a359b770c6 target-s390: Optimize ADDU/SUBU CC testing 
We can easily generate some masks for logical add/subtract inline.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
de379661d5 target-s390: Tidy comparisons 
After full conversion, we can audit the uses of LTGT cc ops
and see that none of the instructions can ever set CC=3.
Thus we can extend the table to treat that bit as ignored.

This fixes a regression wrt the pre-conversion translation
in which NE was used for both m=6 and m=7.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
f24c49c24a target-s390: Optmize emitting discards 
While they aren't expensive, they aren't free to process.  When we
know that the three cc helper variables are dead, don't kill them.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
d074ac6d26 target-s390: Optimize XC 
Notice XC with same address and convert that to store of zero.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
90b4f8ad72 target-s390: Fix cpu_clone_regs 
R2 is the syscall return register, not R0.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
411edc22cb target-s390: Implement LOAD/SET FP AND SIGNAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
a12000b9ec target-s390: Implement SET ROUNDING MODE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
d2d9feac6f target-s390: Use uint64_to_float128 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
1d1f630135 target-s390: Implement LCDFR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
49f7ee802f target-s390: Check insn operand specifications 
Removes all the fixmes for even register numbers, etc.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
2db014b5a7 target-s390: Implement CPSDR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
99b4f24b3e target-s390: Implement POPCNT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:45 -08:00
Richard Henderson
2112bf1bfb target-s390: Implement CONVERT FROM LOGICAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
6ac1b45f9b target-s390: Implement CONVERT TO LOGICAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
b92fa33486 target-s390: Implement STORE ON CONDITION 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
632086da28 target-s390: Implement LOAD ON CONDITION 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
1c26875182 target-s390: Implement COMPARE AND TRAP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
403e217f40 target-s390: Implement COMPARE RELATIVE LONG 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
e0def9094e target-s390: Implement PREFETCH 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
d6c6372e18 target-s390: Implement R[NOX]SBG 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
143cbbc5eb target-s390: Implement LDGR, LGDR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
2d6a869833 target-s390: Implement RISBG 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
5550359f07 target-s390: Implement COMPARE AND BRANCH 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
7a6c7067f0 target-s390: Tidy s->op_cc handling 
There's no need to force computation of the true cc_op when taking an
exception or single stepping.  In either case we'll enter the next TB
with s->cc_op = DYNAMIC and recompute anyway.  Just make sure that
s->cc_op is stored back to env->cc_op as needed.

Delete some dead functions, avoid allocating unused TCG temps, drop
the old s->is_jmp setting.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
2cf5e350c4 target-s390: Implement BRANCH ON INDEX 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:44 -08:00
Richard Henderson
4f3adfb2a6 target-s390: Delete dead code from old translator 
The use of inline restricts detection of static functions that are
no longer used.  Limit the use of inline to those functions that
are conditionally used based on CONFIG_USER_ONLY.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
dc458df91d target-s390: Convert SERVC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
7ab938d706 target-s390: Convert LPSWE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
fc778b55a5 target-s390: Convert STFL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
d14b3e09b2 target-s390: Convert STSI 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
14244b21a0 target-s390: Convert SACF 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
39a5003c89 target-s390: Convert STCKE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
3d596f4912 target-s390: Convert CSP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
204504e2fa target-s390: Convert STURA 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
2c423fc070 target-s390: Convert subchannel instructions 
While we're at it, list all of the chapter 14 subchannel insns.
Which is easy since all merely need indicate non-operation.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
5cc69c54f6 target-s390: Convert RRBE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
2bbde27f25 target-s390: Convert SSKE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
8026417c71 target-s390: Convert ISKE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
cfef53e356 target-s390: Convert IPTE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
411fea3d84 target-s390: Convert STAP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
e805a0d39e target-s390: Convert SPX, STPX 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:43 -08:00
Richard Henderson
0568d8aab0 target-s390: Convert PTLB 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
28d5555667 target-s390: Convert SPKA 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
c4f0a863c3 target-s390: Convert SPT, STPT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
dd3eb7b54f target-s390: Convert SCKC, STCKC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
434c91a5f4 target-s390: Convert STCK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
3528979951 target-s390: Convert SCK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
71bd666963 target-s390: Convert STIDP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
4600c994d9 target-s390: Convert SRST 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
aa31bf6031 target-s390: Convert CLST, MVST 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
ee6c38d5b1 target-s390: Convert MVPG 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
d62a4c97f2 target-s390: Convert EAR, SAR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
374724f91a target-s390: Convert CKSM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
6e2704e74d target-s390: Convert IPM 
Note that the previous placement of the PM field was incorrect.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:42 -08:00
Richard Henderson
8379bfdbca target-s390: Convert LFPC, SFPC 
Note that we were failing to set the rounding mode in fpu_status.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
102bf2c635 target-s390: Convert FLOGR 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
683bb9a888 target-s390: Convert CONVERT FROM FIXED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
68c8bd93cc target-s390: Convert CONVERT TO FIXED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
24db8412ec target-s390: Convert LOAD ZERO 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
16d7b2a43b target-s390: Convert FP SQUARE ROOT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
5d7fd045ca target-s390: Convert FP LOAD COMPLIMENT, NEGATIVE, POSITIVE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
31aa97d1ed target-s390: Convert TEST DATA CLASS 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
722bfec331 target-s390: Convert MULTIPLY AND ADD, SUBTRACT 
Use the new float*_muladd interface to softfloat.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
83b00736f3 target-s390: Convert FP MULTIPLY 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
f08a5c311d target-s390: Convert FP DIVIDE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
1a800a2dce target-s390: Convert FP SUBTRACT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:41 -08:00
Richard Henderson
587626f8da target-s390: Convert FP ADD, COMPARE, LOAD TEST/ROUND/LENGTHENED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
7691c23b1f target-s390: Convert LLGT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
e025e52aba target-s390: Convert STORE REVERSED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
d54f586541 target-s390: Convert LOAD REVERSED 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
3e398cf9c2 target-s390: Convert LOAD CONTROL, part 2 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
112bf0791d target-s390: Convert TPROT 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
2ae6805906 target-s390: Convert STCM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
32a44d5882 target-s390: Convert CLM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
f3de39c485 target-s390: Convert COMPARE AND SWAP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
504488b827 target-s390: Convert LCTL, STCTL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
ea20490fdd target-s390: Convert EFPC, STFPC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:40 -08:00
Richard Henderson
0c2400155b target-s390: Convert SIGP 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
d8fe4a9c28 target-s390: Convert LRA 
Note that truncating the store to r1 based on PSW_MASK_64
is incorrect.  We always modify the entire register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
97c3ab61c4 target-s390: Convert MVCP, MVCS 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
4f7403d52b target-s390: Convert CLC 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
0a94903959 target-s390: Convert NC, XC, OC, TR, UNPK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
af9e5a04ea target-s390: Convert MVC 
The code that was in gen_op_mvc was a bit confused wrt what lengths
it wanted to handle.  I also disbelieve that the inline memset is
worthwhile.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
eb66e6a969 target-s390: Convert CLCLE, MVCLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
7df3e93aa9 target-s390: Convert LAM, STAM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
145cdb4019 target-s390: Convert STNSM, STOSM 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
a05d2b6b83 target-s390: Convert NI, XI, OI 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
6a04d76a81 target-s390: Convert MOVE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
77f8d6c3ed target-s390: Convert LOAD, STORE MULTIPLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:39 -08:00
Richard Henderson
a79ba3398a target-s390: Convert SHIFT DOUBLE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
cbe24bfa91 target-s390: Convert SHIFT, ROTATE SINGLE 
Note that we were missing the 32-bit SLA.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
972e35b966 target-s390: Convert DIAGNOSE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
8b5ff57115 target-s390: Convert LOAD PSW 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
7d30bb73db target-s390: Convert SET SYSTEM MASK 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
c49daa51a8 target-s390: Convert CONVERT TO DECIMAL 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
00574261e1 target-s390: Convert FP STORE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
6e764e97ca target-s390: Convert EXECUTE 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00
Richard Henderson
58a9e35bcc target-s390: Convert INSERT CHARACTERS UNDER MASK 
Change the CC handling to be more like TEST UNDER MASK, with val & mask.
This lets us handle ICMH much more like ICM.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2013-01-05 12:18:38 -08:00