OpenE2K/qemu-e2k
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Author SHA1 Message Date
ths
744e091596 Nicer Log formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2659 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 22:30:36 +00:00
ths
e58c8ba5f6 Another fix for CP0 Cause register handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2658 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 20:17:54 +00:00
blueswir1
5425a2164c Fix Sparc32 device save methods 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2657 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 19:24:07 +00:00
blueswir1
3299908c83 Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2656 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 15:49:56 +00:00
blueswir1
d2889a3efc Alignment check mechanism (not fully enabled yet) (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2655 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 15:46:16 +00:00
j_mayer
24be5ae3a0 Add PowerPC 405 input pins (IRQ, resets, ...) model. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2654 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-12 21:24:29 +00:00
j_mayer
2e719ba347 Embedded PowerPC Device Control Registers infrastructure. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2653 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-12 21:11:03 +00:00
ths
83b1fb88f8 Fix bad variable name. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2652 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 22:46:06 +00:00
ths
2f6445458e Make SYNCI_Step and CCRes CPU-specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 20:34:23 +00:00
ths
b48cfdffd9 Throw RI for invalid MFMC0-class instructions. Introduce optional 
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:24:14 +00:00
ths
2423f6601a Code formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:15:08 +00:00
ths
534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:13:00 +00:00
j_mayer
e9df014c0b Implement embedded IRQ controller for PowerPC 6xx/740 & 750. 
Fix PowerPC external interrupt input handling and lowering.
Fix OpenPIC output pins management.
Fix multiples bugs in OpenPIC IRQ management.
Fix OpenPIC CPU(s) reset function.
Fix Mac99 machine to properly route OpenPIC outputs to the PowerPC input pins.
Fix PREP machine to properly route i8259 output to the PowerPC external
  interrupt pin.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2647 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 22:45:36 +00:00
blueswir1
682c4f1559 Fix monitor disasm output for Sparc64 target 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2646 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 15:14:57 +00:00
ths
c090a8f440 Fix CP0_IntCtl handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:17:31 +00:00
ths
c50da3df61 Proper handling of reserved bits in the context register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2644 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:16:30 +00:00
ths
4e7a4a4e84 Mark watchpoint features as unimplemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:15:41 +00:00
ths
62c5609aa5 Catch unaligned sc/scd. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:14:21 +00:00
ths
97428a4d84 Fix exception handling cornercase for rdhwr. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:13:40 +00:00
ths
dac9321024 Remove bogus mtc0 handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 12:31:31 +00:00
pbrook
069dd10acf ARM IRQ fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2639 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 02:01:57 +00:00
blueswir1
6ecd453484 Fix generated code disasm output on Sparc64 host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2638 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-08 11:22:29 +00:00
blueswir1
925fb139be Sparc32/64 CPU selection for user emulator 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2637 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-08 06:29:06 +00:00
blueswir1
1c6e907082 Fix TCX base on SS10 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2636 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 19:33:54 +00:00
pbrook
d537cf6c86 Unify IRQ handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 18:14:41 +00:00
j_mayer
b6e27ab8b1 PowerPC 64 fixes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2634 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 11:48:04 +00:00
j_mayer
9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t 
instead of target_ulong to be consistent.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 11:21:28 +00:00
pbrook
80a34d67a5 Remove dead code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2632 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:41:49 +00:00
pbrook
544c4be626 Remove dead code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2631 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:24:43 +00:00
ths
e0c84da78c Implement prefx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:39 +00:00
ths
cbeb0857da Set proper BadVAddress value for unaligned instruction fetch. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:15 +00:00
ths
e04bcc691b Actually skip over delay slot for a non-taken branch likely. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:10:22 +00:00
ths
f757d6ff29 Fix ins/ext cornercase. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2627 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:09:17 +00:00
pbrook
d85fb99bf7 Comment spelling fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2626 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 20:58:25 +00:00
blueswir1
417454b032 Full implementation of IEEE exceptions (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2625 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 20:03:29 +00:00
blueswir1
c185970a0e Enforce even float register pair for double register ops (Aurelien Jarno) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2624 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 20:02:09 +00:00
ths
beb811bdd6 Fix handling of ADES exceptions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2623 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 19:31:06 +00:00
ths
f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 18:46:01 +00:00
pbrook
42a10898a8 Use correct type for card field. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2621 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 16:54:11 +00:00
pbrook
a1bb27b1e9 SD card emulation (initial implementation by Andrzei Zaborowski). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2620 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 16:49:48 +00:00
j_mayer
84409ddbda Code provision for x86_64 and PowerPC 64 linux user mode support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2619 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 08:56:50 +00:00
j_mayer
9ead1a1263 Add alpha targets. 
Code provision for x86_64 and PowerPC 64 linux user targets.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2618 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 08:07:06 +00:00
j_mayer
9d53c7535f Fix for PowerPC 64 rotates. 
Fix for PowerPC 64 load & store with immediate index.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2617 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 07:59:47 +00:00
j_mayer
74aa042996 Code provision for 64 bits linux user-mode targets support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2616 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 06:40:51 +00:00
ths
c53f4a62e3 fix branch delay slot cornercases. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:21:37 +00:00
ths
5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed 
size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:20:05 +00:00
ths
acd858d91f Handle EBase properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2613 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:18:13 +00:00
ths
3529b538ce Fix disabling of the Cause register for R2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2612 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:17:40 +00:00
ths
1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise 
exceptions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:16:25 +00:00
ths
f7cfb2a176 64bit MIPS FPUs have 32 registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:14:23 +00:00