2018-02-23 07:25:25 +01:00
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2018-02-23 Kuan-Lin Chen <kuanlinchentw@gmail.com>
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* config/tc-nds32.c (ict_model): New function. Hook new
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directive .ict_model.
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(nds32_insert_relax_entry): Tag the bits of entry relocation
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for .ict_model.
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2018-02-22 15:18:27 +01:00
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2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (_i386_insn): Add rex_encoding.
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(md_assemble): When i.rex_encoding is true, generate a REX byte
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if possible.
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(parse_insn): Set i.rex_encoding for {rex}.
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* doc/c-i386.texi: Document {rex}.
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* testsuite/gas/i386/x86-64-pseudos.s: Add {rex} tests.
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* testsuite/gas/i386/x86-64-pseudos.d: Updated.
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2018-02-22 13:49:49 +01:00
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2018-02-22 A. Wilcox <awilfox@adelielinux.org>
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PR 22014
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* config/tc-mips.c (mips_lookup_insn): Use memmove to strip the
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instruction size suffix.
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2018-02-20 21:51:37 +01:00
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2018-02-20 Maciej W. Rozycki <macro@mips.com>
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* testsuite/gas/mips/mips16-branch-reloc-4.d: New test.
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* testsuite/gas/mips/mips16-branch-reloc-5.d: New test.
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* testsuite/gas/mips/mips16-branch-reloc-4.s: New test source.
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* testsuite/gas/mips/mips16-branch-reloc-5.s: New test source.
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* testsuite/gas/mips/mips.exp: Run the new tests.
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2018-02-08 19:28:52 +01:00
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2018-02-20 Max Filippov <jcmvbkbc@gmail.com>
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* config/tc-xtensa.c (struct litpool_frag): Add new field
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literal_count.
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(MAX_AUTO_POOL_LITERALS, MAX_EXPLICIT_POOL_LITERALS)
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(MAX_POOL_LITERALS): New macro definitions.
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(auto_litpool_limit): Initialize to 0.
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(md_parse_option): Set auto_litpool_limit in the presence of
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--auto-litpools option.
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(xtensa_maybe_create_literal_pool_frag): Zero-initialize
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literal_count field.
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(xg_find_litpool): New function. Make sure that found literal
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pool size is within the limit.
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(xtensa_move_literals): Extract literal pool search code into
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the new function.
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* testsuite/gas/xtensa/all.exp: Add auto-litpools-2 test.
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* testsuite/gas/xtensa/auto-litpools-2.d: New file.
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* testsuite/gas/xtensa/auto-litpools-2.s: New file.
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* testsuite/gas/xtensa/auto-litpools.d: Fix up changed
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addresses.
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* testsuite/gas/xtensa/auto-litpools.s: Change literal value so
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that objdump doesn't get out of sync.
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2018-02-20 13:48:50 +01:00
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2018-02-20 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* doc/c-arm.texi (.arch_extension): Mention extensions it accepts are
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also the same as -march.
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Add .nop assembler directive
Implement the '.nop SIZE[, CONTROL]' assembler directive, which emits
SIZE bytes filled with no-op instructions. SIZE is absolute expression.
The optional CONTROL byte controls how no-op instructions should be
generated. If the comma and @var{control} are omitted, CONTROL is
assumed to be zero.
For Intel 80386 and AMD x86-64 targets, CONTROL byte specifies the size
limit of a single no-op instruction. The valid values of CONTROL byte
are between 0 and 8 for 16-bit mode, between 0 and 10 for 32-bit mode,
between 0 and 11 for 64-bit mode. When 0 is used, the no-op size limit
is set to the maximum supported size.
2 new relax states, rs_space_nop and rs_fill_nop, are added to enum
_relax_state, which are similar to rs_space and rs_fill, respectively,
but they fill with no-op instructions, instead of a single byte. A
target backend must override the default md_generate_nops to generate
proper no-op instructions. Otherwise, an error of unimplemented .nop
directive will be issued whenever .nop directive is used.
* NEWS: Mention .nop directive.
* as.h (_relax_state): Add rs_space_nop and rs_fill_nop.
* read.c (potable): Add .nop.
(s_nop): New function.
* read.h (s_nop): New prototype.
* write.c (cvt_frag_to_fill): Handle rs_space_nop and
rs_fill_nop.
(md_generate_nops): New function.
(relax_segment): Likewise.
(write_contents): Use md_generate_nops for rs_fill_nop.
* config/tc-i386.c (alt64_11): New.
(alt64_patt): Likewise.
(md_convert_frag): Handle rs_space_nop.
(i386_output_nops): New function.
(i386_generate_nops): Likewise.
(i386_align_code): Call i386_output_nops.
* config/tc-i386.h (i386_generate_nops): New.
(md_generate_nops): Likewise.
* doc/as.texinfo: Document .nop directive.
* testsuite/gas/i386/i386.exp: Run .nop directive tests.
* testsuite/gas/i386/nop-1.d: New file.
* testsuite/gas/i386/nop-1.s: Likewise.
* testsuite/gas/i386/nop-2.d: Likewise.
* testsuite/gas/i386/nop-2.s: Likewise.
* testsuite/gas/i386/nop-3.d: Likewise.
* testsuite/gas/i386/nop-3.s: Likewise.
* testsuite/gas/i386/nop-4.d: Likewise.
* testsuite/gas/i386/nop-4.s: Likewise.
* testsuite/gas/i386/nop-5.d: Likewise.
* testsuite/gas/i386/nop-5.s: Likewise.
* testsuite/gas/i386/nop-6.d: Likewise.
* testsuite/gas/i386/nop-6.s: Likewise.
* testsuite/gas/i386/nop-bad-1.l: Likewise.
* testsuite/gas/i386/nop-bad-1.s: Likewise.
* testsuite/gas/i386/x86-64-nop-1.d: Likewise.
* testsuite/gas/i386/x86-64-nop-2.d: Likewise.
* testsuite/gas/i386/x86-64-nop-3.d: Likewise.
* testsuite/gas/i386/x86-64-nop-4.d: Likewise.
* testsuite/gas/i386/x86-64-nop-5.d: Likewise.
* testsuite/gas/i386/x86-64-nop-6.d: Likewise.
2018-02-17 14:20:42 +01:00
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2018-02-17 H.J. Lu <hongjiu.lu@intel.com>
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* NEWS: Mention .nop directive.
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* as.h (_relax_state): Add rs_space_nop and rs_fill_nop.
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* read.c (potable): Add .nop.
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(s_nop): New function.
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* read.h (s_nop): New prototype.
|
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* write.c (cvt_frag_to_fill): Handle rs_space_nop and
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|
rs_fill_nop.
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(md_generate_nops): New function.
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(relax_segment): Likewise.
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(write_contents): Use md_generate_nops for rs_fill_nop.
|
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|
* config/tc-i386.c (alt64_11): New.
|
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(alt64_patt): Likewise.
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(md_convert_frag): Handle rs_space_nop.
|
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|
(i386_output_nops): New function.
|
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(i386_generate_nops): Likewise.
|
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|
(i386_align_code): Call i386_output_nops.
|
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|
* config/tc-i386.h (i386_generate_nops): New.
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|
(md_generate_nops): Likewise.
|
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|
|
* doc/as.texinfo: Document .nop directive.
|
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|
* testsuite/gas/i386/i386.exp: Run .nop directive tests.
|
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* testsuite/gas/i386/nop-1.d: New file.
|
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* testsuite/gas/i386/nop-1.s: Likewise.
|
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* testsuite/gas/i386/nop-2.d: Likewise.
|
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* testsuite/gas/i386/nop-2.s: Likewise.
|
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* testsuite/gas/i386/nop-3.d: Likewise.
|
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* testsuite/gas/i386/nop-3.s: Likewise.
|
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* testsuite/gas/i386/nop-4.d: Likewise.
|
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* testsuite/gas/i386/nop-4.s: Likewise.
|
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* testsuite/gas/i386/nop-5.d: Likewise.
|
|
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|
* testsuite/gas/i386/nop-5.s: Likewise.
|
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* testsuite/gas/i386/nop-6.d: Likewise.
|
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* testsuite/gas/i386/nop-6.s: Likewise.
|
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|
* testsuite/gas/i386/nop-bad-1.l: Likewise.
|
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|
* testsuite/gas/i386/nop-bad-1.s: Likewise.
|
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|
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* testsuite/gas/i386/x86-64-nop-1.d: Likewise.
|
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|
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* testsuite/gas/i386/x86-64-nop-2.d: Likewise.
|
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|
* testsuite/gas/i386/x86-64-nop-3.d: Likewise.
|
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|
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* testsuite/gas/i386/x86-64-nop-4.d: Likewise.
|
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|
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* testsuite/gas/i386/x86-64-nop-5.d: Likewise.
|
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* testsuite/gas/i386/x86-64-nop-6.d: Likewise.
|
|
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|
|
|
2018-02-15 18:08:14 +01:00
|
|
|
|
2018-02-15 Tamar Christina <tamar.christina@arm.com>
|
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|
|
* config/tc-arm.c (cpu_arch_ver): Renumber ARM_ARCH_V8_4A.
|
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|
|
* testsuite/gas/arm/attr-march-armv8_4-a.d: New.
|
|
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|
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|
|
2018-02-11 06:59:54 +01:00
|
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|
|
2018-02-13 Max Filippov <jcmvbkbc@gmail.com>
|
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|
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|
|
* config/tc-xtensa.c (xg_find_best_trampoline): Skip trampoline
|
|
|
|
|
|
frag that contains source address.
|
|
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|
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|
|
2018-02-13 17:50:04 +01:00
|
|
|
|
2018-02-13 Nick Clifton <nickc@redhat.com>
|
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|
|
|
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|
|
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|
|
|
PR 22773
|
|
|
|
|
|
* config/tc-arm.c (md_apply_fix): Test Rn field of Thumb ORR
|
|
|
|
|
|
instruction before assuming that it is a MOV instruction.
|
|
|
|
|
|
* testsuite/gas/arm/pr22773.s: New test.
|
|
|
|
|
|
* testsuite/gas/arm/pr22773.d: New test driver.
|
|
|
|
|
|
* testsuite/gas/arm/pr22773.l: New expected output.
|
|
|
|
|
|
|
x86-64: Generate branch with PLT32 relocation
Since there is no need to prepare for PLT branch on x86-64, generate
R_X86_64_PLT32, instead of R_X86_64_PC32, if possible, which can be
used as a marker for 32-bit PC-relative branches.
To compile Linux kernel, this patch:
From: "H.J. Lu" <hjl.tools@gmail.com>
Subject: [PATCH] x86: Treat R_X86_64_PLT32 as R_X86_64_PC32
On i386, there are 2 types of PLTs, PIC and non-PIC. PIE and shared
objects must use PIC PLT. To use PIC PLT, you need to load
_GLOBAL_OFFSET_TABLE_ into EBX first. There is no need for that on
x86-64 since x86-64 uses PC-relative PLT.
On x86-64, for 32-bit PC-relative branches, we can generate PLT32
relocation, instead of PC32 relocation, which can also be used as
a marker for 32-bit PC-relative branches. Linker can always reduce
PLT32 relocation to PC32 if function is defined locally. Local
functions should use PC32 relocation. As far as Linux kernel is
concerned, R_X86_64_PLT32 can be treated the same as R_X86_64_PC32
since Linux kernel doesn't use PLT.
is needed. It is available on hjl/plt32/master branch at
https://github.com/hjl-tools/linux
bfd/
PR gas/22791
* elf64-x86-64.c (is_32bit_relative_branch): Removed.
(elf_x86_64_relocate_section): Check PIC relocations in PIE.
Remove is_32bit_relative_branch usage. Disallow PC32 reloc
against protected function in shared object.
gas/
PR gas/22791
* config/tc-i386.c (need_plt32_p): New function.
(output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible.
(md_estimate_size_before_relax): Likewise.
* testsuite/gas/i386/reloc64.d: Updated.
* testsuite/gas/i386/x86-64-jump.d: Likewise.
* testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise.
* testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise.
* testsuite/gas/i386/x86-64-relax-2.d: Likewise.
* testsuite/gas/i386/x86-64-relax-3.d: Likewise.
* testsuite/gas/i386/ilp32/reloc64.d: Likewise.
* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
ld/
PR gas/22791
* testsuite/ld-x86-64/mpx1c.rd: Updated.
* testsuite/ld-x86-64/pr22791-1.err: New file.
* testsuite/ld-x86-64/pr22791-1a.c: Likewise.
* testsuite/ld-x86-64/pr22791-1b.s: Likewise.
* testsuite/ld-x86-64/pr22791-2.rd: Likewise.
* testsuite/ld-x86-64/pr22791-2a.s: Likewise.
* testsuite/ld-x86-64/pr22791-2b.c: Likewise.
* testsuite/ld-x86-64/pr22791-2c.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/22791 tests.
2018-02-13 16:34:22 +01:00
|
|
|
|
2018-02-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/22791
|
|
|
|
|
|
* config/tc-i386.c (need_plt32_p): New function.
|
|
|
|
|
|
(output_jump): Generate BFD_RELOC_X86_64_PLT32 if possible.
|
|
|
|
|
|
(md_estimate_size_before_relax): Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/reloc64.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-jump.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx-branch-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx-branch-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-relax-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-relax-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/reloc64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-branch.d: Likewise.
|
|
|
|
|
|
|
2018-02-13 13:56:29 +01:00
|
|
|
|
2018-02-13 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/loongson-3a-2.d: Rename test.
|
|
|
|
|
|
|
2018-02-13 14:14:47 +01:00
|
|
|
|
2018-02-13 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 22823
|
|
|
|
|
|
* config/obj-elf.c (elf_pseudo_table): Remove now redundant
|
|
|
|
|
|
casts.
|
|
|
|
|
|
(obj_elf_vtable_inherit): Rename to obj_elf_get_vtable_inherit.
|
|
|
|
|
|
(obj_elf_vtable_inherit): New stub function that calls
|
|
|
|
|
|
obj_elf_get_vtable_inherit.
|
|
|
|
|
|
(obj_elf_vtable_entry): Rename to obj_elf_get_vtable_entry.
|
|
|
|
|
|
(obj_elf_vtable_entry): New stub function that calls
|
|
|
|
|
|
obj_elf_get_vtable_entry.
|
|
|
|
|
|
* config/obj-elf.h (obj_elf_vtable_inherit): Update prototype.
|
|
|
|
|
|
(obj_elf_vtable_entry) Likewise.
|
|
|
|
|
|
(obj_elf_get_vtable_inherit) Likewise.
|
|
|
|
|
|
(obj_elf_get_vtable_entry) Likewise.
|
|
|
|
|
|
* config/tc-arm.c (md_pseudo_table): Remove now redundant cast.
|
|
|
|
|
|
* config/tc-i386c (md_pseudo_table): Likewise.
|
|
|
|
|
|
* config/tc-hppa.c (pa_vtable_entry): Call
|
|
|
|
|
|
obj_elf_get_vtable_entry.
|
|
|
|
|
|
(pa_vtable_inherit): Call obj_elf_get_vtable_inherit.
|
|
|
|
|
|
* config/tc-mips.c (s_mips_file): Replace call to dwarf2_get_file
|
|
|
|
|
|
with call to dwarf2_get_filename.
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_directive_file): Rename to
|
|
|
|
|
|
dwarf2_directive_filename.
|
|
|
|
|
|
(dwarf2_directive_file): New stub function that calls
|
|
|
|
|
|
dwarf2_directive_filename.
|
|
|
|
|
|
* dwarf2dbg.h: Prototype dwarf2_directive_filename.
|
|
|
|
|
|
|
2018-02-12 17:04:05 +01:00
|
|
|
|
2018-02-12 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/reginfo-2-n32.d: Add `--no-pad-sections' to
|
|
|
|
|
|
`as' flags.
|
|
|
|
|
|
|
MIPS: Fix encoding for MIPSr6 sigrie instruction.
The instruction encoding for the MIPS r6 sigrie instruction seems to be
incorrect. It's currently 0x4170xxxx (which overlaps with ei, di, evp,
and dvp), but should be 0x0417xxxx. See ISA reference[1][2].
References:
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
Instruction Set Manual", Imagination Technologies, Inc., Document
Number: MD00086, Revision 6.06, December 15, 2016, Table A.4 "MIPS32
REGIMM Encoding of rt Field", p. 452
[2] "MIPS Architecture For Programmers Volume II-A: The MIPS64
Instruction Set Reference Manual", Imagination Technologies, Inc.,
Document Number: MD00087, Revision 6.06, December 15, 2016, Table
A.4 "MIPS64 REGIMM Encoding of rt Field", p. 581
opcodes/
* mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
gas/
* testsuite/gas/mips/r6.d: Update for "sigrie" encoding fix.
* testsuite/gas/mips/r6-n32.d: Likewise.
* testsuite/gas/mips/r6-n64.d: Likewise.
2018-02-12 15:50:42 +01:00
|
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|
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2018-02-12 Henry Wong <henry@stuffedcow.net>
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* testsuite/gas/mips/r6.d: Update for "sigrie" encoding fix.
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* testsuite/gas/mips/r6-n32.d: Likewise.
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* testsuite/gas/mips/r6-n64.d: Likewise.
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2018-02-12 13:10:50 +01:00
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2018-02-12 Nick Clifton <nickc@redhat.com>
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* po/ru.po: Updated Russian translation.
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2018-02-08 00:48:59 +01:00
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2018-02-08 Alan Modra <amodra@gmail.com>
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PR 22819
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* config/tc-ppc.c (md_assemble): Rewrite insn alignment checking.
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(ppc_frag_check): Likewise.
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* testsuite/gas/ppc/misalign.d,
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* testsuite/gas/ppc/misalign.l,
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* testsuite/gas/ppc/misalign.s: New test.
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* testsuite/gas/ppc/misalign2.d,
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* testsuite/gas/ppc/misalign2.s: New test.
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* testsuite/gas/ppc/ppc.exp: Run them.
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2018-02-05 15:05:51 +01:00
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2018-02-05 Maciej W. Rozycki <macro@mips.com>
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* config/tc-riscv.c (riscv_handle_implicit_zero_offset): Rename
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`expr' parameter to `ep'.
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2018-02-05 15:00:21 +01:00
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2018-02-05 Maciej W. Rozycki <macro@mips.com>
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* testsuite/gas/mips/reginfo-2.d: New test.
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* testsuite/gas/mips/reginfo-2-n32.d: New test.
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* testsuite/gas/mips/reginfo-2.l: New test stderr output.
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* testsuite/gas/mips/reginfo-2.s: New test source.
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* testsuite/gas/mips/mips.exp: Run the new tests.
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2018-02-05 14:09:15 +01:00
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2018-02-05 Nick Clifton <nickc@redhat.com>
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* po/ru.po: Updated Russian translation.
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2018-01-31 04:04:18 +01:00
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2018-01-31 Alan Modra <amodra@gmail.com>
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PR 22714
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* app.c (last_char): New static var.
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(struct app_save): Add last_char field.
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(app_push, app_pop): Handle it.
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(do_scrub_chars): Use last_char in test for "\@". Set last_char.
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2018-01-30 00:13:51 +01:00
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2018-01-29 Eric Botcazou <ebotcazou@adacore.com>
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PR gas/22738
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* config/tc-sparc.h (sparc_mach): Declare.
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(TARGET_MACH): Define to above.
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* config/tc-sparc.c (sparc_mach): New function.
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(sparc_md_end): Minor tweak.
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2018-01-29 14:51:47 +01:00
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2018-01-29 Nick Clifton <nickc@redhat.com>
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* po/ru.po: Updated Russian translation.
|
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2018-01-27 00:05:05 +01:00
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2018-01-26 Maciej W. Rozycki <macro@mips.com>
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* configure.tgt: Use generic emulation for `mips-*-windiss',
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overriding the blanket choice made for `*-*-windiss'.
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2018-01-27 00:05:05 +01:00
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2018-01-26 Maciej W. Rozycki <macro@mips.com>
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* configure.tgt: Use `mips-*-sysv4*' rather than
|
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`mips-*-sysv4*MP*'.
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[GAS][AARCH64]Add group relocations to create PC-relative offset.
This is a patch to add the gas support for group relocations to create a
16, 32, 48, or 64 bit PC-relative offset inline.
The following relocations are added along with the test cases:
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
bfd/
2018-01-24 Renlin Li <renlin.li@arm.com>
* reloc.c: Add BFD_RELOC_AARCH64_MOVW_PREL_G0,
BFD_RELOC_AARCH64_MOVW_PREL_G0_NC, BFD_RELOC_AARCH64_MOVW_PREL_G1,
BFD_RELOC_AARCH64_MOVW_PREL_G1_NC, BFD_RELOC_AARCH64_MOVW_PREL_G2,
BFD_RELOC_AARCH64_MOVW_PREL_G2_NC, BFD_RELOC_AARCH64_MOVW_PREL_G3.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
gas/
2018-01-24 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reloc_table): add entries for
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
BFD_RELOC_AARCH64_MOVW_PREL_G3.
(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
(md_apply_fix): Likewise
* testsuite/gas/aarch64/prel_g0.s: New.
* testsuite/gas/aarch64/prel_g0.d: New.
* testsuite/gas/aarch64/prel_g0_nc.s: New.
* testsuite/gas/aarch64/prel_g0_nc.d: New.
* testsuite/gas/aarch64/prel_g1.s: New.
* testsuite/gas/aarch64/prel_g1.d: New.
* testsuite/gas/aarch64/prel_g1_nc.s: New.
* testsuite/gas/aarch64/prel_g1_nc.d: New.
* testsuite/gas/aarch64/prel_g2.s: New.
* testsuite/gas/aarch64/prel_g2.d: New.
* testsuite/gas/aarch64/prel_g2_nc.s: New.
* testsuite/gas/aarch64/prel_g2_nc.d: New.
* testsuite/gas/aarch64/prel_g3.s: New.
* testsuite/gas/aarch64/prel_g3.d: New.
2018-01-18 13:08:40 +01:00
|
|
|
|
2018-01-24 Renlin Li <renlin.li@arm.com>
|
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|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c (reloc_table): add entries for
|
|
|
|
|
|
BFD_RELOC_AARCH64_MOVW_PREL_G0, BFD_RELOC_AARCH64_MOVW_PREL_G0_NC,
|
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|
|
|
|
BFD_RELOC_AARCH64_MOVW_PREL_G1, BFD_RELOC_AARCH64_MOVW_PREL_G1_NC,
|
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|
|
BFD_RELOC_AARCH64_MOVW_PREL_G2, BFD_RELOC_AARCH64_MOVW_PREL_G2_NC,
|
|
|
|
|
|
BFD_RELOC_AARCH64_MOVW_PREL_G3.
|
|
|
|
|
|
(process_movw_reloc_info): Supports newly added MOVW_PREL relocations.
|
|
|
|
|
|
(md_apply_fix): Likewise
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g0.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g0.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g0_nc.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g0_nc.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g1.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g1.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g1_nc.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g1_nc.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g2.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g2.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g2_nc.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g2_nc.d: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g3.s: New.
|
|
|
|
|
|
* testsuite/gas/aarch64/prel_g3.d: New.
|
|
|
|
|
|
|
2018-01-23 22:18:24 +01:00
|
|
|
|
2018-01-23 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.ac: Also set `mips_default_abi' to N32_ABI for
|
|
|
|
|
|
`mips64*-ps2-elf*'.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2018-01-23 20:01:35 +01:00
|
|
|
|
2018-01-23 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (options): Remove OPTION_COMPAT_ARCH_BASE
|
|
|
|
|
|
enum value.
|
|
|
|
|
|
|
2018-01-23 17:56:30 +01:00
|
|
|
|
2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .pconfig.
|
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|
|
|
|
* doc/c-i386.texi: Document .pconfig.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Add PCONFIG tests.
|
|
|
|
|
|
* testsuite/gas/i386/pconfig-intel.d: New test.
|
|
|
|
|
|
* testsuite/gas/i386/pconfig.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/pconfig.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-pconfig-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-pconfig.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-pconfig.s: Likewise.
|
|
|
|
|
|
|
2018-01-23 17:39:05 +01:00
|
|
|
|
2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add .wbnoinvd.
|
|
|
|
|
|
* doc/c-i386.texi: Document .wbnoinvd.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Add WBNOINVD tests.
|
|
|
|
|
|
* testsuite/gas/i386/wbnoinvd-intel.d: New test.
|
|
|
|
|
|
* testsuite/gas/i386/wbnoinvd.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/wbnoinvd.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-wbnoinvd-intel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-wbnoinvd.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-wbnoinvd.s: Likewise.
|
|
|
|
|
|
|
2018-01-23 15:51:22 +01:00
|
|
|
|
2018-01-23 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_show_usage): Correctly indicate the
|
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|
|
|
configuration-specific default ABI.
|
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|
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|
|
2018-01-23 15:51:22 +01:00
|
|
|
|
2018-01-23 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_show_usage): Report `-mmips16e2' and
|
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|
|
|
|
`-mno-mips16e2' options.
|
|
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|
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|
|
2018-01-22 22:06:35 +01:00
|
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|
|
2018-01-22 Maciej W. Rozycki <macro@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-mips.texi (MIPS ASE Instruction Generation Overrides):
|
|
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|
|
Correct syntax of the `.set nomips16e2' directive description.
|
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|
|
2018-01-22 15:31:10 +01:00
|
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|
|
2018-01-22 Oleg Endo <olegendo@gcc.gnu.org>
|
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|
|
|
|
|
|
|
|
|
|
PR 22737
|
|
|
|
|
|
* config/tc-rx.c (rx_start_line): Handle escaped double-quote character.
|
|
|
|
|
|
* testsuite/gas/rx/pr22737.s: New test.
|
|
|
|
|
|
* testsuite/gas/rx/pr22737.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/rx/rx.exp: Run the new test.
|
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|
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|
2018-01-19 15:17:24 +01:00
|
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|
2018-01-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
|
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* config/tc-arm.c (ToC macro): Remove spurious comment.
|
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|
(ToU macro): Likewise.
|
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|
|
2018-01-17 23:04:16 +01:00
|
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|
|
2018-01-17 Jim Wilson <jimw@sifive.com>
|
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|
|
* config/tc-riscv.c (validate_riscv_insn) <'z'>: New.
|
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|
|
(riscv_ip) <'z'>: New.
|
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|
|
Replace CET bit with IBT and SHSTK bits.
The latest specification for Intel CET technology defined two
new bits instead of previously used CET bit. These are IBT and
SHSTK bits. The patch replaces CET bit with IBT and SHSTK bits.
gas/
* config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk.
(cpu_noarch): Add noibt, noshstk.
(parse_insn): Change cpucet to cpuibt.
* doc/c-i386.texi: Delete .cet. Add .ibt, .shstk.
* testsuite/gas/i386/cet-ibt-inval.l: New test.
* testsuite/gas/i386/cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/cet-shstk-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise.
* testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise.
opcodes/
* i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS,
CpuCET. Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
(cpu_flags): Add CpuIBT, CpuSHSTK.
* i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
(i386_cpu_flags): Add cpuibt, cpushstk.
* i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
2018-01-17 17:45:52 +01:00
|
|
|
|
2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Delete .cet. Add .ibt, .shstk.
|
|
|
|
|
|
(cpu_noarch): Add noibt, noshstk.
|
|
|
|
|
|
(parse_insn): Change cpucet to cpuibt.
|
|
|
|
|
|
* doc/c-i386.texi: Delete .cet. Add .ibt, .shstk.
|
|
|
|
|
|
* testsuite/gas/i386/cet-ibt-inval.l: New test.
|
|
|
|
|
|
* testsuite/gas/i386/cet-ibt-inval.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/cet-shstk-inval.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/cet-shstk-inval.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-ibt-inval.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-ibt-inval.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-shstk-inval.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-cet-shstk-inval.s: Likewise.
|
|
|
|
|
|
|
2018-01-16 13:45:44 +01:00
|
|
|
|
2018-01-16 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fr.po: Updated French translation.
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2018-01-15 23:53:44 +01:00
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2018-01-15 Jim Wilson <jimw@sifive.com>
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* testsuite/gas/riscv/c-zero-imm.s: Test addi that compresses to c.nop.
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* testsuite/gas/riscv/c-zero-imm.d: Likewise.
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2018-01-15 15:13:33 +01:00
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2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (ToC): Define macro.
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(ToU): Likewise.
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(insns): Make use of above macros for new instructions introduced in
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Armv8-M.
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[ARM] Enable conditional Armv8-M instructions
Newly introduced instructions common to ARMv8-M Baseline and Mainline
are currently all marked as unconditional. However, all instructions but
sg (ie. blxns, bxns, tt, ttt, tta, ttat, vlldm and vlstm) do actually
support conditional execution. This patch fixes the definition of these
instructions accordingly.
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (insns): Make blxns, bxns, tt, ttt, tta, ttat, vlldm
and vlstm conditionally executable and reindent parameters.
* testsuite/gas/arm/archv8m-cmse-main.s: Add conditional version of
aforementionned instructions.
2018-01-15 15:11:02 +01:00
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2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (insns): Make blxns, bxns, tt, ttt, tta, ttat, vlldm
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and vlstm conditionally executable and reindent parameters.
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* testsuite/gas/arm/archv8m-cmse-main.s: Add conditional version of
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aforementionned instructions.
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2018-01-15 15:09:28 +01:00
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2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/tc-arm.c (it_fsm_post_encode): Do not warn if targeting M
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profile architecture or if in autodetection mode. Clarify that
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deprecation is for performance reason and concerns Armv8-A and Armv8-R.
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* testsuite/gas/arm/armv8-ar-bad.l: Adapt to new IT deprecation warning
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message.
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* testsuite/gas/arm/armv8-ar-it-bad.l: Likewise.
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* testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l: Likewise.
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* testsuite/gas/arm/udf.l: Likewise.
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* testsuite/gas/arm/udf.d: Assemble for Armv8-A explicitely.
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2018-01-15 13:09:11 +01:00
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2018-01-15 Nick Clifton <nickc@redhat.com>
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* po/uk.po: Updated Ukranian translation.
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2018-01-13 14:56:48 +01:00
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2018-01-13 Nick Clifton <nickc@redhat.com>
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* po/gas.pot: Regenerated.
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2018-01-13 14:31:12 +01:00
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2018-01-13 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
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2018-01-13 14:20:55 +01:00
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2018-01-13 Nick Clifton <nickc@redhat.com>
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2018-01-13 14:26:38 +01:00
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2.30 branch created.
|
2018-01-13 14:20:55 +01:00
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* NEWS: Add marker for 2.30.
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2018-01-12 14:12:17 +01:00
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2018-01-12 Gunther Nikl <gnikl@users.sourceforge.net>
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* gas/config/aout_gnu.h (USE_EXTENDED_RELOC): Explicitly
|
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define to 0 and 1. Remove a dangling reference to "AMD 29000"
|
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in a comment.
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2018-01-11 00:56:45 +01:00
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2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
|
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* testsuite/i386/avx512_4fmaps_vl-warn.l: Likewise.
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* testsuite/i386/avx512_4fmaps_vl-warn.s: Likewise.
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* testsuite/i386/avx512_4fmaps_vl.d: Likewise.
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* testsuite/i386/avx512_4fmaps_vl.s: Likewise.
|
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* testsuite/i386/avx512_4vnniw_vl-intel.d: Likewise.
|
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* testsuite/i386/avx512_4vnniw_vl.d: Likewise.
|
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* testsuite/i386/avx512_4vnniw_vl.s: Likewise.
|
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* testsuite/i386/i386.exp: Removed _vl tests for 4fmaps an 4vnniw
|
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tests.
|
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* testsuite/i386/x86-64-avx512_4fmaps_vl-intel.d: Removed.
|
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* testsuite/i386/x86-64-avx512_4fmaps_vl-warn.l: Likewise.
|
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* testsuite/i386/x86-64-avx512_4fmaps_vl-warn.s: Likewise.
|
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* testsuite/i386/x86-64-avx512_4fmaps_vl.d: Likewise.
|
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* testsuite/i386/x86-64-avx512_4fmaps_vl.s: Likewise.
|
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* testsuite/i386/x86-64-avx512_4vnniw_vl-intel.d: Likewise.
|
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* testsuite/i386/x86-64-avx512_4vnniw_vl.d: Likewise.
|
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* testsuite/i386/x86-64-avx512_4vnniw_vl.s: Likewise.
|
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|
2018-01-11 00:04:58 +01:00
|
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|
2018-01-11 Alan Modra <amodra@gmail.com>
|
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* config/tc-arm.c (aeabi_set_public_attributes): Avoid false
|
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|
positive "‘profile’ may be used uninitialized".
|
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|
2018-01-10 14:53:43 +01:00
|
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|
|
2018-01-10 Jan Beulich <jbeulich@suse.com>
|
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|
|
* testsuite/gas/i386/avx512_4fmaps.s,
|
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|
|
testsuite/gas/i386/avx512_4fmaps_vl.s,
|
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|
testsuite/gas/i386/x86-64-avx512_4fmaps.s,
|
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|
|
testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Actually test
|
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|
|
|
|
Disp8 forms (and the transition happening at the right
|
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|
|
|
|
boundary).
|
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|
|
* testsuite/gas/i386/avx512_4fmaps.d,
|
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|
|
|
testsuite/gas/i386/avx512_4fmaps-intel.d,
|
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|
|
|
|
testsuite/gas/i386/avx512_4fmaps_vl.d,
|
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|
|
|
testsuite/gas/i386/avx512_4fmaps_vl-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512_4fmaps.d,
|
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|
|
|
|
testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Adjust
|
|
|
|
|
|
expectations.
|
|
|
|
|
|
|
2018-01-10 14:53:05 +01:00
|
|
|
|
2018-01-10 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512bw.s,
|
|
|
|
|
|
testsuite/gas/i386/avx512bw_vl.s: Add VPCMP* tests with memory
|
|
|
|
|
|
operands.
|
|
|
|
|
|
* testsuite/gas/i386/avx512bw-intel.d,
|
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|
|
|
testsuite/gas/i386/avx512bw.d,
|
|
|
|
|
|
testsuite/gas/i386/avx512bw_vl-intel.d.
|
|
|
|
|
|
testsuite/gas/i386/avx512bw_vl.d: Adjust expectations.
|
|
|
|
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|
|
2018-01-10 01:40:06 +01:00
|
|
|
|
2018-01-09 Jim Wilson <jimw@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/auipc-x0.d: New.
|
|
|
|
|
|
* testsuite/gas/riscv/auipc-x0.s: New.
|
|
|
|
|
|
|
2018-01-09 15:15:00 +01:00
|
|
|
|
2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (insns): Add csdb, enable for Armv3 and above
|
|
|
|
|
|
in Arm execution state, and Armv6T2 and above in Thumb execution
|
|
|
|
|
|
state.
|
|
|
|
|
|
* testsuite/gas/arm/csdb.s: New.
|
|
|
|
|
|
* testsuite/gas/arm/csdb.d: New.
|
|
|
|
|
|
* testsuite/gas/arm/thumb2_it_bad.l: Add csdb.
|
|
|
|
|
|
* testsuite/gas/arm/thumb2_it_bad.s: Add csdb.
|
|
|
|
|
|
|
2018-01-09 12:28:04 +01:00
|
|
|
|
2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/system.d: Update expected results to expect
|
|
|
|
|
|
CSDB for hint 0x14.
|
|
|
|
|
|
|
2018-01-08 13:36:59 +01:00
|
|
|
|
2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/22681
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run x86-64-movd and
|
|
|
|
|
|
x86-64-movd-intel.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-movd-intel.d: New file.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-movd.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-movd.s: Likewise.
|
|
|
|
|
|
|
2018-01-08 10:29:17 +01:00
|
|
|
|
2018-01-08 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 22553
|
|
|
|
|
|
* doc/c-i386.texi (i386-Directives): Document the .largecomm
|
|
|
|
|
|
directive.
|
|
|
|
|
|
|
2018-01-04 23:17:53 +01:00
|
|
|
|
2018-01-04 Jim Wilson <jimw@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg.s: Add missing stval and mtval.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg.d: Likewise.
|
|
|
|
|
|
|
2018-01-03 06:17:27 +01:00
|
|
|
|
2018-01-03 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
Update year range in copyright notice of all files.
|
|
|
|
|
|
|
2018-01-02 13:13:17 +01:00
|
|
|
|
2018-01-02 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 18119
|
|
|
|
|
|
* config/tc-arm.c (do_mrs): Fix test of bits 16-19 in non-banked
|
|
|
|
|
|
version of ARM MRS instruction.
|
|
|
|
|
|
|
2018-01-03 06:15:17 +01:00
|
|
|
|
For older changes see ChangeLog-2017
|
2016-01-01 11:44:31 +01:00
|
|
|
|
|
2018-01-03 06:15:17 +01:00
|
|
|
|
Copyright (C) 2018 Free Software Foundation, Inc.
|
2016-01-01 11:44:31 +01:00
|
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|
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|
|
Copying and distribution of this file, with or without modification,
|
|
|
|
|
|
are permitted in any medium without royalty provided the copyright
|
|
|
|
|
|
notice and this notice are preserved.
|
|
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|
|
Local Variables:
|
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|
|
mode: change-log
|
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|
|
left-margin: 8
|
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fill-column: 74
|
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version-control: never
|
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End:
|