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1246 Commits

Author SHA1 Message Date
Doug Evans
c5ecfceb13 * cpu.h (TRACE_COND_BR): Use TRACE_BRANCH_P, not TRACE_ALU_P. 1997-11-24 22:58:47 +00:00
Doug Evans
091521c48b * sim-trace.c (trace_option_handler): Set state trace file 
for --trace-file in addition to cpu's values.
	(trace_vprintf): If cpu == NULL, try state's trace file.
 1997-11-24 22:21:51 +00:00
Doug Evans
8f3cfc0efb Entries for .gdbinit additions and sim-model.c option fix. 1997-11-24 22:09:12 +00:00
Doug Evans
4b5545c9f0 * sim-model.c (model_options): Use '\0' for `shortopt'. 1997-11-24 20:43:38 +00:00
Doug Evans
f375dd7d0e * Make-common.in (all): Add .gdbinit. 
* gdbinit.in: Add dump command.
 1997-11-24 20:14:35 +00:00
Doug Evans
f2ea891349 * sim-core.c (sim_core_signal): Fix spelling error in message. 
* sim-hrw.c (sim_read): Use read map, not write map.
 1997-11-24 20:11:02 +00:00
Andrew Cagney
9dcdd9ad73 Sanitization 1997-11-24 13:34:52 +00:00
Andrew Cagney
4ba8d09fe2 Change MIPS simulator so that it uses the (software) module sim_fpu 
for floating point operations.  Eliminates all dependencies the
simulator had on the hosts FP implemantation.

Add sim_fpu_{inv,abs,neg} functions to sim_fpu.[hc]
 1997-11-23 03:34:15 +00:00
Andrew Cagney
aaa11abe42 Clarify meaning of sim_signalled's SIGRC argument. Document that this 
isn't possible in sim-reason.c and just return the target SIGRC
instead.

For simulators that rely on sim-reason.c, replace SIG* with SIM_SIG*.

Hack nrun.c so that when it is executed (ARGV[0]) as `step' instead
of `run' it single steps the simulator.  Allows testing of single step
without full GDB.
 1997-11-22 12:52:44 +00:00
Andrew Cagney
a1cf18dc76 Pacify GCC - SIM_SIGNONE missing in enum, xmalloc/free VS ZALLOC/zfree. 1997-11-20 22:56:11 +00:00
Andrew Cagney
232156dee9 o Add SIM_SIGFPE to sim-signals 
o Start SIM_SIG* at 64 so that the use of host signal numbers can be
  detected and reported.
o Update MIPS simulator to use sim-signal.
 1997-11-20 09:50:36 +00:00
Andrew Cagney
a09a30d298 Allow reads/writes to C0_CONFIG register. 1997-11-20 09:17:06 +00:00
Doug Evans
c6475c41bb (enosys): Delete. 1997-11-20 00:50:40 +00:00
Doug Evans
ac1d2660b2 * callback.c (cb_host_to_target_stat): Fix return values. 1997-11-20 00:47:02 +00:00
Doug Evans
998d2c8275 * cgen-sim.h (enum_signal_type): Delete. 
(engine_signal): Update prototype.
	* cgen-utils.c: Don't include <signal.h>.
	(sim_signal_to_host): Delete, lives in sim-signal.c now.
	(engine_signal): Update.
 1997-11-19 20:44:35 +00:00
Doug Evans
62fb62925f * mem-ops.h: Rename SIM_SIG{ACCESS,ALIGN} to SIM_SIG{SEGV,BUS}. 
* sim-if.c (sim_open): Call sim_config.
	(sim_stop_reason): Update call to sim_signal_to_host.
 1997-11-19 20:18:56 +00:00
Doug Evans
398057b722 * sim-utils.c (sim_state_alloc): Call SIM_STATE_ALLOC if defined. 
(sim_state_free): Call SIM_STATE_FREE if defined.

	* sim-module.c (sim_module_install): Don't leave any modules
	installed if one fails to install.
 1997-11-19 20:13:11 +00:00
Michael Meissner
e163bbbf2a Do not include alloca-conf.h since alloca is not used. 1997-11-19 18:40:49 +00:00
Michael Meissner
eb5f3fcd1a Fix carry/overflow problems 1997-11-19 18:30:47 +00:00
Doug Evans
fccbeeb639 (sim_stop_reason): Add comment. 1997-11-19 08:10:40 +00:00
Doug Evans
a4b44a2b08 * sim-core.c (sim_core_signal): Use sim_stopped instead of 
sim_signalled.
 1997-11-19 08:03:53 +00:00
Doug Evans
1ebc7e0e24 * sim-signal.c, sim-signal.h: New files. 
* Make-common.in (sim-signal.o): Add rule for.
	(SIM_NEW_COMMON_OBJS): Add sim-signal.o.
	* sim-abort.c: Don't include <signal.h>.
	* sim-basics.h: #include "sim-signal.h".
	* sim-break.c: Don't include <signal.h>.
	(sim_handle_breakpoint): Replace SIGTRAP with SIM_SIGTRAP.
	* sim-core.c: Don't include <signal.h>.
	(SIGBUS): Delete definition.
	(sim_core_signal): Replace SIGSEGV,SIGBUS with SIM_SIGSEGV,SIM_SIGBUS.
	* sim-engine.c: Don't include <signal.h>.
	(sim_engine_abort): Replace SIGABRT with SIM_SIGABRT.
	* sim-reason.c (sim_stop_reason): Call sim_signal_to_host.
	* sim-resume.c: Don't include <signal.h>.
	(SIGTRAP): Delete definition.
	(has_stepped): Replace SIGTRAP with SIM_SIGTRAP.
	* sim-stop.c: Don't include <signal.h>.
	(control_c_simulation): Replace SIGINT with SIM_SIGINT.
	* sim-watch.c: Don't include <signal.h>.
	(handle_watchpoint): Replace SIGINT with SIM_SIGINT.
 1997-11-19 08:00:37 +00:00
Doug Evans
13c9499d4e * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value. 
* sim-break.c (sim_handle_breakpoint): Likewise.
 1997-11-19 02:37:58 +00:00
Doug Evans
340d8e209e * sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value. 1997-11-18 23:59:29 +00:00
Doug Evans
e5ce1670c1 * Make-common.in (SIM_NEW_COMMON_OBJS): New variable. 
* sim-base.h (CIA_ADDR): Provide default definition.
 1997-11-18 23:55:33 +00:00
Doug Evans
590fc16693 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 1997-11-18 23:46:14 +00:00
Doug Evans
486740ce01 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 1997-11-18 23:40:40 +00:00
Doug Evans
d5d9a1e155 * sim-main.h (CIA_ADDR): Define. 
* Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 1997-11-18 23:36:46 +00:00
Doug Evans
38377b3a48 * Make-common.in (srccom): New variable. 1997-11-18 07:14:20 +00:00
Doug Evans
9b51b3ddd3 Tweak comment. 1997-11-17 23:17:31 +00:00
Doug Evans
f7abc1ca0c * Make-common.in (DEP, COMMON_DEP_CFLAGS): Define. 
(LIB_OBJS): Add syscall.o.
	(gentmap): Pass $(NL_TARGET) to $(CC).
	(syscall.o): Add rule for.
	(sim_main_headers): Add $(SIM_EXTRA_DEPS).
	(sim-bits.o): Depend on $(sim-n-bits_h).
	(sim-load.o): Depend on callback.h.

	* Make-common.in (cgen-*.o): Update dependencies, mem-ops.h renamed to
	cgen-mem.h, sem-ops.h renamed to cgen-ops.h.
	* cgen-mem.h, cgen-ops.h: New files.

	* aclocal.m4 (--enable-sim-scache): Pass -DWITH_SCACHE=0 for "=no".

	* Makefile.in (nltvals.def): Depend on gennltvals.sh.
	Rewrite build rule.
	* callback.c: #include string.h or strings.h.
	#include sys/types.h and sys/stat.h.
	(cb_init_syscall_map,cb_init_errno_map,cb_init_open_map): Declare.
	(enosys): New function.
	(os_get_errno,os_open): Update.
	(os_stat,os_fstat): New functions.
	(os_init): Initialize syscall_map, errno_map, open_map.
	(default_callback): Add entries for os_stat, os_fstat, syscall_map,
	errno_map, open_map, signal_map, stat_map.
	(cb_read_target_syscall_maps): New function.
	(cb_target_to_host_syscall): New function.
	(cb_host_to_target_errno): Renamed from host_to_target_errno.
	(cb_target_to_host_open): Renamed from target_to_host_open.
	(store): New function.
	(cb_host_to_target_stat): New function.
	* gentmap.c (sys_tdefs): New global.
	(gen_targ_vals_h): Output target syscall numbers.
	(gen_targ_map_c): Update.  Output target syscall translation map.
	* gentvals.sh: New first argument `target'.  Preface table with
	#ifdef NL_TARGET_$target if non-null target passed.
	* gennltvals.sh: New file.
	* nltvals.def: Regenerated.
 1997-11-17 23:09:08 +00:00
Andrew Cagney
891703e5e8 Test SUBI omsn 1997-11-17 22:36:19 +00:00
Doug Evans
cf02c13ce2 (sim_core_signal): Add missing "\n" in message. 
Forgot to check in yesterday.
 1997-11-14 21:52:04 +00:00
Andrew Cagney
f23e93dab0 * mips.igen: Tag vr5000 instructions. 
(ANDI): Was missing mipsIV model, fix assembler syntax.
        (do_c_cond_fmt): New function.
        (C.cond.fmt): Handle mips I-III which do not support CC field
        separatly.
        (bc1): Handle mips IV which do not have a delaed FCC separatly.
        (SDR): Mask paddr when BigEndianMem, not the converse as specified
        in IV3.2 spec.
        (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
        vr5000 which saves LO in a GPR separatly.
        * configure.in (enable-sim-igen): For vr5000, select vr5000
        specific instructions.
        * configure: Re-generate.
 1997-11-14 08:27:38 +00:00
Doug Evans
9e8a900adf * sim-base.h (sim_state_base): Move `magic' to end of struct. 
* sim-base.h (sim_state_base): Add member trace_data.
	(STATE_TRACE_DATA): New macro.
	* sim-trace.h (TRACE_DEBUG_IDX,TRACE_debug): New macros.
	({WITH_,}TRACE_DEBUG_P): New macros.
	(STATE_TRACE_FLAGS,STRACE_P,STRACE_DEBUG_P): New macros.
	(_sim_cpu): Delete forward reference.
	(debug_printf): Update.
	* sim-trace.c (OPTION_TRACE_DEBUG): Define.
	(trace_options): Add --trace-debug.
	(set_trace_options): Handle it.
	(trace_option_handler): Likewise.
	(trace_install): Init state trace_data struct.
	(trace_uninstall): Close state trace file.
	* sim-events.c (ETRACE): Only print source file and number if
	--trace-debug.
	* sim-n-core.h (sim_core_trace_M): Likewise.

	* sim-core.c (sim_core_signal): Add missing "\n" in message.
 1997-11-13 21:18:14 +00:00
Felix Lee
c7e3f734a7 * sim-n-core.h (sim_core_read_unaligned_N): illegal empty 
initializer.
	* sim-types.h (unsigned128,signed128): fix typo for MSVC.
 1997-11-13 18:45:21 +00:00
Doug Evans
5dcf955d46 * Make-common.in (BUILT_SRC_FROM_COMMON): Remove files no longer 
built this way.
	(sim-config.o): Remove non-existent $(sim-nconfig_h) dependency.
	(clean): Don't delete $(BUILT_SRC_FROM_COMMON) if building in
	source tree.
 1997-11-12 20:29:53 +00:00
Doug Evans
15f5035c7d * aclocal.m4 (SIM_AC_OPTION_SCACHE): Fix typo. 
Updating of configure's left for later.
 1997-11-12 20:19:34 +00:00
Jeff Law
fc615b0b1e * simops.c (call:16 call:32): Stack adjustment is determined solely 
by the imm8 field.
 1997-11-11 17:37:04 +00:00
Andrew Cagney
a94c5493a7 Make the signess of compares between GPR's explicit using a cast to 
signed_word.
 1997-11-11 12:31:24 +00:00
Andrew Cagney
030843d7f8 Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1, 
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
 1997-11-11 07:50:13 +00:00
Andrew Cagney
f445a8902d * sim-events.c (sim_events_process): Re-compute the time - 
update_time_from_event - as each event is processed. Reverses
        previous change.
 1997-11-11 07:48:05 +00:00
Andrew Cagney
87192c630a * simops.c (OP_4201): "rachi". Sign extend bit 40 of ACC. Sign 
extend bit 44 all constants.
(OP_4201): Replace GCC specific 0x..LL with SIGNED64 macro.
 1997-11-10 22:40:14 +00:00
Andrew Cagney
51624b4bf6 Test rachi instruction. 1997-11-10 08:27:15 +00:00
Andrew Cagney
8cb060b6b0 * callback.c (os_poll_quit): Replace _WIN32 with _MSC_VER. 1997-11-10 02:08:50 +00:00
Andrew Cagney
95469cebdd Replace global IPC with function argument cia or current instruction 
address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
 1997-11-06 14:24:57 +00:00
Andrew Cagney
549bf95051 Fix computation of sim_events_time when sim_events_slip is loosing it. 1997-11-06 14:14:33 +00:00
Andrew Cagney
7ce8b9178c IGEN likes to cache the current instruction address (CIA). Change the 
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
 1997-11-06 09:16:16 +00:00
Andrew Cagney
864519b9fd Allow separate single character and long options. 
Avoid overflow of options buffer.
Provide examples of sim-options use.
 1997-11-06 05:00:09 +00:00
Andrew Cagney
44b8585a3d Add option --enable-sim-igen to mips configuration. Allows user to 
attempt a build of an older MIPS simulator using igen.
 1997-11-05 09:43:34 +00:00
Andrew Cagney
63be8febf7 Rewrite the MIPS simulator's memory model so that it uses the generic 
common/sim-core.

Add support for 3, 5, 6, 7 byte transfers to sim core.
 1997-11-05 08:17:26 +00:00
Andrew Cagney
22de994d0e Delete -l and -n options, didn't do anything. 
Rename option trace to dinero-trace & dinero-file - -t clashed with
common options.
Enable common trace options.
 1997-11-05 01:08:12 +00:00
Andrew Cagney
525d929e49 Rewrite sim_monitor (implements read, write, open, et.al. system 
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write.  This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
 1997-11-05 00:08:14 +00:00
Andrew Cagney
a26ecda4ec * sim-endian.h (U16_8): Implement 
* sim-endian.c (sim_endian_split_16, sim_endian_join_16): New functions
* sim-endian.h (VL8_16, VH8_16): Implement.
* sim-memopt.c (memory_option_handler): Typecast 64bit value to long in printf.
  (memory_option_handler): Only zalloc modulo bytes when non-zero.
  (memory_option_handler): Skip comma in alias address list
 1997-11-04 23:59:41 +00:00
Brendan Kehoe
3b5bd034f5 * gen-idecode.c (print_jump_until_stop_body): Use `#if 0' instead of 
`#ifdef 0' around this.
 1997-11-04 17:36:37 +00:00
Michael Meissner
5aa52e3d26 do not assume NULL is an integer constant 1997-11-04 13:19:49 +00:00
Gavin Romig-Koch
0425cfb3af Correct r5900 sanitization. 1997-11-04 05:50:22 +00:00
Andrew Cagney
fcc86d82f7 Make memory regions layered (just like existing device regions) so 
that overlapping regions can be defined.
Allow the layer (level) of a memory region to be specified as part of
an address parameter to memory options.
Update simulators.
 1997-10-31 08:49:10 +00:00
Nick Clifton
d3e9ca1a88 Patches to support generating an executing environment. 
Patches from Tony Thompson at ARM:  athompso@arm.com
 1997-10-30 21:52:16 +00:00
Doug Evans
d048b52dbb * sim-core.h (sim_core_write_8): Define. 1997-10-30 21:45:12 +00:00
Gavin Romig-Koch
6205f37913 * gencode.c: Add tx49 configury and insns. 
* configure.in: Add tx49 configury.
	* configure: Update.
 1997-10-29 19:42:49 +00:00
Andrew Cagney
01b9cd49ca common/sim-bits.h: Document ROTn macro. 
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
 1997-10-29 04:02:30 +00:00
Andrew Cagney
89d0973831 Add support for 16 byte quantities to sim-endian macro H2T. 
Add model-filter field to option, include, model anf function igen records
 1997-10-28 07:10:36 +00:00
Andrew Cagney
a86809d323 Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>. 1997-10-28 02:13:09 +00:00
Doug Evans
084219a513 * sem-ops.h (U{DIV,MOD}[BHSD]I): Use unsigned division. 1997-10-27 20:45:56 +00:00
Doug Evans
c3e3e4ad2f * sim-endian.h: Disable 16 byte support. 
So things will build.
 1997-10-27 19:47:24 +00:00
Doug Evans
374b95c1b0 * sim-n-endian.h: Add TAGS entrys for 16 byte versions. 1997-10-27 19:25:59 +00:00
Doug Evans
2fc2f8d8a4 Fix typo. 1997-10-27 19:25:05 +00:00
Andrew Cagney
16bd5d6e52 Separate r5900 specifoc and mips16 instructions. 
Add support for this to configure (vr5400 target only)
 1997-10-27 07:55:24 +00:00
Andrew Cagney
90ad43b2de Add mips64vr5400 to configuration list 
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
 1997-10-27 06:42:13 +00:00
Andrew Cagney
e2880fadf3 Add include-file support to igen. 1997-10-27 06:30:35 +00:00
Andrew Cagney
f45dd42b32 Add 128 bit transfers to sim core. 1997-10-27 03:00:12 +00:00
Gavin Romig-Koch
635ae9cb7c * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using 
BigEndianMem instead of !ByteSwapMem.
 1997-10-25 20:53:46 +00:00
Andrew Cagney
b5da31ac7c Correct name of file given in ChangeLog for change: Pass lma_p and 
sim_write args to sim_load_file.
 1997-10-25 05:04:25 +00:00
Andrew Cagney
122edc03de Add basic igen configuration to autoconf. Disable. 1997-10-24 07:54:21 +00:00
Andrew Cagney
dad6f1f326 Add function to fetch 32bit instructions 
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
 1997-10-24 06:43:51 +00:00
Andrew Cagney
49a7683337 Checkpoint IGEN version of mips sim 1997-10-24 06:38:44 +00:00
Andrew Cagney
4a203fbae2 Add function sim_events_slip() 
Clear work_pending flag as part of processing any pending work.
 1997-10-24 05:53:01 +00:00
Andrew Cagney
1315b4cb60 Address MSC compiler issues in d10v_sim.h 1997-10-24 00:52:23 +00:00
Andrew Cagney
9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file(). 
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
 1997-10-22 05:26:27 +00:00
Doug Evans
2328ef1c98 * nrun.c (main): Exit if bfd_openr fails. 
Call bfd_check_format after bfd_openr.
 1997-10-22 02:12:41 +00:00
Doug Evans
897a1d7863 * nrun.c (main): Remove useless test of name != NULL. 1997-10-22 01:38:49 +00:00
Jeff Law
f4ab2b2fdc * simops.c: Correctly handle register restores for "ret" and "retf" 
instructions.
pr13306 related stuff.
 1997-10-21 16:07:53 +00:00
Andrew Cagney
92ad193bb0 Use SIM*_OVERFLOW_RESULT defined in sim-alu.h 1997-10-21 07:57:33 +00:00
Andrew Cagney
b7432f0f27 Pacify GCC -Wall 1997-10-21 07:41:46 +00:00
Andrew Cagney
aa324b9b1e Output pc profile statistics once gathered. 1997-10-21 07:40:00 +00:00
Andrew Cagney
e2f8ffb736 Delete profile support from MIPS simulator, use sim/common/sim-profile 
module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
 1997-10-21 03:41:21 +00:00
Andrew Cagney
293a0876f8 Have single bit macros return an unsigned result. Avoids risk (and 
need) of sign extending results.
 1997-10-20 07:27:55 +00:00
Andrew Cagney
fb5a2a3e39 Make mips registers of type unsigned_word. 
Ensure all references to MIPS registers use same type.
 1997-10-20 06:28:53 +00:00
Andrew Cagney
0a0ecb2120 Add 8 bit arithmetic to sim-alu. 
Fix flags (Carry, oVerflow) for negate and subtract.
Add ALU*_RESULT macros for accessing final result of ALU op.
 1997-10-20 02:03:06 +00:00
Andrew Cagney
afb1dbe851 Preliminary tests for sim-alu module. 1997-10-17 03:57:53 +00:00
Andrew Cagney
ea985d2472 Move register definitions and macros out of interp.c and into sim-main.h 1997-10-16 03:50:48 +00:00
Andrew Cagney
085c1cb988 Checkpoint IGEN version of MIPS simulator. 1997-10-16 03:41:57 +00:00
Andrew Cagney
284e759d1f Rename generated file engine.c to oengine.c. 1997-10-16 03:39:13 +00:00
Andrew Cagney
339fb14904 * gencode.c (build_instruction): Use FPR_STATE not fpr_state. 1997-10-16 03:29:47 +00:00
Andrew Cagney
8b70f83790 * gencode.c (build_instruction): For "FPSQRT", output correct number 
of arguments to Recip.
 1997-10-16 03:23:16 +00:00
Andrew Cagney
eaa202ddd4 * gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape 
newlines at end of generated call to sim_engine_abort.
 1997-10-16 03:19:41 +00:00
Andrew Cagney
81b3b32cda Sanitize additional files. 1997-10-15 00:05:28 +00:00
Andrew Cagney
5a9bddea84 Enable d10v simulator testsuite - two tests: Hello World and exit47. 1997-10-15 00:00:41 +00:00
Andrew Cagney
fd89abc204 Handle core regions which start at a poorly aligned address. 1997-10-14 23:45:52 +00:00
Andrew Cagney
7456a10d9b * sim-alu.h (ALU64_HAD_OVERFLOW): Define. 
(ALU64_SUB): Define.
* Make-common.in (all): Build SIM_EXTRA_ALL first.
(.gdbinit): Remove dependencies, generate once per build.
 1997-10-14 09:39:05 +00:00
Andrew Cagney
055ee2977f Checkpoint IGEN version of MIPS simulator. 1997-10-14 09:34:08 +00:00
Andrew Cagney
0c2c5f6141 Move global MIPS simulator variables into sim_cpu struct. 1997-10-14 09:26:03 +00:00
Andrew Cagney
1b217de0f3 Correct type of address argument for sim_core_{read,write} 1997-10-14 09:24:57 +00:00
Andrew Cagney
18c64df613 o Add support for configuring wordsize, fp hardware and target 
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
 1997-10-14 07:27:31 +00:00
Andrew Cagney
d5cecca93c Output line-ref to original igen source file when generating trace 
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
 1997-10-14 02:54:08 +00:00
Fred Fish
1155e06e3f * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move 
exception generation code to OP_6E01.
	(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
	generation code.
PR 13550
 1997-10-13 18:26:52 +00:00
Fred Fish
b83093ff79 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. 
(OP_6601): Ditto.
PR 13498
 1997-10-11 16:50:05 +00:00
Fred Fish
93f0cb6975 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. 
(OP_6601): Ditto.
 1997-10-11 16:48:47 +00:00
Andrew Cagney
49a6eed58a Snap. Gets through igen's checks. 1997-10-09 08:38:22 +00:00
Andrew Cagney
8782bfcfc4 Add -Wnodiscard option so that warning about discarded instructions 
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
 1997-10-09 08:35:33 +00:00
Andrew Cagney
2875c6c685 Build IGEN with the MIPS simulator. 1997-10-09 00:41:14 +00:00
Andrew Cagney
f2b3001251 MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
Andrew Cagney
391c71708e Checkpoint IGEN input file for MIPS simulator. 1997-10-07 08:45:11 +00:00
Andrew Cagney
b3c77578dc Rewrite simulator floating point module. Do not rely on host FP 
implementation.  Add preliminary support for different IEEE-754
rounding modes.  Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
 1997-10-03 00:03:35 +00:00
Andrew Cagney
63fe2cc799 Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. 1997-10-02 23:37:30 +00:00
Andrew Cagney
adf4739efe Add access to hi part of r5900 128 bit registers. 1997-09-30 03:45:51 +00:00
Bob Manson
26b20b0a0e * configure: Regenerated. 
Can't hack one without the other...
 1997-09-29 21:46:32 +00:00
Andrew Cagney
e9b53280ba Do not sanitize out sim/testsuite/common directory. 1997-09-29 00:24:08 +00:00
Fred Fish
5f90b21e40 * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing 
for end condition.
PR 13334
 1997-09-27 20:04:22 +00:00
Fred Fish
823f2df47f * interp.c (pc_addr): Discard upper bit(s) of PC in case 
IMAP1 selects unified memory.
PR 13275
 1997-09-27 19:57:05 +00:00
Mark Alexander
6eedf3f4e5 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. 1997-09-26 20:56:55 +00:00
Felix Lee
b28ad90b4d * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and 
SIM_ENGINE_RESTART_HOOK.
 1997-09-26 19:24:45 +00:00
Stu Grossman
68f92f98ac * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC 
and zfree instead of xmalloc and free.  Prevents warnings.
 1997-09-25 18:22:46 +00:00
Andrew Cagney
af51b8d56d Add/use SIM_AC_OPTION_BITSIZE. 1997-09-25 07:19:05 +00:00
Andrew Cagney
7a3fb4e6ea * config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with 
RRRRR=0 for simulator breakpoint. Previous breakpoint insn was two
words.
 1997-09-25 07:01:21 +00:00
Andrew Cagney
e63bc706fe Allow gencode.c to generate input to the igen generator. 1997-09-25 04:23:24 +00:00
Andrew Cagney
eb2e3c85ca Pacify GCC -Wall 1997-09-25 04:13:50 +00:00
Stu Grossman
b9d580a4b0 * Make-common.in: New files sim-break.c, sim-break.h. 
* sim-base.h:  Add point to breakpoint list to sim_state_base.
	* sim-break.c sim-break.h:  New modules that implement intrinsic
	breakpoint support.
	* sim-module.c:  Add breakpoint module.
 1997-09-25 00:51:17 +00:00
Jeff Law
bfebf1a52a r5900 sanitization fixes. 1997-09-24 07:27:43 +00:00
Jeff Law
c118539e6b mips64vr5900el-elf -> mips64r5900-elf. 1997-09-23 21:45:43 +00:00
Felix Lee
34d07b7867 * sim-events.c (SIM_EVENTS_POLL_RATE): poll more often than once 
an hour.
        * sim-n-core.h (WITH_XOR_ENDIAN): MSVC barfs on
        if (0) { 1 % 0; }
        * sim-core.c (sim_core_xor_write_buffer): WITH_XOR_ENDIAN + 1.
        (SIGBUS) define for Windows.
        * sim-trace.c (trace_printf,debug_printf): added ALMOST_STDC.
        * sim-resume.c: define SIGTRAP for windows.
        * sim-xcat.h: use token pasting if ALMOST_STDC.
 1997-09-23 18:08:09 +00:00
Jeff Law
832f05e865 vr5900-r5900. 1997-09-23 16:21:23 +00:00
Andrew Cagney
1398204eb0 Check v850eq popm[hl] instructions. 
Check v850 NMI/RETI.
 1997-09-23 08:40:55 +00:00
Andrew Cagney
4141b1c63d * Make-common.in (SIM_SCACHE, SIM_DEFAULT_MODEL): Assign configured values. 
(CONFIG_CFLAGS): Add same.
 1997-09-23 04:05:50 +00:00
Felix Lee
9f4fd82344 * sim-types.h (SIGNED64): ##i64 when _MSC_VER, not _WIN32. 
(SIGNED32): use ##i32.
 1997-09-23 03:51:33 +00:00
Felix Lee
8f80453197 * configure.in: i386-windows is a cross, so don't expect 
libiberty to be there.
	* configure: updated.
 1997-09-23 03:48:59 +00:00
Andrew Cagney
92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options 
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
 1997-09-23 01:25:26 +00:00
Andrew Cagney
76a6247f07 Add memory alignment config option. 1997-09-22 09:40:57 +00:00
Andrew Cagney
8d332f9c1a Enable --alignment option, stop sim-options.c hardwiring the alignment. 1997-09-22 09:34:28 +00:00
Andrew Cagney
4ca7d6d25b Fix disabling of model code when simulator does not support modeling. 
Stops `-p' crashing simulators.
 1997-09-22 09:16:14 +00:00
Andrew Cagney
794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney
b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4 
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
 1997-09-22 00:24:46 +00:00
Nick Clifton
f13f11b494 Removed the v850eq sanitization 1997-09-20 23:40:50 +00:00
Gavin Romig-Koch
c476ac5560 Add handling for 3900's SDBBP, DERET, and RFE insns. 
* gencode.c (SDBBP,DERET): Added (3900) insns.
	(RFE): Turn on for 3900.
	* interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
	(dsstate): Made global.
	(SUBTARGET_R3900): Added.
	(CANCELDELAYSLOT): New.
	(SignalException): Ignore SystemCall rather than ignore and
	terminate.  Add DebugBreakPoint handling.
	(decode_coproc): New insns RFE, DERET; and new registers Debug
	and DEPC protected by SUBTARGET_R3900.
	(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
	bits explicitly.
	* Makefile.in,configure.in: Add mips subtarget option.
	* configure: Update.
 1997-09-20 18:22:22 +00:00
Gavin Romig-Koch
7afa8d4edc * gencode.c: Add r3900 (tx39). 
* gencode.c: Fix some configuration problems by improving
	the relationship between tx19 and tx39.
 1997-09-19 13:39:55 +00:00
Andrew Cagney
8122e3e471 Add alignment option. 
Add support for hardwired and default alignment to configuration.
 1997-09-19 08:11:40 +00:00
Andrew Cagney
f4822f1e6e More tests. 
Have sld check verify that the processor is a v850eq.
 1997-09-19 06:40:11 +00:00
Andrew Cagney
a276b6f057 Clean up tracing for Bcond & jmp insns. 
Fix computation of disp16 and disp22.
Clean up tracing of sld* insns.
 1997-09-19 06:39:21 +00:00
Andrew Cagney
4410c4b925 Correctly locate `_' in generated names. 1997-09-19 04:41:01 +00:00
Andrew Cagney
bd4c35cc6d Fix cmov immed. 1997-09-19 02:20:02 +00:00
Andrew Cagney
6a4c8f1e29 Change semantic function name to semantic_<INSN>_<FMT> instead of 
semantic_<FMT>_<INSN>.
 1997-09-19 00:50:24 +00:00
Andrew Cagney
60fe0e06a8 Fix cmov insn. 1997-09-19 00:50:19 +00:00
Felix Lee
3e906c081a sanitization fixes. typoes, missing fences, "start" instead of "end", etc. 1997-09-18 06:03:52 +00:00
Felix Lee
88770c1c90 add missing files. 1997-09-18 04:56:22 +00:00
Felix Lee
e1625ed217 v850 files that weren't being removed if !keep-v850 1997-09-18 01:33:24 +00:00
Felix Lee
2001e533ff * sim-main.h (kill): macro was missing args. 
(SIGTRAP): define for MSVC.
 1997-09-17 23:46:49 +00:00
Andrew Cagney
8bd89725a7 Test US bit of v850eq. 
Loop program for testing interrupt delivery.
 1997-09-17 13:46:29 +00:00
Andrew Cagney
a72f8fb439 Clean up more tracing. 
FIX interrupt delivery - was zapping PSW before it had been saved.
FIX interrupt return, was one instruction out.
 1997-09-17 08:14:23 +00:00
Andrew Cagney
175c6fd375 * sim-events.c (ETRACE): Use trace_printf not sim_io_printf for 
trace output.
* sim-core.c (sim_core_signal): When bad access halt simulator
SIGSEGV / SIGBUS instead of aborting.
(signal.h): Include.
* sim-watch.c (sim_watchpoint_install): Handler for watchpoint
options was missing.
 1997-09-17 08:13:07 +00:00
Andrew Cagney
6aead89a5f Fix tracing for: "ctret", "bsw", "hsw" 
Fix bugs in: "bsh", "callt", "stsr".
 1997-09-17 05:31:00 +00:00
Andrew Cagney
dfa5c0ca02 Define MOVED macro, move sub-bitfield from XXX to YYY. 1997-09-17 05:28:32 +00:00
Andrew Cagney
fc07e279aa More v850 simulator tests. 1997-09-17 05:27:56 +00:00
Andrew Cagney
1a6eb36b62 More v850 simulator tests. 1997-09-17 03:31:09 +00:00
Andrew Cagney
b52e58c24f Add/test 8bit bit manipuation macros. 
Test LS and MS versions of SEXT macro.
Simplify/test macro returning a single bit.
 1997-09-17 03:25:54 +00:00
Andrew Cagney
8603b0f0ff Generic rules for building simple simulator test programs. 1997-09-16 23:57:57 +00:00
Gavin Romig-Koch
667065d0d4 * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for 
JALR, just 2.
 1997-09-16 20:01:00 +00:00
Gavin Romig-Koch
9cb8397f86 * sim/mips/interp.c: Correct some HASFPU problems. 1997-09-16 15:36:18 +00:00
Andrew Cagney
fb1fd47514 Smooth some of ALU tracing's rough edges. 
Fix switch insn.
 1997-09-16 14:00:15 +00:00
Andrew Cagney
6a0f95864a More sim-bits testing. 1997-09-16 13:58:44 +00:00
Andrew Cagney
aa5e6a5a78 Add {LS,MS}SEXT and {LS,MS}INSERTED macros. Eliminates bug in SEXT. 1997-09-16 07:04:46 +00:00
Andrew Cagney
3f33acd039 Use trace_one_insn in trace functions. Buffer up trace data so that 
it is displayed in a single block.
 1997-09-16 07:03:41 +00:00
Andrew Cagney
65a87fa9e1 v850eq simulator tests. 1997-09-16 07:01:57 +00:00
Andrew Cagney
c7db488f71 Restrict ldsr (load system register) to modifying just non-reserved PSW bits. 
For v850eq, include PSW[US] in bits that can be modified.
 1997-09-16 04:49:24 +00:00
Andrew Cagney
721478d51b Add v850e version of breakpoint instruction. 1997-09-16 02:15:55 +00:00
Andrew Cagney
3484de0091 Differentiate between a non-zero string and a constant zero field. 1997-09-16 02:14:18 +00:00
Jim Wilson
5262de2167 * simops.c (Multiply64): Don't store into register zero. 1997-09-16 01:45:23 +00:00
Andrew Cagney
4dda50b052 For instructions moved into v850.igen was computing (wrong) NIA when 
this wasn't needed.
 1997-09-15 23:09:26 +00:00
Andrew Cagney
0604253676 * igen.c (gen_run_c): Handle non-multi-sim case. 1997-09-15 22:40:14 +00:00
Andrew Cagney
bda6163995 Fix sanitization for v850 V v850e V v850eq 1997-09-15 14:42:51 +00:00
Andrew Cagney
a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common 
directory to specify its own unqiue config.h file).
 1997-09-15 08:25:04 +00:00
Andrew Cagney
658303f7d4 For v850eq start up with US bit set. 
Let sim_analyze_program determine the architecture.
Fix various sanitizations.
 1997-09-15 08:18:20 +00:00
Andrew Cagney
08547b1f1d Determine ARCHITECTURE from program if possible. 
Rename common's generated config.h to cconfig.h.
 1997-09-15 08:11:50 +00:00
Andrew Cagney
4bdab45adb * callback.c (os_write): divert stdout and stderr to their 
respective hooks.
 1997-09-15 08:02:23 +00:00
Andrew Cagney
410230cf6d Check reserved bits before executing instructions. 
Make v850[eq] the the default simulator.
Report illegal instructions.
Include v850e instructions in v850eq.
 1997-09-12 05:56:38 +00:00
Andrew Cagney
944deab68e v850eq wasn't building igen directory. 1997-09-12 03:13:27 +00:00
Andrew Cagney
93e7a1b5b7 Add profiling support to v850*. 1997-09-12 02:44:03 +00:00
Andrew Cagney
11ac69e013 Short form of sample-size option had wrong value. 1997-09-12 02:29:04 +00:00
Andrew Cagney
7a2f7ea758 v850* wants igen 1997-09-12 02:27:22 +00:00
Andrew Cagney
cf5c6e6e5d Generate instruction profile call with each instruction. 1997-09-12 02:26:31 +00:00
Martin Hunt
30d8198448 Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com> 
* interp.c (sim_resume): Increment PC at end of rep
	loop.

	* simops.c (OP_4201): Fix rachi instruction.
 1997-09-11 05:32:23 +00:00
Andrew Cagney
972f3a34f5 mips/sim_info was just returning????? 1997-09-10 23:50:32 +00:00
Andrew Cagney
cad7297e80 o Wordwrap usage messages from sim-options 
o	Clarify how to use alias options
o	use in sim-watch (better usage message)
o	Don't pass something on the stack into the
	watch-point interrupt hander.
 1997-09-10 22:47:12 +00:00
Andrew Cagney
8f050205eb (gen_itable_h): Output an enum defining the max size of the itable 
string members.
 1997-09-10 22:07:06 +00:00
Andrew Cagney
02508bb179 Have trace_input, trace_output use sim-trace for IO. 1997-09-10 05:40:04 +00:00
Felix Lee
d6cef44df4 * inst.h (sim_state): rename to h8300_sim_state, to avoid conflict 
with sim/common.
	* configure.in: check for sys/param.h
	* compile.c: #ifdef HAVE_SYS_PARAM_H.
	#define SIGTRAP for wingdb.
	(sim_resume): poll keyboard at least once per call.
	(sim_resume): use host_callback instead of printf for syscall
 	output.
 1997-09-10 05:20:37 +00:00
Andrew Cagney
d0b59aa593 Add option architecture-info to list supported architectures. 1997-09-10 05:16:34 +00:00
Gavin Romig-Koch
318b499d8e Support tx19 sanitation. 1997-09-10 04:53:18 +00:00
Felix Lee
31dda65aff * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid 
illegal zero-sized array.
	* sim-core.c (sim_core_xor_read_buffer): same.
 1997-09-10 04:46:37 +00:00
Felix Lee
a1efa0d880 * interp.c (sim_resume): poll_quit() at least once per call; 
otherwise gdb can loop sim_resume() uninterruptably.
 1997-09-10 03:52:48 +00:00