Commit Graph

233 Commits

Author SHA1 Message Date
Thiemo Seufer
3aa3176b2d * aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
bfd_mach_mips16000.
	* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
	bfd_mach_mips16000.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c: Add enums I_mips14000, I_mips16000.
	(arch_info_struct): Add refs to R14000, R16000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
	bfd_mach_mips16000.
	(mips_mach_extensions): Map R14000, R16000 to R10000.

	* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
	(mips_cpu_info_table): Add r14000, r16000.
	* doc/c-mips.texi: Add entries for 14000, 16000.

	* mips-dis.c (mips_arch_choices): Add r14000, r16000.

	* mips.h: Define CPU_R14000, CPU_R16000.
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-28 18:02:17 +00:00
Eric B. Weddington
7b21ac3f45 Add AVR architectures avr25, avr31, avr35, and avr51 to match GCC.
bfd/
	* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
	bfd_mach_avr51): New.
	* bfd-in2.h: Regenerate.
	* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
	architectures. Change comments to match architecture comments in GCC.
	(compatible): Add test for new AVR architectures.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
	bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
	(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.

gas/
	* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
	architectures. Reorganize list to put mcu types in correct architectures
	and to order list same as in GCC. Use new ISA definitions in
	include/opcode/avr.h.
	* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
	descriptions. Reorganize descriptions to put mcu types in correct
	architectures and to order lists same as in GCC.

include/
	* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
	E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
	(EF_AVR_MACH): Redefine to 0x7F.
	* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
	(AVR_ISA_AVR3): Redefine.
	(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
	AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
	AVR_ISA_AVR6): Define.

ld/
	* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
	and eavr51.o.
	Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
	* Makefile.in: Regenerate.
	* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
	and avr51.
	* emulparams/avr25.sh: New file.
	* emulparams/avr31.sh: New file.
	* emulparams/avr35.sh: New file.
	* emulparams/avr51.sh: New file.
2008-08-09 05:35:13 +00:00
Alan Modra
19a6653ce8 ppc e500mc support 2008-04-14 11:01:38 +00:00
Adam Nemet
6f179bd0a4 * archures.c: Update copyright.
(bfd_mach_mips_octeon): New macro.
	* bfd-in2.h: Regenerate.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Octeon.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Octeon.
	* cpu-mips.c: Update copyright.
	(I_mipsocteon): New enum constant.
	(arch_info_struct): Add Octeon.
2008-02-04 19:15:52 +00:00
Mark Shinwell
350cc38db2 bfd/
* archures.c (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
	(bfd_mach_mips_loongson_2f): New.
	* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
	anonymous enum.
	(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
	and Loongson-2F flags.
	(mips_set_isa_flags): Likewise.
	(mips_mach_extensions): Add Loongson-2E and Loongson-2F
	entries.

	binutils/
	* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
	flags.

	gas/
	* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
	and loongson2f entries.
	* doc/c-mips.texi: Document -march=loongson{2e,2f} options.

	gas/testsuite/
	* gas/mips/mips.exp: Add loongson-2e and -2f tests.
	* gas/mips/loongson-2e.d: New.
	* gas/mips/loongson-2e.s: New.
	* gas/mips/loongson-2f.d: New.
	* gas/mips/loongson-2f.s: New.

	include/elf/
	* mips.h (E_MIPS_MACH_LS2E): New.
	(E_MIPS_MACH_LS2F): New.

	include/opcode/
	* mips.h (INSN_LOONGSON_2E): New.
	(INSN_LOONGSON_2F): New.
	(CPU_LOONGSON_2E): New.
	(CPU_LOONGSON_2F): New.
	(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.

	opcodes/
	* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
	entries.
	* mips-opc.c (IL2E): New.
	(IL2F): New.
	(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
	Allow movz and movn for Loongson-2E and -2F.  Add movnz entry.
	Move coprocessor encodings to the end of the table.  Allow
	certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
Kazu Hirata
8d100c328c bfd/
* archures.c: Add bfd_mach_mcf_isa_c_nodiv,
	bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac.
	* ieee.c (ieee_write_processor): Update coldfire architecture
	list.
	* bfd-in2.h: Rebuilt.
	* cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures.
	(m68k_arch_features): Likewise.
	* elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV.
	(elf32_m68k_print_private_bfd_data): Likewise.

gas/
	* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
	(m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.

include/elf/
	* m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
2007-09-11 16:07:50 +00:00
Nick Clifton
cd123cb70c Switch sources over to use the GPL version 3 2007-07-03 14:26:43 +00:00
Nick Clifton
3d3d428f04 New port: National Semiconductor's CR16 2007-06-29 14:09:34 +00:00
Alan Modra
3db64b0092 bfd/
Many files: Include sysdep.h before bfd.h.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
binutils/
	* bucumm.h: Split off host dependencies to..
	* sysdep.h: ..here.
	Many files: Include sysdep.h.  Remove duplicate headers and reorder.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
ld/
	Many files: Include sysdep.h first.  Remove duplicate headers.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* ns32k-dis.c: Include sysdep.h first.
2007-04-26 14:47:00 +00:00
Nathan Sidwell
9a2e615a9f gas/testsuite/
* gas/m68k/br-isaa.s: New.
	* gas/m68k/br-isaa.d: New.
	* gas/m68k/br-isab.s: New.
	* gas/m68k/br-isab.d: New.
	* gas/m68k/br-isac.s: New.
	* gas/m68k/br-isac.d: New.
	* gas/m68k/all.exp: Adjust.

	gas/
	* config/tc-m68k.c (mcf54455_ctrl): New.
	(HAVE_LONG_DISP, HAVE_LONG_CALL, HAVE_LONG_COND): New.
	(m68k_archs): Add isac.
	(m68k_cpus): Add 54455 family.
	(m68k_ip): Split Bg into Bb, Bs, Bg.
	(m68k_elf_final_processing): Add ISA_C.
	* doc/c-m68k.texi (M680x0 Options): Add isac.

	include/opcode/
	* m68k.h (mcfisa_c): New.
	(mcfusp, mcf_mask): Adjust.

	bfd/
	* archures.c (bfd_mach_mcf_isa_c, bfd_mach_mcf_isa_c_mac,
	bfd_mach_mcf_isa_c_emac): New.
	* elf32-m68k.c (ISAC_PLT_ENTRY_SIZE, elf_isac_plt0_entry,
	elf_isac_plt_entry, elf_isac_plt_info): New.
	(elf32_m68k_object_p): Add ISA_C.
	(elf32_m68k_print_private_bfd_data): Print ISA_C.
	(elf32_m68k_get_plt_info): Detect ISA_C.
	* cpu-m68k.c (arch_info): Add ISAC.
	(m68k_arch_features): Likewise,
	(bfd_m68k_compatible): ISAs B & C are not compatible.

	opcodes/
	* m68k-opc.c: Mark mcfisa_c instructions.
2007-04-23 07:51:33 +00:00
Dave Brolley
d93525185c Support for Toshiba MeP and for complex relocations. 2007-02-05 19:50:12 +00:00
Kazu Hirata
3bdcfdf41f bfd/
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido.
	* bfd-in2.h: Regenerate.
	* cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of
	bfd_mach_cpu32_fido.
	(m68k_arch_features): Use fido_a instead of cpu32.
	(bfd_m68k_compatible): Reject the combination of Fido and
	ColdFire.  Accept the combination of CPU32 and Fido with a
	warning.
	* elf32-m68k.c (elf32_m68k_object_p,
	elf32_m68k_merge_private_bfd_data,
	elf32_m68k_print_private_bfd_data): Treat Fido as an
	architecture by itself.

binutils/
	* readelf.c (get_machine_flags): Treat Fido as an architecture
	by itself.

gas/
	* config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an
	architecture by itself.
	(m68k_ip): Don't issue a warning for tbl instructions on fido.
	(m68k_elf_final_processing): Treat Fido as an architecture by
	itself.

include/elf/
	* m68k.h (EF_M68K_FIDO): New.
	(EF_M68K_ARCH_MASK): OR EF_M68K_FIDO.
	(EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove.

include/opcode/
	* m68k.h (m68010up): OR fido_a.

opcodes/
	* m68k-opc.c (m68k_opcodes): Replace cpu32 with
	cpu32 | fido_a except on tbl instructions.
2007-01-08 18:42:37 +00:00
Kazu Hirata
9840d27e81 bfd/
* archures.c (bfd_mach_cpu32_fido): New.
	(bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_a,
	bfd_mach_mcf_isa_a_mac, bfd_mach_mcf_isa_a_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_b_nousp,
	bfd_mach_mcf_isa_b_nousp_mac, bfd_mach_mcf_isa_b_nousp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac,
	bfd_mach_mcf_isa_b_emac, bfd_mach_mcf_isa_b_float,
	bfd_mach_mcf_isa_b_float_mac, bfd_mach_mcf_isa_b_float_emac):
	Increment the defined values.
	* bfd-in2.h: Regenerate.
	* cpu-m68k.c (arch_info_struct): Add en entry for
	bfd_mach_cpu32_fido.
	* elf32-m68k.c (elf32_m68k_object_p): Handle
	EF_M68K_CPU32_FIDO_A.
	(elf32_m68k_merge_private_bfd_data): Use EF_M68K_CPU32_MASK.
	(elf32_m68k_print_private_bfd_data): Handle
	EF_M68K_CPU32_FIDO_A.

binutils/
	* readelf.c (get_machine_flags): Handle EF_M68K_CPU32_FIDO_A.

gas/
	* config/tc-m68k.c (cpu_of_arch): Add fido.
	(m68k_archs, m68k_cpu): Add entries for fido.
	(m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A.

include/elf/
	* m68k.h (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): New.

include/opcode/
	* m68k.h (fido_a): New.
2006-12-25 22:39:21 +00:00
Alan Modra
e9f5312993 New Cell SPU port. 2006-10-25 06:49:21 +00:00
Joseph Myers
2d447fcaa9 bfd/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* archures.c: Add definition for bfd_mach_arm_iWMMXt2.
	* cpu-arm.c (processors): Add bfd_mach_arm_iWMMXt2.
	(arch_info_struct, bfd_arm_update_notes): Likewise.
	(architectures): Likewise.
	(bfd_arm_merge_machines): Check for iWMMXt2.
	* bfd-in2.h: Rebuild.

gas/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* config/tc-arm.c (arm_cext_iwmmxt2): New.
	(enum operand_parse_code): New code OP_RIWR_I32z.
	(parse_operands): Handle OP_RIWR_I32z.
	(do_iwmmxt_wmerge): New function.
	(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
	a register.
	(do_iwmmxt_wrwrwr_or_imm5): New function.
	(insns): Mark instructions as RIWR_I32z as appropriate.
	Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
	waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
	wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
	wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
	(md_begin): Handle IWMMXT2.
	(arm_cpus): Add iwmmxt2.
	(arm_extensions): Likewise.
	(arm_archs): Likewise.

gas/testsuite/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* gas/arm/iwmmxt2.s: New file.
	* gas/arm/iwmmxt2.d: New file.

include/opcode/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define.

opcodes/
2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
            Joseph Myers  <joseph@codesourcery.com>
            Ian Lance Taylor  <ian@wasabisystems.com>
            Ben Elliston  <bje@wasabisystems.com>

	* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
	only be used with the default multiply-add operation, so if N is
	set, don't bother printing X.  Add new iwmmxt instructions.
	(IWMMXT_INSN_COUNT): Update.
	(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
	with a 'c' suffix.
	(print_insn_coprocessor): Check for iWMMXt2.  Handle format
	specifiers 'r', 'i'.
2006-09-26 12:04:45 +00:00
Nick Clifton
1c0d3aa6ae Add support for Score target. 2006-09-16 23:51:50 +00:00
Nick Clifton
28c9d252b4 Add support for AVR6 family 2006-05-24 07:36:12 +00:00
Nathan Sidwell
0b2e31dc3b bfd:
* archures.c (bfd_mach_mcf_isa_a_nodiv, bfd_mach_mcf_isa_b_nousp):
	New.  Adjust other variants.
	(bfd_default_scan): Update.
	* bfd-in2.h: Rebuilt.
	* cpu-m68k.c: Adjust.
	(bfd_m68k_compatible): New. Use it for architectures.
	* elf32-m68k.c (elf32_m68k_object_p): Adjust.
	(elf32_m68k_merge_private_bfd_data): Adjust.  Correct isa-a/b
	mismatch.
	(elf32_m68k_print_private_bfd_data): Adjust.
	* ieee.c (ieee_write_processor): Adjust.

	binutils:
	* readelf.c (get_machine_flags): Adjust.

	gas:
	* config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
	and cf.
	(m68k_ip): <case 'J'> Check we have some control regs.
	(md_parse_option): Allow raw arch switch.
	(m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
	whether 68881 or cfloat was meant by -mfloat.
	(md_show_usage): Adjust extension display.
	(m68k_elf_final_processing): Adjust.

	gas/testsuite:
	* gas/m68k/arch-cpu-1.s: Tweak.
	* gas/m68k/arch-cpu-1.d: Tweak.

	include/elf:
	* m68k.h (EF_M68K_ISA_MASK, EF_M68K_ISA_A,
	EF_M68K_ISA_A_PLUS, EF_M68K_ISA_B, EF_M68K_ISA_C): Adjust.
	(EF_M68K_ISA_A_NODIV, EF_M68K_ISA_B_NOUSP): New.
	(EF_M68K_HW_DIV, EF_M68K_USP): Remove.
	(EF_M68K_MAC, EF_M68K_EMAC, EF_M68K_FLOAT): Adjust.
	(EF_M68K_EMAC_B): New.

	ld/testsuite:
	* ld-m68k: New tests.
2006-03-06 13:42:05 +00:00
Nick Clifton
d70c5fc7c5 Add support for the Infineon XC16X. 2006-02-17 14:36:28 +00:00
Nathan Sidwell
266abb8f72 * bfd/archures.c (bfd_mach_mcf5200, bfd_mach_mcf5206e,
bfd_mach_mcf5307, bfd_mach_mcf5407, bfd_mach_mcf528x,
	bfd_mach_mcfv4e, bfd_mach_mcf521x, bfd_mach_mcf5249,
	bfd_mach_mcf547x, bfd_mach_mcf548x): Remove.
	(bfd_mach_mcf_isa_a, bfd_mach_mcf_isa_a_div,
	bfd_mach_mcf_isa_a_div_mac, bfd_mach_mcf_isa_a_div_emac,
	bfd_mach_mcf_isa_aplus, bfd_mach_mcf_isa_aplus_mac,
	bfd_mach_mcf_isa_aplus_emac, bfd_mach_mcf_isa_aplus_usp,
	bfd_mach_mcf_isa_aplus_usp_mac, bfd_mach_mcf_isa_aplus_usp_emac,
	bfd_mach_mcf_isa_b, bfd_mach_mcf_isa_b_mac, bfd_mach_mcf_isa_b_emac,
	bfd_mach_mcf_isa_b_usp_float, bfd_mach_mcf_isa_b_usp_float_mac,
	bfd_mach_mcf_isa_b_usp_float_emac): New.
	(bfd_default_scan): Update coldfire mapping.
	* bfd/bfd-in.h (bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Declare.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/cpu-m68k.c (arch_info_struct): Add new coldfire machines,
	adjust legacy names.
	(m68k_arch_features): New.
	(bfd_m68k_mach_to_features,
	bfd_m68k_features_to_mach): Define.
	* bfd/elf32-m68k.c (elf32_m68k_object_p): New.
	(elf32_m68k_merge_private_bfd_data): Merge the CF EF flags.
	(elf32_m68k_print_private_bfd_data): Print the CF EF flags.
	(elf_backend_object_p): Define.
	* bfd/ieee.c (ieee_write_processor): Update coldfire machines.
	* bfd/libbfd.h: Rebuilt.

	* gas/config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
	mcf5329_control_regs): New.
	(not_current_architecture, selected_arch, selected_cpu): New.
	(m68k_archs, m68k_extensions): New.
	(archs): Renamed to ...
	(m68k_cpus): ... here.  Adjust.
	(n_arches): Remove.
	(md_pseudo_table): Add arch and cpu directives.
	(find_cf_chip, m68k_ip): Adjust table scanning.
	(no_68851, no_68881): Remove.
	(md_assemble): Lazily initialize.
	(select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
	(md_init_after_args): Move functionality to m68k_init_arch.
	(mri_chip): Adjust table scanning.
	(md_parse_option): Reimplement 'm' processing to add -march & -mcpu
	options with saner parsing.
	(m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
	m68k_init_arch): New.
	(s_m68k_cpu, s_m68k_arch): New.
	(md_show_usage): Adjust.
	(m68k_elf_final_processing): Set CF EF flags.
	* gas/config/tc-m68k.h (m68k_init_after_args): Remove.
	(tc_init_after_args): Remove.
	* gas/doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
	(M68k-Directives): Document .arch and .cpu directives.

	* gas/testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
	* gas/testsuite/gas/m68k/arch-cpu-1.[sd]: New.

	* include/elf/m68k.h (EF_CPU32, EF_M68000, EF_CFV4E): Rename to ...
	(EF_M68K_CPU32, EF_M68K_M68000, EF_M68K_CFV4E): ... here.
	(EF_M68K_ISA_MASK, EF_M68K_ISA_A, EF_M68K_M68K_ISA_A_PLUS,
	EF_M68K_ISA_B, EF_M68K_HW_DIV, EF_M68K_MAC_MASK, EF_M68K_MAC,
	EF_M68K_EMAC, EF_M68K_USP, EF_M68K_FLOAT): New.

	* include/opcode/m68k.h (m68008, m68ec030, m68882): Remove.
	(m68k_mask): New.
	(cpu_m68k, cpu_cf): New.
	(mcf5200, mcf5206e, mcf521x, mcf5249, mcf528x, mcf5307, mcf5407,
	mcf5470, mcf5480): Rename to cpu_<foo>. Add m680x0 variants.

	* opcodes/m68k-dis.c (print_insn_m68k): Use
	bfd_m68k_mach_to_features.

	* binutils/readelf.c (get_machine_flags): Add logic for EF_M68K flags.
2006-02-07 19:01:10 +00:00
Nathan Sidwell
d031aafbfe Second part of ms1 to mt renaming.
* bfd/archures.c (bfd_arch_mt): Renamed.
	(bfd_mt_arch): Renamed.
	(bfd_archures_list): Adjusted.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/config.bfd (mt): Remove special case targ_archs.
	(mt-*-elf): Rename bfd_elf32_mt_vec.
	* bfd/configure: Rebuilt.
	* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
	(selarchs) Remove mt special case.
	* bfd/cpu-mt.c (arch_info_struct): Adjust.
	(bfd_mt_arch): Renamed, adjust.
	* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
	mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
	mt_elf_howto_table): Renamed, adjusted.
	(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
	elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
	mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
	mt_elf_print_private_bfd_data): Renamed, adjusted.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
	ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
	bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
	elf_backend_gc_sweep_hook, elf_backend_check_relocs,
	eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
	bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_merge_private_bfd_data,
	bfd_elf32_bfd_print_private_bfd_data): Adjusted.
	* bfd/libbfd.h: Regenerated.
	* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
	BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
	BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
	* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
	(_bfd_target_vector): Adjusted.
	* binutils/readelf.c (guess_is_rela): Use EM_MT.
	(dump_relocations, get_machine_name): Adjust.

	* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
	(define-mach): Adjust.
	* cpu/mt.opc (CGEN_ASM_HASH): Update.
	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
	(parse_loopsize, parse_imm16): Adjust.

	* gas/configure: Rebuilt.
	* gas/configure.in (mt): Remove special case.
	* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
	#includes.
	(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
	Rename, adjust.
	(md_parse_option, md_show_usage, md_begin, md_assemble,
	md_cgen_lookup_reloc, md_atof): Adjust.
	(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
	* gas/config/tc-mt.h (TC_MT): Rename.
	(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
	(md_apply_fix): Adjust.
	(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
	(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.

	* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
	(mt_register_name, mt_register_type, mt_register_reggroup_p,
	mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
	mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
	mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
	mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
	mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
	mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
	_initialize_mt_tdep): Rename & adjust.

	* include/dis-asm.h (print_insn_mt): Renamed.

	* include/elf/common.h (EM_MT): Renamed.
	* include/elf/mt.h: Rename relocs, cpu & other defines.

	* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.

	* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
	(stamp-mt): Adjust rule.
	(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
	adjust.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure: Rebuilt.
	* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
	* opcodes/disassemble.c (ARCH_mt): Renamed.
	(disassembler): Adjust.
	* opcodes/mt-asm.c: Renamed, rebuilt.
	* opcodes/mt-desc.c: Renamed, rebuilt.
	* opcodes/mt-desc.h: Renamed, rebuilt.
	* opcodes/mt-dis.c: Renamed, rebuilt.
	* opcodes/mt-ibld.c: Renamed, rebuilt.
	* opcodes/mt-opc.c: Renamed, rebuilt.
	* opcodes/mt-opc.h: Renamed, rebuilt.

	* sid/Makefile.in: Rebuilt.
	* sid/aclocal.m4: Rebuilt.
	* sid/configure: Rebuilt.
	* sid/sid.spec: Adjust.
	* sid/bsp/Makefile.am: Adjust.
	* sid/bsp/Makefile.in: Rebuilt.
	* sid/bsp/aclocal.m4: Rebuilt.
	* sid/bsp/configrun-sid.in: Adjust.
	* sid/bsp/pregen/Makefile.in: Rebuilt.
	* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
	* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
	* sid/bsp/pregen/pregen-configs.in: Adjust.
	* sid/component/aclocal.m4: Rebuilt.
	* sid/component/configure: Rebuilt.
	* sid/component/tconfig.in: Adjust.
	* sid/component/bochs/aclocal.m4: Rebuilt.
	* sid/component/cache/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
	* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
	* sid/component/cgen-cpu/configure: Rebuilt.
	* sid/component/cgen-cpu/configure.in: Rebult.
	* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
	* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
	* sid/component/cgen-cpu/mt/mt.h: Adjust.
	* sid/component/consoles/Makefile.in: Rebuilt.
	* sid/component/families/aclocal.m4: Rebuilt.
	* sid/component/families/configure: Rebuilt.
	* sid/component/gdb/Makefile.in: Rebuilt.
	* sid/component/gloss/Makefile.in: Rebuilt.
	* sid/component/glue/Makefile.in: Rebuilt.
	* sid/component/ide/Makefile.in: Rebuilt.
	* sid/component/interrupt/Makefile.in: Rebuilt.
	* sid/component/lcd/Makefile.in: Rebuilt.
	* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
	* sid/component/loader/Makefile.am: Rebuilt.
	* sid/component/loader/Makefile.in: Rebuilt.
	* sid/component/mapper/Makefile.in: Rebuilt.
	* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
	* sid/component/memory/Makefile.in: Rebuilt.
	* sid/component/mmu/Makefile.in: Rebuilt.
	* sid/component/parport/Makefile.in: Rebuilt.
	* sid/component/profiling/Makefile.in: Rebuilt.
	* sid/component/rtc/Makefile.in: Rebuilt.
	* sid/component/sched/Makefile.in: Rebuilt.
	* sid/component/testsuite/Makefile.in: Rebuilt.
	* sid/component/timers/aclocal.m4: Rebuilt.
	* sid/component/timers/configure: Rebuilt.
	* sid/component/uart/Makefile.in: Rebuilt.
	* sid/component/uart/testsuite/Makefile.in: Rebuilt.
	* sid/config/config.sub: Adjust.
	* sid/config/info.tcl.in: Adjust.
	* sid/config/sidtargets.m4: Adjust.
	* sid/doc/Makefile.in: Rebuilt.
	* sid/main/dynamic/Makefile.am: Rebuilt.
	* sid/main/dynamic/Makefile.in: Rebuilt.
	* sid/main/dynamic/aclocal.m4: Rebuilt.
	* sid/main/dynamic/configure: Rebuilt.
2005-12-16 10:23:12 +00:00
Nathan Sidwell
6f84a2a649 bfd:
Add ms2.
	* archures.c (bfd_mach_ms2): Define.
	* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
	* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
	(ms1_elf_merge_private_bfd_data): Remove unused variables.  Add
	correct merging logic, with workaround.
	(ms1_elf_print_private_bfd_data): Add ms2 case.
	* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
	* libbfd.h: Regenerated.
	* bfd-in2.h: Regenerated.

cpu:
	Add ms2
	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
	model.
	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
	f-cb2incr, f-rc3): New fields.
	(LOOP): New instruction.
	(JAL-HAZARD): New hazard.
	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
	New operands.
	(mul, muli, dbnz, iflush): Enable for ms2
	(jal, reti): Has JAL-HAZARD.
	(ldctxt, ldfb, stfb): Only ms1.
	(fbcb): Only ms1,ms1-003.
	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
	fbcbincrs, mfbcbincrs): Enable for ms2.
	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
	* ms1.opc (parse_loopsize): New.
	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
	(print_pcrel): New.

gas:
	Add ms2.
	* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
	(ms1_architectures): Add ms2.
	(md_parse_option): Add ms2.
	(md_show_usage): Add ms2.
	(md_assemble): Add JAL_HAZARD detection logic.
	(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
	* doc/c-ms1.texi: New.
	* doc/all.texi: Add MS1.
	* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
	* doc/Makefile.in: Rebuilt.
	* doc/Makefile: Rebuilt.

gas/testsuite:
	Add ms2.
	* gas/ms1/allinsn.d: Adjust pcrel disassembly.
	* gas/ms1/errors.exp: Fix target triplet.
	* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
	* gas/ms1/ms1-16-003.s: Tweak label.
	* gas/ms1/ms1.exp: Adjust target triplet.  Add ms2 test.
	* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
	* gas/ms1/relocs.d: Adjust expected machine name and pcrel
	disassembly.
	* gas/ms1/relocs.exp: Adjust target triplet.

include:
	Add ms2.
	* elf/ms1.h (EF_MS1_CPU_MS2): New.


opcodes:
	Add ms2.
	* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
	ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-08 11:15:13 +00:00
Nick Clifton
3c9b82baee Add support for the Z80 processor family 2005-10-25 17:40:19 +00:00
Catherine Moore
0f64bb0271 * Makefile.am: Bfin support.
* Makefile.in: Regenerated.
	* aclocal.m4: Regenerated.
	* archures.c (bfd_mach_bfin): New.
	(bfd_arch_bfin): New.
	bfd-in.h (bfd_bfin_elf32_create_embedded_relocs): New.
	* bfd-in2.h: Regenerated.
	* config.bfd: Bfin support.
	* configure: Regenerated.
	* configure.in: Bfin support.
	* libbfd.h: Regenerated.
	* reloc.c: Add BFD relocations for Bfin.
	* targets.c (bfd_elf32_bfin_vec): New.
	* cpu-bfin.c: New file.
	* elf32-bfin.c: New file.
2005-09-30 15:36:41 +00:00
Alan Modra
c17ae8a24e Remove a29k support. 2005-08-18 03:51:51 +00:00
Nick Clifton
44c86e8c6d Add support for msp430x21xx variants 2005-08-08 17:08:04 +00:00
Nick Clifton
e729279b04 Fix building for MS1 and M32C.
Restore alpha- sorting to the architecture tables.
2005-07-18 14:13:36 +00:00
Jim Blandy
49f58d10f8 ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* configure.in: Add cases for Renesas m32c.
	* configure: Regenerated.

bfd/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for m32c-*-elf (Renesas m32c and m16c).
	* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
	(ALL_MACHINES_CFILES): Add cpu-m32c.c.
	(BFD32_BACKENDS): Add elf32-m32c.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
	(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
	* Makefile.in: Regenerated.
	* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
	arch and mach codes.
	(bfd_m32c_arch): New arch info object.
	(bfd_archures_list): List bfd_m32c_arch.
	* bfd-in2.h: Regenerated.
	* config.bfd: Add case for the m32c.
	* configure.in: Add case for the m32c.
	* configure: Regenerated.
	* cpu-m32c.c, elf32-m32c.c: New files.
	* libbfd.h: Regenerated.
	* targets.c (bfd_elf32_m32c_vec): Declare.
	(_bfd_target_vector): List bfd_elf32_m32c_vec.

binutils/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* readelf.c: #include "elf/m32c.h"
	(guess_is_rela, dump_relocations, get_machine_name): Add cases for
	EM_M32C.
	* Makefile.am (readelf.o): Update dependencies.
	* Makefile.in: Regenerated.

cpu/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.

gas/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C.
	* Makefile.am (CPU_TYPES): List m32c.
	(TARGET_CPU_CFILES): List config/tc-m32c.c.
	(TARGET_CPU_HFILES): List config/tc-m32c.h.
	* configure.in: Add case for m32c.
	* configure.tgt: Add cases for m32c and m32c-*-elf.
	* configure: Regenerated.
	* config/tc-m32c.c, config/tc-m32c.h: New files.
	* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
	* doc/Makefile.in: Regenerated.
	* doc/all.texi: Set M32C.
	* doc/as.texinfo: Add text for the M32C-specific options and line
	comment characters, and refer to c-m32c.texi.
	* doc/c-m32c.texi: New file.

include/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	* dis-asm.h (print_insn_m32c): New declaration.

include/elf/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for Renesas M32C and M16C.
	* common.h (EM_M32C): New machine number.
	* m32c.h: New file.

ld/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C and M16C.
	* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
	(eelf32m32c.c): New target.
	* Makefile.in: Regenerated.
	* configure.tgt: Add case for m32c-*-elf.
	* emulparams/elf32m32c.sh: New file.

opcodes/ChangeLog:
2005-07-14  Jim Blandy  <jimb@redhat.com>

	Add support for the Renesas M32C and M16C.
	* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
	* m32c-desc.h, m32c-opc.h: New.
	* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
	(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
	m32c-opc.c.
	(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
	m32c-ibld.lo, m32c-opc.lo.
	(CLEANFILES): List stamp-m32c.
	(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
	(CGEN_CPUS): Add m32c.
	(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
	(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
	(m32c_opc_h): New variable.
	(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
	(m32c-opc.lo): New rules.
	* Makefile.in: Regenerated.
	* configure.in: Add case for bfd_m32c_arch.
	* configure: Regenerated.
	* disassemble.c (ARCH_m32c): New.
	[ARCH_m32c]: #include "m32c-desc.h".
	(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
	(disassemble_init_for_target) [ARCH_m32c]: Same.

	* cgen-ops.h, cgen-types.h: New files.
	* Makefile.am (HFILES): List them.
	* Makefile.in: Regenerated.
2005-07-14 22:52:28 +00:00
Aldy Hernandez
de33e64021 * Makefile.am (ALL_MACHINES): Add ms1 support.
(ALL_MACHINES_CFILES): Same.
	(BFD32_BACKENDS): Same.
	(BFD32_BACKENDS_CFILES): Same.

	* Makefile.in: Regenerate.

	* archures.c (bfd_architecture): Add ms1 entries.
	Externalize bfd_ms1_arch.
	(bfd_archures_list): Add bfd_ms1_arch.

	* bfd-in2.h: Regenerate.

	* cpu-ms1.c: New file.

	* elf32-ms1.c: New file.

	* targets.c: Define extern of bfd_elf32_ms1_vec.
	Add bfd_elf32_ms1_vec to _bfd_target_vector.

	* configure.in: Add bfd_elf32_ms1_vec case.

	* configure: Regenerate.

	* config.bfd: Add ms1-*-elf to table.
2005-06-07 21:07:32 +00:00
Nick Clifton
3e11053365 Update the address and phone number of the FSF organization in the GPL notices 2005-05-04 15:53:43 +00:00
Nick Clifton
53e09e0aaf Update the FSF address in the copyright/GPL notice 2005-05-04 07:19:45 +00:00
Nick Clifton
e38bc3b524 Fix SH2A machine variants in order to correctly select instruction inheritance 2005-01-17 14:08:17 +00:00
Nick Clifton
5c4504f7c5 Add support for maxq10 and maxq20 machine values 2005-01-10 16:33:51 +00:00
Ian Lance Taylor
0d2e43ed77 * archures.c: Define bfd_mach_mips9000.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_9000.
	(mips_set_isa_flags): Handle bfd_mach_mips9000.
	* cpu-mips.c (I_mips9000): Define.
	(arch_info_struct): Add case for bfd_mach_mips9000.
	* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mips9000.
	* bfd-in2.h: Regenerate.
2004-12-09 06:08:45 +00:00
Nick Clifton
7499d566bb Add support fpr MAXQ processor 2004-11-08 13:17:43 +00:00
Hans-Peter Nilsson
bac23f82ae * config.bfd: Support crisv32-*-* like cris-*-*.
* archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32)
	(bfd_mach_cris_v10_v32): New macros.
	* cpu-cris.c: Tweak formatting.
	(get_compatible): New function.
	(N): New macro.
	(bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New
	bfd_arch_info_type:s.
	(bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach,
	get_compatible for member compatible and link bfd_cris_arch_v32 as
	next.
	* elf32-cris.c (cris_elf_pcrel_reloc)
	(cris_elf_set_mach_from_flags): New functions.
	(cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL>
	<R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc.
	(cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct
	numbers for bfd_mach_cris_v32.
	(PLT_ENTRY_SIZE_V32): New macro.
	(elf_cris_plt0_entry): Drop last comma in initializer.
	(elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32)
	(elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New
	PLT initializers.
	(cris_elf_relocate_section): Change all "%B(%A)" messages to
	"%B, section %A".
	(elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries.
	(elf_cris_finish_dynamic_sections): Similar.
	(elf_cris_adjust_dynamic_symbol): Similar.
	(cris_elf_check_relocs): Change all "%B(%A)" messages to "%B,
	section %A".
	<switch with PIC relocs>: Emit error and return FALSE for
	bfd_mach_cris_v10_v32.
	<case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>:
	Emit warning when generating textrel reloc.
	(cris_elf_object_p): Call cris_elf_set_mach_from_flags.
	(cris_elf_final_write_processing): Set flags according to mach.
	(cris_elf_print_private_bfd_data): Display
	EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32.
	(cris_elf_merge_private_bfd_data): Drop variables old_flags,
	new_flags.  Don't call cris_elf_final_write_processing.  Don't
	look at the actual elf header flags at all; use
	bfd_get_symbol_leading_char to check ibfd, obfd.  Trap difference
	in bfd_get_mach for ibfd and obfd and handle merging of compatible
	objects.
	(bfd_elf32_bfd_copy_private_bfd_data): Define.
	* reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8)
	(BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16)
	(BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs.
	* bfd-in2.h, libbfd.h: Regenerate.
2004-11-04 14:58:13 +00:00
Jakub Jelinek
7946e94a55 * archures.c (bfd_mach_sparc_64bit_p): Define.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Use it.
	* bfd-in2.h: Rebuilt.
2004-07-30 10:08:00 +00:00
Alexandre Oliva
1d70c7fb83 include/elf/ChangeLog:
Introduce SH2a support.
2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
* sh.h (EF_SH2A_NOFPU): New.
2003-12-01  Michael Snyder  <msnyder@redhat.com>
* sh.h (EF_SH2A): New.
bfd/ChangeLog:
Introduce SH2a support.
2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
* archures.c (bfd_mach_sh2a_nofpu): New.
* bfd-in2.h: Rebuilt.
* cpu-sh.c (SH2A_NOFPU_NEXT): New.
(arch_info_struct): Add sh2a_nofpu.
* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu.
2003-12-29  DJ Delorie  <dj@redhat.com>
* reloc.c: Add relocs for sh2a.
* bfd-in2.h: Regenerate.
* libbfd.hh: Regenerate.
2003-12-01  Michael Snyder  <msnyder@redhat.com>
* archures.c (bfd_mach_sh2a): New.
* bfd-in2.h: Rebuilt.
* cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums.
(SH2A_NEXT): New.
(arch_info_struct): Add sh2a.
* elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a.
binutils/ChangeLog:
* readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and
EF_SH2A_NOFPU.
gas/ChangeLog:
Introduce SH2a support.
2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c (get_specific): Change arch_sh2a_up to
arch_sh2a_nofpu_up.
2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling.
2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition
to end of conditional expression.
2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
* config/tc-sh.c: Add sh2a-nofpu support.
2003-12-29  DJ Delorie  <dj@redhat.com>
* tc-sh.c: Add sh2a support.
(parse_reg): Add tbr.
(parse_at): Support @@(disp,tbr).
(get_specific): Support sh2a opcodes.
(insert4): New, for 4 byte relocs.
(build_Mytes): Support sh2a opcodes.
(md_apply_fix3_Mytes): Support sh2a opcodes.
2003-12-02  Michael Snyder  <msnyder@redhat.com>
* config/tc-sh.c (md_parse_option): Handle sh2a.
(sh_elf_final_processing): Ditto.
gas/testsuite/ChangeLog:
2003-12-30  DJ Delorie  <dj@redhat.com>
* gas/sh/sh2a.s: New.
* gas/sh/sh2a.d: New.
* gas/sh/basic.exp: Add it.
2004-07-29 05:17:41 +00:00
Nick Clifton
1fe1f39c06 Add new port: crx-elf 2004-07-07 17:28:53 +00:00
Joern Rennecke
f6f9408fbf 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
bfd:
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
	* archures.c: Add bfd_mach_sh3_nommu .
	* bfd-in2.h: Regenerate.
	* cpu-sh.c: Add sh3-nommu architecture.
	(bfd_to_arch_table): Create new table.
	(sh_get_arch_from_bfd_mach): Create new function.
	(sh_get_arch_up_from_bfd_mach): Create new function.
	(sh_merge_bfd_arch): Create new function.
	* elf32-sh.c (sh_ef_bfd_table): Add table.
	(sh_elf_check_relocs): Replace switch statement with
	use of sh_ef_bfd_table .
	(sh_elf_get_flags_from_mach): Add new function.
	(sh_find_elf_flags): Likewise.
	(sh_elf_copy_private_data): Replace most of non-elf contents
	with a call to sh_merge_bfd_arch() .

gas:
	* Makefile.am: Regenerate dependecies.
	* Makefile.in: Regenerate.
	* config/tc-sh.c (valid_arch): Make unsigned.
	(preset_target_arch): Likewise.
	(md_begin): Use new architecture flags system.
	(get_specific): Likewise.
	(assemble_ppi): Likewise.
	(md_assemble): Likewise. Also fix error check for bad opcodes.
	(md_parse_option): Likewise. Also generate -isa values according
	to the table in bfd/cpu-sh.c instead of just constants. Also
	allow <arch>-up ISA variants.
	(sh_elf_final_processing): Replace if-else chain with a call to
	sh_find_elf_flags().
	* testsuite/gas/sh/arch: New directory.
	* testsuite/gas/sh/arch/arch.exp: New test script.
	* testsuite/gas/sh/arch/arch_expected.txt: New file.
	* testsuite/gas/sh/arch/sh.s: New file.
	* testsuite/gas/sh/arch/sh2.s: New file.
	* testsuite/gas/sh/arch/sh-dsp.s: New file.
	* testsuite/gas/sh/arch/sh2e.s: New file.
	* testsuite/gas/sh/arch/sh3-nommu.s: New file.
	* testsuite/gas/sh/arch/sh3.s: New file.
	* testsuite/gas/sh/arch/sh3-dsp.s: New file.
	* testsuite/gas/sh/arch/sh3e.s: New file.
	* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4.s: New file.
	* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
	* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
	* testsuite/gas/sh/arch/sh4a.s: New file.

include/elf:
	* sh.h (EF_SH_HAS_DSP): Remove.
	(EF_SH_HAS_FP): Remove.
	(EF_SH_MERGE_MACH): Remove.
	(EF_SH4_NOFPU): Convert to decimal.
	(EF_SH4A_NOFPU): Likewise.
	(EF_SH4_NOMMU_NOFPU): Likewise.
	(EF_SH3_NOMMU): Add new macro.
	(EF_SH_BFD_TABLE): Likewise.
	(sh_find_elf_flags): Add prototype.
	(sh_elf_get_flags_from_mach): Likewise.

opcodes:
	* sh-dis.c (target_arch): Make unsigned.
	(print_insn_sh): Replace (most of) switch with a call to
	sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
	* sh-opc.h: Redefine architecture flags values.
	Add sh3-nommu architecture.
	Reorganise <arch>_up macros so they make more visual sense.
	(SH_MERGE_ARCH_SET): Define new macro.
	(SH_VALID_BASE_ARCH_SET): Likewise.
	(SH_VALID_MMU_ARCH_SET): Likewise.
	(SH_VALID_CO_ARCH_SET): Likewise.
	(SH_VALID_ARCH_SET): Likewise.
	(SH_MERGE_ARCH_SET_VALID): Likewise.
	(SH_ARCH_SET_HAS_FPU): Likewise.
	(SH_ARCH_SET_HAS_DSP): Likewise.
	(SH_ARCH_UNKNOWN_ARCH): Likewise.
	(sh_get_arch_from_bfd_mach): Add prototype.
	(sh_get_arch_up_from_bfd_mach): Likewise.
	(sh_get_bfd_mach_from_arch_set): Likewise.
	(sh_merge_bfd_arc): Likewise.

ld:
	* testsuite/ld-sh/arch/arch.exp: New test script.
	* testsuite/ld-sh/arch/arch_expected.txt: New file.
	* testsuite/ld-sh/arch/sh.s: New file.
	* testsuite/ld-sh/arch/sh2.s: New file.
	* testsuite/ld-sh/arch/sh-dsp.s: New file.
	* testsuite/ld-sh/arch/sh2e.s: New file.
	* testsuite/ld-sh/arch/sh3-nommu.s: New file.
	* testsuite/ld-sh/arch/sh3.s: New file.
	* testsuite/ld-sh/arch/sh3-dsp.s: New file.
	* testsuite/ld-sh/arch/sh3e.s: New file.
	* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4.s: New file.
	* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
	* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
	* testsuite/ld-sh/arch/sh4a.s: New file.
2004-05-28 12:32:10 +00:00
Nick Clifton
6b6e92f432 Add support for 521x,5249,547x,548x. 2004-05-05 14:33:14 +00:00
Nick Clifton
fd99574ba5 Add support for ColdFire MAC instructions and tidy up support for other m68k
variants.
2004-04-22 10:33:16 +00:00
Nick Clifton
0949843db2 Add (linker) support for CR16C processor 2004-03-30 14:04:32 +00:00
Joern Rennecke
ae51a426eb 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
opcodes:
	* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
	nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
	* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
	accordingly.
bfd:
	* archures.c: Add bfd_mach_sh4_nommu_nofpu.
	* cpu-sh.c: Ditto.
	* elf32-sh.c: Ditto.
	* bfd-in2.h: Regenerate.
include/elf:
	* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
	* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
	-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
	(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
	the most general type or the user specifically requested it.
	(md_assemble): Add a new error message for when an instruction
	is understood, but is not allowed due to an -isa option.
2004-03-03 18:01:49 +00:00
Richard Sandiford
676a64f422 Add fr450 support. 2004-03-01 10:11:46 +00:00
Nick Clifton
8884595866 Add support for the M32R2 processor. 2003-12-03 17:38:48 +00:00
Kazu Hirata
5c4491d385 * aix5ppc-core.c: Fix comment typos.
* aout-arm.c: Likewise.
	* aout-ns32k.c: Likewise.
	* aoutx.h: Likewise.
	* archures.c: Likewise.
	* bfd-in.h: Likewise.
	* bfd.c: Likewise.
	* bfdio.c: Likewise.
	* coff-arm.c: Likewise.
	* coff-h8300.c: Likewise.
	* coff-i860.c: Likewise.
	* coff-m88k.c: Likewise.
	* coff-mcore.c: Likewise.
	* coff-ppc.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff-z8k.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* cofflink.c: Likewise.
	* cpu-alpha.c: Likewise.
	* cpu-arm.c: Likewise.
	* cpu-ns32k.c: Likewise.
	* dwarf2.c: Likewise.
	* bfd-in2.h: Regenerate.
2003-11-24 18:06:40 +00:00
Corinna Vinschen
af9ba62190 * archures.c (bfd_mach_sh4a, bfd_mach_sh4al_dsp, bfd_mach_sh4_nofpu,
bfd_mach_sh4a_nofpu): New machine types.
	* bfd-in2.h: Rebuilt.
	* cpu-sh.c (compatible): Remove unused function.
	(SH4A_NEXT, SH4AL_DSP_NEXT, SH4_NOFPU_NEXT, SH4A_NOFPU_NEXT): New.
	(arch_info_struct): Add sh4a, sh4al_dsp, sh4-nofpu and sh4a-nofpu.
	* elf32-sh.c (sh_elf_set_mach_from_flags): Handle them.
2003-10-21 15:49:45 +00:00
Nick Clifton
3e60263266 Add ColfFire v4 support 2003-10-21 13:28:59 +00:00
Dave Brolley
9c8ee6396f 2003-10-08 Dave Brolley <brolley@redhat.com>
On behalf of Michael Snyder  <msnyder@redhat.com>

        * archures.c: Add FRV fr550 machine.
        * cpu-frv.c: Ditto.
        * elf32-frv.c: Ditto.
        * bfd-in2.h: Regenerate.
2003-10-08 17:57:59 +00:00
Chris Demetriou
5f74bc130d [ bfd/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* archures.c (bfd_mach_mipsisa64r2): New define.
	* bfd-in2.h: Regenerate.
	* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
	* cpu-mips.c (I_mipsisa64r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa64r2.
	* elfxx-mips.c (_bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
	(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
	(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.

[ binutils/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.

[ gas/Changelog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
	* configure: Regenerate.
	* config/tc-mips.c (imm2_expr): New variable.
	(md_assemble, mips16_ip): Initialize imm2_expr.
	(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
	(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
	(macro): Handle M_DEXT and M_DINS.
	(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
	(mips_ip): Likewise.
	(OPTION_MIPS64R2): New define.
	(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
	OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
	(md_parse_option): Handle OPTION_MIPS64R2.
	(s_mipsset): Handle setting "mips64r2" ISA.
	(mips_cpu_info_table): Add mips64r2.
	(md_show_usage): Document -mips64r2 option.
	* doc/as.texinfo: Docuemnt -mips64r2 option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips64r2.d: New file.
	* gas/mips/cp0sel-names-mips64r2.d: New file.
	* gas/mips/elf_arch_mips64r2.d: New file.
	* gas/mips/hwr-names-mips64r2.d: New file.
	* gas/mips/mips32r2-ill-fp64.l: New file.
	* gas/mips/mips32r2-ill-fp64.s: New file.
	* gas/mips/mips64r2-ill.l: New file.
	* gas/mips/mips64r2-ill.s: New file.
	* gas/mips/mips64r2.d: New file.
	* gas/mips/mips64r2.s: New file.
	* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.

[ include/elf/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_64R2): New define.

[ include/opcode/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document +E, +F, +G, +H, and +I operand types.
	Update documentation of I, +B and +C operand types.
	(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
	(M_DEXT, M_DINS): New enum values.

[ ld/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ldmain.c (get_emulation): Ignore "-mips64r2".

[ ld/testsuite/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
	with MIPS64r2.

[ opcodes/ChangeLog ]
2003-09-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
	(print_insn_args): Add handing for +E, +F, +G, and +H.
	* mips-opc.c (I65): New define for MIPS64r2.
	(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
	"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
	and "dshd" for MIPS64r2.  Adjust "dror", "dror32", and "drorv" to
	be supported on MIPS64r2.
2003-09-30 16:17:15 +00:00
Joel Brobecker
42acdc7c30 * archures.c: Add new machine names for hppa.
* bfd-in2.h: Regenerate.
        * cpu-hppa.c: Use the new machine names.
2003-09-08 16:46:02 +00:00
Nick Clifton
8ad30312ff Add binutils support for v850e1 processor 2003-09-04 11:04:38 +00:00
Nick Clifton
3b260895e3 Add MSP430 variants 2003-08-08 10:14:52 +00:00
Richard Sandiford
5a7ea74950 include/opcode/
* mips.h (CPU_RM7000): New macro.
	(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.

bfd/
	* archures.c (bfd_mach_mips7000): New.
	* bfd-in2.h: Regenerated.
	* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
	(mips_mach_extensions): Add an entry for it.

opcodes/
	* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.

gas/
	* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
	(mips_cpu_info_table): Add rm7000 and rm9000 entries.

gas/testsuite/
	* gas/mips/rm7000.[sd]: New test.
	* gas/mips/mips.exp: Run it.
2003-07-15 07:50:39 +00:00
Alexandre Oliva
b08fa4d3bf 2001-05-06 Alexandre Oliva <aoliva@redhat.com>
* elf-m10300.c (compute_function_info): Account for AM33
registers in `movm' when computing stack space for `call' when
linking for AM33/2.0 link.
2000-04-01  Alexandre Oliva  <aoliva@cygnus.com>
* archures.c (bfd_mach_am33_2): Renamed from bfd_mach_am332.
* bfd-in2.h: Rebuilt.
* cpu-m10300.c (bfd_am33_2_arch): Renamed from bfd_am332_arch.
* elf-m10300.c: Updated.
2000-03-31  Alexandre Oliva  <aoliva@cygnus.com>
* archures.c (bfd_mach_am332): Defined.
* bfd-in2.h: Rebuilt.
* cpu-m10300.c (bfd_am332_arch): Defined.
(bfd_am33_arch): Chained with am33-2.
* elf-m10300.c (elf_mn10300_mach): Handle am332.
(_bfd_mn10300_elf_final_write_processing): Likewise.
2003-07-10 02:53:10 +00:00
Alan Modra
c58b95236c Convert to C90 and a few tweaks. 2003-06-29 10:06:40 +00:00
Richard Sandiford
f4984206d8 include/elf/
* h8.h (E_H8_MACH_H8300SXN): New flag.

bfd/
	* archures.c (bfd_mach_h8300sxn): New architecture.
	* bfd-in2.h: Regenerate.
	* cpu-h8300.c (h8300_scan): Check for 'sxn'.
	(h8300sxn_info_struct): New.
	(h8300sx_info_struct): Link to it.
	* elf32-h8300.c (elf32_h8_mach): Add h8300sxn case.
	(elf32_h8_final_write_processing): Likewise.

gas/
	* config/tc-h8300.c (h8300sxnmode): New.
	(md_pseudo_table): Add .h8300sxn entry.  Sync others with FSF version.

ld/
	* configure.tgt (h8300*): Add h8300sxn emulations.
	* Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o.
	(eh8300sxn.c, eh8300sxnelf.c): New rules.
	* Makefile.in: Regenerate.
	* emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
2003-06-10 07:09:31 +00:00
Michael Snyder
5d1db417ca 2003-05-16 Michael Snyder <msnyder@redhat.com>
From Bernd Schmidt  <bernds@redhat.com>
	* archures.c (bfd_mach_h8300sx): New.
	* bfd-in2.h: Regenerate.
	* cpu-h8300.c (h8300_scan)): Add support for h8300sx.
	(h8300sx_info_struct): New.
	(h8300s_info_struct): Link to it.
	* elf32-h8300.c (elf32_h8_mach): Add support for h8300sx.
	(elf32_h8_final_write_processing): Likewise.
	(elf32_h8_relax_section): Likewise.
2003-05-16 23:39:24 +00:00
Nick Clifton
8d9cd6b19b Add support for h8300hn and h8300sn 2003-04-24 12:36:08 +00:00
Joern Rennecke
ef23021837 bfd:
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH.
        * cpu-sh.c: Likewise.
        * elf32-sh.c: Likewise.
        * reloc.c (bfd_reloc_code_real): Likewise.
        * elf32-sh64-com.c: Change comment to refer to SuperH.
        * elf32-sh64.c: Likewise.
        * elf64-sh64.c: Likewise.
        * bfd-in2.h (enum bfd_architecture): Regenerate.
binutils:
        * readelf.c (get_machine_name) <EM_SH>: Amend return value
        to refer to SuperH.
gas:
        * config/tc-sh.c: Amend comment to refer to SuperH.
        * config/tc-sh.h: Likewise.
        (LISTING_HEADER): Amend to refer to SuperH.
        * config/tc-sh64.c: Change comment to refer to SuperH.
        * config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH.
        * doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH.
        * doc/c-sh.texi: Amend to refer to SuperH.
        Add SuperH architecture documentation references.
        * doc/c-sh64.texi: Change to refer to SuperH.
include/elf:
        * common.h (EM_SH): Amend comment to refer to SuperH.
ld/testsuite:
        * ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH.
        * ld-sh/sh64/crange3-media.rd (Machine): Likewise.
2003-04-23 21:09:04 +00:00
Nick Clifton
26597c8633 Replace references to Mitsubishi M32R with references to Renesas M32R. 2003-04-22 16:22:26 +00:00
Nick Clifton
c2dcd04ec8 Replace occurrances of 'Hitachi' with 'Renesas'. 2003-04-15 08:51:55 +00:00
Svein Seldal
be33c5dd4d Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update 2003-04-04 08:15:15 +00:00
Nick Clifton
e0001a05d2 Add Xtensa port 2003-04-01 15:50:31 +00:00
Nick Clifton
5a6c681789 Fixes for iWMMXt contribution. 2003-04-01 13:08:06 +00:00
Nick Clifton
e16bb312f5 Add iWMMXt support 2003-03-25 20:56:01 +00:00
Nick Clifton
fde78edd7a Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverick
floating point co-processor.
2003-02-10 10:44:48 +00:00
Nick Clifton
5177500f26 Add SH2E support 2003-01-23 18:50:57 +00:00
Stan Cox
a75473eb66 * Makefile.am (ALL_MACHINES): Add cpu-iq2000.lo.
(ALL_MACHINES_CFILES): Add cpu-iq2000.c.
	(BFD32_BACKENDS): Add elf32-iq2000.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-iq2000.c.
	(cpu-iq2000.lo): New target.
	* Makefile.in: Regenerate.
	* config.bfd: Handle iq2000-*-elf.
	* archures.c (bfd_architecture): Add bfd_{arch,mach}_iq2000.
	(bfd_archures_list): Add bfd_iq2000_arch.
	* configure.in: Handle bfd_elf32_iq2000_vec.
	* configure: Regenerate.
	* reloc.c: Add BFD_RELOC_IQ2000_OFFSET_16, BFD_RELOC_IQ2000_OFFSET_21,
	and BFD_RELOC_IQ2000_UHI16.
	* targets.c (bfd_elf32_iq2000_vec): Declare.
	(bfd_target_vector): Add bfd_elf32_iq2000_vec.
	* elf.c (prep_headers): Set e_machine to EM_IQ2000.
	* cpu-iq2000.c: New file.
	* elf32-iq2000.c: Likewise.
	* libbfd.h: Regenerate.
	* bfd-in2.h: Likewise.
2003-01-03 21:12:28 +00:00
Chris Demetriou
af7ee8bfa9 [ bfd/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
	* archures.c (bfd_mach_mipsisa32r2): New define.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_mipsisa32r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa32r2.
	* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
	(_bfd_mips_elf_final_write_processing): Add
	bfd_mach_mipsisa32r2 case.
	(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
	binaries marked as using MIPS32 Release 2.

[ binutils/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
	changes in MIPS -M options.

[ gas/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
	CPU variants.
	* configure: Regenerate.
	* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
	(macro_build): Handle "K" operand.
	(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
	CPU_HAS_DROR and CPU_HAS_ROR are currently used.
	(mips_ip): New variable "lastpos", and implement "+A", "+B",
	and "+C" operands for MIPS32 Release 2 ins/ext instructions.
	Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
	(validate_mips_insn): Implement "+" as a way to extend the
	allowed operands, and implement "K", "+A", "+B", and "+C"
	operands.
	(OPTION_MIPS32R2): New define.
	(md_longopts): Add entry for OPTION_MIPS32R2.
	(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
	(md_parse_option): Handle OPTION_MIPS32R2.
	(s_mipsset): Reimplement handling of ".set mipsN" options
	and add support for ".set mips32r2".
	(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
	(md_show_usage): Document "-mips32r2" option.
	* doc/as.texinfo: Document "-mips32r2" option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips32r2.d: New test.
	* gas/mips/hwr-names-mips32r2.d: New test.
	* gas/mips/hwr-names-numeric.d: New test.
	* gas/mips/hwr-names.s: New test source file.
	* gas/mips/mips32r2.d: New test.
	* gas/mips/mips32r2.s: New test source file.
	* gas/mips/mips32r2-ill.l: New test.
	* gas/mips/mips32r2-ill.s: New test source file.
	* gas/mips/mips.exp: Add mips32r2 architecture data array
	entry.  Run new tests mentioned above.

[ include/elf/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_32R2): New define.

[ include/opcode/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document "+" as the start of two-character operand
	type names, and add new "K", "+A", "+B", and "+C" operand types.
	(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
	(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
	defines.

[ opcodes/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
	(mips_hwr_names_mips3264r2): New arrays.
	(mips_arch_choice): New "hwr_names" member.
	(mips_arch_choices): Adjust for structure change, and add a new
	entry for "mips32r2" ISA.
	(mips_hwr_names): New variable.
	(set_default_mips_dis_options): Set mips_hwr_names.
	(parse_mips_dis_option): New "hwr-names" option which sets
	mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
	(print_insn_arg): Change return type to "int"
	and use that to indicate number of characters consumed.
	Add support for "+" operand extension character, "+A", "+B",
	"+C", and "K" operands.
	(print_insn_mips): Adjust for changes to print_insn_arg.
	(print_mips_disassembler_options): Adjust for "hwr-names"
	addition and "reg-names" change.
	* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
	(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
	forms of "sll".  Add new MIPS32 Release 2 instructions: ehb,
	di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
	rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
	Note that hardware rotate instructions (ror, rorv) can be
	used on MIPS32 Release 2, and add the official mnemonics
	for them (rotr, rotrv) and the similar "rotl" mnemonic for
	left-rotate.
2002-12-31 07:29:29 +00:00
Nick Clifton
2469cfa284 Add support for msp430. 2002-12-30 19:25:13 +00:00
Nick Clifton
312b768e2f Change linker's default behaviour - it will now reject binary files whoes
architecture it does not recognise, unless it has explicitly told to accept
them.
2002-12-23 10:45:03 +00:00
Stephane Carrez
bc7c6a9029 * bfd-in2.h (bfd_mach_m6812): Rebuild.
* archures.c (bfd_mach_m6812_default, bfd_mach_m6812,
	bfd_mach_m6812s): Declare.

	* elf32-m68hc12.c (m68hc12_elf_set_mach_from_flags): New function.
	(_bfd_m68hc12_elf_set_private_flags): Call it.
	(_bfd_m68hc12_elf_print_private_bfd_data): Report processor version.
	(_bfd_m68hc12_elf_merge_private_bfd_data): Merge the flags and
	report microcontroller incompatibilities (HC12 vs HCS12).
	(elf_backend_object_p): Update.
2002-12-01 12:18:29 +00:00
Alan Modra
b34976b65a s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
comparisons of bfd_boolean vars with TRUE/FALSE.  Formatting.
2002-11-30 08:39:46 +00:00
Nick Clifton
3af9a47b1c Add support for PEF, Mach-O, xSYM 2002-11-06 13:26:29 +00:00
Alan Modra
686e4055ef * archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64,
	bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64,
	bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850,
	bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8,
	bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple,
	bfd_mach_ia64_elf64, bfd_mach_ia64_elf32,
	bfd_mach_ip2022, bfd_mach_ip2022ext,
	bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber.
	* bfd-in2.h: Regenerate.
2002-10-14 05:16:42 +00:00
Richard Sandiford
00707a0e89 [include/elf]
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.

[bfd/]
	* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
	(bfd_mach_mips5500): New.
	* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
	(arch_info_struct): Add corresponding entries here.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
	E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
	(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
	bfd_mach_mips5400 and bfd_mach_mips5500.
	(_bfd_mips_elf_mach_extends_p): New function.
	(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
	the EF_MIPS_MACH flags.
	* bfd-in2.h: Regenerate.
2002-09-30 11:53:56 +00:00
Nick Clifton
86aba9dbfa Add linker relaxation to v850 toolchain 2002-08-29 06:49:35 +00:00
Nick Clifton
026df7c5e6 Add TMS320C4x support 2002-08-28 10:38:51 +00:00
Elena Zannoni
d62b1198f8 2002-08-19 Elena Zannoni <ezannoni@redhat.com>
* archures.c (bfd_mach_ppc_e500): Added.
        * bfd-in2.h: Rebuilt.
        * cpu-powerpc.c (bfd_powerpc_archs): Added e500.
2002-08-19 21:12:34 +00:00
Nick Clifton
cf88bb9f09 Add IP2k support to BFD and LD 2002-07-17 14:15:52 +00:00
Dave Brolley
4e5ba5b7eb 2002-06-18 Dave Brolley <brolley@redhat.com>
From Catherine Moore, Michael Meissner, Dave Brolley:
	* po/SRC-POTFILES.in: Add cpu-frv.c and elf32-frv.c
	* targets.c: Support bfd_elf32_frv_vec.
	* reloc.c: Add FRV relocs.
	* configure.in: Add support for bfd-elf32-frv-vec.
	* config.bfd (targ_cpu): Add support for frv-*-elf.
	* archures.c: Add frv arch and machines.
	* Makefile.am (ALL_MACHINES): Add cpu-frv.lo.
	(ALL_MACHINES_CFILES): Add cpu-frv.c.
	(BFD32_BACKENDS): Add elf32-frv.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-frv.c
	(cpu-frv.lo): New target.
	(elf32-frv.lo): New target.
	* cpu-frv.c: New file.
	* elf32-frv.c: New file.
2002-06-18 21:10:55 +00:00
Nick Clifton
d172d4ba03 Add DLX target 2002-05-28 14:08:47 +00:00
Alan Modra
aa3d5824a4 * archures.c (bfd_lookup_arch): Move the list order comment..
(struct bfd_arch_info): ..to where it belongs.
2002-04-20 03:25:20 +00:00
Alan Modra
99dc00929f * archures.c (bfd_lookup_arch): Add comment on list order.
(bfd_default_set_arch_mach): Use bfd_lookup_arch.
	* cpu-powerpc.c (bfd_powerpc_archs): Re-order so that the default
	is always at head of list.
2002-04-20 02:54:26 +00:00
Alan Modra
b74fa2cd15 * archures.c (bfd_default_compatible): Test bits_per_word.
* cpu-i386.c (i386_compatible): Remove.  Replace occurrences with
	bfd_default_compatible.
	* cpu-i370.c (i370_compatible): Likewise.
	* cpu-sparc.c (sparc_compatible): Likewise.
	* cpu-h8300.c (compatible): Test in->arch == out->arch.
2002-03-13 07:30:45 +00:00
Martin Schwidefsky
befc3abbed 2002-02-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
* archures.c (bfd_mach_s390_esa): Rename to bfd_mach_s390_31.
	(bfd_mach_s390_esame): Rename to bfd_mach_s390_64.
	* bfd-in2.h: Regenerate.
	* cpu-s390.c (arch_info_struct): Use renamed architecture defines.
	Replace architecture name "s390" with "s390:31-bit" and "s390:esame"
	with "s390:64-bit".
	* elf32-s390.c (elf_howto_table): Add 32 bit pc relative relocations.
	(elf_s390_reloc_type_lookup): Likewise.
	(elf_s390_check_relocs): Likewise.
	(elf_s390_gc_sweep_hook): Likewise.
	(elf_s390_relocate_section): Likewise.
	(elf_s390_object_p): Use renamed architecture define.
	* elf64-s390.c (elf_s390_object_p): Use renamed architecture define.
2002-02-19 18:22:16 +00:00
Alexandre Oliva
fbca6ad9f3 Contribute sh64-elf.
2002-01-23  Alexandre Oliva  <aoliva@redhat.com>
* reloc.c (R_SH_GOTPLT32, R_SH_GOT_LOW16, R_SH_GOT_MEDLOW16,
R_SH_GOT_MEDHI16, R_SH_GOT_HI16, R_SH_GOTPLT_LOW16,
R_SH_GOTPLT_MEDLOW16, R_SH_GOTPLT_MEDHI16, R_SH_GOTPLT_HI16,
R_SH_PLT_LOW16, R_SH_PLT_MEDLOW16, R_SH_PLT_MEDHI16,
R_SH_PLT_HI16, R_SH_GOTOFF_LOW16, R_SH_GOTOFF_MEDLOW16,
R_SH_GOTOFF_MEDHI16, R_SH_GOTOFF_HI16, R_SH_GOTPC_LOW16,
R_SH_GOTPC_MEDLOW16, R_SH_GOTPC_MEDHI16, R_SH_GOTPC_HI16,
R_SH_GOT10BY4, R_SH_GOTPLT10BY4, R_SH_GOT10BY8, R_SH_GOTPLT10BY8,
R_SH_COPY64, R_SH_GLOB_DAT64, R_SH_JMP_SLOT64, R_SH_RELATIVE64):
New relocs.
* libbfd.h, bfd-in2.h: Rebuilt.
* elf32-sh.c (sh_elf_howto_table): Define new relocs.
(sh_reloc_map): Map them.
(PLT_ENTRY_SIZE, elf_sh_plt0_entry_be, elf_sh_plt0_entry_le,
elf_sh_plt_entry_be, elf_sh_plt_entry_le, elf_sh_pic_plt_entry_be,
elf_sh_pic_plt_entry_le, elf_sh_plt0_entry, elf_sh_plt_entry,
elf_sh_pic_plt_entry, elf_sh_sizeof_plt, elf_sh_plt_plt0_offset,
elf_sh_plt0_gotplt_offset, elf_sh_plt_temp_offset,
elf_sh_plt_symbol_offset, elf_sh_plt_reloc_offset,
movi_shori_putval) [INCLUDE_SHMEDIA]: New.
(elf_sh_link_hash_entry) [INCLUDE_SHMEDIA]: Add
datalabel_got_offset.
(sh_elf_link_hash_newfunc): Initialize it.
(sh_elf_relocate_section): Augment the scope of
seen_stt_datalabel.  Introduce GOTPLT support.	Extend GOTPC, PLT,
GOT and GOTOFF handling to new SHmedia relocation types.  Support
GOT_BIAS.
(sh_elf_check_relocs): Likewise.
(sh_elf_finish_dynamic_symbol) [TARGET_SHMEDIA]: Set up values in
PLT entries using movi_shori_putval.  Support GOT_BIAS.
(sh_elf_finish_dynamic_sections): Likewise.
* elf32-sh64.c (shmedia_prepare_reloc): Do not add addend to
relocation, it's now done by the caller.
(GOT_BIAS): New.
* elf64-sh64.c (GOT_BIAS, PLT_ENTRY_SIZE, elf_sh64_sizeof_plt,
elf_sh64_plt_plt0_offset, elf_sh64_plt0_gotplt_offset,
elf_sh64_plt_temp_offset, elf_sh64_plt_symbol_offset,
elf_sh64_plt_reloc_offset, ELF_DYNAMIC_INTERPRETER,
elf_sh64_pcrel_relocs_copied, elf_sh64_link_hash_entry,
elf_sh64_link_hash_table, sh64_elf64_link_hash_traverse,
sh64_elf64_hash_table): New.
(sh_elf64_howto_table): Introduce new relocs.
(sh_elf64_info_to_howto): Accept new PIC relocs.
(sh_elf64_relocate_section): Augment the scope of
seen_stt_datalabel.  Support new PIC relocs.
(sh_elf64_check_relocs): Support new PIC relocs.
(elf_sh64_plt0_entry_be, elf_sh64_plt0_entry_le,
elf_sh64_plt_entry_be, elf_sh64_plt_entry_le,
elf_sh64_pic_plt_entry_be, elf_sh64_pic_plt_entry_le,
elf_sh64_plt0_entry, elf_sh64_plt_entry, elf_sh64_pic_plt_entry,
sh64_elf64_link_hash_newfunc, sh64_elf64_link_hash_table_create,
movi_shori_putval, movi_3shori_putval,
sh64_elf64_create_dynamic_sections,
sh64_elf64_adjust_dynamic_symbol, sh64_elf64_discard_copies,
sh64_elf64_size_dynamic_sections,
sh64_elf64_finish_dynamic_symbol,
sh64_elf64_finish_dynamic_sections): New.
(elf_backend_create_dynamic-sections,
bfd_elf64_bfd_link_hash_table_create,
elf_backend_adjust_dynamic_symbol,
elf_backend_size_dynamic_sections,
elf_backend_finish_dynamic_symbol,
elf_backend_finish_dynamic_sections, elf_backend_want_got_plt,
elf_backend_plt_readonly, elf_backend_want_plt_sym,
elf_backend_got_header_size, elf_backend_plt_header_size):
Define.
2001-05-16  Alexandre Oliva  <aoliva@redhat.com>
* elf32-sh.c: Renumbered and renamed some SH5 relocations to
match official numbers and names; moved unmaching ones to the
range 0xf2-0xff.
* elf32-sh64.c, elf64-sh64.c: Likewise.
2001-03-12  DJ Delorie	<dj@redhat.com>
* elf32-sh.c (sh_elf_relax_section): Don't relax SHmedia
sections.
2001-03-12  DJ Delorie	<dj@redhat.com>
* elf32-sh64.c (shmedia_prepare_reloc): Validate relocs that must
be aligned.
* elf64-sh64.c (sh_elf64_relocate_section): Ditto.
2001-01-14  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf32-sh64.c (bfd_elf32_bfd_copy_private_section_data): Define.
(sh64_elf_fake_sections): Set type to SHT_SH5_CR_SORTED for a
.cranges section with SEC_SORT_ENTRIES set.
(sh64_backend_section_from_shdr): Set SEC_SORT_ENTRIES on an
incoming sorted .cranges section.
(sh64_bfd_elf_copy_private_section_data): New.
(sh64_elf_final_write_processing): Only sort .cranges and modify
start address if called by linker.
2001-01-08  Ben Elliston  <bje@redhat.com>
* elf32-sh64.c (sh64_elf_final_write_processing): Activate
Hans-Peter Nilsson's set bit 0 patch from	2001-01-06.
* elf64-sh64.c (sh64_elf64_final_write_processing): Ditto.
2001-01-06  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf64-sh64.c (sh_elf64_howto_table): No open brace at start of
line.  Add comments before all entries.
<R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct and clarify describing
comment.
(sh_elf64_reloc): Correct head comment.
(sh_elf64_relocate_section): Correct spacing.
<relocating for a local symbol>: Do not honour STO_SH5_ISA32;
instead call reloc_dangerous callback.
<case R_SH_SHMEDIA_CODE>: New case.
(sh_elf64_gc_mark_hook): Correct spacing.
(sh_elf64_check_relocs): Ditto.
* elf32-sh64.c (shmedia_prepare_reloc) <case R_SH_SHMEDIA_CODE>:
New case.
* elf32-sh.c: Correct #endif comments for #ifndef-wrapped
functions.
(sh_elf_howto_table) <R_SH_PT_16, R_SH_SHMEDIA_CODE>: Correct,
clarify describing comment.  Add comments before all entries.
(sh_elf_relocate_section) <relocating for a local symbol>: Do not
honour STO_SH5_ISA32; instead call reloc_dangerous callback.
2001-01-06  Hans-Peter Nilsson	<hpn@cygnus.com>
Sort .cranges section in final link.  Prepare to set bit 0 on
entry address.
* elf32-sh64.c (struct sh64_find_section_vma_data): New.
(sh64_elf_link_output_symbol_hook): Fix typo in prototype.
(sh64_elf_set_mach_from_flags): Set SEC_DEBUGGING on incoming
.cranges section.
(sh64_backend_section_from_shdr): New, to recognize
SHT_SH5_CR_SORTED on incoming .cranges section.
(elf_backend_section_from_shdr): Define.
(sh64_elf_final_write_processing): Sort outgoing .cranges
section.  (New, temporarily disabled:) Set bit 0 on entry address
according to ISA type.
(sh64_find_section_for_address): New.
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb,
crange_bsearch_cmpl): Move here from opcodes/sh64-dis.c.
(sh64_address_in_cranges): Move here from opcodes/sh64-dis.c.  Use
bfd_malloc, not xmalloc.
(sh64_get_contents_type): Move here from opcodes/sh64-dis.c.  Make
global.
* elf32-sh64.c (sh64_elf64_final_write_processing): New, (but
temporarily disabled) setting bit 0 on entry address.
(elf_backend_final_write_processing): Define.
2001-01-05  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf32-sh.c (sh_elf_howto_table) <R_SH_PT_16>: Adjust fields to
be a proper relocation for PTA and PTB rather than a marker.
<R_SH_IMMU5, R_SH_IMMS6, R_SH_IMMU6, R_SH_IMMS10, R_SH_IMMS10BY2,
R_SH_IMMS10BY4, R_SH_IMMS10BY8, R_SH_IMMS16, R_SH_IMMU16,
R_SH_IMM_LOW16, R_SH_IMM_LOW16_PCREL, R_SH_IMM_MEDLOW16,
R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16, R_SH_IMM_MEDHI16_PCREL,
R_SH_IMM_HI16, R_SH_IMM_HI16_PCREL, R_SH_64, R_SH_64_PCREL>:
Zero src_mask.
* elf64-sh64.c: Ditto.
(sh_elf64_relocate_section) <case R_SH_PT_16>: New case.
* elf32-sh64.c: Include opcodes/sh64-opc.h
(shmedia_prepare_reloc): Take a bfd_link_info pointer as first
argument.  Drop const qualifiers from "bfd *" and "bfd_byte *"
parameters.  No unused parameters.  Caller changed.
<case R_SH_PT_16>: New case.
* Makefile.am (elf32-sh64.lo): Add dependency on sh64-opc.h.
* Makefile.in: Regenerate.
2000-12-30  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf64-sh64.c (sh64_elf64_fake_sections): Set SHF_SH5_ISA32 for
all code sections.
(sh_elf64_set_mach_from_flags): Change from EF_SH64 to EF_SH5.
(sh64_elf_merge_private_data): Ditto.
* elf32-sh64.c (sh64_elf_fake_sections): Use sh64_elf_section_data
to access stored section flags.
(sh64_elf_final_write_processing): Return immediately unless
called by linker.  Use sh64_elf_section_data (cranges) to get size
of linker-generated cranges entries.
(sh64_elf_copy_private_data): Add missing "return true".
(sh64_elf_set_mach_from_flags): Change from EF_SH64 to EF_SH5.
(sh_elf64_merge_private_data): Ditto.
2000-12-19  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf64-sh64.c (sh64_elf64_fake_sections): New, copy of
elf64-sh64.c:sh64_elf_fake_sections.
(elf_backend_fake_sections): Define as sh64_elf64_fake_sections.
2000-12-18  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf32-sh64.c (sh64_elf_copy_private_data_internal): Delete.
(sh64_elf_final_write_processing): New.
(elf_backend_final_write_processing): Define.
(sh64_elf_fake_sections): Get header flags from tdata field.
(sh64_elf_copy_private_data): Do not call
sh64_elf_copy_private_data_internal, just copy e_flags field.
(sh64_elf_merge_private_data): Do not call
sh64_elf_copy_private_data_internal.
2000-12-12  Hans-Peter Nilsson	<hpn@cygnus.com>
Remove EF_SH64_ABI64, let ELF size make difference.
Remove SH64-specific BFD section flag.
* elf32-sh64.c (sh64_elf_fake_sections): Recognize section as
containing SHmedia through elf_section_data (asect)->tdata
non-zero, not using a BFD section flag.
(sh64_elf_set_mach_from_flags): Don't recognize EF_SH64_ABI64.
(sh64_elf_merge_private_data): Similar.
(elf_backend_section_flags): Don't define.
(sh64_elf_backend_section_flags): Delete.
* elf64-sh64.c (sh_elf64_set_mach_from_flags): Recognize EF_SH64,
not EF_SH64_ABI64.
(sh_elf64_merge_private_data): Similar.
* section.c (Section flags definitions): Don't define
SEC_SH_ISA_SHMEDIA.
(bfd-in2.h): Regenerate.
2000-12-09  Hans-Peter Nilsson	<hpn@cygnus.com>
Make DataLabel references work with partial linking.
* elf32-sh64.c: Fix formatting.
(sh64_elf_link_output_symbol_hook): New.
(elf_backend_link_output_symbol_hook): Define to
sh64_elf_link_output_symbol_hook.
(sh64_elf_add_symbol_hook): Make DataLabel symbol just global
undefined if partial linking.  Adjust sanity check.
* elf64-sh64.c (sh64_elf64_link_output_symbol_hook): New.
(elf_backend_link_output_symbol_hook): Define to
sh64_elf64_link_output_symbol_hook.
(sh64_elf64_add_symbol_hook): Make DataLabel symbol just global
undefined if partial linking.  Adjust sanity check.
2000-12-07  Hans-Peter Nilsson	<hpn@cygnus.com>
Implement semantics for inter-file DataLabel references.
* elf64-sh64.c (DATALABEL_SUFFIX): Define.
(sh64_elf64_add_symbol_hook): New.
(sh_elf64_relocate_section): If passing an indirect symbol with
st_type STT_DATALABEL on the way to a symbol with st_other
STO_SH5_ISA32, do not bitor 1 to the relocation.
(elf_backend_add_symbol_hook): Define to
sh64_elf64_add_symbol_hook.
* elf64-sh32.c: Tweak comments.
(DATALABEL_SUFFIX): Define.
(sh64_elf_add_symbol_hook): New.
(elf_backend_add_symbol_hook): Define to sh64_elf_add_symbol_hook.
* elf32-sh.c (sh_elf_relocate_section): If passing an indirect
symbol with st_type STT_DATALABEL on the way to a symbol with
st_other STO_SH5_ISA32, do not bitor 1 to the relocation.
2000-12-05  Hans-Peter Nilsson	<hpn@cygnus.com>
Pass through STT_DATALABEL.
* elf32-sh64.c (sh64_elf_get_symbol_type): New.
(elf_backend_get_symbol_type): Define.
* elf64-sh64.c (sh64_elf64_get_symbol_type): New.
(elf_backend_get_symbol_type): Define.
2000-11-30  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf32-sh64.c: Tweak comments.
(sh64_elf_copy_private_data_internal): Add prototype.
(bfd_elf32_bfd_set_private_flags): Define.
(sh64_elf_copy_private_data_internal): Compare machine name, not
textual BFD target name, to check whether to copy section flag
SHF_SH5_ISA32.
(sh64_elf_merge_private_data): Validize bfd_get_arch_size.
Tweak section-contents-type-mismatch message.
(shmedia_prepare_reloc): Add ATTRIBUTE_UNUSED markers.
Validize reloc-types.
* elf64-sh64.c: New file.
* targets.c (bfd_elf64_sh64_vec, bfd_elf64_sh64l_vec): Declare.
* Makefile.am (BFD64_BACKENDS): Add elf64-sh64.lo.
(BFD64_BACKENDS_CFILES): Add elf64-sh64.c.
Regenerate dependencies.
* Makefile.in: Regenerate.
* config.bfd (sh64-*-elf*): Add bfd_elf64_sh64_vec and
bfd_elf64_sh64l_vec.
* configure.in: Handle bfd_elf64_sh64_vec and
bfd_elf64_sh64l_vec.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
2000-11-29  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf32-sh64.c (sh64_elf_set_mach_from_flags): Do not recognize
anything else but EF_SH64 and EF_SH64_ABI64.
(sh64_elf_merge_private_data): Emit error for anything else but
EF_SH64 and EF_SH64_ABI64.
* config.bfd: Remove bfd_elf32_shblin_vec and bfd_elf32_shlin_vec
from targ_selvecs.
* configure.in: Add cofflink.lo to bfd_elf32_sh64_vec and
bfd_elf32_sh64l_vec as a temporary measure.
* configure: Regenerate.
2000-11-27  Hans-Peter Nilsson	<hpn@cygnus.com>
* cpu-sh.c (arch_info_struct): Include sh5 item
unconditionalized.
* config.bfd (sh64-*-elf*): Do not set targ_cflags.
Add targ_selvecs bfd_elf32_sh_vec, bfd_elf32_shl_vec,
bfd_elf32_shblin_vec and bfd_elf32_shlin_vec.
* elf32-sh64.c: Tweak comments.
(sh64_elf_set_mach_from_flags): Recognize all machine flags that
are proper subsets of SH64 as bfd_mach_sh5.  Add EF_SH64_ABI64.
(sh64_elf_copy_private_data_internal): Wrap long line.
(sh64_elf_merge_private_data): Rewrite to allow objects from
SH64 subsets to be linked together.
(INCLUDE_SHMEDIA): Define.
* elf32-sh.c (sh_elf_relocate_section) <local symbol>:
Parenthesize plus-expression inside or-expression.
<global symbol>: Ditto.
(sh_elf_set_mach_from_flags): Remove code refusing
deleted EF_SH64_32BIT_ABI flag.
2000-11-26  Hans-Peter Nilsson	<hpn@cygnus.com>
* elf32-sh.c (sh_elf_howto_table) <R_SH_IMM_LOW16_PCREL,
R_SH_IMM_MEDLOW16_PCREL, R_SH_IMM_MEDHI16_PCREL,
R_SH_IMM_HI16_PCREL, R_SH_64_PCREL>: Set pcrel_offset to true.
(sh_elf_relocate_section) <local symbol>: Or 1 in
calculation of relocation if sym->st_other & STO_SH5_ISA32.
<global symbol>: Ditto if h->other & STO_SH5_ISA32.
* elf32-sh64.c (shmedia_prepare_reloc): Add rel->r_addend to
relocation.
2000-11-24  Hans-Peter Nilsson	<hpn@cygnus.com>
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64.c.
Regenerate dependencies.
* Makefile.in: Regenerate.
* archures.c: Add bfd_mach_sh5.
* config.bfd: Map targ_cpu sh* to bfd_sh_arch.
Handle sh64-*-elf*.  Set targ_cflags to -DINCLUDE_SHMEDIA.
* configure.in: Handle bfd_elf32_sh64_vec and bfd_elf32_sh64l_vec.
* configure: Regenerate.
* reloc.c (BFD_RELOC_SH_SHMEDIA_CODE, BFD_RELOC_SH_IMMU5,
BFD_RELOC_SH_IMMS6, BFD_RELOC_SH_IMMS6BY32, BFD_RELOC_SH_IMMU6,
BFD_RELOC_SH_IMMS10, BFD_RELOC_SH_IMMS10BY2,
BFD_RELOC_SH_IMMS10BY4, BFD_RELOC_SH_IMMS10BY8,
BFD_RELOC_SH_IMMS16, BFD_RELOC_SH_IMMU16, BFD_RELOC_SH_IMM_LOW16,
BFD_RELOC_SH_IMM_LOW16_PCREL, BFD_RELOC_SH_IMM_MEDLOW16,
BFD_RELOC_SH_IMM_MEDLOW16_PCREL, BFD_RELOC_SH_IMM_MEDHI16,
BFD_RELOC_SH_IMM_MEDHI16_PCREL, BFD_RELOC_SH_IMM_HI16,
BFD_RELOC_SH_IMM_HI16_PCREL, BFD_RELOC_SH_PT_16): New relocations.
* cpu-sh.c [INCLUDE_SHMEDIA] (arch_info_struct): Define and link
in item for SH5.
* elf32-sh.c [INCLUDE_SHMEDIA] (sh_elf_howto_table): Add howto items
for SHmedia relocs.
[INCLUDE_SHMEDIA] (sh_rel): Add mappings for SHmedia relocs.
[INCLUDE_SHMEDIA] (sh_elf_relocate_section) [default]: Call
shmedia_prepare_reloc, goto final_link_relocate if it returns
non-zero, else fail as before.
(sh_elf_set_mach_from_flags): Provide function only if not defined
as macro.  Do not recognize objects with EF_SH64_32BIT_ABI set.
(sh_elf_set_private_flags): Provide function only if not defined
as a macro.
(sh_elf_copy_private_data): Similar.
(sh_elf_merge_private_data): Similar.
* section.c (SEC_SH_ISA_SHMEDIA): New.
* targets.c (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec): Declare.
* elf32-sh64.c: New file.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
* po/POTFILES.in: Regenerate.
* po/bfd.pot: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
2002-02-08 05:33:27 +00:00
Alan Modra
899f54f5ee * archures (bfd_mach_ppc64): Define.
(bfd_powerpc_arch): Rename to bfd_powerpc_archs.
	(bfd_powerpc_arch): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (arch_info_struct): Rename to bfd_powerpc_archs.
	(bfd_powerpc_arch): Move to tail of bfd_powerpc_archs.
	(bfd_powerpc_archs): Add default powerpc64 arch.

	* gas/ppc/test1elf64.d: Tweak arch name.
2002-02-05 03:35:19 +00:00
Nick Clifton
3b16e843f2 Add support for OpenRISC 32-bit embedded processor 2002-01-31 17:33:08 +00:00
Nick Clifton
c312a6a489 oops - omitted from previous delta 2002-01-31 09:24:16 +00:00
Geoffrey Keating
93fbbb04b8 Index: bfd/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>
	    Corinna Vinschen  <vinschen@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* archures.c: Add support for xstormy16.
	* config.bfd: Add support for xstormy16.
	* configure.in: Add support for xstormy16.
	* reloc.c: Add support for xstormy16.
	* targets.c: Add support for xstormy16.
	* cpu-xstormy16.c: New file.
	* elf32-xstormy16.c: New file.
	* Makefile.in: Regenerated.
	* bfd-in2.h: Regenerated.
	* configure: Regenerated.
	* libbfd.h: Regenerated.

Index: binutils/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* readelf.c (guess_is_rela): Add support for stormy16.
	(dump_relocations): Likewise.
	(get_machine_name): Likewise.

Index: gas/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* configure.in: Add support for xstormy16.
	* configure: Regenerated.
	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerated.
	* config/tc-xstormy16.c: New file.
	* config/tc-xstormy16.h: New file.

Index: gas/testsuite/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    matthew green  <mrg@redhat.com>

	* gas/xstormy16/allinsn.d: New file.
	* gas/xstormy16/allinsn.exp: New file.
	* gas/xstormy16/allinsn.s: New file.
	* gas/xstormy16/allinsn.sh: New file.
	* gas/xstormy16/gcc.d: New file.
	* gas/xstormy16/gcc.s: New file.
	* gas/xstormy16/gcc.sh: New file.
	* gas/xstormy16/reloc-1.d: New file.
	* gas/xstormy16/reloc-1.s: New file.
	* gas/xstormy16/reloc-2.d: New file.
	* gas/xstormy16/reloc-2.s: New file.

Index: ld/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* configure.tgt: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* emulparams/elf32xstormy16.sh: New file.
	* scripttempl/xstormy16.sc: New file.

Index: opcodes/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* Makefile.am: Add support for xstormy16.
	* Makefile.in: Regenerate.
	* configure.in: Add support for xstormy16.
	* configure: Regenerate.
	* disassemble.c: Add support for xstormy16.
	* xstormy16-asm.c: New generated file.
	* xstormy16-desc.c: New generated file.
	* xstormy16-desc.h: New generated file.
	* xstormy16-dis.c: New generated file.
	* xstormy16-ibld.c: New generated file.
	* xstormy16-opc.c: New generated file.
	* xstormy16-opc.h: New generated file.

Index: include/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>

	* dis-asm.h (print_insn_xstormy16): Declare.

Index: include/elf/ChangeLog
2001-12-07  Geoffrey Keating  <geoffk@redhat.com>
	    Richard Henderson  <rth@redhat.com>

	* common.h (EM_XSTORMY16): Define.
	* xstormy16.h: New file.
2001-12-08 03:46:03 +00:00
Nick Clifton
3c3bdf30e4 Add MMIX support 2001-10-30 15:20:14 +00:00
H.J. Lu
3882b01078 Locale changes from Bruno Haible <haible@clisp.cons.org>. 2001-09-19 05:33:36 +00:00
Alan Modra
dc810e3900 Touches most files in bfd/, so likely will be blamed for everything..
o  bfd_read and bfd_write lose an unnecessary param and become
   bfd_bread and bfd_bwrite.

o  bfd_*alloc now all take a bfd_size_type arg, and will error if
   size_t is too small.  eg. 32 bit host, 64 bit bfd, verrry big files
   or bugs in linker scripts etc.

o  file_ptr becomes a bfd_signed_vma.  Besides matching sizes with
   various other types involved in handling sections, this should make
   it easier for bfd to support a 64 bit off_t on 32 bit hosts that
   provide it.

o  I've made the H_GET_* and H_PUT_* macros (which invoke bfd_h_{get,put}_*)
   generally available.  They now cast their args to bfd_vma and
   bfd_byte * as appropriate, which removes a swag of casts from the
   source.

o  Bug fixes to bfd_get8, aix386_core_vec, elf32_h8_relax_section, and
   aout-encap.c.

o  Zillions of formatting and -Wconversion fixes.
2001-09-18 09:57:26 +00:00
Eric Christopher
a1cd6a8fe3 2001-08-31 Eric Christopher <echristo@redhat.com>
Jason Eckhardt  <jle@redhat.com>

	* bfd/archures.c: Add mipsisa32 and mipsisa64. Remove mips32,
	mips32_4k and mips64.
	* bfd/aoutx.h: Remove bfd_mach_mips32, bfd_mach_mips32_4k,
	bfd_mach_mips64.  Add bfd_mach_mipsisa32, bfd_mach_mipsisa64.
	* bfd/cpu-mips.c: Ditto.
	* bfd/elf32-mips.c (_bfd_mips_elf_final_write_processing): Ditto.
	* bfd/bfd-in2.h: Regenerate.
2001-08-31 21:24:28 +00:00
Nick Clifton
d1cf510e5e Add MIPS r12k support 2001-05-23 17:26:40 +00:00
Nick Clifton
b3baf5d0a8 Add OpenRISC support 2001-04-24 15:08:16 +00:00
Nick Clifton
7898dedac0 Update copyright notices 2001-03-08 21:04:02 +00:00
Nick Clifton
3cac17aec8 Rest of the changes for Coldfire V4. 2001-03-06 20:15:27 +00:00
Nick Clifton
e135f41bc2 Add PDP-11 support 2001-02-18 23:33:11 +00:00
Nick Clifton
a85d7ed0f0 Add s390 support 2001-02-10 00:58:38 +00:00
Nick Clifton
0d2bcfafbf Updated ARC assembler from arccores.com 2001-01-11 21:20:20 +00:00
Nick Clifton
c6c98b3833 Add MIPS SB1 machine 2000-12-02 01:10:33 +00:00
Nick Clifton
84ea6cf2c5 Add MIPS V and MIPS 64 machine numbers 2000-12-02 00:55:22 +00:00
Nick Clifton
e7af610e14 Add MIPS32 as a seperate MIPS architecture 2000-12-01 21:35:38 +00:00
Nick Clifton
8d88c4ca53 Add support for x86_64-*-linux-gnu* target 2000-11-30 19:16:54 +00:00
Nick Clifton
077b8428ab Add ARM v5t, v5te and XScale support 2000-11-25 00:21:40 +00:00
Kazu Hirata
047066e166 2000-11-09 Kazu Hirata <kazu@hxi.com>
* archive.c: Fix formatting.
	* archures.c: Likewise.
2000-11-10 04:28:20 +00:00
Kazu Hirata
0ef5a5bdcb 2000-11-07 Kazu Hirata <kazu@hxi.com>
* aix386-core.c: Fix formatting.
	* aoutf1.h: Likewise.
	* aoutx.h: Likewise.
	* archures.c: Likewise.
	* armnetbsd.c: Likewise.
2000-11-07 19:11:31 +00:00
Jim Wilson
bbe66d0820 ia64-hpux patches from Steve Ellcey.
* archures.c: (bfd_mach_ia64_elf64, bfd_mach_ia64_elf32) Add defines
	to differentiate elf32 and elf64 on ia64.
	* bfd-in2.h: Regenerate.
	* config.bfd: Add target for "ia64*-*-hpux*".
	* configure.in: Add bfd_elf32_ia64_big_vec to selvecs switch.
	* configure: Regenerate.
	* cpu-ia64.c (bfd_ia64_elf32_arch) Add elf32 arch info structure.
	* targets.c: Add bfd_target bfd_elf32_ia64_big_vec.
	* Makefile.am: Make elf32-ia64.c and elf64-ia64.c derived objects
	from elfxx-ia64.c.  Add depenency rules for making elf32-ia64.lo.
	* Makefile.in: Regnerate.
	* elf64-ia64.c: Deleted
	* elfxx-ia64.c: New file, paramaterized version of elf64-ia64.c.
2000-11-07 00:43:26 +00:00
Jakub Jelinek
19f7b01094 gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
	instructions to loose any special insn->architecture mask.

	* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
	(sparc_md_end, sparc_arch_types, sparc_arch,
	sparc_elf_final_processing): Handle v8plusb and v9b architectures.
	(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
	request v9b architecture if they are used).

bfd/
	* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
	elf32_sparc_object_p, elf32_sparc_final_write_processing):
	Support v8plusb.
	* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
	sparc64_elf_object_p): Support v9b.
	* archures.c: Declare v8plusb and v9b machines.
	* bfd-in2.h: Ditto.
	* cpu-sparc.c: Ditto.

include/opcode/
	* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
	Note that '3' is used for siam operand.

opcodes/
	* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
	(compute_arch_mask): Add v8plusb and v9b machines.
	(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
	* opcodes/sparc-opc.c: Support for Cheetah instruction set.
	(prefetch_table): Add #invalidate.
2000-10-20 10:38:47 +00:00
Nick Clifton
156c2f8bf7 Add support for the MIPS32 2000-09-14 01:47:38 +00:00
Hans-Peter Nilsson
06c15ad74f * Makefile.am (ALL_MACHINES): Add cpu-cris.lo.
(ALL_MACHINES_CFILES): Add cpu-cris.c.
	(BFD32_BACKENDS): Add aout-cris.lo and elf32-cris.lo.
	(BFD32_BACKENDS_CFILES): Add aout-cris.c and elf32-cris.c.
	(cpu-cris.lo, aout-cris.lo, elf32-cris.lo): New rules.
	* Makefile.in: Rebuild.
	* aclocal.m4: Rebuild.
	* aoutx.h (NAME(aout,machine_type)): Add case for bfd_arch_cris.
	* archures.c (enum bfd_architecture): Add bfd_arch_cris.
	(bfd_cris_arch): Declare.
	(bfd_archures_list): Add bfd_cris_arch.
	* bfd-in2.h: Rebuild.
	* config.bfd: (cris-*-*): New target.
	* configure.in (bfd_elf32_cris_vec, cris_aout_vec): New vectors.
	* configure: Rebuild.
	* elf.c (prep_headers): Add bfd_arch_cris.
	* libbfd.h: Rebuild.
	* libaout.h (enum machine_type): Add M_CRIS.
	* reloc.c: Add CRIS relocations.
	* targets.c (bfd_target bfd_elf32_cris_vec, cris_aout_vec):
	Declare.
	(bfd_target_vect): Add bfd_elf32_cris_vec and cris_aout_vec.
	* cpu-cris.c, aout-cris.c, elf32-cris.c: New files.
	* po/POTFILES.in, po/bfd.pot: Regenerate.
2000-07-20 16:21:07 +00:00
Nick Clifton
83ea41ad9c Add set of bfd_mach_ cases for compatibility with older binutils 2000-07-10 18:29:39 +00:00
Alan Modra
52b219b5e4 Add sequence id field to asection.
Tidy comments and replace deprecated CONST with const.
2000-07-08 12:08:43 +00:00
Nick Clifton
65aa24b6e8 Applied Marek Michalkiewicz <marekm@linux.org.pl>'s patch to ehance the AVR port. 2000-06-27 01:45:30 +00:00
Nick Clifton
60bcf0fa8c Applied Stephane Carrez <Stephane.Carrez@worldnet.fr> patches to add support
for m68hc11 and m68hc12 processors.
2000-06-19 01:22:44 +00:00
Nicholas Duffek
87f33987cd * archures.c (enum bfd_architecture): #define constants for
PowerPc and RS6000 machine numbers.
	* bfd-in2.h: Regenerate.
	* coffcode.h (coff_set_arch_mach_hook): #ifdef XCOFF64, set arch
	to bfd_arch_powerpc instead of bfd_arch_rs6000.  Refer to PowerPc
	and RS6000 machine numbers using #defined constants from
	archures.c.
	* cpu-powerpc.c (arch_info_struct): Refer to PowerPc and RS6000
	machine numbers using #defined constants from archures.c.  Add
	entries for EC603e, 630, A35, RS64II, RS64III, 7400.  Specify
	64-bit words in 620 entry.
	* cpu-rs6000.c (arch_info_struct): Create with entries for RS1,
	RSC, and RS2.
	(bfd_rs6000_arch): Change default machine to 0 (bfd_mach_rs6k).
2000-06-16 20:45:33 +00:00
Jim Wilson
800eeca487 IA-64 ELF support. 2000-04-21 20:22:24 +00:00
Timothy Wall
81635ce4f5 BFD and include/coff support for tic54x target. 2000-04-07 17:06:58 +00:00
Alan Modra
adde6300e0 ATMEL AVR microcontroller support. 2000-03-27 08:39:14 +00:00
Alan Modra
5b93d8bb51 Add IBM 370 support. 2000-02-23 13:52:23 +00:00
Alan Modra
f6af82bd44 This lot mainly cleans up `comparison between signed and unsigned' gcc
warnings.  One usused var, and a macro parenthesis fix too.  Also check
input sections are elf when doing gc in elflink.h.
2000-02-21 12:01:27 +00:00
Joern Rennecke
d4845d5762 bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.

bfd:

	* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
	(bfd_mach_sh3_dsp): Likewise.
	(bfd_mach_sh4): Reinstate.
	(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
	* bfd-in2.h: Regenerate.
	* coff-sh.c (struct sh_opcode): flags is no longer short.
	(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
	(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
	(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
	(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
	(sh_opcodes): No longer const.
	(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
	(sh_insn_uses_reg): Check for USESAS and USESR8.
	(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
	(_bfd_sh_align_load_span): Return early for SH4.
	Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
	Take into account that field b of a parallel processing insn
	could be mistaken for a separate insn.
	* cpu-sh.c (arch_info_struct): New array elements for
	sh2, sh-dsp and sh3-dsp.
	Reinstate element for sh4.
	(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
	(SH4_NEXT): Reinstate.
	(SH3_NEXT, SH3E_NEXT): Adjust.
	* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
	* elf32-sh.c (sh_elf_set_private_flags): New function.
	(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
	(sh_elf_merge_private_data): New function.
	(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
	(bfd_elf32_bfd_copy_private_bfd_data): Define.
	(bfd_elf32_bfd_merge_private_bfd_data): Change to
	sh_elf_merge_private_data.

gas:

	* config/tc-sh.c ("elf/sh.h"): Include.
	(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
	(md.begin): Initialize target_arch.
	Only include opcodes in has table that match selected architecture.
	(parse_reg): Recognize register names for sh-dsp.
	(parse_at): Recognize post-modify addressing.
	(get_operands): The leading space is now optional.
	(get_specific): Remove FDREG_N support.  Add support for sh-dsp
	arguments.  Update valid_arch.
	(build_Mytes): Add support for SDT_REG_N.
	(find_cooked_opcode): New function, broken out of md_assemble.
	(assemble_ppi, sh_elf_final_processing): New functions.
	(md_assemble): Use find_cooked_opcode and assemble_ppi.
	(md_longopts, md_parse_option): New option: -dsp.
	* config/tc-sh.h (elf_tc_final_processing): Define.
	(sh_elf_final_processing): Declare.

include/elf:

	* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
	(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
	(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.

opcodes:

	* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
	(print_insn_ppi): Likewise.
	(print_insn_shx): Use info->mach to select appropriate insn set.
	Add support for sh-dsp.  Remove FD_REG_N support.
	* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
	(sh_arg_type): Likewise.  Remove FD_REG_N.
	(sh_dsp_reg_nums): New enum.
	(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
	(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
	(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
	(arch_sh3_dsp_up): Likewise.
	(sh_opcode_info): New field: arch.
	(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
	D_REG_N.  Fill in arch field.  Add sh-dsp insns.
2000-02-17 00:33:36 +00:00
Nick Clifton
9a968f4332 Apply Tim walls octest vs bytes patch 2000-01-13 22:10:36 +00:00
Jeff Law
31f8dc8fce * archures.c (bfd_mach_am33): Define.
* bfd-in2.h: Rebuilt.
        * cpu-m10300.c (bfd_am33_arch): Add to the mn103 architecture list
        * elf-m10300.c (mn10300_elf_relax_section): Handle am33 instructions.
        (compute_function_info): Handle additional registers saved by
        movm on the am33.
        (elf_mn10300_mach): Handle E_MN10300_MACH_AM33.
        (_bfd_mn10300_elf_final_write_processing): Handle bfd_mach_am33.
1999-12-01 10:14:02 +00:00
Michael Meissner
7af8cca959 D10V patches from Cagney 1999-10-25 13:57:39 +00:00
Doug Evans
a23ef39fe9 * archures.c (bfd_mach_m32rx): Define it.
* bfd-in2.h: Rebuild.
1999-10-05 01:14:20 +00:00
Ian Lance Taylor
0bcb993b9f 1999-09-04 Steve Chamberlain <sac@pobox.com>
* cpu-pj.c: New file.
	* elf32-pj.c: New file.
	* config.bfd (pj*): New cpu.
	(pj-*-*, pjl-*-*): New targets.
	* configure.in (bfd_elf32_pj_vec): New target vector.
	(bfd_elf32_pjl_vec): New target vector.
 	* archures.c (bfd_arch_pj): Define.
	* elf.c (prep_headers): Handle bfd_arch_pj.
	* reloc.c: Define BFD_RELOC_PJ_* relocations.
	* targets.c (bfd_elf32_pj_vec, bfd_elf32_pjl_vec): Declare and add
	to target vector list.
	* Makefile.am: Rebuild dependencies.
	(ALL_MACHINES): Add cpu-pj.lo.
	(ALL_MACHINES_CFILES): Add cpu-pj.c.
	(BFD32_BACKENDS): Add elf32-pj.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-pj.c.
	* configure, Makefile.in, bfd-in2.h, libbfd.h: Rebuild.
1999-09-04 17:07:46 +00:00
Nick Clifton
478d07d67c Add support for arm v5 architectures. 1999-07-05 07:28:24 +00:00
Richard Henderson
252b5132c7 19990502 sourceware import 1999-05-03 07:29:11 +00:00