ddb000396c
Remove arm-epoc-pe support
...
bfd/
* Makefile.am: Remove arm-epoc-pe support.
* coff-arm.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
* epoc-pe-arm.c: Delete.
* epoc-pei-arm.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* configure.ac: Remove arm-epoc-pe support.
* dlltool.c: Likewise.
* configure: Regenerate.
gas/
* Makefile.am: Remove arm-epoc-pe support.
* config/tc-arm.h: Likewise.
* configure.tgt: Likewise.
* testsuite/gas/all/gas.exp: Likewise.
* testsuite/gas/arm/local_label_coff.d: Likewise.
* testsuite/gas/arm/undefined.d: Likewise.
* testsuite/gas/arm/undefined_coff.d: Likewise.
* config/te-epoc-pe.h: Delete.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* Makefile.am: Remove arm-epoc-pe support.
* configure.tgt: Likewise.
* emultempl/pe.em: Likewise.
* pe-dll.c: Likewise.
* testsuite/ld-scripts/fill.d: Likewise.
* testsuite/ld-scripts/fill16.d: Likewise.
* emulparams/arm_epoc_pe.sh: Delete.
* scripttempl/epocpe.sc: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 20:29:05 +09:30
c9098af41e
Remove sparc-aout and sparc-coff support
...
bfd/
* Makefile.am: Remove sparc-aout and sparc-coff support.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
* aout-sparcle.c: Delete.
* aoutf1.h: Delete.
* cf-sparclynx.c: Delete.
* coff-sparc.c: Delete.
* demo64.c: Delete.
* sparclinux.c: Delete.
* sparclynx.c: Delete.
* sparcnetbsd.c: Delete.
* sunos.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* testsuite/lib/binutils-common.exp: Remove sparc-aout and
sparc-coff support.
gas/
* Makefile.am: Remove sparc-aout and sparc-coff support.
* config/obj-coff.h: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-sparc.h: Likewise.
* configure.tgt: Likewise.
* config/te-sparcaout.h: Delete.
* testsuite/gas/sun4/addend.d: Delete.
* testsuite/gas/sun4/addend.exp: Delete.
* testsuite/gas/sun4/addend.s: Delete.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* Makefile.am: Remove sparc-aout and sparc-coff support.
* configure.tgt: Likewise.
* testsuite/ld-elfvers/vers.exp: Likewise.
* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
* testsuite/ld-elfweak/elfweak.exp: Likewise.
* testsuite/ld-shared/shared.exp: Likewise.
* emulparams/coff_sparc.sh: Delete.
* emulparams/sparcaout.sh: Delete.
* emulparams/sparclinux.sh: Delete.
* emulparams/sparcnbsd.sh: Delete.
* emulparams/sun4.sh: Delete.
* scripttempl/sparccoff.sc: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:33:26 +09:30
dc12032bca
Remove m68k-aout and m68k-coff support
...
include/
* aout/host.h: Remove m68k-aout and m68k-coff support.
* aout/hp300hpux.h: Delete.
* coff/apollo.h: Delete.
* coff/aux-coff.h: Delete.
* coff/m68k.h: Delete.
bfd/
* Makefile.am: Remove m68k-aout and m68k-coff support.
* aoutf1.h: Likewise.
* aoutx.h: Likewise.
* archive.c: Likewise.
* bfd-in.h: Likewise.
* bfd.c: Likewise.
* coffcode.h: Likewise.
* coffswap.h: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* configure.host: Likewise.
* doc/bfd.texinfo: Likewise.
* doc/bfdint.texi: Likewise.
* freebsd.h: Likewise.
* gen-aout.c: Likewise.
* hpux-core.c: Likewise.
* libaout.h: Likewise.
* libbfd-in.h: Likewise.
* pdp11.c: Likewise.
* peicode.h: Likewise.
* riscix.c: Likewise.
* targets.c: Likewise.
* aout0.c: Delete.
* coff-apollo.c: Delete.
* coff-aux.c: Delete.
* coff-m68k.c: Delete.
* coff-svm68k.c: Delete.
* coff-u68k.c: Delete.
* hosts/delta68.h: Delete.
* hosts/hp300bsd.h: Delete.
* hosts/m68kaux.h: Delete.
* hosts/news.h: Delete.
* hp300bsd.c: Delete.
* hp300hpux.c: Delete.
* liboasys.h: Delete.
* m68k4knetbsd.c: Delete.
* m68klinux.c: Delete.
* m68knetbsd.c: Delete.
* oasys.c: Delete.
* versados.c: Delete.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* testsuite/binutils-all/copy-2.d: Remove m68k-aout and m68k-coff
support.
* testsuite/binutils-all/copy-3.d: Likewise.
* testsuite/binutils-all/objcopy.exp: Likewise.
* testsuite/lib/binutils-common.exp: Likewise.
gas/
* Makefile.am: Remove m68k-aout and m68k-coff support.
* config/tc-m68k.c: Likewise.
* config/tc-m68k.h: Likewise.
* configure.ac: Likewise.
* configure.tgt: Likewise.
* testsuite/gas/all/weakref1u.d: Likewise.
* testsuite/gas/m68k/all.exp: Likewise.
* testsuite/gas/m68k/br-isaa.d: Likewise.
* testsuite/gas/m68k/br-isab.d: Likewise.
* testsuite/gas/m68k/br-isac.d: Likewise.
* config/te-psos.h: Delete.
* config/te-sun3.h: Delete.
* testsuite/gas/m68k-coff/gas.exp: Delete.
* testsuite/gas/m68k-coff/p2389.s: Delete.
* testsuite/gas/m68k-coff/p2389a.s: Delete.
* testsuite/gas/m68k-coff/p2430.s: Delete.
* testsuite/gas/m68k-coff/p2430a.s: Delete.
* testsuite/gas/m68k-coff/t1.s: Delete.
* testsuite/gas/m68k/p3041.d: Delete.
* testsuite/gas/m68k/p3041.s: Delete.
* testsuite/gas/m68k/p3041data.d: Delete.
* testsuite/gas/m68k/p3041data.s: Delete.
* testsuite/gas/m68k/p3041pcrel.d: Delete.
* testsuite/gas/m68k/p3041pcrel.s: Delete.
* testsuite/gas/m68k/t2.d: Delete.
* Makefile.in: Regenerate.
* config.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* Makefile.am: Remove m68k-aout and m68k-coff support.
* configure.tgt: Likewise.
* emultempl/m68kelf.em: Likewise.
* ld.texinfo: Likewise.
* mri.c: Likewise.
* emulparams/delta68.sh: Delete.
* emulparams/hp300bsd.sh: Delete.
* emulparams/hp3hpux.sh: Delete.
* emulparams/m68k4knbsd.sh: Delete.
* emulparams/m68kaout.sh: Delete.
* emulparams/m68kaux.sh: Delete.
* emulparams/m68kcoff.sh: Delete.
* emulparams/m68klinux.sh: Delete.
* emulparams/m68knbsd.sh: Delete.
* emulparams/m68kpsos.sh: Delete.
* emulparams/sun3.sh: Delete.
* emultempl/m68kcoff.em: Delete.
* scripttempl/delta68.sc: Delete.
* scripttempl/m68kaux.sc: Delete.
* scripttempl/m68kcoff.sc: Delete.
* scripttempl/psos.sc: Delete.
* testsuite/ld-versados/t1-1.ro: Delete.
* testsuite/ld-versados/t1-2.ro: Delete.
* testsuite/ld-versados/t1.ld: Delete.
* testsuite/ld-versados/t1.ook: Delete.
* testsuite/ld-versados/t2-1.ro: Delete.
* testsuite/ld-versados/t2-2.ro: Delete.
* testsuite/ld-versados/t2-3.ro: Delete.
* testsuite/ld-versados/t2.ld: Delete.
* testsuite/ld-versados/t2.ook: Delete.
* testsuite/ld-versados/versados.exp: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:31:36 +09:30
211dc24b87
Remove sh5 and sh64 support
...
include/
* dis-asm.h: Remove sh5 and sh64 support.
bfd/
* Makefile.am: Remove sh5 and sh64 support.
* archures.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* cpu-sh.c: Likewise.
* elf32-sh-relocs.h: Likewise.
* elf32-sh.c: Likewise.
* targets.c: Likewise.
* elf32-sh64-com.c: Delete.
* elf32-sh64.c: Delete.
* elf32-sh64.h: Delete.
* elf64-sh64.c: Delete.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
opcodes/
* Makefile.am: Remove sh5 and sh64 support.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* sh-dis.c: Likewise.
* sh64-dis.c: Delete.
* sh64-opc.c: Delete.
* sh64-opc.h: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
bintuils/
* testsuite/binutils-all/objcopy.exp: Remove sh5 and sh64 support.
gas/
* Makefile.am: Remove sh5 and sh64 support.
* config/tc-sh.c: Likewise.
* configure.tgt: Likewise.
* doc/Makefile.am: Likewise.
* doc/as.texinfo: Likewise.
* testsuite/gas/cfi/cfi.exp: Likewise.
* testsuite/gas/sh/basic.exp: Likewise.
* config/tc-sh64.c: Delete.
* config/tc-sh64.h: Delete.
* doc/c-sh64.texi: Delete.
* testsuite/gas/sh/sh64/abi-32.d: Delete.
* testsuite/gas/sh/sh64/abi-32.s: Delete.
* testsuite/gas/sh/sh64/abi-64.d: Delete.
* testsuite/gas/sh/sh64/abi-64.s: Delete.
* testsuite/gas/sh/sh64/basic-1.d: Delete.
* testsuite/gas/sh/sh64/basic-1.s: Delete.
* testsuite/gas/sh/sh64/case-1.d: Delete.
* testsuite/gas/sh/sh64/case-1.s: Delete.
* testsuite/gas/sh/sh64/case-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/crange1-1.d: Delete.
* testsuite/gas/sh/sh64/crange1-2.d: Delete.
* testsuite/gas/sh/sh64/crange1.s: Delete.
* testsuite/gas/sh/sh64/crange2-1.d: Delete.
* testsuite/gas/sh/sh64/crange2-2.d: Delete.
* testsuite/gas/sh/sh64/crange2-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/crange2.s: Delete.
* testsuite/gas/sh/sh64/crange3-1.d: Delete.
* testsuite/gas/sh/sh64/crange3.s: Delete.
* testsuite/gas/sh/sh64/crange4-1.d: Delete.
* testsuite/gas/sh/sh64/crange4.s: Delete.
* testsuite/gas/sh/sh64/crange5-1.d: Delete.
* testsuite/gas/sh/sh64/crange5.s: Delete.
* testsuite/gas/sh/sh64/creg-1.d: Delete.
* testsuite/gas/sh/sh64/creg-1.s: Delete.
* testsuite/gas/sh/sh64/creg-2.d: Delete.
* testsuite/gas/sh/sh64/creg-2.s: Delete.
* testsuite/gas/sh/sh64/datal-1.s: Delete.
* testsuite/gas/sh/sh64/datal-2.d: Delete.
* testsuite/gas/sh/sh64/datal-2.s: Delete.
* testsuite/gas/sh/sh64/datal-3.s: Delete.
* testsuite/gas/sh/sh64/datal32-1.d: Delete.
* testsuite/gas/sh/sh64/datal32-3.d: Delete.
* testsuite/gas/sh/sh64/datal64-1.d: Delete.
* testsuite/gas/sh/sh64/datal64-3.d: Delete.
* testsuite/gas/sh/sh64/eh-1.d: Delete.
* testsuite/gas/sh/sh64/eh-1.s: Delete.
* testsuite/gas/sh/sh64/endian-1.d: Delete.
* testsuite/gas/sh/sh64/endian-1.s: Delete.
* testsuite/gas/sh/sh64/endian-2.d: Delete.
* testsuite/gas/sh/sh64/endian-2.s: Delete.
* testsuite/gas/sh/sh64/err-1.s: Delete.
* testsuite/gas/sh/sh64/err-2.s: Delete.
* testsuite/gas/sh/sh64/err-3.s: Delete.
* testsuite/gas/sh/sh64/err-4.s: Delete.
* testsuite/gas/sh/sh64/err-abi-32.s: Delete.
* testsuite/gas/sh/sh64/err-abi-64.s: Delete.
* testsuite/gas/sh/sh64/err-dsp.s: Delete.
* testsuite/gas/sh/sh64/err-movi-noexp-1.s: Delete.
* testsuite/gas/sh/sh64/err-noexp-cmd1.s: Delete.
* testsuite/gas/sh/sh64/err-pt-1.s: Delete.
* testsuite/gas/sh/sh64/err-pt32-cmd1.s: Delete.
* testsuite/gas/sh/sh64/err-pt32-cmd2.s: Delete.
* testsuite/gas/sh/sh64/err-pt32-cmd3.s: Delete.
* testsuite/gas/sh/sh64/err-ptb-1.s: Delete.
* testsuite/gas/sh/sh64/err-ptb-2.s: Delete.
* testsuite/gas/sh/sh64/err.exp: Delete.
* testsuite/gas/sh/sh64/immexpr1.s: Delete.
* testsuite/gas/sh/sh64/immexpr2.s: Delete.
* testsuite/gas/sh/sh64/immexpr32-1.d: Delete.
* testsuite/gas/sh/sh64/immexpr32-2.d: Delete.
* testsuite/gas/sh/sh64/immexpr64-1.d: Delete.
* testsuite/gas/sh/sh64/immexpr64-2.d: Delete.
* testsuite/gas/sh/sh64/lineno.d: Delete.
* testsuite/gas/sh/sh64/lineno.s: Delete.
* testsuite/gas/sh/sh64/localcom-1.d: Delete.
* testsuite/gas/sh/sh64/localcom-1.s: Delete.
* testsuite/gas/sh/sh64/mix-1.d: Delete.
* testsuite/gas/sh/sh64/mix-1.s: Delete.
* testsuite/gas/sh/sh64/mix-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/movi-1.s: Delete.
* testsuite/gas/sh/sh64/movi-2.s: Delete.
* testsuite/gas/sh/sh64/movi-3.d: Delete.
* testsuite/gas/sh/sh64/movi-3.s: Delete.
* testsuite/gas/sh/sh64/movi32-1.d: Delete.
* testsuite/gas/sh/sh64/movi32-2.d: Delete.
* testsuite/gas/sh/sh64/movi32-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/movi64-1.d: Delete.
* testsuite/gas/sh/sh64/movi64-2.d: Delete.
* testsuite/gas/sh/sh64/movi64-2.s: Delete.
* testsuite/gas/sh/sh64/movi64-3.d: Delete.
* testsuite/gas/sh/sh64/movi64-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/pt-1.d: Delete.
* testsuite/gas/sh/sh64/pt-1.s: Delete.
* testsuite/gas/sh/sh64/pt-2.s: Delete.
* testsuite/gas/sh/sh64/pt-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/pt32-1.d: Delete.
* testsuite/gas/sh/sh64/pt32-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/pt64-1.d: Delete.
* testsuite/gas/sh/sh64/pt64-32-1.d: Delete.
* testsuite/gas/sh/sh64/pt64-32-2.d: Delete.
* testsuite/gas/sh/sh64/pt64-noexp-2.d: Delete.
* testsuite/gas/sh/sh64/ptc-1.s: Delete.
* testsuite/gas/sh/sh64/ptc32-1.d: Delete.
* testsuite/gas/sh/sh64/ptc32-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/ptc64-1.d: Delete.
* testsuite/gas/sh/sh64/ptc64-32-1.d: Delete.
* testsuite/gas/sh/sh64/ptc64-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/ptext-1.s: Delete.
* testsuite/gas/sh/sh64/ptext32-1.d: Delete.
* testsuite/gas/sh/sh64/ptext32-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/ptext64-1.d: Delete.
* testsuite/gas/sh/sh64/ptext64-32-1.d: Delete.
* testsuite/gas/sh/sh64/ptext64-noexp-1.d: Delete.
* testsuite/gas/sh/sh64/rel-1.s: Delete.
* testsuite/gas/sh/sh64/rel-2.s: Delete.
* testsuite/gas/sh/sh64/rel-3.s: Delete.
* testsuite/gas/sh/sh64/rel-4.s: Delete.
* testsuite/gas/sh/sh64/rel-5.s: Delete.
* testsuite/gas/sh/sh64/rel32-1.d: Delete.
* testsuite/gas/sh/sh64/rel32-2.d: Delete.
* testsuite/gas/sh/sh64/rel32-3.d: Delete.
* testsuite/gas/sh/sh64/rel32-4.d: Delete.
* testsuite/gas/sh/sh64/rel32-5.d: Delete.
* testsuite/gas/sh/sh64/rel64-1.d: Delete.
* testsuite/gas/sh/sh64/rel64-2.d: Delete.
* testsuite/gas/sh/sh64/rel64-3.d: Delete.
* testsuite/gas/sh/sh64/rel64-4.d: Delete.
* testsuite/gas/sh/sh64/rel64-5.d: Delete.
* testsuite/gas/sh/sh64/relax-1.d: Delete.
* testsuite/gas/sh/sh64/relax-1.s: Delete.
* testsuite/gas/sh/sh64/relax-2.d: Delete.
* testsuite/gas/sh/sh64/relax-2.s: Delete.
* testsuite/gas/sh/sh64/relax-3.d: Delete.
* testsuite/gas/sh/sh64/relax-3.s: Delete.
* testsuite/gas/sh/sh64/sh64.exp: Delete.
* testsuite/gas/sh/sh64/shift-1.s: Delete.
* testsuite/gas/sh/sh64/shift-2.s: Delete.
* testsuite/gas/sh/sh64/shift-3.s: Delete.
* testsuite/gas/sh/sh64/shift32-1.d: Delete.
* testsuite/gas/sh/sh64/shift32-3.d: Delete.
* testsuite/gas/sh/sh64/shift32-noexp-3.d: Delete.
* testsuite/gas/sh/sh64/shift64-1.d: Delete.
* testsuite/gas/sh/sh64/shift64-2.d: Delete.
* testsuite/gas/sh/sh64/shift64-3.d: Delete.
* testsuite/gas/sh/sh64/shift64-noexp-3.d: Delete.
* testsuite/gas/sh/sh64/syntax-1.d: Delete.
* testsuite/gas/sh/sh64/syntax-1.s: Delete.
* testsuite/gas/sh/sh64/syntax-2.d: Delete.
* testsuite/gas/sh/sh64/syntax-2.s: Delete.
* testsuite/gas/sh/sh64/ua-1.s: Delete.
* testsuite/gas/sh/sh64/ua32-1.d: Delete.
* testsuite/gas/sh/sh64/ua64-1.d: Delete.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* Makefile.am: Remove sh5 and sh64 support.
* configure.tgt: Likewise.
* ldlang.c: Likewise.
* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
* testsuite/ld-gc/gc.exp: Likewise.
* testsuite/ld-gc/pr13683.d: Likewise.
* testsuite/ld-scripts/crossref.exp: Likewise.
* testsuite/ld-selective/selective.exp: Likewise.
* testsuite/ld-sh/ld-r-1.d: Likewise.
* testsuite/ld-sh/rd-sh.exp: Likewise.
* testsuite/ld-sh/sh.exp: Likewise.
* testsuite/ld-srec/srec.exp: Likewise.
* testsuite/ld-undefined/undefined.exp: Likewise.
* emulparams/shelf32.sh: Delete.
* emulparams/shelf32_linux.sh: Delete.
* emulparams/shelf32_nbsd.sh: Delete.
* emulparams/shelf64.sh: Delete.
* emulparams/shelf64_nbsd.sh: Delete.
* emulparams/shlelf32.sh: Delete.
* emulparams/shlelf32_linux.sh: Delete.
* emulparams/shlelf32_nbsd.sh: Delete.
* emulparams/shlelf64.sh: Delete.
* emulparams/shlelf64_nbsd.sh: Delete.
* emultempl/sh64elf.em: Delete.
* testsuite/ld-sh/sh64/abi32.sd: Delete.
* testsuite/ld-sh/sh64/abi32.xd: Delete.
* testsuite/ld-sh/sh64/abi64.sd: Delete.
* testsuite/ld-sh/sh64/abi64.xd: Delete.
* testsuite/ld-sh/sh64/abixx-noexp.sd: Delete.
* testsuite/ld-sh/sh64/cmpct1.sd: Delete.
* testsuite/ld-sh/sh64/cmpct1.xd: Delete.
* testsuite/ld-sh/sh64/crange-1.s: Delete.
* testsuite/ld-sh/sh64/crange-2a.s: Delete.
* testsuite/ld-sh/sh64/crange-2b.s: Delete.
* testsuite/ld-sh/sh64/crange-2c.s: Delete.
* testsuite/ld-sh/sh64/crange-2d.s: Delete.
* testsuite/ld-sh/sh64/crange-2e.s: Delete.
* testsuite/ld-sh/sh64/crange-2f.s: Delete.
* testsuite/ld-sh/sh64/crange-2g.s: Delete.
* testsuite/ld-sh/sh64/crange-2h.s: Delete.
* testsuite/ld-sh/sh64/crange-2i.s: Delete.
* testsuite/ld-sh/sh64/crange1.rd: Delete.
* testsuite/ld-sh/sh64/crange2.rd: Delete.
* testsuite/ld-sh/sh64/crange3-cmpct.rd: Delete.
* testsuite/ld-sh/sh64/crange3-media.rd: Delete.
* testsuite/ld-sh/sh64/crange3.dd: Delete.
* testsuite/ld-sh/sh64/crange3.rd: Delete.
* testsuite/ld-sh/sh64/crangerel1.rd: Delete.
* testsuite/ld-sh/sh64/crangerel2.rd: Delete.
* testsuite/ld-sh/sh64/dlsection-1.s: Delete.
* testsuite/ld-sh/sh64/dlsection.sd: Delete.
* testsuite/ld-sh/sh64/endian.dbd: Delete.
* testsuite/ld-sh/sh64/endian.dld: Delete.
* testsuite/ld-sh/sh64/endian.ld: Delete.
* testsuite/ld-sh/sh64/endian.s: Delete.
* testsuite/ld-sh/sh64/endian.sbd: Delete.
* testsuite/ld-sh/sh64/endian.sld: Delete.
* testsuite/ld-sh/sh64/gotplt.d: Delete.
* testsuite/ld-sh/sh64/gotplt.map: Delete.
* testsuite/ld-sh/sh64/gotplt.s: Delete.
* testsuite/ld-sh/sh64/init-cmpct.d: Delete.
* testsuite/ld-sh/sh64/init-media.d: Delete.
* testsuite/ld-sh/sh64/init.s: Delete.
* testsuite/ld-sh/sh64/init64.d: Delete.
* testsuite/ld-sh/sh64/mix1-noexp.sd: Delete.
* testsuite/ld-sh/sh64/mix1.sd: Delete.
* testsuite/ld-sh/sh64/mix1.xd: Delete.
* testsuite/ld-sh/sh64/mix2-noexp.sd: Delete.
* testsuite/ld-sh/sh64/mix2.sd: Delete.
* testsuite/ld-sh/sh64/mix2.xd: Delete.
* testsuite/ld-sh/sh64/rd-sh64.exp: Delete.
* testsuite/ld-sh/sh64/rel-1.s: Delete.
* testsuite/ld-sh/sh64/rel-2.s: Delete.
* testsuite/ld-sh/sh64/rel32.xd: Delete.
* testsuite/ld-sh/sh64/rel64.xd: Delete.
* testsuite/ld-sh/sh64/relax.exp: Delete.
* testsuite/ld-sh/sh64/relax1.s: Delete.
* testsuite/ld-sh/sh64/relax2.s: Delete.
* testsuite/ld-sh/sh64/relax3.s: Delete.
* testsuite/ld-sh/sh64/relax4.s: Delete.
* testsuite/ld-sh/sh64/reldl-1.s: Delete.
* testsuite/ld-sh/sh64/reldl-2.s: Delete.
* testsuite/ld-sh/sh64/reldl32.rd: Delete.
* testsuite/ld-sh/sh64/reldl64.rd: Delete.
* testsuite/ld-sh/sh64/relfail.exp: Delete.
* testsuite/ld-sh/sh64/relfail.s: Delete.
* testsuite/ld-sh/sh64/sh64-1.s: Delete.
* testsuite/ld-sh/sh64/sh64-2.s: Delete.
* testsuite/ld-sh/sh64/sh64.exp: Delete.
* testsuite/ld-sh/sh64/shcmp-1.s: Delete.
* testsuite/ld-sh/sh64/shdl-1.s: Delete.
* testsuite/ld-sh/sh64/shdl-2.s: Delete.
* testsuite/ld-sh/sh64/shdl32.xd: Delete.
* testsuite/ld-sh/sh64/shdl64.sd: Delete.
* testsuite/ld-sh/sh64/shdl64.xd: Delete.
* testsuite/ld-sh/sh64/shmix-1.s: Delete.
* testsuite/ld-sh/sh64/shmix-2.s: Delete.
* testsuite/ld-sh/sh64/shmix-3.s: Delete.
* testsuite/ld-sh/sh64/stobin-0-dso.d: Delete.
* testsuite/ld-sh/sh64/stobin-1.d: Delete.
* testsuite/ld-sh/sh64/stobin.s: Delete.
* testsuite/ld-sh/sh64/stolib.s: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:29:39 +09:30
4db9937a27
Remove sh-symbianelf support
...
bfd/
* Makefile.am: Remove sh-symbianelf support.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
* elf32-sh-symbian.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
gas/
* config/tc-sh.c: Remove sh-symbianelf support.
* config/tc-sh.h: Likewise.
* configure.ac: Likewise.
* configure.tgt: Likewise.
* testsuite/gas/sh/reg-prefix.d: Likewise.
* testsuite/gas/sh/sh2a-pic.d: Likewise.
* config.in: Regenerate.
* configure: Regenerate.
ld/
* Makefile.am: Remove sh-symbianelf support.
* configure.tgt: Likewise.
* emulparams/shlsymbian.sh: Delete.
* scripttempl/elf32sh-symbian.sc: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:27:45 +09:30
6793974daa
Remove i370 support
...
include/
* elf/i370.h: Delete.
* opcode/i370.h: Delete.
bfd/
* Makefile.am: Remove i370 support.
* archures.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
* cpu-i370.c: Delete.
* elf32-i370.c: Delete.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
opcodes/
* Makefile.am: Remove i370 support.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* i370-dis.c: Delete.
* i370-opc.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
binutils/
* readelf.c: Remove i370 support.
* testsuite/binutils-all/objdump.exp: Likewise.
gas/
* Makefile.am: Remove i370 support.
* app.c: Likewise.
* config/obj-elf.c: Likewise.
* configure.tgt: Likewise.
* doc/Makefile.am: Likewise.
* doc/as.texinfo: Likewise.
* testsuite/gas/all/gas.exp: Likewise.
* testsuite/gas/elf/warn-2.s: Likewise.
* testsuite/gas/lns/lns.exp: Likewise.
* config/tc-i370.c: Delete.
* config/tc-i370.h: Delete.
* doc/c-i370.texi: Delete.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* Makefile.am: Remove i370 support.
* configure.tgt: Likewise.
* testsuite/ld-elf/compressed1d.d: Likewise.
* testsuite/ld-elf/group8a.d: Likewise.
* testsuite/ld-elf/group8b.d: Likewise.
* testsuite/ld-elf/group9a.d: Likewise.
* testsuite/ld-elf/group9b.d: Likewise.
* testsuite/ld-elf/merge.d: Likewise.
* testsuite/ld-elf/pr12851.d: Likewise.
* testsuite/ld-elf/pr12975.d: Likewise.
* testsuite/ld-elf/pr13177.d: Likewise.
* testsuite/ld-elf/pr13195.d: Likewise.
* testsuite/ld-elf/pr17615.d: Likewise.
* testsuite/ld-elf/pr21562a.d: Likewise.
* testsuite/ld-elf/pr21562b.d: Likewise.
* testsuite/ld-elf/pr21562c.d: Likewise.
* testsuite/ld-elf/pr21562d.d: Likewise.
* testsuite/ld-elf/pr21562i.d: Likewise.
* testsuite/ld-elf/pr21562j.d: Likewise.
* testsuite/ld-elf/pr21562k.d: Likewise.
* testsuite/ld-elf/pr21562l.d: Likewise.
* testsuite/ld-elf/pr21562m.d: Likewise.
* testsuite/ld-elf/pr21562n.d: Likewise.
* testsuite/ld-elf/pr22677.d: Likewise.
* testsuite/lib/ld-lib.exp: Likewise.
* emulparams/elf32i370.sh: Delete.
* scripttempl/elfi370.sc: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:21:56 +09:30
e82aa7944d
Remove h8500 support
...
include/
* coff/h8500.h: Delete.
* coff/internal.h: Remove h8500 support.
bfd/
* Makefile.am: Remove h8500 support.
* archures.c: Likewise.
* coffcode.h: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
* coff-h8500.c: Delete.
* cpu-h8500.c: Delete.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
opcodes/
* Makefile.am: Remove h8500 support.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* h8500-dis.c: Delete.
* h8500-opc.h: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
binutils/
* testsuite/binutils-all/objcopy.exp: Remove h8500 support.
* testsuite/lib/binutils-common.exp: Likewise.
gas/
* config/obj-coff.h: Remove h8500 support.
ld/
* Makefile.am: Remove h8500 support.
* configure.tgt: Likewise.
* emulparams/h8500.sh: Delete.
* emulparams/h8500b.sh: Delete.
* emulparams/h8500c.sh: Delete.
* emulparams/h8500m.sh: Delete.
* emulparams/h8500s.sh: Delete.
* scripttempl/h8500.sc: Delete.
* scripttempl/h8500b.sc: Delete.
* scripttempl/h8500c.sc: Delete.
* scripttempl/h8500m.sc: Delete.
* scripttempl/h8500s.sc: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:19:52 +09:30
fe0bf0fd57
Remove h8300-coff support
...
include/
* coff/h8300.h: Delete.
bfd/
* Makefile.am: Remove h8300-coff support.
* coffcode.h: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* reloc16.c: Likewise.
* targets.c: Likewise.
* coff-h8300.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* testsuite/binutils-all/objcopy.exp: Remove h8300-coff support.
gas/
* config/obj-coff.h: Remove h8300-coff support.
* config/tc-h8300.c: Likewise.
* config/tc-h8300.h: Likewise.
* testsuite/gas/h8300/h8300.exp: Likewise.
* testsuite/gas/h8300/branch-coff.s: Delete.
* testsuite/gas/h8300/branchh-coff.s: Delete.
* testsuite/gas/h8300/branchs-coff.s: Delete.
* testsuite/gas/h8300/ffxx1-coff.d: Delete.
* testsuite/gas/h8300/ffxx1-coff.s: Delete.
* testsuite/gas/h8300/h8300-coff.exp: Delete.
ld/
* Makefile.am: Remove h8300-coff support.
* configure.tgt: Likewise.
* testsuite/ld-h8300/h8300.exp: Likewise.
* emulparams/h8300.sh: Delete.
* emulparams/h8300h.sh: Delete.
* emulparams/h8300hn.sh: Delete.
* emulparams/h8300s.sh: Delete.
* emulparams/h8300sn.sh: Delete.
* emulparams/h8300sx.sh: Delete.
* emulparams/h8300sxn.sh: Delete.
* scripttempl/h8300.sc: Delete.
* scripttempl/h8300h.sc: Delete.
* scripttempl/h8300hn.sc: Delete.
* scripttempl/h8300s.sc: Delete.
* scripttempl/h8300sn.sc: Delete.
* scripttempl/h8300sx.sc: Delete.
* scripttempl/h8300sxn.sc: Delete.
* testsuite/ld-h8300/relax-3-coff.d: Delete.
* testsuite/ld-h8300/relax-4-coff.d: Delete.
* testsuite/ld-h8300/relax-5-coff.d: Delete.
* testsuite/ld-h8300/relax-6-coff.d: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:17:57 +09:30
b4b594e304
Remove netware support
...
include/
* nlm/ChangeLog-9315: Delete.
* nlm/alpha-ext.h: Delete.
* nlm/common.h: Delete.
* nlm/external.h: Delete.
* nlm/i386-ext.h: Delete.
* nlm/internal.h: Delete.
* nlm/ppc-ext.h: Delete.
* nlm/sparc32-ext.h: Delete.
bfd/
* Makefile.am: Remove netware support.
* bfd-in.h: Likewise.
* bfd.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* doc/bfdint.texi: Likewise.
* ecoff.c: Likewise.
* targets.c: Likewise.
* libnlm.h: Delete.
* nlm-target.h: Delete.
* nlm.c: Delete.
* nlm32-alpha.c: Delete.
* nlm32-i386.c: Delete.
* nlm32-ppc.c: Delete.
* nlm32-sparc.c: Delete.
* nlm32.c: Delete.
* nlm64.c: Delete.
* nlmcode.h: Delete.
* nlmswap.h: Delete.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* .gitignore: Remove netware support.
* Makefile.am: Likewise.
* configure.ac: Likewise.
* doc/Makefile.am: Likewise.
* doc/binutils.texi: Likewise.
* testsuite/binutils-all/nm.exp: Likewise.
* nlmconv.c: Delete.
* nlmconv.h: Delete.
* nlmheader.y: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
gas/
* Makefile.am: Remove netware support.
* config/tc-i386.c: Likewise.
* configure.tgt: Likewise.
* config/te-netware.h: Delete.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
gprof/
* corefile.c: Remove netware support.
ld/
* Makefile.am: Remove netware support.
* configure.tgt: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Likewise.
* emulparams/i386nw.sh: Delete.
* emulparams/ppcnw.sh: Delete.
* scripttempl/nw.sc: Delete.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-16 15:11:22 +09:30
de89d0a34d
Enable Intel WAITPKG instructions.
...
Intel has disclosed a set of new instructions for Tremont processor.
The spec is
https://software.intel.com/en-us/intel-architecture-instruction-set-extensions-programming-reference
This patch enables Intel WAITPKG instructions.
gas/
* config/tc-i386.c (cpu_arch): Add WAITPKG.
(cpu_noarch): Likewise.
* doc/c-i386.texi: Document WAITPKG.
* i386/i386.exp: Run WAITPKG tests.
* testsuite/gas/i386/waitpkg-intel.d: New test.
* testsuite/gas/i386/waitpkg.d: Likewise.
* testsuite/gas/i386/waitpkg.s: Likewise.
* testsuite/gas/i386/x86-64-waitpkg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-waitpkg.d: Likewise.
* testsuite/gas/i386/x86-64-waitpkg.s: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
PREFIX_MOD_1_0FAE_REG_6.
(va_mode): New.
(OP_E_register): Use va_mode.
* i386-dis-evex.h (prefix_table):
New instructions (see prefixes above).
* i386-gen.c (cpu_flag_init): Add WAITPKG.
(cpu_flags): Likewise.
* i386-opc.h (enum): Likewise.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add umonitor, umwait, tpause.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
2018-04-11 21:37:12 +02:00
a8eb42a8b7
Remove i860, i960, bout and aout-adobe targets
...
Plus remove a few leftovers from the 29k support.
include/
* aout/adobe.h: Delete.
* aout/reloc.h: Delete.
* coff/i860.h: Delete.
* coff/i960.h: Delete.
* elf/i860.h: Delete.
* elf/i960.h: Delete.
* opcode/i860.h: Delete.
* opcode/i960.h: Delete.
* aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
* aout/ar.h (ARMAGB): Remove.
* coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
union internal_auxent): Remove i960 support.
bfd/
* aout-adobe.c: Delete.
* bout.c: Delete.
* coff-i860.c: Delete.
* coff-i960.c: Delete.
* cpu-i860.c: Delete.
* cpu-i960.c: Delete.
* elf32-i860.c: Delete.
* elf32-i960.c: Delete.
* hosts/i860mach3.h: Delete.
* Makefile.am: Remove i860, i960, bout, and adobe support.
* archures.c: Remove i860 and i960 support.
* coffcode.h: Likewise.
* reloc.c: Likewise.
* aoutx.h: Comment updates.
* archive.c: Remove BOUT and i960 support.
* bfd.c: Remove BOUT support.
* coffswap.h: Remove i960 support.
* config.bfd: Remove i860, i960 and adobe targets.
* configure.ac: Remove adode, bout, i860, i960, icoff targets.
* targets.c: Likewise.
* ieee.c: Remove i960 support.
* mach-o.c: Remove i860 support.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
opcodes/
* opcodes/i860-dis.c: Delete.
* opcodes/i960-dis.c: Delete.
* Makefile.am: Remove i860 and i960 support.
* configure.ac: Likewise.
* disassemble.c: Likewise.
* disassemble.h: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
binutils/
* ieee.c: Remove i960 support.
* od-macho.c: Remove i860 support.
* readelf.c: Remove i860 and i960 support.
* testsuite/binutils-all/objcopy.exp: Likewise.
* testsuite/binutils-all/objdump.exp: Likewise.
* testsuite/lib/binutils-common.exp: Likewise.
gas/
* config/aout_gnu.h: Delete.
* config/tc-i860.c: Delete.
* config/tc-i860.h: Delete.
* config/tc-i960.c: Delete.
* config/tc-i960.h: Delete.
* doc/c-i860.texi: Delete.
* doc/c-i960.texi: Delete.
* testsuite/gas/i860/README.i860: Delete.
* testsuite/gas/i860/bitwise.d: Delete.
* testsuite/gas/i860/bitwise.s: Delete.
* testsuite/gas/i860/branch.d: Delete.
* testsuite/gas/i860/branch.s: Delete.
* testsuite/gas/i860/bte.d: Delete.
* testsuite/gas/i860/bte.s: Delete.
* testsuite/gas/i860/dir-align01.d: Delete.
* testsuite/gas/i860/dir-align01.s: Delete.
* testsuite/gas/i860/dir-intel01.d: Delete.
* testsuite/gas/i860/dir-intel01.s: Delete.
* testsuite/gas/i860/dir-intel02.d: Delete.
* testsuite/gas/i860/dir-intel02.s: Delete.
* testsuite/gas/i860/dir-intel03-err.l: Delete.
* testsuite/gas/i860/dir-intel03-err.s: Delete.
* testsuite/gas/i860/dual01.d: Delete.
* testsuite/gas/i860/dual01.s: Delete.
* testsuite/gas/i860/dual02-err.l: Delete.
* testsuite/gas/i860/dual02-err.s: Delete.
* testsuite/gas/i860/dual03.d: Delete.
* testsuite/gas/i860/dual03.s: Delete.
* testsuite/gas/i860/fldst01.d: Delete.
* testsuite/gas/i860/fldst01.s: Delete.
* testsuite/gas/i860/fldst02.d: Delete.
* testsuite/gas/i860/fldst02.s: Delete.
* testsuite/gas/i860/fldst03.d: Delete.
* testsuite/gas/i860/fldst03.s: Delete.
* testsuite/gas/i860/fldst04.d: Delete.
* testsuite/gas/i860/fldst04.s: Delete.
* testsuite/gas/i860/fldst05.d: Delete.
* testsuite/gas/i860/fldst05.s: Delete.
* testsuite/gas/i860/fldst06.d: Delete.
* testsuite/gas/i860/fldst06.s: Delete.
* testsuite/gas/i860/fldst07.d: Delete.
* testsuite/gas/i860/fldst07.s: Delete.
* testsuite/gas/i860/fldst08.d: Delete.
* testsuite/gas/i860/fldst08.s: Delete.
* testsuite/gas/i860/float01.d: Delete.
* testsuite/gas/i860/float01.s: Delete.
* testsuite/gas/i860/float02.d: Delete.
* testsuite/gas/i860/float02.s: Delete.
* testsuite/gas/i860/float03.d: Delete.
* testsuite/gas/i860/float03.s: Delete.
* testsuite/gas/i860/float04.d: Delete.
* testsuite/gas/i860/float04.s: Delete.
* testsuite/gas/i860/form.d: Delete.
* testsuite/gas/i860/form.s: Delete.
* testsuite/gas/i860/i860.exp: Delete.
* testsuite/gas/i860/iarith.d: Delete.
* testsuite/gas/i860/iarith.s: Delete.
* testsuite/gas/i860/ldst01.d: Delete.
* testsuite/gas/i860/ldst01.s: Delete.
* testsuite/gas/i860/ldst02.d: Delete.
* testsuite/gas/i860/ldst02.s: Delete.
* testsuite/gas/i860/ldst03.d: Delete.
* testsuite/gas/i860/ldst03.s: Delete.
* testsuite/gas/i860/ldst04.d: Delete.
* testsuite/gas/i860/ldst04.s: Delete.
* testsuite/gas/i860/ldst05.d: Delete.
* testsuite/gas/i860/ldst05.s: Delete.
* testsuite/gas/i860/ldst06.d: Delete.
* testsuite/gas/i860/ldst06.s: Delete.
* testsuite/gas/i860/pfam.d: Delete.
* testsuite/gas/i860/pfam.s: Delete.
* testsuite/gas/i860/pfmam.d: Delete.
* testsuite/gas/i860/pfmam.s: Delete.
* testsuite/gas/i860/pfmsm.d: Delete.
* testsuite/gas/i860/pfmsm.s: Delete.
* testsuite/gas/i860/pfsm.d: Delete.
* testsuite/gas/i860/pfsm.s: Delete.
* testsuite/gas/i860/pseudo-ops01.d: Delete.
* testsuite/gas/i860/pseudo-ops01.s: Delete.
* testsuite/gas/i860/regress01.d: Delete.
* testsuite/gas/i860/regress01.s: Delete.
* testsuite/gas/i860/shift.d: Delete.
* testsuite/gas/i860/shift.s: Delete.
* testsuite/gas/i860/simd.d: Delete.
* testsuite/gas/i860/simd.s: Delete.
* testsuite/gas/i860/system.d: Delete.
* testsuite/gas/i860/system.s: Delete.
* testsuite/gas/i860/xp.d: Delete.
* testsuite/gas/i860/xp.s: Delete.
* Makefile.am: Remove i860 and i960 support.
* configure.tgt: Likewise.
* doc/Makefile.am: Likewise.
* doc/all.texi: Likewise.
* testsuite/gas/all/gas.exp
* config/obj-coff.h: Remove i960 support.
* doc/internals.texi: Likewise.
* expr.c: Likewise.
* read.c: Likewise.
* write.c: Likewise.
* write.h: Likewise.
* testsuite/gas/lns/lns.exp: Likewise.
* testsuite/gas/symver/symver.exp: Likewise.
* config/tc-m68k.c: Remove BOUT support.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sparc.c: Likewise.
* symbols.c: Likewise.
* doc/h8.texi: Likewise.
* configure.ac: Remove BOUT and i860 support.
* doc/as.texinfo: Remove BOUT, i860 and i960 support
* Makefile.in: Regenerate.
* config.in: Regenerate.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
ld/
* emulparams/coff_i860.sh: Delete.
* emulparams/elf32_i860.sh: Delete.
* emulparams/elf32_i960.sh: Delete.
* emulparams/gld960.sh: Delete.
* emulparams/gld960coff.sh: Delete.
* emulparams/lnk960.sh: Delete.
* emultempl/gld960.em: Delete.
* emultempl/gld960c.em: Delete.
* emultempl/lnk960.em: Delete.
* scripttempl/i860coff.sc: Delete.
* scripttempl/i960.sc: Delete.
* ld.texinfo: Remove i960 support.
* Makefile.am: Remove i860 and i960 support.
* configure.tgt: Likewise.
* testsuite/ld-discard/extern.d: Likewise.
* testsuite/ld-discard/start.d: Likewise.
* testsuite/ld-discard/static.d: Likewise.
* testsuite/ld-elf/compressed1d.d: Likewise.
* testsuite/ld-elf/group1.d: Likewise.
* testsuite/ld-elf/group3b.d: Likewise.
* testsuite/ld-elf/group8a.d: Likewise.
* testsuite/ld-elf/group8b.d: Likewise.
* testsuite/ld-elf/group9a.d: Likewise.
* testsuite/ld-elf/group9b.d: Likewise.
* testsuite/ld-elf/linkonce2.d: Likewise.
* testsuite/ld-elf/merge.d: Likewise.
* testsuite/ld-elf/merge2.d: Likewise.
* testsuite/ld-elf/merge3.d: Likewise.
* testsuite/ld-elf/orphan-10.d: Likewise.
* testsuite/ld-elf/orphan-11.d: Likewise.
* testsuite/ld-elf/orphan-12.d: Likewise.
* testsuite/ld-elf/orphan-9.d: Likewise.
* testsuite/ld-elf/orphan-region.d: Likewise.
* testsuite/ld-elf/orphan.d: Likewise.
* testsuite/ld-elf/orphan3.d: Likewise.
* testsuite/ld-elf/pr12851.d: Likewise.
* testsuite/ld-elf/pr12975.d: Likewise.
* testsuite/ld-elf/pr13177.d: Likewise.
* testsuite/ld-elf/pr13195.d: Likewise.
* testsuite/ld-elf/pr17550a.d: Likewise.
* testsuite/ld-elf/pr17550b.d: Likewise.
* testsuite/ld-elf/pr17550c.d: Likewise.
* testsuite/ld-elf/pr17550d.d: Likewise.
* testsuite/ld-elf/pr17615.d: Likewise.
* testsuite/ld-elf/pr20528a.d: Likewise.
* testsuite/ld-elf/pr20528b.d: Likewise.
* testsuite/ld-elf/pr21562a.d: Likewise.
* testsuite/ld-elf/pr21562b.d: Likewise.
* testsuite/ld-elf/pr21562c.d: Likewise.
* testsuite/ld-elf/pr21562d.d: Likewise.
* testsuite/ld-elf/pr21562i.d: Likewise.
* testsuite/ld-elf/pr21562j.d: Likewise.
* testsuite/ld-elf/pr21562k.d: Likewise.
* testsuite/ld-elf/pr21562l.d: Likewise.
* testsuite/ld-elf/pr21562m.d: Likewise.
* testsuite/ld-elf/pr21562n.d: Likewise.
* testsuite/ld-elf/pr22677.d: Likewise.
* testsuite/ld-elf/pr22836-1a.d: Likewise.
* testsuite/ld-elf/pr22836-1b.d: Likewise.
* testsuite/ld-elf/pr349.d: Likewise.
* testsuite/ld-elf/sec-to-seg.exp: Likewise.
* testsuite/ld-elf/sec64k.exp: Likewise.
* testsuite/ld-elf/warn1.d: Likewise.
* testsuite/ld-elf/warn2.d: Likewise.
* testsuite/ld-elf/warn3.d: Likewise.
* testsuite/lib/ld-lib.exp: Likewise.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
2018-04-11 21:49:30 +09:30
f2ab4b4206
Make power8 the default cpu when assembling for 64-bit little endian targets.
...
gas/
PR binutils/23013
* config/tc-ppc.c (ppc_set_cpu): Select appropriate cpu when ppc_obj64
and little endian.
2018-03-30 08:33:27 -05:00
84f1b9fb08
[1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 support in GAS.
...
This patch adds the following relocation support into binutils gas.
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12,
BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
Those relocations includes both ip64 and ilp32 variant.
2018-03-28 18:03:55 +01:00
c39e5b2671
x86: drop VecESize
...
It again can be inferred from other information.
The vpopcntd templates all need to have Dword added to their memory
operands; the lack thereof was actually a bug preventing certain Intel
syntax code to assemble, so test cases get extended.
2018-03-28 14:25:07 +02:00
8e6e0792d1
x86: convert broadcast insn attribute to boolean
...
The (only) valid broadcast type for an insn can be inferred from other
information.
2018-03-28 14:24:05 +02:00
9f123b911e
x86: fold to-scalar-int conversion insns
2018-03-28 14:22:56 +02:00
c8d59609b1
Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+REG addressing with an assumed offset register.
...
PR 22988
opcode * opcode/aarch64.h (enum aarch64_opnd): Add
AARCH64_OPND_SVE_ADDR_R.
opcodes * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
instructions with only a base address register.
* aarch64-opc.c (operand_general_constraint_met_p): Add code to
handle AARHC64_OPND_SVE_ADDR_R.
(aarch64_print_operand): Likewise.
* aarch64-asm-2.c: Regenerate.
* aarch64_dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
gas * config/tc-aarch64.c (parse_operands): Add code to handle
AARCH64_OPN_SVE_ADDR_R.
* testsuite/gas/aarch64/sve.s: Add tests for LDFF1xx instructions
with an assumed XZR offset address register.
* testsuite/gas/aarch64/sve.d: Update expected disassembly.
2018-03-28 09:44:45 +01:00
32546502f3
x86: use local variable in check_VecOperands()
...
This is just to make a subsequent change a little easier to read.
2018-03-22 08:47:16 +01:00
1212781b35
ix86: allow HLE store of accumulator to absolute address
...
Since they're shorter to encode, the 0xa0...0xa3 encodings are preferred
for moves between accumulator and absolute address outside of 64-bit
mode. With HLE release semantics this encoding is unsupported though,
with the assembler raising an error. The operation is valid though, we
merely need to pick the longer encoding in that case.
2018-03-22 08:33:38 +01:00
d6793fa1ac
x86/Intel: fix fallout from earlier template folding
...
While many templates allowing multiple suitably matching XMM/YMM/ZMM
operand sizes can be folded, a few need to be split in order to not
wrongly accept "xmmword ptr" operands when only XMM registers are
permitted (and memory operands are more narrow). Add a test case
validating this.
2018-03-22 08:31:43 +01:00
f776822506
x86: fold a few XOP templates
...
Also add a new test case verifying that mixed operands of SIMD insns
with a size-less memory operand in the middle are properly rejected.
2018-03-22 08:29:45 +01:00
ca2fd32c55
RISC-V: Emit better warning for unknown CSR.
...
gas/
* config/tc-riscv.c (check_absolute_expr): Expand comment. New
parameter maybe_csr. If maybe_csr and O_symbol, print CSR name.
(riscv_ip): Add new argument to check_absolute_expr calls.
* testsuite/gas/riscv/bad-csr.d: New.
* testsuite/gas/riscv/bad-csr.l: New.
* testsuite/gas/riscv/bad-csr.s: New.
2018-03-16 10:03:57 -07:00
0e35537d75
RISC-V: Add .insn support.
...
gas/ChangeLog
2018-03-07 Kito Cheng <kito.cheng@gmail.com>
* config/tc-riscv.c (opcode_name_list): New.
(opcode_names_hash): Likewise.
(init_opcode_names_hash): Likewise.
(opcode_name_lookup): Likewise.
(validate_riscv_insn): New argument length, and add new format
which used in .insn directive.
(md_begin): Refine hash table initialization logic into
init_opcode_hash.
(init_opcode_hash): New.
(my_getOpcodeExpression): Parse opcode name for .insn.
(riscv_ip): New argument hash, able to handle .insn directive.
(s_riscv_insn): Handler for .insn directive.
(riscv_pseudo_table): New entry for .insn.
* doc/c-riscv.texi: Add documentation for .insn directive.
* testsuite/gas/riscv/insn.d: Add testcase for .insn directive.
* testsuite/gas/riscv/insn.s: Likewise.
include/ChangeLog
2018-03-07 Kito Cheng <kito.cheng@gmail.com>
* opcode/riscv.h (OP_MASK_FUNCT3): New.
(OP_SH_FUNCT3): Likewise.
(OP_MASK_FUNCT7): Likewise.
(OP_SH_FUNCT7): Likewise.
(OP_MASK_OP2): Likewise.
(OP_SH_OP2): Likewise.
(OP_MASK_CFUNCT4): Likewise.
(OP_SH_CFUNCT4): Likewise.
(OP_MASK_CFUNCT3): Likewise.
(OP_SH_CFUNCT3): Likewise.
(riscv_insn_types): Likewise.
opcodes/ChangeLog
2018-03-07 Kito Cheng <kito.cheng@gmail.com>
* riscv-opc.c (riscv_insn_types): New.
2018-03-14 16:04:03 -07:00
80c34c3812
x86: Encode EVEX instructions with VEX128 if possible
...
If EVEX encoding isn't required, we can encode EVEX instructions with
VEX128.
* config/tc-i386.c (optimize_encoding): Encode EVEX instructions
with VEX128 if EVEX encoding isn't required.
* testsuite/gas/i386/optimize-1.d: Updated.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
2018-03-09 08:10:40 -08:00
0ba3a73180
x86: Strip whitespace in check_VecOperations
...
Since the addition of pseudo prefixes changed how the scrubber treats
'{', we need to explicitly strip whitespace in check_VecOperations ().
* config/tc-i386.c (check_VecOperations): Strip whitespace.
* testsuite/gas/i386/optimize-1.s: Add whitespaces before
{%k7} and {z},
* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
2018-03-09 03:51:31 -08:00
0089daceab
x86: Optimize with EVEX128 encoding for AVX512VL
...
We can optimize AVX512 instructions with EVEX128 only if AVX512VL is
enabled:
1. Instruction is an AVX512VL instruction. Or
2. AVX512VL is enabled explicitly by -march=+avx512vl/".arch .avx512vl".
We should optimize EVEX instructions with EVEX128 encoding when pseudo
{evex} prefix is used.
* config/tc-i386.c (set_cpu_arch): Set cpu_arch_isa_flags.
(md_parse_option): Likewise.
(optimize_encoding): Check i.tm.cpu_flags and cpu_arch_isa_flags
for cpuavx512vl instead of cpu_arch_flags. Optimize EVEX with
EVEX128 when EVEX encoding is required.
* testsuite/gas/i386/i386.exp: Run optimize-4, optimize-5,
x86-64-optimize-5 and x86-64-optimize-6.
* testsuite/gas/i386/optimize-1.d: Updated.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
* testsuite/gas/i386/optimize-4.d: New file.
* testsuite/gas/i386/optimize-4.s: Likewise.
* testsuite/gas/i386/optimize-5.d: Likewise.
* testsuite/gas/i386/optimize-5.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-5.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-6.s: Likewise.
2018-03-08 19:57:48 -08:00
d3d50934a9
x86-64: Also optimize "clr reg64"
...
"clr reg" is an alias of "xor reg, reg". We can encode "clr reg64" as
"xor reg32, reg32".
gas/
* config/tc-i386.c (optimize_encoding): Also encode "clr reg64"
as "xor reg32, reg32".
* testsuite/gas/i386/x86-64-optimize-1.s: Add "clr reg64" tests.
* testsuite/gas/i386/x86-64-optimize-1.d: Updated.
opcodes/
* i386-opc.tbl: Add Optimize to clr.
* i386-tbl.h: Regenerated.
2018-03-08 06:41:34 -08:00
bd5dea8822
x86: Remove support for old (<= 2.8.1) versions of gcc
...
Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and
fdivrp instructions. Assembler translates them to correct ones with a
warning:
[hjl@gnu-cfl-1 gas]$ cat x.s
fsubp %st(3),%st
[hjl@gnu-cfl-1 gas]$ gcc -c x.s
x.s: Assembler messages:
x.s:1: Warning: translating to `fsubp %st,%st(3)'
[hjl@gnu-cfl-1 gas]$
This patch removes support for old (<= 2.8.1) versions of gcc:
[hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s
x.s: Assembler messages:
x.s:1: Error: operand type mismatch for `fsubp'
[hjl@gnu-cfl-1 gas]$
gas/
* NEWS: Mention -mold-gcc removal.
* config/tc-i386.c (i386_error): Remove old_gcc_only.
(old_gcc): Removed.
(match_template): Remove old gcc support.
(OPTION_MOLD_GCC): Removed.
(OPTION_MRELAX_RELOCATIONS): Updated.
(md_longopts): Remove OPTION_MOLD_GCC.
(md_parse_option): Likewise.
(md_show_usage): Remove -mold-gcc.
* testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old
(<= 2.8.1) versions of gcc.
* testsuite/gas/i386/intel.s: Likewise.
* testsuite/gas/i386/general.l: Updated.
* testsuite/gas/i386/intel-intel.d: Likewise.
* testsuite/gas/i386/intel.d: Likewise.
* testsuite/gas/i386/intel.e: Likewise.
* testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general.
include/
* opcode/i386 (OLDGCC_COMPAT): Removed.
opcodes/
* i386-gen.c (opcode_modifiers): Remove OldGcc.
* i386-opc.h (OldGcc): Removed.
(i386_opcode_modifier): Remove oldgcc.
* i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
instructions for old (<= 2.8.1) versions of gcc.
* i386-tbl.h: Regenerated.
2018-03-08 06:31:52 -08:00
e771e7c9fb
x86: fold several AVX512VL templates
...
The differences between some of the register and memory forms of the
same insn often don't really require the templates to be separate. For
example, Disp8MemShift is simply irrelevant to register forms. Fold
these as far as possible, and also fold register-only forms. Further
folding is possible, but needs other prereq work done first.
A note regarding EVEXDYN: This is intended to be used only when no other
properties of the template would make is_evex_encoding() return true. In
all "normal" cases I think it is preferable to omit this indicator, to
keep the table half way readable.
2018-03-08 08:58:55 +01:00
ed438a93f1
x86: fold certain AVX512 rotate and shift templates
...
Their memory forms were bogusly using VexLWP instead of VexNDD. Adjust
VexNDD handling to cope with these, allowing their register and memory
forms to be folded.
2018-03-08 08:58:05 +01:00
d2224064f1
x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
...
They aren't really useful (anymore?): The conflicting operand size check
isn't applicable to any insn validly using respective memory operand
sizes (and if they're used wrongly, another error would result), and the
logic in process_suffix() can be easily changed to work without them.
While re-structuring conditionals in process_suffix() also drop the
CMPXCHG8B special case in favor of a NoRex64 attribute in the opcode
table.
2018-03-08 08:52:27 +01:00
23e42951f2
x86: correct operand size match checks for BMI/BMI2 insns
...
Some BMI/BMI2 insns allow their middle operands to be a memory one. In
such a case, matching register types between operands 0 and 1 as well as
1 and 2 won't help - operands 0 and 2 also need to be checked.
2018-03-08 08:51:18 +01:00
8819ada6c4
x86: fold redundant expressions in process_suffix()
...
There's no point repeatedly evaluating i.types[op].bitfield.reg.
2018-03-08 08:50:13 +01:00
548d0ee6e7
x86: simplify result processing of cpu_flags_match()
...
Make more obvious what the success and failure paths are, and in
particular that what used to be at the "skip" label can't be reached
by what used to be straight line code.
2018-03-08 08:48:10 +01:00
929f69fa96
x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
...
Just like for the AVX/AES and AVX/PCLMUL combinations, AVX/GFN,
AVX512F/GFNI, AVX512F/VAES, and AVX512F/PCLMUL need special handling to
deal with the pair of required checks specified in the templates.
2018-03-08 08:47:32 +01:00
ab592e757e
x86: change AVX512VL handling in cpu_flags_match()
...
In order to add an AVX512F counterpart to the present AVX checking, it
is better to move the AVX512VL check out of the conditional it's
currently in.
2018-03-08 08:45:56 +01:00
db12e14ea0
x86: drop CPU_FLAGS_32BIT_MATCH
...
It has become a plain alias of CPU_FLAGS_ARCH_MATCH now.
2018-03-08 08:45:25 +01:00
b9d498173c
x86: simplify AVX checks in cpu_flags_match()
...
No caller cares about the specifics of CPU_FLAGS_{AES,AVX,PCLMUL}_MATCH,
so drop those and fold the nested if()-s.
2018-03-08 08:44:52 +01:00
bcb1753ee6
x86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_MATCH
2018-03-08 08:44:12 +01:00
6e3e5c9e41
x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
...
When aiming at not mixing SSE and AVX insns, these should be warned
about the same way other non-AVX ones are treated.
2018-03-08 08:35:01 +01:00
38e314eb06
x86: drop FloatD
...
It can be expressed by D, when making the consumer look at operand size
to tell apart both uses.
2018-03-08 08:34:09 +01:00
a477a8c4f4
x86: adjust 4-XMM-register-group related warning
...
Drop "second": For one there's no other source register (the other
source operand is in memory), and in Intel syntax such numbering would
also be wrong.
Take the opportunity and also
- properly place declarations ahead of statements
- use %u format for unsigned int arguments
- fix indentation
2018-03-08 08:27:28 +01:00
73053c1fc4
x86: fold AVX vcvtpd2ps memory forms
...
This requires a change to ModR/M handling: Recording of displacement
types must not discard operand size information. Change the respective
code to alter only .disp<N>.
2018-03-08 08:25:31 +01:00
6a7524c6aa
Really remove unnecessary power9 group terminating nop
...
Oops, not tested well enough. -mpower9 sets all the PPC_OPCODE_POWERn
for n <= 9.
* config/tc-ppc.c (ppc_handle_align): Correct last patch. Really
don't emit a group terminating nop for power9. Simplify cpu
tests.
2018-03-08 14:37:26 +10:30
3fea0c3b3f
Remove unnecessary power9 group terminating nop
...
Power9 doesn't have a group terminating nop, so we may as well emit a
normal nop for power9. Not that it matters a great deal, I believe
ori 2,2,0 will be treated exactly as ori 0,0,0 by the hardware.
* config/tc-ppc.c (ppc_handle_align): Don't emit a group
terminating nop for power9.
2018-03-08 14:17:01 +10:30
3ae729d5a4
x86: Rewrite NOP generation for fill and alignment
...
Rewrite NOP generation for fill and code alignment by:
1. Add a 11-byte NOP with another 0x66 prefix.
2. Remove the multi-byte NOP entries which consist of 2 instructions.
3. Select proper NOPs based on ISA and processor tuning.
4. Generate multiple NOPs with the longer NOPs first followed by the
shorter NOP.
5. Use jump for larger NOP padding:
a. > 8 bytes (2 NOPs) in 16-bit mode.
b. > 14 bytes (2 NOPs) for older processors.
c. > 77 bytes (7 NOPs) for newer processors.
6. Update MAX_MEM_FOR_RS_ALIGN_CODE to 4095.
PR gas/22874
* config/tc-i386.c (f32_5): Removed.
(f32_8): Likewise.
(f32_9): Likewise.
(f32_10): Likewise.
(f32_11): Likewise.
(f32_12): Likewise.
(f32_13): Likewise.
(f32_14): Likewise.
(f16_5): Likewise.
(f16_6): Likewise.
(f16_7): Likewise.
(f16_8): Likewise.
(jump_31): Likewise.
(alt64_11): Likewise.
(alt64_patt): Likewise.
(jump_disp8): New.
(jump32_disp32): Likewise.
(jump16_disp32): Likewise.
(alt_11): Likewise.
(f32_patt): Updated.
(f16_patt): Likewise.
(alt_patt): Add alt_11.
(i386_align_code): Merged with ...
(i386_generate_nops): This. Rewritten.
(fits_in_imm7): Moved before i386_generate_nops.
(fits_in_imm31): Likewise.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Updated to
4095.
(i386_align_code): Removed.
(HANDLE_ALIGN): Rewritten with i386_generate_nops.
* doc/as.texinfo: Update limits of control byte for x86 .nops
directive.
* testsuite/gas/i386/i386.exp: Run nops-7 and x86-64-nops-7.
* gas/testsuite/gas/i386/noavx-3.l: Updated.
* gas/testsuite/gas/i386/nop-1.d: Likewise.
* gas/testsuite/gas/i386/nop-1.s: Likewise.
* gas/testsuite/gas/i386/nop-2.d: Likewise.
* gas/testsuite/gas/i386/nop-2.s: Likewise.
* gas/testsuite/gas/i386/nop-3.d: Likewise.
* gas/testsuite/gas/i386/nop-4.d: Likewise.
* gas/testsuite/gas/i386/nop-5.d: Likewise.
* gas/testsuite/gas/i386/nop-5.s: Likewise.
* gas/testsuite/gas/i386/nop-6.d: Likewise.
* gas/testsuite/gas/i386/nop-bad-1.l: Likewise.
* gas/testsuite/gas/i386/nops-1-core2.d: Likewise.
* gas/testsuite/gas/i386/nops-1-i386-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-1-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-1-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-1-k8.d: Likewise.
* gas/testsuite/gas/i386/nops-1.d: Likewise.
* gas/testsuite/gas/i386/nops-2-core2.d: Likewise.
* gas/testsuite/gas/i386/nops-2-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-2.d: Likewise.
* gas/testsuite/gas/i386/nops-3-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-3-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-3.d: Likewise.
* gas/testsuite/gas/i386/nops-4-i386.d: Likewise.
* gas/testsuite/gas/i386/nops-4-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-4.d: Likewise.
* gas/testsuite/gas/i386/nops-4a-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-5-i686.d: Likewise.
* gas/testsuite/gas/i386/nops-5.d: Likewise.
* gas/testsuite/gas/i386/nops-6.d: Likewise.
* gas/testsuite/gas/i386/nops16-1.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nop-1.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nop-2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nop-5.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-core2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-g64.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1-pentium.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-1.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-3.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-4.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-5.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1-core2.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1-k8.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1-pentium.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-1.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-2.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-3.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-4-core2.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-4-k8.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-4.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-5-k8.d: Likewise.
* gas/testsuite/gas/i386/ilp32/x86-64-nops-5.d: Likewise.
* gas/testsuite/gas/i386/nops-7.d: New file.
* gas/testsuite/gas/i386/nops-7.s: Likewise.
* gas/testsuite/gas/i386/x86-64-nops-7.d: Likewise.
2018-03-07 04:18:56 -08:00
e7da50fa4b
[ARM] Fix NULL dereference of march_ext_opt
...
Commit 4d354d8b89
2018-03-02 10:47:14 +00:00
4d354d8b89
[ARM] Clean up selection of feature bits
...
I've always found the code in ARM backend of gas to control what
CPU/architecture and FPU are selected by the user and to support
autodetection of features complex and confusing. Chief among the
issues I have with that code is the lack of comments to explain
the meaning of the various variables. This patch addresses that
and much more:
- add comments to explain meaning of all arm_feature_set variables
- keep track of currently selected CPU, extensions and FPU in a separate
set of new variables
- make naming of variable more consistent
- remove dead code
- simplify handling of extensions
The overall approach is as follows:
* restrict m*_opt variable to hold the feature bits of the
corresponding mcpu/march/mfpu command-line options
* record selected CPU, extensions and FPU in new selected_* during
md_begin
* whenever a .cpu/.arch/.arch_extension/.fpu directive is met, update
the corresponding selected_* variables (eg. selected_arch, then
selected_cpu for a .cpu or .arch directive) and then finally
cpu_variant from them
* pass extension feature set pointer by value to arm_parse_extension
since it's only ever called from arm_parse_cpu and arm_parse_arch
which allocate the extension feature set themselves
* likewise, remove allocation from s_arm_arch_extension since the use
of arm_feature_set structure for selected_ext rather than a pointer
alleviate the need for it
* in autodetection mode, only set all CPU fits in cpu_variant but leave
selected_cpu* variables unset
* in md_begin, remove dead "else if" to set a default FPU when no FPU
was selected. Setting a default FPU based on CPU as did the code
before it turn dead should be based on the default FPU field of the
CPU and architecture table as will be done in a separate patch. Logic
is wrong anyway since it sets VFP2 as default FPU for Armv6-M and
Armv7-M
Hopefully that should be enough to understand the change but if not feel
free to ask questions about the patch. While I believe the new code is
easier to understand, it remains complex and the old one was even more
complex so the change is difficult to understand.
2018-03-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (cpu_variant, arm_arch_used, thumb_arch_used,
legacy_cpu, legacy_fpu, mcpu_cpu_opt, dyn_mcpu_ext_opt,
mcpu_fpu_opt, march_cpu_opt, dyn_march_ext_opt, march_fpu_opt,
mfpu_opt, object_arch, selected_cpu): Comment meaning of variables.
(dyn_mcpu_ext_opt): Also rename into ...
(mcpu_ext_opt): This.
(dyn_march_ext_opt): Also rename into ...
(march_ext_opt): This.
(object_arch): Also rename into ...
(selected_object_arch): This and make it a plain arm_feature_set
structure.
(selected_arch, selected_ext, selected_fpu): New static variables.
(mark_feature_used): Fix comments, feature is marked as used iff it is
currently allowed.
(do_bx): Adapt to change in name and type of object_arch.
(md_begin): Set selected_arch rather than mcpu_cpu_opt, selected_ext
rather than dyn_mcpu_ext_opt and selected_fpu rather than mfpu_opt.
Remove dead code to set default FPU if architecture version is greater
than 5. Set all CPU bits of cpu_variant directly in autodection
leaving mcpu_cpu_opt, selected_arch and selected_cpu unset.
(arm_parse_extension): Take extension feature set pointer parameter by
value rather than by pointer. Remove allocation code. Adapt code
accordingly.
(arm_parse_cpu): Adapt to variable renaming and changes in
arm_parse_extension () signature.
(arm_parse_arch): Likewise.
(aeabi_set_public_attributes): Also set selected_arch and selected_ext
in addition to selected_cpu. Set flags_arch and flags_ext from them
instead of selected_cpu. Adapt to variables renaming and type change.
(arm_md_post_relax): Adapt to variable renaming.
(s_arm_cpu): Set selcted_cpu_cpu and selected_ext instead of
mcpu_cpu_opt and dyn_mcpu_ext_opt. Set selected_cpu from them and
cpu_variant from selected_cpu and selected_fpu.
(s_arm_arch): Likewise.
(s_arm_object_arch): Adapt to variable renaming.
(s_arm_arch_extension): Use ARM_CPU_IS_ANY instead of checking feature
set against arm_any. Check selected_arch rather than *mcpu_cpu_opt.
Set selected_ext rather than *dyn_mcpu_ext_opt and remove allocation
code.
(s_arm_fpu): Set selected_fpu instead of mfpu_opt. Set all CPU feature
bits if in autodetection mode.
2018-03-01 16:23:38 +00:00
8305403a1f
x86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128
...
When 2 source registers are identical, AVX256 and AVX512 vpsub[bwdq]
instructions can be encoded with VEX128 or EVEX128 encodings.
gas/
* config/tc-i386.c (optimize_encoding): Optimize AVX256 and
AVX512 vpsub[bwdq] instructions.
* testsuite/gas/i386/optimize-1.s: Add tests for AVX256 and
AVX512 vpsub[bwdq] instructions.
* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
* testsuite/gas/i386/optimize-1.d: Updated.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
opcodes/
* * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
vpsub[bwdq] instructions.
* i386-tbl.h: Regenerated.
2018-03-01 06:08:31 -08:00
b6f8c7c452
x86: Add -O[2|s] assembler command-line options
...
On x86, some instructions have alternate shorter encodings:
1. When the upper 32 bits of destination registers of
andq $imm31, %r64
testq $imm31, %r64
xorq %r64, %r64
subq %r64, %r64
known to be zero, we can encode them without the REX_W bit:
andl $imm31, %r32
testl $imm31, %r32
xorl %r32, %r32
subl %r32, %r32
This optimization is enabled with -O, -O2 and -Os.
2. Since 0xb0 mov with 32-bit destination registers zero-extends 32-bit
immediate to 64-bit destination register, we can use it to encode 64-bit
mov with 32-bit immediates. This optimization is enabled with -O, -O2
and -Os.
3. Since the upper bits of destination registers of VEX128 and EVEX128
instructions are extended to zero, if all bits of destination registers
of AVX256 or AVX512 instructions are zero, we can use VEX128 or EVEX128
encoding to encode AVX256 or AVX512 instructions. When 2 source
registers are identical, AVX256 and AVX512 andn and xor instructions:
VOP %reg, %reg, %dest_reg
can be encoded with
VOP128 %reg, %reg, %dest_reg
This optimization is enabled with -O2 and -Os.
4. 16-bit, 32-bit and 64-bit register tests with immediate may be
encoded as 8-bit register test with immediate. This optimization is
enabled with -Os.
This patch does:
1. Add {nooptimize} pseudo prefix to disable instruction size
optimization.
2. Add optimize to i386_opcode_modifier to tell assembler that encoding
of an instruction may be optimized.
gas/
PR gas/22871
* NEWS: Mention -O[2|s].
* config/tc-i386.c (_i386_insn): Add no_optimize.
(optimize): New.
(optimize_for_space): Likewise.
(fits_in_imm7): New function.
(fits_in_imm31): Likewise.
(optimize_encoding): Likewise.
(md_assemble): Call optimize_encoding to optimize encoding.
(parse_insn): Handle {nooptimize}.
(md_shortopts): Append "O::".
(md_parse_option): Handle -On.
* doc/c-i386.texi: Document -O0, -O, -O1, -O2 and -Os as well
as {nooptimize}.
* testsuite/gas/cfi/cfi-x86_64.d: Pass -O0 to assembler.
* testsuite/gas/i386/ilp32/cfi/cfi-x86_64.d: Likewise.
* testsuite/gas/i386/i386.exp: Run optimize-1, optimize-2,
optimize-3, x86-64-optimize-1, x86-64-optimize-2,
x86-64-optimize-3 and x86-64-optimize-4.
* testsuite/gas/i386/optimize-1.d: New file.
* testsuite/gas/i386/optimize-1.s: Likewise.
* testsuite/gas/i386/optimize-2.d: Likewise.
* testsuite/gas/i386/optimize-2.s: Likewise.
* testsuite/gas/i386/optimize-3.d: Likewise.
* testsuite/gas/i386/optimize-3.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-1.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-1.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-3.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-3.s: Likewise.
* testsuite/gas/i386/x86-64-optimize-4.d: Likewise.
* testsuite/gas/i386/x86-64-optimize-4.s: Likewise.
opcodes/
PR gas/22871
* i386-gen.c (opcode_modifiers): Add Optimize.
* i386-opc.h (Optimize): New enum.
(i386_opcode_modifier): Add optimize.
* i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
"sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
"and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
"movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
vpxord and vpxorq.
* i386-tbl.h: Regenerated.
2018-02-27 07:36:43 -08:00
Alan Modra
Igor Tsimbalist
Peter Bergner
Renlin Li
Jan Beulich
Nick Clifton
Jim Wilson
H.J. Lu
Thomas Preud'homme