This patch adds initial 64-bit insn assembler/disassembler support.
The only instruction added is "pnop" along with the automatic aligning
of prefix instruction so they do not cross 64-byte boundaries.
include/
* dis-asm.h (WIDE_OUTPUT): Define.
* opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare.
(PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX),
(PPC_PREFIX_P, PPC_PREFIX_SEG): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "future" entry.
(PREFIX_OPCD_SEGS): Define.
(prefix_opcd_indices): New array.
(disassemble_init_powerpc): Initialize prefix_opcd_indices.
(lookup_prefix): New function.
(print_insn_powerpc): Handle 64-bit prefix instructions.
* ppc-opc.c (PREFIX_OP, PREFIX_FORM, SUFFIX_MASK, PREFIX_MASK),
(PMRR, POWERXX): Define.
(prefix_opcodes): New instruction table.
(prefix_num_opcodes): New constant.
binutils/
* objdump.c (disassemble_bytes): Set WIDE_OUTPUT in flags.
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes.
(struct insn_label_list): New.
(insn_labels, free_insn_labels): New variables.
(ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs.
(ppc_frob_label, ppc_new_dot_label): Move functions earlier in file
and call ppc_record_label.
(md_assemble): Handle 64-bit prefix instructions. Align labels
that are on the same line as a prefix instruction.
* config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to
later in the file.
(md_start_line_hook): Define.
(ppc_start_line_hook): Declare.
* testsuite/gas/ppc/prefix-align.d,
* testsuite/gas/ppc/prefix-align.s: New test.
* testsuite/gas/ppc/ppc.exp: Run new test.
This patch avoids for bpf_elf64_le_vec to be referenced in targmatch.h
when building a BFD without BFD64, resulting in an undefined symbol.
This was a regression introduced along with the BPF target.
bfd/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* config.bfd (targ_cpu): Process bpf-*-none only if BFD64.
* configure.ac: Set target_size=64 for bpf_elf64_le_vec and
bpf_elf64_be_vec.
* configure: Regenerate.
This patch adds support for ELF64 eBPF to readelf, and fixes a `nm'
test to run properly in bpf-*-* targets.
binutils/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* readelf.c: Include elf/bpf.h.
(guess_is_rela): Hanle EM_BPF.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
* testsuite/binutils-all/nm.exp: Add bpf-*-* to the list of
ELF targets.
This patch adds support to the linker for the Linux eBPF architecture.
A minimal testsuite is included.
ld/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf64bpf.c.
* Makefile.in (prefix): Regenerate.
* configure.tgt (targ_extra_ofiles): Add case for bpf-*-* targets.
* emulparams/elf64bpf.sh: New file.
* testsuite/lib/ld-lib.exp (check_gc_sections_available): Add
bpf-*-* to the list of targets not supporting gc-sections.
* testsuite/ld-bpf/bar.s: New file.
* testsuite/ld-bpf/jump-1.d: Likewise.
* testsuite/ld-bpf/foo.s: Likewise.
* testsuite/ld-bpf/call-1.d: Likewise.
* testsuite/ld-bpf/bpf.exp: Likewise.
* testsuite/ld-bpf/baz.s: Likewise.
This patch adds support for the Linux kernel eBPF architecture to the
opcodes. The port is based on CGEN.
opcodes/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* configure.ac (SHARED_DEPENDENCIES): Add case for bfd_bpf_arch.
* configure: Regenerated.
* Makefile.am: Add rules for the files generated from cpu/bpf.cpu
and cpu/bpf.opc.
(HFILES): Add bpf-desc.h and bpf-opc.h.
(TARGET_LIBOPCODES_CFILES): Add bpf-asm.c, bpf-desc.c, bpf-dis.c,
bpf-ibld.c and bpf-opc.c.
(BPF_DEPS): Define.
* Makefile.in: Regenerated.
* disassemble.c (ARCH_bpf): Define.
(disassembler): Add case for bfd_arch_bpf.
(disassemble_init_for_target): Likewise.
(enum epbf_isa_attr): Define.
* disassemble.h: extern print_insn_bpf.
* bpf-asm.c: Generated.
* bpf-opc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-ibld.c: Likewise.
* bpf-dis.c: Likewise.
* bpf-desc.h: Likewise.
* bpf-desc.c: Likewise.
This patch adds a CPU description for the Linux kernel eBPF virtual
machine, plus supporting code for disassembler and assembler.
cpu/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf.cpu: New file.
* bpf.opc: Likewise.
This patch adds a header file with BPF-specific ELF definitions. In
particular, the architecture relocations.
include/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* elf/bpf.h: New file.
This is to bring in the newly introduced support for bpf-*-* targets.
ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* config.guess: Synchronize with config project master sources.
* config.sub: Likewise.
* readline/support/config.guess: Likewise.
* readline/support/config.sub: Likewise.
git commit 6ec6968b1b results in
... error: linker script file '/usr/local/lib64/libgcc_s.so' appears multiple times
collect2: error: ld returned 1 exit status
FAIL: bootstrap
This patch changes things so that an error is given only when a -T
script or the default script is invoked more than once. I'm still a
little nervous that we match script file names, not the entire path.
PR 24576
* ldfile.c (enum script_open_style): New.
(struct script_name_list): New.
(ldfile_open_command_file_1): Take a script_open_style param
rather than booleans. Adjust callers. Only fail when -T or
default -T script is invoked twice.
(ldfile_try_open_bfd): Revert last change.
I noticed that target_ops::follow_exec took a "char *" parameter,
where "const char *" would be more correct. This patch changes this
(and related functions) to be constified.
Tested by rebuilding.
gdb/ChangeLog
2019-05-22 Tom Tromey <tromey@adacore.com>
* target.c (target_follow_exec): Constify parameter.
* target-delegates.c: Rebuild.
* remote.c (remote_target::follow_exec): Constify parameter.
* infrun.c (follow_exec): Constify parameter.
* target.h (struct target_ops) <follow_exec>: Constify parameter.
(target_follow_exec): Likewise.
This adds a "style" helper proc to the test suite, and updates
existing style tests to use it. Thanks to Sergio for the idea.
Tested on x86-64 Fedora 29.
gdb/testsuite/ChangeLog
2019-05-22 Tom Tromey <tromey@adacore.com>
* gdb.base/info-shared.exp (check_info_shared): Use "style".
* gdb.base/style.exp: Use "style".
* lib/gdb-utils.exp (style): New proc.
When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into a failure due align.exp requiring at least c++11.
Fix this by adding -std=c++11.
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2019-05-22 Tom de Vries <tdevries@suse.de>
* gdb.base/align.exp: Require c++11.
Fix gdb.python/py-mi-var-info-path-expression.exp for a gdb build without
python support.
gdb/testsuite/ChangeLog:
2019-05-22 Tom de Vries <tdevries@suse.de>
PR testsuite/24586
* gdb.python/py-mi-var-info-path-expression.exp: Call
mi_skip_python_tests to check if python is supported.
PR 24576
* ld/ldfile.c: (ldfile_open_command_file_1): Add new parameter -
is_script. If true check that the file has not already been
parsed as a linker script.
(ldfile_open_script_file): New function.
(ldfile_try_open_bfd): Use the new function in place of
ldfile_open_command_line.
* ldmain.c (main): Likewise.
* lexsup.c (parse_args): Use the new function for opening linker
scripts with the -T option.
* ldfile.h (ldfile_open_script_file): Add prototype.
Running an address signed binary through GDB on a non pauth system
gives the following error:
Call Frame Instruction op 45 in vendor extension space is not handled on this architecture.
Instead GDB should ignore the op, treating it as a nop.
Add test case for pauth binaries, regardless of whether the target
supports it.
gdb/ChangeLog:
* aarch64-tdep.c (aarch64_execute_dwarf_cfa_vendor_op): Treat
DW_CFA_AARCH64_negate_ra_state as nop on non pauth targets.
gdb/testsuite/ChangeLog:
* gdb.arch/aarch64-pauth.c: New test.
* gdb.arch/aarch64-pauth.exp: New file.
Add missing documentation for the debugredirect setting.
Add description and uses of gdb.in/gdb.cmd to the testsuite README.
Mention this in the NEWS file.
gdb/ChangeLog:
* NEWS: Add debugredirect and testsuite sections.
gdb/doc/ChangeLog:
* gdb.texinfo (Shell Commands): Add debugredirect.
gdb/testsuite/ChangeLog:
* README (Re-running Tests Outside The Testsuite): New section.
This solves an assertion failure when a remote provides a target
description which only refers to floating point registers by their
hardware name (e.g. f0), rather than their ABI name (e.g. ft0). GDB
assumed that should the floating point register feature be presented,
it would contain a register called ft0.
The floating point length is now instead determined by searching for
the same register, but looking for any of its aliases.
gdb/ChangeLog:
* riscv-tdep.c (riscv_gdbarch_init): Support determining flen from
target descriptions using exclusively floating point register name
aliases.
The archive element cache needs tidying when closing an archive element.
This patch fixes these failures:
-FAIL: ar long file names (bfdtest1)
-FAIL: ar thin archive (bfdtest1)
-FAIL: ar thin archive with nested archive (bfdtest1)
* som.c (som_bfd_free_cached_info): Call
_bfd_generic_close_and_cleanup.
This option (also implied by --traditional) causes '$' to introduce
literal hexadecimal constants, rather than the modern convention '0x'.
gas/
* config/tc-s12z.c (s12z_strtol): New function. (md_show_usage): Update.
(md_parse_option): new case OPTION_DOLLAR_HEX. (s12z_init_after_args):
(<global>): Use s12z_strtol instead of strtol.
* doc/c-s12z.texi (S12Z Options): Document new option -mdollar-hex.
* testsuite/gas/s12z/dollar-hex.d: New file.
* testsuite/gas/s12z/dollar-hex.s: New file.
* testsuite/gas/s12z/s12z.exp: Add them.
In this commit:
commit 34d11c682f
Date: Fri May 3 15:23:55 2019 +0100
gdb/fortran: Use floatformats_ia64_quad for fortran 16-byte floats
GDB was changed such that the Fortran's 16-byte float format was
obtained by calling gdbarch_floatformat_for_type instead of just using
gdbarch_long_double_format as it was before.
The problem with this default_floatformat_for_type can return NULL in
some cases, and the code introduced in 34d11c682f didn't consider
this.
This commit introduces several alternative strategies for finding a
suitable 16-byte floating point type. First GDB calls
gdbarch_floatformat_for_type (this was what 34d11c682f added), if this
returns null GDB will use gdbarch_long_double_format if it is the
correct size (this was the format used before 34d11c682f). Finally,
if neither of the above provides a suitable type then GDB will create
a new dummy type.
This final dummy type is unlikely to provide an correct debug
experience as far as examining the 16-byte floats, but it should
prevent GDB crashing.
gdb/ChangeLog:
PR gdb/18644:
* f-lang.c (build_fortran_types): Handle the case where
gdbarch_floatformat_for_type returns a nullptr.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer
checks. Search the RELA table for n64 relocations.
ld/
* testsuite/ld-mips-elf/pic-reloc-5.d: New test.
* testsuite/ld-mips-elf/pic-reloc-6.d: New test.
* testsuite/ld-mips-elf/pic-reloc-7.d: New test.
* testsuite/ld-mips-elf/pic-reloc-5.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-6.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-7.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This patch makes changes to the <spec_reg> operand for VMRS and VMSR
instructions as per the Armv8.1-M Mainline.
New <spec_reg> options to support are:
0b0010: FPSCR_nzcvqc, access to FPSCR condition and saturation flags.
0b1100: VPR, privileged only access to the VPR register.
0b1101: P0, access to VPR.P0 predicate fields
0b1110: FPCXT_NS, enables saving and restoring of Non-secure floating
point context.
0b1111: FPCXT_S, enables saving and restoring of Secure floating point
context
*** gas/ChangeLog ***
2019-05-21 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (parse_operands): Update case OP_RVC to
parse p0 and P0.
(do_vmrs): Add checks for valid operands with respect to
cpu and fpu options.
(do_vmsr): Likewise.
(reg_names): New reg_names for FPSCR_nzcvqc, VPR, FPCXT_NS
and FPCXT_S.
* testsuite/gas/arm/armv8_1-m-spec-reg.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg.s: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad1.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad2.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad3.d: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad1.l: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad2.l: New.
* testsuite/gas/arm/armv8_1-m-spec-reg-bad3.l: New.
* testsuite/gas/arm/vfp1xD.d: Updated to allow new valid values.
* testsuite/gas/arm/vfp1xD_t2.d: Likewise.
*** opcodes/ChangeLog ***
2019-05-21 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (coprocessor_opcodes): New instructions for VMRS
and VMSR with the new operands.
This patch adds the following instructions which are part of the
Armv8.1-M Mainline:
CINC
CINV
CNEG
CSINC
CSINV
CSNEG
CSET
CSETM
CSEL
gas/ChangeLog:
2019-05-21 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (TOGGLE_BIT): New.
(T16_32_TAB): New entries for cinc, cinv, cneg, csinc,
csinv, csneg, cset, csetm and csel.
(operand_parse_code): New OP_RR_ZR.
(parse_operand): Handle case for OP_RR_ZR.
(do_t_cond): New.
(insns): New instructions for cinc, cinv, cneg, csinc,
csinv, csneg, cset, csetm, csel.
* testsuite/gas/arm/armv8_1-m-cond-bad.d: New test.
* testsuite/gas/arm/armv8_1-m-cond-bad.l: New test.
* testsuite/gas/arm/armv8_1-m-cond-bad.s: New test.
* testsuite/gas/arm/armv8_1-m-cond.d: New test.
* testsuite/gas/arm/armv8_1-m-cond.s: New test.
opcodes/ChangeLog:
2019-05-21 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (enum mve_instructions): New enum
for csinc, csinv, csneg, csel, cset, csetm, cinv, cinv
and cneg.
(mve_opcodes): New instructions as above.
(is_mve_encoding_conflict): Add cases for csinc, csinv,
csneg and csel.
(print_insn_mve): Accept new %<bitfield>c and %<bitfield>C.
The MIPS64R6 TRM requires that the source register for DAUI
not be r0.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS64
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 67-68.
gas/
* testsuite/gas/mips/r6-branch-constraints.s: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.s: this and add test
case for DAUI.
* testsuite/gas/mips/r6-branch-constraints.l: Rename to ...
* testsuite/gas/mips/r6-reg-constraints.l: this and add test
for DAUI.
* testsuite/gas/mips/mips.exp: Rename test from
r6-branch-constraints to r6-reg-constraints.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Change source register
constraint for DAUI.
Add a new option to get the linker to emit PLTs that use compact
branches instead of delay slot branches.
bfd/
* elfxx-mips.c (LA25_BC): New macro.
(mips_elf_link_hash_table)<compact_branches>: New field.
(STUB_JALRC): New macro.
(mipsr6_o32_exec_plt0_entry_compact): New array.
(mipsr6_n32_exec_plt0_entry_compact): Likewise.
(mipsr6_n64_exec_plt0_entry_compact): Likewise.
(mipsr6_exec_plt_entry_compact): Likewise.
(mips_elf_create_la25_stub): Use BC instead of J for stubs
when compact_branches is true.
(_bfd_mips_elf_finish_dynamic_symbol): Choose the compact
PLT for MIPSR6 with compact_branches. Do not reorder the
compact branches PLT. Switch the lazy stub for MIPSR6
with compact_branches to use JALRC.
(mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6
when compact_branches is true.
(_bfd_mips_elf_compact_branches): New function.
* elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype.
ld/
* emultempl/mipself.em (compact_branches): New static variable.
(mips_create_output_section_statements): Call
_bfd_mips_elf_compact_branches.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and
OPTION_NO_COMPACT_BRANCHES.
(PARSE_AND_LIST_LONGOPTS): Add compact-branches,
no-compact-branches.
(PARSE_AND_LIST_OPTIONS): Add --compact-branches,
--no-compact-branches.
(PARSE_AND_LIST_ARGS_CASES): Handle the above.
* ld.texinfo: Document --compact-branches, --no-compact-branches.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`.
Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit
hosts.
Committed under the obvious rule.
bfd/ChangeLog:
PR ld/24373
* elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub):
Fix print formatter.
When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into:
...
FAIL: gdb.linespec/explicit.exp: complete after -line: \
cmd complete "b -line argument " (timeout)
...
The failure is reproducible outside the testsuite like this:
...
$ gdb -q build/gdb/testsuite/outputs/gdb.linespec/explicit/explicit \
-ex "complete b -line argument"
Reading symbols from \
build/gdb/testsuite/outputs/gdb.linespec/explicit/explicit...
terminate called after throwing an instance of 'std::length_error'
what(): basic_string::_M_create
Aborted (core dumped)
...
The problem is here in complete_command:
...
completion_result result = complete (arg, &word, "e_char);
std::string arg_prefix (arg, word - arg);
if (result.number_matches != 0)
...
The problem is that the word variable is not initialized when
result.number_matches == 0, but the variable is still used in the arg_prefix
initialization.
Fix this by guarding the arg_prefix initialization with the
'result.number_matches != 0' test.
Build and tested on x86_64-linux.
gdb/ChangeLog:
2019-05-21 Tom de Vries <tdevries@suse.de>
PR cli/24587
* cli/cli-cmds.c (complete_command): Fix use of unitialized variable.
When building gdb on ubuntu 16.04 with gcc 5.4.0, and running the gdb
testsuite we run into failures due test-cases requiring at least c++1.
Fix this by adding -std=c++11 to those test-cases.
Tested on x86_64-linux.
gdb/testsuite/ChangeLog:
2019-05-21 Tom de Vries <tdevries@suse.de>
* gdb.arch/amd64-eval.exp: Require c++11.
* gdb.base/max-depth.exp: Same.
* gdb.compile/compile-cplus-array-decay.exp: Same.
* gdb.cp/meth-typedefs.exp: Same.
* gdb.cp/subtypes.exp: Same.
* gdb.cp/temargs.exp: Same.
gas/ChangeLog:
2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 24559
* config/tc-arm.c (move_or_literal_pool): Set size_req to 0
for MOVW replacement.
* testsuite/gas/arm/load-pseudo.s: New test input.
* testsuite/gas/arm/m0-load-pseudo.d: New test.
* testsuite/gas/arm/m23-load-pseudo.d: New test.
* testsuite/gas/arm/m33-load-pseudo.d: New test.
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:
1) If the address is within the range of an ADR instruction it rewrites the ADRP
into an ADR, and those doesn't need the use of a veneer.
2) If the address is not within range, it adds a branch to a veneer which will
execute the final bit of the erratum workaround and branch back to the call
site.
When we do this we always generate the veneers and we always align the size of
the text section to 4KB. This is because we only know which workaround we can
use after all linking has finished and all addresses are known. This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.
This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.
Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.
Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]
- full (default): Use both ADRP and ADR workaround. This is equivalent to not
specifying any options and is the default behavior before this
patch.
- adr: Only use the ADR workaround, this will not cause any increase in binary
size but linking will fail if the referenced address is out of range of
an ADR instruction.
- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.
In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.
bfd/ChangeLog:
PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.
ld/ChangeLog:
PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
The SVE DRAWF register names are missing from binutils, this may cause objdump
and readelf to ignore certain DRAWF output as the registers are unknown (most
notably CIEs).
This patch adds the registers in accordance to the "DWARF for ARM(r) 64-bit
Architecture (AARch64) with SVE support" documentation [1].
[1] https://developer.arm.com/docs/100985/latest/dwarf-for-the-arm-64-bit-architecture-aarch64-with-sve-support
binutils/ChangeLog:
* dwarf.c (dwarf_regnames_aarch64): Add SVE registers.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.d: New test.
* testsuite/binutils-all/aarch64/sve-dwarf-registers.s: New test.
This matches the kill in gdb_file_cmd, and ensures that the command is not
sent to the gdb.in file.
When gdb.in is used as a batch file, any kill commands run before the target
is started will cause gdb to stop processing commands.
gdb/testsuite/ChangeLog:
* lib/gdbserver-support.exp (gdbserver_run): Mark kill as optional.
In an upcoming commit, I need to be able to set the prefix used
to introduce hexadecimal literal constants using a command line
flag. This is not currently possible, because the switch which
determines this (LITERAL_PREFIXDOLLAR_HEX) is a macro set at
build time.
This change substitutes it for a variable to be set at start up.
gas/ChangeLog:
* expr.c (literal_prefix_dollar_hex): New variable.
(operand)[case '$']: Use the new variable instead of the old macro.
Also, move this instance of "case '$'" next to the other one, and
enable it only in the complementary proprocessor case.
* expr.h (literal_prefix_dollar_hex): Declare it.
* config/tc-epiphany.c (md_begin): Assign literal_prefix_dollar_hex.
* config/tc-ip2k.c: ditto
* config/tc-mt.c: ditto
* config/tc-epiphany.h (LITERAL_PREFIXDOLLAR_HEX): Remove macro definition.
* config/tc-ip2k.h: ditto
* config/tc-mt.h: ditto
The range check done to transform an absolute call/jump to a pc-relative one is
off-by-one, and that causes this shortening optimization to be missed if the
branch target is right at the range boundary.
In the non-shrinkable case, the range is what is mentioned in the ISA - -4094
bytes in the backward direction, and 4096 bytes in the positive direction.
In the shrinkable case, the forward jump range increases by two bytes (deleted
because of the shortening from call/jmp to rcall/rjmp), and therefore, the
range is -4094 in the reverse, and 4098 in the positive direction.
Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to
ensure jumps to max forward and backward ranges get relaxed to rjmp.
The current code to compute relative distance in the wrap around case does not
handle the edge case of the target (after adjusting for implicit PC increment)
being exactly half of the wrap around distance. This patch fixes that and adds a
testcase.
The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes
for the implicit PC increment)). If the target of the jump is at a distance of
4098 bytes, it is out of range for a forward jump - however, a backward jump can
still reach that address if pmem-wrap-around is 8192.
Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and
*without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will
jump to address 4096 (wrap around at 8192 and decreasing addresses from then
on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098.
avr_relative_distance_considering_wrap_around though, does the wrap around only
if the passed in distance is less than half of the wrap around distance. In this
case, it is exactly equal to half (original distance 4098, adjusted distance of
4096 and wraparound of 8192), and the bypassed wrap around causes the reloc
overflow error.
Fix by wrapping around even if adjusted distance is equal to half of wrap around
distance.
