* config/tc-mips.c (macro): Switch misordered call to frag_grow()
and setting of tc_fr_offset.
gas/testsuite/
* gas/mips/elf-rel16.[sd]: New test.
* gas/mips/mips.exp: Run it.
* gas/mips/elf-rel-xgot-n32.d: Fix addends for "lw $5,dl1+34($5)".
* gas/mips/elf-rel-xgot-n64.d: Likewise.
for loading addresses using CALL relocations.
Don't emit CALL relocations when a base register is used.
* gas/mips/lca-svr4pic.d: New test for the "lca" macro.
* gas/mips/lca-xgot.d: Likewise.
* gas/mips/lca.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* opcode/mips.h: Define new enum members, M_LCA_AB and M_DLCA_AB.
* mips-opc.c (mips_builtin_opcodes): Handle new macros: "lca" and
"dlca".
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_ip): Capitalize first word of
existing condition code warning, and add condition code
warnings for .ps instructions, and for bc1any[24][tf].
[ gas/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* lib/gas-defs.exp (run_dump_test): If stderr file is specified
and there was no stderr output, compare anyway (i.e., cause a
test failure).
* gas/mips/mips64-mips3d.s: Add some new instructions to test warnings.
* gas/mips/mips64-mips3d.l: New file.
* gas/mips/mips64-mips3d.d: Use mips64-mips3d.l, and update for
changes to mips64-mips3d.s.
* gas/mips/mips64-mips3d-incl.d: Likewise.
* gas/mips/set-arch.l: New file.
* gas/mips/set-arch.d: Specify set-arch.l as stderr output to check.
* gas/mips/mips5.l: Make error messages match source.
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
2003-07-08 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_validate_fix): Do not warn about branch
target being a global symbol if not compiling SVR4 PIC code.
[ gas/testsuite/ChangeLog ]
2003-07-08 Chris Demetriou <cgd@broadcom.com>
* gas/testsuite/gas/mips/mips.exp: Make sure that branch-misc-2 is
run to compile non-PIC code, and add branch-misc-2pic.
* gas/mips/branch-misc-2.l: Adjust for change in non-PIC warnings.
* gas/mips/branch-misc-2pic.l: New file.
* gas/mips/branch-misc-2pic.s: New file.
special handling for n32 ABI.
(macro): Likewise.
* gas/mips/elf-rel-got-n32.d: Remove special handling for n32 ABI.
* gas/mips/elf-rel-xgot-n32.d: Likewise.
* gas/mips/jal-newabi.d: Likewise.
* ld-mips-elf/elf-rel-got-n32.d: Remove special handling for n32 ABI.
* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
(elf_mips_howto_table_rel): Use it.
(gprel32_with_gp): Move prototype.
(mips_elf_hi16_reloc): Check for ! BSF_LOCAL instead of zero addend.
Use mips_elf_generic_reloc.
(mips_elf_got16_reloc): Check for ! BSF_LOCAL instead of zero addend.
Code cleanup.
(_bfd_mips_elf32_gprel16_reloc): Check for ! BSF_LOCAL instead of
zero addend.
(mips_elf_gprel32_reloc): Likewise. Use the same GP assignment logic
as in the other *_gprel*_reloc functions.
(gprel32_with_gp): Handle partial_inplace properly.
(mips32_64bit_reloc): Use mips_elf_generic_reloc.
(mips16_gprel_reloc): Check for ! BSF_LOCAL instead of zero addend.
Do addend handling directly instead of calling
_bfd_mips_elf_gprel16_with_gp. Handle partial_inplace properly.
* elf64-mips.c (mips_elf64_hi16_reloc): Check for ! BSF_LOCAL instead
of zero addend. Handle partial_inplace properly.
(mips_elf64_got16_reloc): Check for ! BSF_LOCAL instead of zero
addend.
(mips_elf64_gprel16_reloc): Likewise.
(mips_elf64_literal_reloc): Likewise.
(mips_elf64_gprel32_reloc): Likewise. Use the same GP assignment
logic as in the other *_gprel*_reloc functions. Handle
partial_inplace properly.
(mips_elf64_shift6_reloc): Check for ! BSF_LOCAL instead of zero
addend. Handle partial_inplace properly.
(mips16_gprel_reloc): Likewise. Do addend handling directly instead
of calling _bfd_mips_elf_gprel16_with_gp.
* elfn32-mips.c (mips_elf_got16_reloc): Check for BSF_LOCAL.
(mips_elf_gprel32_reloc): Check for ! BSF_LOCAL instead
of zero addend.
(mips_elf_shift6_reloc): Handle partial_inplace properly.
(mips16_gprel_reloc): Likewise. Do addend handling directly instead
of calling _bfd_mips_elf_gprel16_with_gp.
* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Handle
partial_inplace properly. Fix wrong addend handling. Fix overflow
check.
(_bfd_mips_elf_sign_extend): Renamed from mips_elf_sign_extend and
exported.
(mips_elf_calculate_relocation): Use _bfd_mips_elf_sign_extend.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_dynamic_relocation): Update sec_info_type access.
* elfxx-mips.h (_bfd_mips_relax_section): Fix prototype declaration.
(_bfd_mips_elf_sign_extend): New prototype.
* config/tc-mips.c (md_pcrel_from): Return actual pcrel address.
(md_apply_fix3): Ignore non-special relocations. Remove superfluous
exceptions from size assert. Remove most of the addend fixup
specialcasing. Remove value, use valP directly. simplify fx_addnumber
handling. Remove zero addend specialcases.
(tc_gen_reloc): Use appropriate value for reloc2 addend. Remove
the addend fixup specialcase.
* config/tc-mips.h (MD_APPLY_SYM_VALUE): Define as 0.
fixp's. Don't relax overflow checking for partial_inplace relocations.
Use the actual relocation type in combined relocs, not just the type
of the first one.
(macro_build_jalr): Use actual relocation size for new fix.
(s_cpsetup, s_gpdword): Likewise.
Alexandre Oliva <aoliva@redhat.com>
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Adjust
pic tests, change to warning.
(_bfd_mips_elf_final_link): Remove EF_MIPS_CPIC flag setting.
2003-05-07 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (mips_abicalls): New variable.
(md_parse_option): Use.
(s_option): Ditto.
(s_abicalls): Ditto.
(mips_elf_final_processing): Set EF_MIPS_PIC and
EF_MIPS_CPIC dependent on above.
* config/tc-mips.c: Use signed add for n32 address arithmetic.
(append_insn): When filling delay slots with instructions
that have fixups that tc_gen_reloc might consider modifyable
in variant frags, start a new frag.
(load_address): Generate GOT_DISP with of without offset
depending on whether symbol is local. For -xgot, use
GOT_PAGE/GOT_OFST or GOT_HI16/GOT_LO16.
(macro) <M_DLA_AB, M_LA_AB>: Likewise.
<M_JAL_A>: In NewABI, use CALL16 or GOT_DISP for small got,
CALL_HI16/CALL_LO16 or GOT_PAGE/GOT_OFST for big got.
<ld_st>: In NewABI with small got, always use
GOT_PAGE/GOT_OFST, with the latter in the load/store
instruction. With big got, use GOT_HI16/GOT_LO16 or
GOT_PAGE/GOT_OFST.
(tc_gen_reloc): Adjust variant frags with GOT_DISP in NewABI.
Add tc_frag_data.tc_fr_offset to addends. Decay CALL16,
GOT_OFST and GOT_DISP to GOT_DISP in NewABI.
(md_convert_frag): Use memmove for safe copying of overlapping
regions.
constant address that Alexandre took out by accident. Reject
64-bit addresses that are not sign extensions of 32 bits only if
we don't support 64-bit address constants.
2003-04-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (macro2): Adjust implementation of
M_ULH, M_ULHU, M_ULW, and M_ULD so that they work properly
in the case where the source and destination registers
are the same.
[ gas/testsuite/ChangeLog ]
2003-04-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/ulh.d: Adjust for ulh and ulhu macro assembly changes.
* gas/mips/mips.exp: Define new "gpr_ilocks" architecture
property, and add it to mips2 (and later) chips and r3900.
* gas/mips/uld2.s: New test source file.
* gas/mips/ulh2.s: Likewise.
* gas/mips/ulw2.s: Likewise.
* gas/mips/uld2.l: New test stderr listing.
* gas/mips/ulh2.l: Likewise.
* gas/mips/ulw2.l: Likewise.
* gas/mips/uld2-eb.d: New test.
* gas/mips/uld2-el.d: Likewise.
* gas/mips/ulh2-eb.d: Likewise.
* gas/mips/ulh2-el.d: Likewise.
* gas/mips/ulw2-eb-ilocks.d: Likewise.
* gas/mips/ulw2-eb.d: Likewise.
* gas/mips/ulw2-el-ilocks.d: Likewise.
* gas/mips/ulw2-el.d: Likewise.
* gas/mips/mips.exp: Run new tests for appropriate architectures.
* config/tc-mips.c (reloc_needs_lo_p): New function.
(fixup_has_matching_lo_p): New function.
(append_insn): Use reloc_needs_lo_p to check whether a relocation
might need a matching %lo(). Reuse the head of mips_hi_fixup_list
if that fixup already has a matching %lo(). Don't call frag_wane here.
(macro): Call frag_wane here if the last unmatched hi was in the
current frag.
(pic_need_relax): New function, split out from...
(md_estimate_size_before_relax): ...here.
(mips_frob_file): Use reloc_needs_lo_p. Use pic_need_relax to test
whether BFD_RELOC_MIPS_GOT16 fixups refer to global symbols.
gas/testsuite/
* gas/mips/rel12.[sd], gas/mips/rel13.[sd]: New tests.
* gas/mips/mips.exp: Run them.
* config/tc-mips.c (enum small_ex_type): Remove.
(imm_unmatched_hi): Remove.
(md_assemble): Remove use of imm_unmatched_hi. Remove the last
argument from calls to append_insn.
(append_insn): Remove unmatched_hi parameter; check reloc_type[0]
instead.
(macro_build): Update append_insn calls.
(mips16_macro_build, macro_build_lui): Likewise.
(mips_ip): Rework handling of small expressions. Move explicit
relocation handling into my_getSmallExpression. Assume that the
value of 'o' operands is zero if there is only one bracketed
expression left.
(percent_op): Make constant. Record the BFD relocation code
associated with each operator.
(my_getSmallParser, my_getPercentOp): Remove.
(parse_relocation): New function.
(my_getSamllExpression): Rework. Fill in relocations here
rather than in mips_ip.
gas/testsuite
* gas/mips/elf-rel8.[sd], gas/mips/elf-rel9.[sd],
gas/mips/elf-rel10.[sd], gas/mips/elf-rel11.[sd]: New tests.
* gas/mips/mips.exp: Run elf-rel8 and elf-rel9 for all elf
targets. Run elf-rel10 and elf-rel11 for NewABI targets.
* configure: Rebuilt.
* config/te-irix.h: New file.
* config/tc-mips.c (mips_dwarf2_format): Use TE_IRIX to decide
whether to use Irix-specific 64-bit format.
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
the "+D" operand, which will be used only by the disassembler.
[ gas/testsuite/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test.
* gas/mips/cp0sel-names-mips32r2.d: New test.
* gas/mips/cp0sel-names-mips64.d: New test.
* gas/mips/cp0sel-names-numeric.d: New test.
* gas/mips/cp0sel-names-sb1.d: New test.
* gas/mips/cp0sel-names.s: New test source file.
* gas/mips/mips.exp: Run new tests.
[ include/opcode/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used.
[ opcodes/ChangeLog ]
2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0sel_name): New structure.
(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
(mips_cp0sel_names_sb1): New arrays.
(mips_arch_choice): New structure members "cp0sel_names" and
"cp0sel_names_len".
(mips_arch_choices): Add references to new cp0sel_names arrays
as appropriate, and make all existing entries reference
appropriate mips_XXX_names_numeric arrays rather than simply
using NULL.
(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
(lookup_mips_cp0sel_name): New function.
(set_default_mips_dis_options): Set mips_cp0sel_names and
mips_cp0sel_names_len as appropriate. Remove now-unnecessary
checks for NULL register name arrays.
(parse_mips_dis_option): Likewise.
(print_insn_arg): Handle "+D" operand type.
* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
names symbolically.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Remove one "ror" and two
"dror" entries, and reorder the remaining "dror" and "ror" entries.
[ gas/ChangeLog ]
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (macro): In M_DROL, M_DROR, M_ROL, and M_ROR,
use hardware rotate ops as appropriate. In M_DROL_I, M_DROR_I,
M_ROL_I, and M_ROR_I, simplify code, clean up warnings, and
arrange not to issue warnings about use of AT when AT is not
actually used.
[ gas/testsuite/ChangeLog ]
2002-12-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/rol.s: Add ".set noat" and some new instructions to test.
* gas/mips/rol64.s: Likewise.
* gas/mips/rol.l: New file.
* gas/mips/rol.d: Adjust to use rol.l and for rol.s changes.
* gas/mips/rol64.l: New file.
* gas/mips/rol64.d: Adjust to use rol64.l and for rol64.s changes.
* gas/mips/rol-hw.d: New file.
* gas/mips/rol-hw.l: New file.
* gas/mips/rol64-hw.d: New file.
* gas/mips/rol64-hw.l: New file.
* gas/mips/mips.exp: Run rol-hw and rol64-hw tests.
Adjust callers.
(RELAX_BRANCH_RELOC_S2): Delete.
(append_insn): Use only BFD_RELOC_16_PCREL_S2 for branches.
Do not handle BFD_RELOC_16_PCREL.
(macro_build, mips_ip): Likewise.
(md_pcrel_from): Return 4 for undefined symbols regardless of
mips_pic.
(md_apply_fix3): Use only BFD_RELOC_16_PCREL_S2 for branches.
Don't dereference howto if no such relocation is available.
Do not apply hack for in-place zero addend in NEWABI.
(md_convert_frag): Use only BFD_RELOC_16_PCREL_S2 for branches.
(mips_pseudo_table): Add .gpdword.
(mips_need_elf_addend_fixup): never for NEWABI.
(md_apply_fix3): Don't mark BFD_RELOC64 after GPREL16 or
GPREL32 as done.
(s_cpadd): Generate .cpadd on NEWABI.
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
vr5400 and vr5500. Add entry for -mfix-vr4122-bugs.
* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
(hilo_interlocks): True for CPU_VR5500.
(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
(mips_fix_vr4122_bugs): New.
(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
(mips_emit_delays): Likewise.
(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
[M_ROLI]: Likewise ror if CPU_HAS_ROR.
(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
(OPTION_ELF_BASE): Bump.
(md_parse_option): Handle the new options.
(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
vr5400 and vr5500.
[gas/testsuite/]
* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
* gas/mips/vr4111.[sd]: ...this new test.
* gas/mips/vr4120.[sd],
* gas/mips/vr4122.[sd],
* gas/mips/vr5400.[sd],
* gas/mips/vr5500.[sd]: New tests.
* mips.exp: Run them.
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (IS_SEXT_32BIT_NUM): Move closer to top of file.
(IS_SEXT_16BIT_NUM): New macro.
(macro_build_ldst_constoffset): New function, to build a set of
instructions to do a load or store from a constant offset relative
to a given register.
(macro, s_cprestore): Use macro_build_ldst_constoffset to implement
.cprestore pseudo-op.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips-abi32-pic2.s: New file.
* gas/mips/mips-abi32-pic2.d: New file.
* gas/mips/mips.exp: Run new test.
[ plus, fixed date on prev. gas/testsuite/ChangeLog entry. ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (md_apply_fix3): Just return for BFD_RELOC_8.
[ gas/testsuite/ChangeLog ]
2002-09-18 Chris Demetriou <cgd@broadcom.com>
* gas/mips/baddata1.s: New file.
* gas/mips/baddata1.l: New file.
* gas/mips/mips.exp: Run new test.
(macro): Likewise for la. Likewise for ld.
(mips_after_parse_args): Make -xgot optional, not the default.
(md_apply_fix3): Allow composite relocation to set up gp.
(tc_gen_reloc): Allow relaxing for newabi.
Relax R_MIPS_CALL16 to R_MIPS_GOT_PAGE/R_MIPS_GOT_OFST if local.
Relax R_MIPS_GOT16/R_MIPS_LO16 to R_MIPS_GOT_DISP if local.
* config/tc-mips.c (macro2): Implement rotates by zero using shifts
by zero.
[gas/testsuite]
* gas/mips/rol.s: Add rotate by zero tests.
* gas/mips/rol.d: Update accordingly.
* gas/mips/rol64.d: Expect rotates by zero to use dsrl.
the fix-up against on the right frag.
(s_cpsetup): Likewise. Parse third argument as expression, to
handle global symbols and forward/backward labels correctly.
* config/tc-mips.c (mips_ip): Don't work out the value of
constant %hi()s here.
[gas/testsuite/]
* gas/mips/elf-consthilo.[sd]: New test.
* gas/mips/mips.exp: Run it.
immediate offset in "dla" and "la" expansions.
* gas/mips/empic.d: Treat "addiu" and "daddiu" as equivalent when
$0 is source.
* mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as
aliases to "daddiu" and "addiu".
* config/tc-mips.c (tc_gen_reloc): Extend GP-relative addend
handling to BFD_RELOC_MIPS16_GPREL.
[gas/testsuite/]
* gas/mips/elf-rel6.[sd]: New test.
* gas/mips/mips.exp: Run it.
* doc/c-mips.texi: Remove -mcpu. Document -mabi.
* configure.in (MIPS_CPU_STRING_DEFAULT): New configuration macro.
(USE_E_MIPS_ABI_O32, MIPS_DEFAULT_64BIT): New configuration macros.
* configure, config.in: Regenerate.
* config/tc-mips.c (file_mips_abi): Rename to mips_abi.
(mips_set_options): Remove "abi" field.
(mips_opts): Update accordingly. Replace all uses of mips_opts.abi
with mips_abi.
(mips_cpu): Remove.
(mips_arch_string, mips_arch_info): New vars.
(mips_tune_string, mips_tune_info): New vars.
(ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New macros.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): Don't check the ABI.
(mips_isa_to_str, mips_cpu_to_str): Remove.
(mips_ip): If the selected architecture is a generic ISA rather
than a processor, only mention the ISA level in error messages.
(OPTION_MCPU): Remove.
(OPTION_FP64): New.
(md_longopts): Add -mfp64, remove -mcpu.
(mips_set_option_string): New fn.
(md_parse_option): Make -mipsN update file_mips_isa rather than
mips_opts.isa. Use mips_set_option_string to set -march or -mtune.
Don't let -mgp32 and -mfp32 change the ABI.
(show): Move to end of file. Constify string argument.
(md_show_usage): Move to the end of the file. Read available
architectures from mips_cpu_info_table.
(mips_set_architecture): New fn.
(mips_after_parse_args): Rework. Remove -mcpu handling. -mipsN
is an alias for -march=mipsN. Don't change the ABI based on other
flags. Infer the register size from the ABI as well as the
architecture. Complain about more conflicting arguments.
Unify logic with GCC.
(s_mipsset): Don't change the ABI.
(mips_elf_final_processing): Check USE_E_MIPS_ABI_O32.
(mips_cpu_info_table): Remove Generic-MIPS* entries, keeping just
"mipsN"-type entries. Remove entries that vary only in the
manufacturer's prefix, or that have "000" replaced by "k".
Remove TARGET_CPU entries. Make r2000 entry use CPU_R3000.
(mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns.
(mips_parse_cpu): New fn.
(mips_cpu_info_from_name, mips_cpu_info_from_cpu): Remove.
(mips_cpu_info_from_isa): Minor formatting tweak.
[gas/testsuite]
* gas/mips/mips-gp32-fp64.d,
* gas/mips/mips-gp32-fp64-pic.d: Add -mfp64.
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
Based on patch from Matt Green:
* config/obj-elf.h (ECOFF_DEBUGGING): Make configurable.
* config/tc-mips.c (s_mips_file): Renamed from s_file.
(s_mips_loc): New function.
(mips_nonecoff_pseudo_table): Call them.
(append_insn): Call dwarf2_emit_insn.
to -1.
(file_ase_mips16): New veriable.
(mips_eabi64): Remove.
(CPU_HAS_MIPS16): New define.
(CPU_HAS_MDMX): Fix data type.
(md_begin): Code cleanup. Use file_ase_mips16.
(mips_elf_final_processing): Handle mips16 header flag.
Handle EABI flag without intermediate variable.
(md_begin): Add $zero as alias name for $0.
(insn_uses_reg): Use ZERO define.
(mips_ip): Add $zero as alias name for $0.
(mips16_ip): Likewise.
(s_cplocal): Demand empty rest of input line.
(tc_get_register): Likewise. Add support for $kt0, kt1 register
names. Use ZERO define. Fix input_line_pointer progress.
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
(mips_big_got): Initialize.
(mips_trap): Initialize.
(load_address): Use mips_gp_register instead of hardcoded value.
Remove dbl parameter, use HAVE_32BIT_ADDRESSES instead.
(macro): Use mips_gp_register instead of hardcoded value.
(macro2): Change load_address calls.
(md_pcrel_from): Comment formatting.
(s_cpload): Use mips_gp_register instead of hardcoded value.
(s_cprestore): Likewise. Comment formatting.
(s_gpword): Fix data type.
(s_cpadd): Use mips_gp_register instead of hardcoded value.
(nopic_need_relax): Replace GP in comments by $gp.
(mips_elf_final_processing): Better comment.
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mips3d" member.
(mips_opts): Initialize "ase_mips3d" member.
(file_ase_mips3d): New variable.
(CPU_HAS_MIPS3D): New macro.
(md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d
based on command line options and configuration defaults.
(macro_build, mips_ip): Accept MIPS-3D instructions if
mips_opts.ase_mips3d is set.
(OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option):
Add support for "-mips3d" and "-no-mips3d" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mips3d" and ".set nomips3d".
(mips_elf_final_processing): Add a comment indicating that a
MIPS-3D ASE ELF header flag should be set, when one exists.
* doc/as.texinfo: Document -mips3d and -no-mips3d options.
* doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set
nomips3d" directives.
[ gas/testsuite/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mips3d.s: New file.
* gas/mips/mips64-mips3d.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mips3d" test.
[ include/opcode/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
instructions.
(OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
may be passed along with the ISA bitmask.
[ opcodes/ChangeLog ]
2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA
bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add
comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that
indicate that they should dissassemble all applicable
MIPS-specified ASEs.
* mips-opc.c: Add support for MIPS-3D instructions.
(M3D): New definition.
* mips-opc.c: Update copyright years.
* config/tc-mips.c (mips_need_elf_addend_fixup): For embedded-PIC
only, undo the changes made on 2001-06-08, with the
effect being that common or extern symbols are
adjusted for embedded-PIC, but weak symbols are not.
(md_estimate_size_before_relax: Likewise, with the effect
that extern symbols are treated the same as weak symbols
only if not embedded-PIC.
(mips_fix_adjustable) Likewise, with the effect that
weak or extern symbols are not adjusted for embedded-PIC.
(md_apply_fix3): Tweak so that the case where value is zero
is handled more correctly for embedded-PIC code.
* config/tc-mips.c (mips_need_elf_addend_fixup): Restructure into
a sequence of indpendent 'if' statements for easier debugging
and future modification.
* config/tc-mips.c (IS_SEXT_32BIT_NUM): New macro to
determine if a number is a sign-extended 32-bit number.
(load_register): Use IS_SEXT_32BIT_NUM.
(macro): Check if load/store macro handling is using a
constant 32-bit address on 64-bit address systems, and if
so optimize the generation of that address.
matched before the shorter ones.
(my_getSmallParser): Fix handling of nested parentheses in
percent_op's. Code cleanup.
(my_getPercentOp): New function, code from my_getSmallParser.
(my_getSmallExpression): Fix handling of closing parentheses.
Code cleanup. Better comments.
(md_apply_fix3): ...here. Don't prevent the symbol value being
subtracted twice from GPREL addends.
(tc_gen_reloc): Add the symbol value to a GPREL addend if it was
subtracted by the previous function.
(md_longopts): Allow OPTION_MABI for ELF compilation only. RE-allow
OPTION_GP32, OPTION_GP64, OPTION_FP32 for non-ELF compilation.
Sort options a bit more logical.
(md_parse_option): Allow OPTION_32, OPTION_N32, OPTION_N64,
OPTION_MABI only for elf targets.
* gas/mips/mips.exp: Change naming of some conditionals to reflect
the object format they actually mean. Don't try mips-abi32 and
mips-abi32-pic tests for ecoff.
mips_set_options.
(mips_set_options): Add members gp32, fp32, abi.
(file_mips_gp32): New flag.
(file_mips_fp32): New flag.
(mips_opts): Initialize the new members.
(mips_gp32): Remove.
(mips_fp32): Remove.
(HAVE_32BIT_GPRS): Use the new values from mips_opts.
(HAVE_32BIT_FPRS): Likewise.
(HAVE_NEWABI): Likewise.
(HAVE_64BIT_OBJECTS): Likewise.
(md_begin): Likewise. Save default (file) values.
(md_parse_option): Use the new values from mips_opts.
(s_mipsset): Likewise. Fix logic to keep the ABI selection if
possible. Let .set mipsN work together with .set push/pop.
Enhance error messages.
(mips_elf_final_processing): Use file_mips_* for header processing.
2001-10-31 Chris Demetriou <cgd@demetriou.com>
* elf32-mips.c (_bfd_mips_elf_hi16_reloc): Handle PC-relative
relocations properly.
[ gas/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c (HAVE_32BIT_ADDRESSES): If compiling embedded
PIC code, assume pointers the same size as GPRs.
(macro): In M_LA_AB handling for embedded PIC code, support
"la $treg,foo-bar($breg)". In load/store handling
(label ld_st) support "<op> $treg,<sym>-<local_sym>($breg)"
which is used by the compiler for switch statements.
In load/store double multi-instruction macro handling
(label ldd_std) add a comment that no special handling
is currently done for embedded PIC.
(mips_ip): In 'o' (16-bit offset) case, only accept 16
bit offsets.
[ gas/testsuite/ChangeLog ]
2001-10-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/empic.s: Undo damage inflicted on 2000-12-02.
* gas/mips/empic.d: Likewise.
* gas/mips/elempic.d: Likewise (it was copied into other files).
* gas/mips/telempic.d: Likewise.
* gas/mips/tempic.d: Likewise.
* gas/mips/empic2.s: New test to check new 'la' and 'lw' (and
related ops) syntax, test loads with large offsets.
* gas/mips/emcic2.d: Likewise.
* gas/mips/mips.exp: Run the new test on ELF platforms.
(mips_cpreturn_register): Likewise.
(mips_gp_register): Likewise.
(s_cpsetup): New function prototype.
(s_cplocal): Likewise.
(s_cpreturn): Likewise.
(s_gpvalue): Likewise.
(mips_pseudo_table): Add .cpsetup, .cplocal, .cpreturn, .gpvalue
pseudo-ops.
(macro): Don't warn about .cprestore for NewABI.
(md_pcrel_from): Code cleanup.
(mips_force_relocation): Force output of some NewABI relocations even
without a defined symbol.
(s_cpload): Ignore .cpload for NewABI.
(s_cpsetup): Handle .cpsetup.
(s_cplocal): Handle .cplocal.
(s_cprestore): Ignore .cprestore for NewABI.
(s_cpreturn): Handle .cpreturn.
(s_gpvalue): Handle .gpvalue.
(s_cpadd): Ignore .cpadd for NewABI.
(nopic_need_relax): Take g_switch_value into account as gp
optimization.
(tc_gen_reloc): Don't handle BFD_RELOC_MIPS_{CALL,GOT}* for NewABI.
(small_ex_type): Named this enum, more return values for
my_getSmallExpression.
(mips_ip): Allow SPC and HT between arguments. Handle some NewABI
triple relocations. Protect some parts with ifdef OBJ_ELF.
(percent_op_match): New struct, lookup table for %some_reloc().
(my_getSmallParser): New function, parses nested percent_ops also.
(my_getSmallExpression): Rewite to support nested percent_ops.
(load_address): Support both 32- and 64-bit addresses.
(macro): Call load_register correctly. Expand 64-bit loads ans stores.
(macro2): Call load_address correctly.
relocation triple.
(prev_insn_fixp): Likewise.
(append_insn): Changed prototype to accept a relocation pointer.
(imm_reloc): Make it an array.
(offset_reloc): Likewise.
(md_assemble): Handle triple relocations.
(append_insn): Likewise. Add handling for some NewABI relocations.
(mips_no_prev_insn): Handle triple relocations.
(macro_build): Likewise. Add handling for some NewABI relocations.
Move handling for the 'u' case to append_insn().
(mips16_macro_build): Handle triple relocations.
(macro_build_lui): Likewise. Don't handle _gp_disp as special symbol
for NewABI.
(mips_ip): Handle triple relocations.
(mips16_ip): Likewise.
(mips_force_relocation): Force handling of triple relocations
without symbols for NewABI.
(md_apply_fix): Add handling for some NewABI relocations.
(mips_target_format): Move downwards in file, use HAVE_64BIT_OBJECTS
in it.
(mips_abi_level, mips_abi): New enum.
(mips_32bit_abi): Remove.
(HAVE*PRS): Use mips_abi instead of mips_32bit_abi.
(HAVE_NEWABI): New define.
(HAVE_64BIT_OBJECTS): New define.
(HAVE_32BIT_ADDRESSES): Don't return true for 64bit objects.
(HAVE_64BIT_ADDRESSES): New define, inverse of HAVE_32BIT_ADDRESSES.
(support_64bit_objects): New prototype.
(md_begin): Use mips_abi instead of mips_32bit_abi. Don't write
.reginfo section for n32, use .MIPS.options instead.
(support_64bit_objects): New function, code from md_parse_option.
(md_longopts): Add -n32 option.
(md_parse_option): Use mips_abi instead of mips_32bit_abi/mips64.
Add -n32 option. Protect with OBJ_ELF.
(s_mipsset): Use mips_abi instead of mips_32bit_abi.
(mips_elf_final_processing): Likewise. Don't write .reginfo section
for n32, use .MIPS.options instead.
and rearrange for efficiency. For "PIC code" subtraction, use
"rightseg" rather than recalculating. For "symbol OP symbol"
subtract, set "retval" to absolute_section if symbols in same
section.
* symbols.c (resolve_symbol_value): Resolve "sym +/- expr" to an
O_symbol. Simplify a +/- b code. Allow equality and non-equality
comparisons on symbols from any section. Allow other comparison
operators as for subtraction.
(symbol_equated_reloc_p): New predicate function.
* symbols.h (symbol_equated_reloc_p): Declare.
* write.c (adjust_reloc_syms): Use symbol_equated_reloc_p.
(write_relocs): Likewise.
(write_object_file): Likewise.
(relax_segment <rs_machine_dependent>): Ensure segment for
expression syms is set correctly.
* config/tc-mips.c (md_estimate_size_before_relax): Likewise.
* config/tc-i386.c (md_assemble <Output jumps>): Don't lose part
of a complex expression when setting up frag_var.
value, not the word beyond maximum.
* tc_mips.c (macro_build_lui): Code cleanup.
(macro): Reflect change to MAX_GPREL_OFFSET.
(mips_ip): Check explicitly against S_EX_NONE.
(my_get_SmallExpression): parse for %gp_rel, not %gprel.
(md_apply_fix): Code cleanup.
return values.
(mips_ip): Use the new return values instead of characters. Add
support for %higher and %highest.
(LP): Remove.
(RP): Remove.
(my_getSmallExpression): Make parsing case insensitive and more
reliable. Add support for %higher and %highest. Further support to
parse %gprel and %neg is implemented but currently deactivated.
-mipsX is specified. Make both -mcpu/-march and -mcpu/-mtune pairs
mutually exclusive (if they are different).
(md_parse_option): Warn if an -march/-mtune/-mcpu/-m<cpu> option is
set more than once.
* config/tc-mips.c (mips_fp32, mips_32bit_abi): New static variables.
(md_long_opts): Add -mfp32 option.
(md_parse_option): Handle it. Set mips_32bit_abi given -mabi=32.
(md_show_usage): Show usage for -mfp32 and -mgp32.
(HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): New macros.
(HAVE_64BIT_GPRS, HAVE_64BIT_FPRS): New macros, inverse of the above.
(HAVE_32BIT_ADDRESSES): New macro.
(load_register): Use HAVE_32BIT_GPRS to determine the register width.
(load_address): Use HAVE_32BIT_ADDRESSES to determine the address size.
(s_cprestore, s_cpadd): Likewise.
(macro): Use HAVE_32BIT_GPRS to determine the width of registers
used in branch and M_LI_D macros. Use HAVE_64BIT_FPRS to determine
the width registers used in M_LI_DD macros. Use HAVE_32BIT_ADDRESSES
to determine the width of addresses in load, store and jump macros.
(macro2): Use HAVE_32BIT_GPRS to determine the width of registers
used in set instructions; do not check the address size for them.
Use HAVE_32BIT_ADDRESSES to determine the width of addresses in
unaligned load and store macros.
(mips_ip): Use the new macros to check the width of a register when
processing float constants. Force a constant into memory if it is
destined for an FPR and the FPRs are wider than the GPRs. Warn about
odd FPR numbers if HAVE_32BIT_FPRS. Use HAVE_32BIT_GPRS rather
than mips_gp32 to select synthetic instructions.
(macro_build): Use HAVE_32BIT_GPRS rather than mips_gp32 to select
synthetic instructions.
* config/tc-mips.c (md_estimate_size_before_relax): Make sure
we treat weak like extern only for ELF.
(mips_fix_adjustable): Make sure we don't adjust extern/weak
symbols only for ELF.
* config/tc-mips.c (md_apply_fix): Prevent addend from becoming zero
if it's expected to be non-zero.
[gas/testsuite]
* gas/mips/elf-rel3.s: Add zero word to end of file.
* NEWS: Updated for the new -n option for the MIPS assembler.
* config/tc-mips.c (md_show_usage): Add -n.
* doc/as.texinfo: Document the new -n option.
* doc/c-mips.texi: Likewise.
* doc/as.1: Regenerated.
* config/tc-mips.c (warn_nops): New variable. Set to 0 to
disable warning about all NOPS that the assembler generates.
(macro): Warn NOPS generated only if warn_nops is not 0.
(md_shortopts): Add `n'.
(md_parse_option): Set warn_nops to 1 for `n'.
* config/tc-mips.c (md_apply_fix): Don't adjust common
extern/weak symbols for ELF.
(md_estimate_size_before_relax): Treat weak like extern for
ELF.
(mips_fix_adjustable): Don't adjust extern/weak symbols for
ELF.
* Makefile.in: Regenerate.
* config/tc-mips.c (mips16_mark_labels): Reduce number of calls to
S_GET_VALUE by using a temp.
(append_insn): Likewise, and for S_GET_VALUE too.
(mips_emit_delays): Likewise.
(my_getExpression): Likewise.
(md_apply_fix): Likewise. Use "valueT" rather than "long" for "value".
(mips16_extended_frag): Remove code concerned with avoiding
locking in a frag address now that symbols are not finalized until
relaxation is complete. Cater for first relaxation pass having
bogus addresses. Use relax_marker to reliably determine whether a
symbol frag has been reached on the current pass.
Richard Sandiford
Kazu Hirata
Maciej W. Rozycki
Thiemo Seufer
Chris Demetriou
Rainer Orth
Alan Modra
Nick Clifton
Eric Christopher
Alexandre Oliva
H.J. Lu
Daniel Jacobowitz
Kevin Buettner
Stan Cox