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1200 Commits

Author SHA1 Message Date
Andrew Cagney
eaa202ddd4 * gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape 
newlines at end of generated call to sim_engine_abort.
 1997-10-16 03:19:41 +00:00
Andrew Cagney
81b3b32cda Sanitize additional files. 1997-10-15 00:05:28 +00:00
Andrew Cagney
5a9bddea84 Enable d10v simulator testsuite - two tests: Hello World and exit47. 1997-10-15 00:00:41 +00:00
Andrew Cagney
fd89abc204 Handle core regions which start at a poorly aligned address. 1997-10-14 23:45:52 +00:00
Andrew Cagney
7456a10d9b * sim-alu.h (ALU64_HAD_OVERFLOW): Define. 
(ALU64_SUB): Define.
* Make-common.in (all): Build SIM_EXTRA_ALL first.
(.gdbinit): Remove dependencies, generate once per build.
 1997-10-14 09:39:05 +00:00
Andrew Cagney
055ee2977f Checkpoint IGEN version of MIPS simulator. 1997-10-14 09:34:08 +00:00
Andrew Cagney
0c2c5f6141 Move global MIPS simulator variables into sim_cpu struct. 1997-10-14 09:26:03 +00:00
Andrew Cagney
1b217de0f3 Correct type of address argument for sim_core_{read,write} 1997-10-14 09:24:57 +00:00
Andrew Cagney
18c64df613 o Add support for configuring wordsize, fp hardware and target 
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
 1997-10-14 07:27:31 +00:00
Andrew Cagney
d5cecca93c Output line-ref to original igen source file when generating trace 
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
 1997-10-14 02:54:08 +00:00
Fred Fish
1155e06e3f * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move 
exception generation code to OP_6E01.
	(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
	generation code.
PR 13550
 1997-10-13 18:26:52 +00:00
Fred Fish
b83093ff79 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. 
(OP_6601): Ditto.
PR 13498
 1997-10-11 16:50:05 +00:00
Fred Fish
93f0cb6975 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception. 
(OP_6601): Ditto.
 1997-10-11 16:48:47 +00:00
Andrew Cagney
49a6eed58a Snap. Gets through igen's checks. 1997-10-09 08:38:22 +00:00
Andrew Cagney
8782bfcfc4 Add -Wnodiscard option so that warning about discarded instructions 
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
 1997-10-09 08:35:33 +00:00
Andrew Cagney
2875c6c685 Build IGEN with the MIPS simulator. 1997-10-09 00:41:14 +00:00
Andrew Cagney
f2b3001251 MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
Andrew Cagney
391c71708e Checkpoint IGEN input file for MIPS simulator. 1997-10-07 08:45:11 +00:00
Andrew Cagney
b3c77578dc Rewrite simulator floating point module. Do not rely on host FP 
implementation.  Add preliminary support for different IEEE-754
rounding modes.  Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
 1997-10-03 00:03:35 +00:00
Andrew Cagney
63fe2cc799 Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. 1997-10-02 23:37:30 +00:00
Andrew Cagney
adf4739efe Add access to hi part of r5900 128 bit registers. 1997-09-30 03:45:51 +00:00
Bob Manson
26b20b0a0e * configure: Regenerated. 
Can't hack one without the other...
 1997-09-29 21:46:32 +00:00
Andrew Cagney
e9b53280ba Do not sanitize out sim/testsuite/common directory. 1997-09-29 00:24:08 +00:00
Fred Fish
5f90b21e40 * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing 
for end condition.
PR 13334
 1997-09-27 20:04:22 +00:00
Fred Fish
823f2df47f * interp.c (pc_addr): Discard upper bit(s) of PC in case 
IMAP1 selects unified memory.
PR 13275
 1997-09-27 19:57:05 +00:00
Mark Alexander
6eedf3f4e5 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. 1997-09-26 20:56:55 +00:00
Felix Lee
b28ad90b4d * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and 
SIM_ENGINE_RESTART_HOOK.
 1997-09-26 19:24:45 +00:00
Stu Grossman
68f92f98ac * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC 
and zfree instead of xmalloc and free.  Prevents warnings.
 1997-09-25 18:22:46 +00:00
Andrew Cagney
af51b8d56d Add/use SIM_AC_OPTION_BITSIZE. 1997-09-25 07:19:05 +00:00
Andrew Cagney
7a3fb4e6ea * config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with 
RRRRR=0 for simulator breakpoint. Previous breakpoint insn was two
words.
 1997-09-25 07:01:21 +00:00
Andrew Cagney
e63bc706fe Allow gencode.c to generate input to the igen generator. 1997-09-25 04:23:24 +00:00
Andrew Cagney
eb2e3c85ca Pacify GCC -Wall 1997-09-25 04:13:50 +00:00
Stu Grossman
b9d580a4b0 * Make-common.in: New files sim-break.c, sim-break.h. 
* sim-base.h:  Add point to breakpoint list to sim_state_base.
	* sim-break.c sim-break.h:  New modules that implement intrinsic
	breakpoint support.
	* sim-module.c:  Add breakpoint module.
 1997-09-25 00:51:17 +00:00
Jeff Law
bfebf1a52a r5900 sanitization fixes. 1997-09-24 07:27:43 +00:00
Jeff Law
c118539e6b mips64vr5900el-elf -> mips64r5900-elf. 1997-09-23 21:45:43 +00:00
Felix Lee
34d07b7867 * sim-events.c (SIM_EVENTS_POLL_RATE): poll more often than once 
an hour.
        * sim-n-core.h (WITH_XOR_ENDIAN): MSVC barfs on
        if (0) { 1 % 0; }
        * sim-core.c (sim_core_xor_write_buffer): WITH_XOR_ENDIAN + 1.
        (SIGBUS) define for Windows.
        * sim-trace.c (trace_printf,debug_printf): added ALMOST_STDC.
        * sim-resume.c: define SIGTRAP for windows.
        * sim-xcat.h: use token pasting if ALMOST_STDC.
 1997-09-23 18:08:09 +00:00
Jeff Law
832f05e865 vr5900-r5900. 1997-09-23 16:21:23 +00:00
Andrew Cagney
1398204eb0 Check v850eq popm[hl] instructions. 
Check v850 NMI/RETI.
 1997-09-23 08:40:55 +00:00
Andrew Cagney
4141b1c63d * Make-common.in (SIM_SCACHE, SIM_DEFAULT_MODEL): Assign configured values. 
(CONFIG_CFLAGS): Add same.
 1997-09-23 04:05:50 +00:00
Felix Lee
9f4fd82344 * sim-types.h (SIGNED64): ##i64 when _MSC_VER, not _WIN32. 
(SIGNED32): use ##i32.
 1997-09-23 03:51:33 +00:00
Felix Lee
8f80453197 * configure.in: i386-windows is a cross, so don't expect 
libiberty to be there.
	* configure: updated.
 1997-09-23 03:48:59 +00:00
Andrew Cagney
92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options 
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
 1997-09-23 01:25:26 +00:00
Andrew Cagney
76a6247f07 Add memory alignment config option. 1997-09-22 09:40:57 +00:00
Andrew Cagney
8d332f9c1a Enable --alignment option, stop sim-options.c hardwiring the alignment. 1997-09-22 09:34:28 +00:00
Andrew Cagney
4ca7d6d25b Fix disabling of model code when simulator does not support modeling. 
Stops `-p' crashing simulators.
 1997-09-22 09:16:14 +00:00
Andrew Cagney
794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney
b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4 
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
 1997-09-22 00:24:46 +00:00
Nick Clifton
f13f11b494 Removed the v850eq sanitization 1997-09-20 23:40:50 +00:00
Gavin Romig-Koch
c476ac5560 Add handling for 3900's SDBBP, DERET, and RFE insns. 
* gencode.c (SDBBP,DERET): Added (3900) insns.
	(RFE): Turn on for 3900.
	* interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
	(dsstate): Made global.
	(SUBTARGET_R3900): Added.
	(CANCELDELAYSLOT): New.
	(SignalException): Ignore SystemCall rather than ignore and
	terminate.  Add DebugBreakPoint handling.
	(decode_coproc): New insns RFE, DERET; and new registers Debug
	and DEPC protected by SUBTARGET_R3900.
	(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
	bits explicitly.
	* Makefile.in,configure.in: Add mips subtarget option.
	* configure: Update.
 1997-09-20 18:22:22 +00:00
Gavin Romig-Koch
7afa8d4edc * gencode.c: Add r3900 (tx39). 
* gencode.c: Fix some configuration problems by improving
	the relationship between tx19 and tx39.
 1997-09-19 13:39:55 +00:00
Andrew Cagney
8122e3e471 Add alignment option. 
Add support for hardwired and default alignment to configuration.
 1997-09-19 08:11:40 +00:00
Andrew Cagney
f4822f1e6e More tests. 
Have sld check verify that the processor is a v850eq.
 1997-09-19 06:40:11 +00:00
Andrew Cagney
a276b6f057 Clean up tracing for Bcond & jmp insns. 
Fix computation of disp16 and disp22.
Clean up tracing of sld* insns.
 1997-09-19 06:39:21 +00:00
Andrew Cagney
4410c4b925 Correctly locate `_' in generated names. 1997-09-19 04:41:01 +00:00
Andrew Cagney
bd4c35cc6d Fix cmov immed. 1997-09-19 02:20:02 +00:00
Andrew Cagney
6a4c8f1e29 Change semantic function name to semantic_<INSN>_<FMT> instead of 
semantic_<FMT>_<INSN>.
 1997-09-19 00:50:24 +00:00
Andrew Cagney
60fe0e06a8 Fix cmov insn. 1997-09-19 00:50:19 +00:00
Felix Lee
3e906c081a sanitization fixes. typoes, missing fences, "start" instead of "end", etc. 1997-09-18 06:03:52 +00:00
Felix Lee
88770c1c90 add missing files. 1997-09-18 04:56:22 +00:00
Felix Lee
e1625ed217 v850 files that weren't being removed if !keep-v850 1997-09-18 01:33:24 +00:00
Felix Lee
2001e533ff * sim-main.h (kill): macro was missing args. 
(SIGTRAP): define for MSVC.
 1997-09-17 23:46:49 +00:00
Andrew Cagney
8bd89725a7 Test US bit of v850eq. 
Loop program for testing interrupt delivery.
 1997-09-17 13:46:29 +00:00
Andrew Cagney
a72f8fb439 Clean up more tracing. 
FIX interrupt delivery - was zapping PSW before it had been saved.
FIX interrupt return, was one instruction out.
 1997-09-17 08:14:23 +00:00
Andrew Cagney
175c6fd375 * sim-events.c (ETRACE): Use trace_printf not sim_io_printf for 
trace output.
* sim-core.c (sim_core_signal): When bad access halt simulator
SIGSEGV / SIGBUS instead of aborting.
(signal.h): Include.
* sim-watch.c (sim_watchpoint_install): Handler for watchpoint
options was missing.
 1997-09-17 08:13:07 +00:00
Andrew Cagney
6aead89a5f Fix tracing for: "ctret", "bsw", "hsw" 
Fix bugs in: "bsh", "callt", "stsr".
 1997-09-17 05:31:00 +00:00
Andrew Cagney
dfa5c0ca02 Define MOVED macro, move sub-bitfield from XXX to YYY. 1997-09-17 05:28:32 +00:00
Andrew Cagney
fc07e279aa More v850 simulator tests. 1997-09-17 05:27:56 +00:00
Andrew Cagney
1a6eb36b62 More v850 simulator tests. 1997-09-17 03:31:09 +00:00
Andrew Cagney
b52e58c24f Add/test 8bit bit manipuation macros. 
Test LS and MS versions of SEXT macro.
Simplify/test macro returning a single bit.
 1997-09-17 03:25:54 +00:00
Andrew Cagney
8603b0f0ff Generic rules for building simple simulator test programs. 1997-09-16 23:57:57 +00:00
Gavin Romig-Koch
667065d0d4 * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for 
JALR, just 2.
 1997-09-16 20:01:00 +00:00
Gavin Romig-Koch
9cb8397f86 * sim/mips/interp.c: Correct some HASFPU problems. 1997-09-16 15:36:18 +00:00
Andrew Cagney
fb1fd47514 Smooth some of ALU tracing's rough edges. 
Fix switch insn.
 1997-09-16 14:00:15 +00:00
Andrew Cagney
6a0f95864a More sim-bits testing. 1997-09-16 13:58:44 +00:00
Andrew Cagney
aa5e6a5a78 Add {LS,MS}SEXT and {LS,MS}INSERTED macros. Eliminates bug in SEXT. 1997-09-16 07:04:46 +00:00
Andrew Cagney
3f33acd039 Use trace_one_insn in trace functions. Buffer up trace data so that 
it is displayed in a single block.
 1997-09-16 07:03:41 +00:00
Andrew Cagney
65a87fa9e1 v850eq simulator tests. 1997-09-16 07:01:57 +00:00
Andrew Cagney
c7db488f71 Restrict ldsr (load system register) to modifying just non-reserved PSW bits. 
For v850eq, include PSW[US] in bits that can be modified.
 1997-09-16 04:49:24 +00:00
Andrew Cagney
721478d51b Add v850e version of breakpoint instruction. 1997-09-16 02:15:55 +00:00
Andrew Cagney
3484de0091 Differentiate between a non-zero string and a constant zero field. 1997-09-16 02:14:18 +00:00
Jim Wilson
5262de2167 * simops.c (Multiply64): Don't store into register zero. 1997-09-16 01:45:23 +00:00
Andrew Cagney
4dda50b052 For instructions moved into v850.igen was computing (wrong) NIA when 
this wasn't needed.
 1997-09-15 23:09:26 +00:00
Andrew Cagney
0604253676 * igen.c (gen_run_c): Handle non-multi-sim case. 1997-09-15 22:40:14 +00:00
Andrew Cagney
bda6163995 Fix sanitization for v850 V v850e V v850eq 1997-09-15 14:42:51 +00:00
Andrew Cagney
a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common 
directory to specify its own unqiue config.h file).
 1997-09-15 08:25:04 +00:00
Andrew Cagney
658303f7d4 For v850eq start up with US bit set. 
Let sim_analyze_program determine the architecture.
Fix various sanitizations.
 1997-09-15 08:18:20 +00:00
Andrew Cagney
08547b1f1d Determine ARCHITECTURE from program if possible. 
Rename common's generated config.h to cconfig.h.
 1997-09-15 08:11:50 +00:00
Andrew Cagney
4bdab45adb * callback.c (os_write): divert stdout and stderr to their 
respective hooks.
 1997-09-15 08:02:23 +00:00
Andrew Cagney
410230cf6d Check reserved bits before executing instructions. 
Make v850[eq] the the default simulator.
Report illegal instructions.
Include v850e instructions in v850eq.
 1997-09-12 05:56:38 +00:00
Andrew Cagney
944deab68e v850eq wasn't building igen directory. 1997-09-12 03:13:27 +00:00
Andrew Cagney
93e7a1b5b7 Add profiling support to v850*. 1997-09-12 02:44:03 +00:00
Andrew Cagney
11ac69e013 Short form of sample-size option had wrong value. 1997-09-12 02:29:04 +00:00
Andrew Cagney
7a2f7ea758 v850* wants igen 1997-09-12 02:27:22 +00:00
Andrew Cagney
cf5c6e6e5d Generate instruction profile call with each instruction. 1997-09-12 02:26:31 +00:00
Martin Hunt
30d8198448 Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com> 
* interp.c (sim_resume): Increment PC at end of rep
	loop.

	* simops.c (OP_4201): Fix rachi instruction.
 1997-09-11 05:32:23 +00:00
Andrew Cagney
972f3a34f5 mips/sim_info was just returning????? 1997-09-10 23:50:32 +00:00
Andrew Cagney
cad7297e80 o Wordwrap usage messages from sim-options 
o	Clarify how to use alias options
o	use in sim-watch (better usage message)
o	Don't pass something on the stack into the
	watch-point interrupt hander.
 1997-09-10 22:47:12 +00:00
Andrew Cagney
8f050205eb (gen_itable_h): Output an enum defining the max size of the itable 
string members.
 1997-09-10 22:07:06 +00:00
Andrew Cagney
02508bb179 Have trace_input, trace_output use sim-trace for IO. 1997-09-10 05:40:04 +00:00
Felix Lee
d6cef44df4 * inst.h (sim_state): rename to h8300_sim_state, to avoid conflict 
with sim/common.
	* configure.in: check for sys/param.h
	* compile.c: #ifdef HAVE_SYS_PARAM_H.
	#define SIGTRAP for wingdb.
	(sim_resume): poll keyboard at least once per call.
	(sim_resume): use host_callback instead of printf for syscall
 	output.
 1997-09-10 05:20:37 +00:00
Andrew Cagney
d0b59aa593 Add option architecture-info to list supported architectures. 1997-09-10 05:16:34 +00:00
Gavin Romig-Koch
318b499d8e Support tx19 sanitation. 1997-09-10 04:53:18 +00:00
Felix Lee
31dda65aff * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid 
illegal zero-sized array.
	* sim-core.c (sim_core_xor_read_buffer): same.
 1997-09-10 04:46:37 +00:00
Felix Lee
a1efa0d880 * interp.c (sim_resume): poll_quit() at least once per call; 
otherwise gdb can loop sim_resume() uninterruptably.
 1997-09-10 03:52:48 +00:00
David Edelsohn
7b4aeebabe * nltvals.def: Regenerate. 1997-09-09 18:20:57 +00:00
Andrew Cagney
9eeaaefa0f Better word error messages. 1997-09-09 10:38:39 +00:00
Andrew Cagney
c31c13b481 Remove GCC specific `0x...LL', replace with SIGNED64 (0x...). 1997-09-09 07:02:02 +00:00
Andrew Cagney
db511584c9 Add basic tests for d10v-elf simulator. 1997-09-09 02:22:07 +00:00
Andrew Cagney
5d37a07bc5 Add multi-sim support to v850/v850e/v850eq simulators. 1997-09-08 17:42:48 +00:00
Andrew Cagney
687f3f1cef Add multi-sim support to simulator. 1997-09-08 17:40:24 +00:00
Andrew Cagney
70c8abdb4c Use updated MSMASK, MSMASKED macros. 
Fix sat problem in d30v.
 1997-09-08 17:23:16 +00:00
Andrew Cagney
75faf9aecb Check MS* macros from sim/common. 1997-09-08 17:22:01 +00:00
Andrew Cagney
75b3697d5f Add/use LSEXTRACTED, MSEXTRACTED macros. 
Add CPU_CIA macro to extract the PC.
 1997-09-08 17:21:13 +00:00
Andrew Cagney
986cb931ca Sanity check for tic80 simulator. 1997-09-08 17:19:21 +00:00
Gavin Romig-Koch
b637f306ba tx19 and related necessary changes. 
* config.sub: Add tx19/r1900.
	* sim/mips/configure.in, sim/mips/gencode: Add tx19/r1900.
	* gcc/config.sub, gcc/configure: Add tx19/r1900.
	* gcc/config/mips/r1900.h, config/mips/t-r1900: New.
	* gas/config/tc-mips.c: Add tx19/r1900.

	* gcc/config/mips/mips.c: Don't build 16 bit to 32 bit stubs for
	TARGET_SOFT_FLOAT.

	* config.sub: Add "marketing-names" patch.
	* gcc/config.sub: Add "marketing-names" patch.

	* gcc/configure: Change "as" link from "../gas/as.new" to "../gas/as-new";
	Same for "ld" link.
 1997-09-07 20:33:22 +00:00
Andrew Cagney
1bba340afe Redo watchpoint code so that it target can specify interrupt names. 
Replace v850 interrupt code with this common watchpoint code.
Other minor fixes to core.
 1997-09-05 08:16:23 +00:00
Andrew Cagney
1b465b54e1 Add sim_do_commandf - printf version of sim_do_command. 1997-09-05 07:57:27 +00:00
David Edelsohn
6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney
30efae3acd Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue. 1997-09-05 00:30:38 +00:00
Andrew Cagney
da3a66e5ca Replace memory model with one from sim/common directory. 1997-09-04 10:10:02 +00:00
Andrew Cagney
6dbaff8f60 Finish implementation of sim-memopt. 
Use in d30v and tic80.
Make available a generic sim_read, sim_write implementation.
 1997-09-04 10:08:44 +00:00
Andrew Cagney
a34abff813 o Add modulo argument to sim_core_attach 
o	Add sim-memopt module - memory option processing.
 1997-09-04 03:47:39 +00:00
David Edelsohn
600d83316c * sim-hload.c (sim_load): Add assert for SIM_MAGIC_NUMBER. 1997-09-04 00:57:21 +00:00
David Edelsohn
88d5f8e854 * gdbinit.in: New file. 
* aclocal.m4 (SIM_AC_OUTPUT): Build .gdbinit.
	* Make-common.in (distclean): Delete .gdbinit.
	(.gdbinit): Add rule for.
	* configure: Regenerated to track ../common/aclocal.m4 changes.
 1997-09-04 00:49:57 +00:00
Nick Clifton
2636486389 removed v850 sanitization 
Added v850/sim-main.h to list of files to keep after sanitization.
 1997-09-03 22:27:28 +00:00
Andrew Cagney
cb6a7127d9 Basic tests for tic80 simulator. 1997-09-03 07:41:35 +00:00
Andrew Cagney
2bc779d782 Doc directory - README. 
Make suffix of executables to be run on simulator .run
 1997-09-03 07:36:09 +00:00
Andrew Cagney
b83adf4eeb Doc C language guidelines. 1997-09-03 07:34:59 +00:00
Andrew Cagney
b5e935ae85 Pacify gcc-current -Wall. 1997-09-03 07:30:17 +00:00
Andrew Cagney
fdd64f952d Add support for suspending/resumeing the simulator in sim-modules. 
Use in sim-events.
 1997-09-03 07:26:11 +00:00
Andrew Cagney
cabedd5871 Standard simulator header file. 1997-09-03 04:13:45 +00:00
Andrew Cagney
9cdd2c6d72 Add real SIM_DESC arg to v850 simulator. 
Add --enable-sim-warnings, use/fix errors.
Add --enable-sim-endian, don't use.
Add common modules. Don't yet use most.
 1997-09-03 04:10:33 +00:00
Andrew Cagney
80c651f02d Stanify error reporting memory overlaps. 1997-09-03 04:06:27 +00:00
Joern Rennecke
134f75d8ba Support restore-sanitize-sh4 . 1997-09-02 22:57:50 +00:00
Joern Rennecke
552c6220e0 Comment typo fix. 1997-09-02 22:43:55 +00:00
David Edelsohn
51037f28cf Add note on TAGS support. 1997-09-02 22:07:54 +00:00
David Edelsohn
645ab3ec42 (TAGS): Add support for "/* TAGS: foo */" marker. 1997-09-02 22:03:41 +00:00
David Edelsohn
74db699d1d * Makefile.in (TAGS): Add support for "/* TAGS: foo */" marker. 
* sim-n-bits.h: Add TAGS comments for all functions.
	* sim-n-core.h: Likewise.
	* sim-n-endian.h: Likewise.
 1997-09-02 21:58:58 +00:00
Joern Rennecke
bbce7567b6 Sanitation fixes. 1997-09-02 21:43:06 +00:00
Andrew Cagney
4de6b5d361 Merge SH4 branch simulator in to devo. 1997-09-02 03:49:55 +00:00
Andrew Cagney
52352d38d6 Test/fix pabsh, pabsw, psrlvw. 1997-09-01 09:47:03 +00:00
Andrew Cagney
0ffba68fdc Compile from UNIX to cygwin32. 1997-09-01 03:43:56 +00:00
Andrew Cagney
4b2a6aed84 Use sim_state_alloc to create common sim object. 1997-09-01 03:26:31 +00:00
Andrew Cagney
9f3f352539 Passify cross compilation and GCC -Wall 1997-09-01 03:21:59 +00:00
Andrew Cagney
f90b720ba1 Passify GCC. Convert 0x0LL to something more portable in the FP code. 1997-08-30 00:02:19 +00:00
Andrew Cagney
4113ba4cd7 Passify GCC. 1997-08-30 00:01:12 +00:00
David Edelsohn
36db8e64ab * sim-options.c (standard_option_handler): Use xstrdup, not strdup. 1997-08-28 17:37:30 +00:00
Andrew Cagney
04258deea2 Make igen available when v850 is being build. 1997-08-28 09:55:55 +00:00
Andrew Cagney
18c319ae59 Add --target=BFDTARGET and --architecture=MACHINE options. 1997-08-28 09:44:42 +00:00
Andrew Cagney
8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney
d6fea803dc Add MSBIT* and LSBIT* macro's to sim-bits.h 
Add more macro's for extracting sub word quantites to sim-endian.h
 1997-08-27 07:56:27 +00:00
Andrew Cagney
230a95ce5a New file - generic implementation of sim_load for hardware only 
simulators.
 1997-08-27 04:45:59 +00:00
Andrew Cagney
fafce69ab1 Add ABFD argument to sim_create_inferior. Document. 
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
 1997-08-27 04:44:41 +00:00
Andrew Cagney
9f64f00ada * idecode_expression.h (ALU_END): From Charles Lefurgy - Extract 
sign bit using 64 bit and not a 32 bit mask.

        * sim_calls.c (sim_load): From Ian Lance Taylor - free argv after
        it has been used, not before.
 1997-08-27 00:44:05 +00:00
Andrew Cagney
d07dddd2b2 Save a copy of argv, not just a pointer. 1997-08-27 00:35:34 +00:00
Andrew Cagney
3f1a33d673 Make building of w65 simulator conditional on --enable-sim. 1997-08-26 08:38:34 +00:00
Andrew Cagney
7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney
247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so 
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
 1997-08-25 23:14:25 +00:00
Nick Clifton
6061622830 Updated with respect to the HDD-tool-0611 document. 1997-08-22 17:41:20 +00:00
Nick Clifton
64ad9cecb6 Added N step divide routines, courtesy of Sugimoto at NEC. 1997-08-20 22:42:55 +00:00
Nick Clifton
70caad98c1 Fixed interpretation of SR bit in list18 structures. 1997-08-20 20:57:05 +00:00
Nick Clifton
27161f9e55 Add suport for v850e and v850eq 1997-08-18 18:01:42 +00:00
Nick Clifton
6ba5294adf Add support for V850eq variant opcodes. 1997-08-18 18:01:08 +00:00
David Edelsohn
dddbd8c586 Add comment. 1997-08-14 20:36:00 +00:00
David Edelsohn
052d7984df * callback.c (os_poll_quit): Make static. 
Call sim_cb_eprintf, not p->eprintf.
	(sim_cb_printf, sim_cb_eprintf): New functions.
 1997-08-14 19:53:10 +00:00
Nick Clifton
a0a6db4bfa Tidied up sanitization. 1997-08-14 19:45:14 +00:00
Nick Clifton
f7fcba7a84 Added support for v850e and v850eq instructions. 1997-08-14 02:13:32 +00:00
Mark Alexander
9e61ae7d3c * sim-calls.c (sim_store_register): Allow accumulators 
other than A0 to be modified.  Correct error message.
 1997-08-09 04:54:08 +00:00
Andrew Cagney
f1bea83b2b Add test for "mtsa" 1997-07-29 00:57:39 +00:00
Andrew Cagney
9204a35e78 Handle overflow from signed divide by -1. 1997-07-28 13:46:53 +00:00
Andrew Cagney
64f0e81628 More checks for pdivuw 1997-07-28 10:52:39 +00:00
Gavin Romig-Koch
c12e2e4c48 gencode.c: Two arg MADD should not assign result to /bin/bash. 1997-07-25 19:10:05 +00:00
David Edelsohn
63f6871728 * configure.in (sparc*-*-*): Don't build erc32. 
* configure: Regenerate.
 1997-07-25 18:41:12 +00:00
David Edelsohn
5697f15271 Keep sim-watch.[ch]. 1997-07-22 19:05:13 +00:00
David Edelsohn
556d1f8c7f Don't always keep igen, it's currently only kept if d30v or tic80. 1997-07-22 19:03:25 +00:00
David Edelsohn
e6609d8f2a * sim-n-core.h (sim_core_write_unaligned_N): Add missing break 
to FORCED_ALIGNMENT case.
 1997-07-22 17:36:23 +00:00
Andrew Cagney
7cf0d79519 Configure r5900 testsuite sub-directory. 1997-07-15 20:46:15 +00:00
Andrew Cagney
39e9b3369a Similistic configure/build scripts for tx59 simulator tests. 1997-07-15 20:35:26 +00:00
Andrew Cagney
b31dd8eea2 Generic tests for 5900. 1997-07-15 20:25:09 +00:00
Andrew Cagney
d9c61e8391 Standard simulator tests. 1997-07-14 16:53:04 +00:00
Andrew Cagney
ccc034af67 Tests for mips r5900 instructions 1997-07-11 21:36:11 +00:00
Andrew Cagney
1e851d2c82 Fix a number of problems in the r5900 specific p* (parallel) instructions. 
In particular a host endian dependency one fixed resolved most problems.
 1997-07-11 03:07:29 +00:00
Andrew Cagney
0f552ea045 Sync powerpc simulator with public version. Enable FPSCR and string 
instructions.
 1997-07-03 07:44:38 +00:00
Jeff Law
6443523484 * gencode.c (build_instruction): Handle "pext5" according to 
version 1.95 of the r5900 ISA.
Fixes pr12413 (c/h from toshiba).
 1997-07-02 18:41:22 +00:00
Jeff Law
649625bb8e * gencode.c (build_instruction): Handle "ppac5" according to 
version 1.95 of the r5900 ISA.
fixes pr12407 (c/h from toshiba).
 1997-07-02 18:29:16 +00:00
Jeff Law
05d1322f2c * interp.c (sim_engine_run): Reset the ZERO register to zero 
regardless of FEATURE_WARN_ZERO.
 1997-07-02 18:13:00 +00:00
Jeff Law
ae19b07bf8 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO. 
Fix for pr12402 (c/h from toshiba).
 1997-07-02 17:57:56 +00:00
Andrew Cagney
3a8e858f24 Add test for dbt/rtd instructions 1997-06-27 08:33:16 +00:00
Jeff Law
d05b86b7fb * interp.c (sim_resume): Clear State.exited. 
(sim_stop_reason): If State.exited is nonzero, then indicate that
        the simulator exited instead of stopped.
        * mn10300_sim.h (struct _state): Add exited field.
        * simops.c (syscall): Set State.exited for SYS_exit.

Fixes problem found bin Felix.
 1997-06-24 19:45:17 +00:00
Jeff Law
c370b3cd95 * simops.c: Fix thinko in last change. 1997-06-12 04:14:42 +00:00
Jeff Law
dbdb5bd881 * simops.c: "call" stores the callee saved registers into the 
stack!  Update the stack pointer properly when done with
        register saves.
 1997-06-10 22:59:13 +00:00
Jeff Law
0a8fa63cb8 * simops.c: Fix return address computation for "call" instructions. 1997-06-10 18:32:40 +00:00
Andrew Cagney
84e8cd0fcf Open in binary mode when available. 1997-06-06 02:34:55 +00:00
Andrew Cagney
0bdfae1167 Clean up formatting of instruction traces. 1997-06-06 00:31:08 +00:00
Andrew Cagney
897f67b74f Verify magic number of simulator struct. 1997-06-05 04:51:34 +00:00
Andrew Cagney
896eab009e Initialize the sim-engine module. 1997-06-04 02:47:49 +00:00
Andrew Cagney
56e7c84918 o Fixes to repeated watchpoints 
o	Add mips ISA instructions needed to handle interrupts
 1997-06-03 23:03:50 +00:00
Andrew Cagney
c7cebfa32c o Fix padd insn 
o	Take an interrupt when an int event occures.
 1997-06-02 15:00:43 +00:00
Andrew Cagney
128b51546e Add assembler information to igen input files. 1997-05-30 07:25:13 +00:00
Andrew Cagney
4e95b94e1e Fix subu immed - was incorrectly using unsigned. 1997-05-29 07:25:20 +00:00
Andrew Cagney
efe4f1cbf8 Add a simple dissasembler to igen 1997-05-29 07:06:41 +00:00
Andrew Cagney
1a70e182aa Fix watching PC for 64bit (mips) target. 
Stop watchpoints corrupting the event queue.
 1997-05-27 11:25:47 +00:00
Andrew Cagney
2f2e6c5d5b Extend xor-endian and per-cpu support in core module. 
Allow negated test when watching value within core.
 1997-05-27 06:48:20 +00:00
Andrew Cagney
cd0d873d0f Preliminary suport for xor-endian suport in core module. 1997-05-23 09:19:43 +00:00
Andrew Cagney
b526378484 Incorrect test for zero-r0 code gen. 1997-05-23 02:01:04 +00:00
Andrew Cagney
8167e102a5 Enumerate longjmp's return type. 1997-05-23 01:29:16 +00:00
Gavin Romig-Koch
d3d2a9f718 ifdef out uses of simSTOP, simSTEP and simBE when DEBUG is defined. 1997-05-22 13:30:01 +00:00
Gavin Romig-Koch
6e61ecfc92 Change longjmp param/setjmp return value used for simulator restart from 0 to 2. 1997-05-22 13:16:03 +00:00
Jeff Law
09e142d5a2 * interp.c (sim_resume): Add missing case in big switch 
statement (for extb instruction).
 1997-05-22 05:28:34 +00:00
Andrew Cagney
50a2a69182 Watchpoint interface. 1997-05-21 06:54:13 +00:00
Jeff Law
003c91bec4 * interp.c: Replace all references to load_mem and store_mem 
with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
        (INLINE): Delete definition.
        (load_mem_big): Likewise.
        (max_mem): Make it global.
        (dispatch): Make this function inline.
        (load_mem, store_mem): Delete functions.
        * mn10300_sim.h (INLINE): Define.
        (RLW): Delete unused definition.
        (load_mem, store_mem): Delete declarations.
        (load_mem_big): New definition.
        (load_byte, load_half, load_3_byte, load_word): New functions.
        (store_byte, store_half, store_3_byte, store_word): New functions.
        * simops.c:  Replace all references to load_mem and store_mem
        with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
 1997-05-20 23:53:47 +00:00
Andrew Cagney
ff82f21409 Part II of adding callback argument to sim_open(). Update all the 
other simulators; remove SIM_DESC from depreciated function
sim_set_callbacks().
 1997-05-20 01:57:43 +00:00
Andrew Cagney
24aa2b57af Depreciate sim_set_callbacks() function. Set simulator callbacks 
during sim_open().
 1997-05-20 00:05:27 +00:00
Michael Meissner
8c5b6ead7d Make getpid, kill supported system calls 1997-05-19 23:02:30 +00:00
Jeff Law
4df7aeb3c5 * interp.c (dispatch): Make this an inline function. 
* simops.c (syscall): Use callback->write regardless of
        what file descriptor we're writing too.
 1997-05-19 19:55:31 +00:00
Andrew Cagney
2e61a3ad9c Graft sim/common event and other code onto the mips simulator. 1997-05-19 13:30:30 +00:00
Andrew Cagney
ba2374064d Update. 1997-05-19 09:35:51 +00:00
Andrew Cagney
fd76456bdb Make simulator event-queue manager a bit more signal safe. 1997-05-19 06:55:56 +00:00
Andrew Cagney
f03b093cd3 o Implement generic halt/restart/abort module. 
Use in tic80 and d30v simulators.
o	Add signal hook to sim-core module
 1997-05-19 03:42:33 +00:00
Andrew Cagney
11ab132f16 Pacify gcc. 1997-05-19 01:24:31 +00:00
Jeff Law
b07a1e78c5 * interp.c (load_mem_big): Remove function. It's now a macro 
defined elsewhere.
        (compare_simops): New function.
        (sim_open): Sort the Simops table before inserting entries
        into the hash table.
        * mn10300_sim.h: Remove unused #defines.
        (load_mem_big): Define.
Another 20% so performance improvement for the mn10300 simulator.
 1997-05-18 22:57:49 +00:00
Michael Meissner
63aa80ff51 Treat infinities like normal numbers for purposes of comparisons 1997-05-17 02:28:11 +00:00
Jeff Law
248c1fb830 * callback.c (os_close): Mark the descriptor as being 
available if the close succeeded.
        (os_open): Pass 0644 as the mode of the file being created.
Bring Bob's changes over from the mec branch.
 1997-05-16 22:39:08 +00:00
Jeff Law
234a9a49cf * interp.c (load_mem): If we get a load from an out of range 
address, abort.
        (store_mem): Likewise for stores.
        (max_mem): New variable.
 1997-05-16 22:37:02 +00:00
Andrew Cagney
37a684b84d o Make tic80 insn file more `cache ready' 
o	Have igen always zero r0 instead of constantly checking if
	the designated register is r0.
 1997-05-16 03:27:40 +00:00
Andrew Cagney
07b4c0a66c Remove some of the flake from the c80 floating point. 1997-05-15 16:39:38 +00:00
Andrew Cagney
d24f06eef2 More floating point operations. 1997-05-15 02:22:37 +00:00
Andrew Cagney
aa3a044769 Fix double conversion problem. 1997-05-15 02:21:11 +00:00
Andrew Cagney
2310e3c2b5 Passify gcc's warnings. 1997-05-15 00:14:33 +00:00
Michael Meissner
93555c3b02 Make columns line up for fpu operation tracing 1997-05-14 22:06:45 +00:00
Michael Meissner
1b6f4dde35 Make sure r0 == 0; Return EINVAL for system calls that are defined but not provided; Provide traps 74-79 as debugging traps 1997-05-13 22:04:32 +00:00
Andrew Cagney
8490235019 Remove ANNULed cycle - was confusing gdb. 1997-05-13 13:57:49 +00:00
Michael Meissner
d01082ada2 Fix ld/st tracing 1997-05-12 21:16:26 +00:00
Andrew Cagney
9af5dcea8f Clear cntrl-c after handling it. 1997-05-12 08:33:56 +00:00
Andrew Cagney
c445af5a2b c80 simulator fixes. 1997-05-12 04:57:49 +00:00
Andrew Cagney
e05e76e8a4 Match commands like `(gdb) sim a b c' against options --a-b-c. 1997-05-12 04:30:38 +00:00
Michael Meissner
8ad6078850 Fix endian problems with ld.d/st.d 1997-05-12 02:04:02 +00:00
Michael Meissner
450be2349a Fix shift/lmo insns; Subu does arithmetic unsigned 1997-05-11 14:32:32 +00:00
Michael Meissner
20b2f9bc83 And short immediate instructions use unsigned immediates, not signed. 1997-05-10 16:40:21 +00:00
Michael Meissner
89d1a47805 Fix xor in simulator 1997-05-09 20:16:01 +00:00
Michael Meissner
aaa7b25260 Make cmp produce the correct results 1997-05-09 19:48:52 +00:00
Andrew Cagney
9efd3f7412 Update CIA as well as NIA when a 64bit insn is encountered. 1997-05-09 00:21:13 +00:00
Michael Meissner
c3cad878c9 Really fix the bbo/bbz instructions. 1997-05-08 23:04:22 +00:00
Michael Meissner
1e0e7911a5 reverse bit number for bbo/bbz instructions. 1997-05-08 19:58:20 +00:00
Michael Meissner
53dcd669e5 Fix non-anulled calls so that return address is correct 1997-05-08 18:36:00 +00:00
Michael Meissner
30a05dbd8d Change output format slightly 1997-05-08 16:32:06 +00:00
Michael Meissner
8c3b5af125 Change output format slightly 1997-05-08 16:14:54 +00:00
Michael Meissner
e42224cc3a Bump SIZE_DECIMAL to 13 1997-05-08 15:58:23 +00:00
Andrew Cagney
43c53e07db Add function sim_args_command() which takes a `(gdb) sim <command>' and 
parses it using rules found in the simulator command-line-options
databse.
 1997-05-08 05:28:20 +00:00
Andrew Cagney
381f42ef5d o Clean-up tic80 fp tracing 
o	Fill in more tic80 insns
 1997-05-07 13:58:52 +00:00