Commit Graph

1191 Commits

Author SHA1 Message Date
Michael Meissner 5aa52e3d26 do not assume NULL is an integer constant 1997-11-04 13:19:49 +00:00
Gavin Romig-Koch 0425cfb3af Correct r5900 sanitization. 1997-11-04 05:50:22 +00:00
Andrew Cagney fcc86d82f7 Make memory regions layered (just like existing device regions) so
that overlapping regions can be defined.
Allow the layer (level) of a memory region to be specified as part of
an address parameter to memory options.
Update simulators.
1997-10-31 08:49:10 +00:00
Nick Clifton d3e9ca1a88 Patches to support generating an executing environment.
Patches from Tony Thompson at ARM:  athompso@arm.com
1997-10-30 21:52:16 +00:00
Doug Evans d048b52dbb * sim-core.h (sim_core_write_8): Define. 1997-10-30 21:45:12 +00:00
Gavin Romig-Koch 6205f37913 * gencode.c: Add tx49 configury and insns.
* configure.in: Add tx49 configury.
	* configure: Update.
1997-10-29 19:42:49 +00:00
Andrew Cagney 01b9cd49ca common/sim-bits.h: Document ROTn macro.
igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
1997-10-29 04:02:30 +00:00
Andrew Cagney 89d0973831 Add support for 16 byte quantities to sim-endian macro H2T.
Add model-filter field to option, include, model anf function igen records
1997-10-28 07:10:36 +00:00
Andrew Cagney a86809d323 Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>. 1997-10-28 02:13:09 +00:00
Doug Evans 084219a513 * sem-ops.h (U{DIV,MOD}[BHSD]I): Use unsigned division. 1997-10-27 20:45:56 +00:00
Doug Evans c3e3e4ad2f * sim-endian.h: Disable 16 byte support.
So things will build.
1997-10-27 19:47:24 +00:00
Doug Evans 374b95c1b0 * sim-n-endian.h: Add TAGS entrys for 16 byte versions. 1997-10-27 19:25:59 +00:00
Doug Evans 2fc2f8d8a4 Fix typo. 1997-10-27 19:25:05 +00:00
Andrew Cagney 16bd5d6e52 Separate r5900 specifoc and mips16 instructions.
Add support for this to configure (vr5400 target only)
1997-10-27 07:55:24 +00:00
Andrew Cagney 90ad43b2de Add mips64vr5400 to configuration list
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
1997-10-27 06:42:13 +00:00
Andrew Cagney e2880fadf3 Add include-file support to igen. 1997-10-27 06:30:35 +00:00
Andrew Cagney f45dd42b32 Add 128 bit transfers to sim core. 1997-10-27 03:00:12 +00:00
Gavin Romig-Koch 635ae9cb7c * sim/mips/gencode.c (build_instruction): Follow sim_write's lead in using
BigEndianMem instead of !ByteSwapMem.
1997-10-25 20:53:46 +00:00
Andrew Cagney b5da31ac7c Correct name of file given in ChangeLog for change: Pass lma_p and
sim_write args to sim_load_file.
1997-10-25 05:04:25 +00:00
Andrew Cagney 122edc03de Add basic igen configuration to autoconf. Disable. 1997-10-24 07:54:21 +00:00
Andrew Cagney dad6f1f326 Add function to fetch 32bit instructions
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
1997-10-24 06:43:51 +00:00
Andrew Cagney 49a7683337 Checkpoint IGEN version of mips sim 1997-10-24 06:38:44 +00:00
Andrew Cagney 4a203fbae2 Add function sim_events_slip()
Clear work_pending flag as part of processing any pending work.
1997-10-24 05:53:01 +00:00
Andrew Cagney 1315b4cb60 Address MSC compiler issues in d10v_sim.h 1997-10-24 00:52:23 +00:00
Andrew Cagney 9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file().
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
1997-10-22 05:26:27 +00:00
Doug Evans 2328ef1c98 * nrun.c (main): Exit if bfd_openr fails.
Call bfd_check_format after bfd_openr.
1997-10-22 02:12:41 +00:00
Doug Evans 897a1d7863 * nrun.c (main): Remove useless test of name != NULL. 1997-10-22 01:38:49 +00:00
Jeff Law f4ab2b2fdc * simops.c: Correctly handle register restores for "ret" and "retf"
instructions.
pr13306 related stuff.
1997-10-21 16:07:53 +00:00
Andrew Cagney 92ad193bb0 Use SIM*_OVERFLOW_RESULT defined in sim-alu.h 1997-10-21 07:57:33 +00:00
Andrew Cagney b7432f0f27 Pacify GCC -Wall 1997-10-21 07:41:46 +00:00
Andrew Cagney aa324b9b1e Output pc profile statistics once gathered. 1997-10-21 07:40:00 +00:00
Andrew Cagney e2f8ffb736 Delete profile support from MIPS simulator, use sim/common/sim-profile
module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
1997-10-21 03:41:21 +00:00
Andrew Cagney 293a0876f8 Have single bit macros return an unsigned result. Avoids risk (and
need) of sign extending results.
1997-10-20 07:27:55 +00:00
Andrew Cagney fb5a2a3e39 Make mips registers of type unsigned_word.
Ensure all references to MIPS registers use same type.
1997-10-20 06:28:53 +00:00
Andrew Cagney 0a0ecb2120 Add 8 bit arithmetic to sim-alu.
Fix flags (Carry, oVerflow) for negate and subtract.
Add ALU*_RESULT macros for accessing final result of ALU op.
1997-10-20 02:03:06 +00:00
Andrew Cagney afb1dbe851 Preliminary tests for sim-alu module. 1997-10-17 03:57:53 +00:00
Andrew Cagney ea985d2472 Move register definitions and macros out of interp.c and into sim-main.h 1997-10-16 03:50:48 +00:00
Andrew Cagney 085c1cb988 Checkpoint IGEN version of MIPS simulator. 1997-10-16 03:41:57 +00:00
Andrew Cagney 284e759d1f Rename generated file engine.c to oengine.c. 1997-10-16 03:39:13 +00:00
Andrew Cagney 339fb14904 * gencode.c (build_instruction): Use FPR_STATE not fpr_state. 1997-10-16 03:29:47 +00:00
Andrew Cagney 8b70f83790 * gencode.c (build_instruction): For "FPSQRT", output correct number
of arguments to Recip.
1997-10-16 03:23:16 +00:00
Andrew Cagney eaa202ddd4 * gen-semantics.c (print_semantic_body): Use CIA not cia.ip. Escape
newlines at end of generated call to sim_engine_abort.
1997-10-16 03:19:41 +00:00
Andrew Cagney 81b3b32cda Sanitize additional files. 1997-10-15 00:05:28 +00:00
Andrew Cagney 5a9bddea84 Enable d10v simulator testsuite - two tests: Hello World and exit47. 1997-10-15 00:00:41 +00:00
Andrew Cagney fd89abc204 Handle core regions which start at a poorly aligned address. 1997-10-14 23:45:52 +00:00
Andrew Cagney 7456a10d9b * sim-alu.h (ALU64_HAD_OVERFLOW): Define.
(ALU64_SUB): Define.
* Make-common.in (all): Build SIM_EXTRA_ALL first.
(.gdbinit): Remove dependencies, generate once per build.
1997-10-14 09:39:05 +00:00
Andrew Cagney 055ee2977f Checkpoint IGEN version of MIPS simulator. 1997-10-14 09:34:08 +00:00
Andrew Cagney 0c2c5f6141 Move global MIPS simulator variables into sim_cpu struct. 1997-10-14 09:26:03 +00:00
Andrew Cagney 1b217de0f3 Correct type of address argument for sim_core_{read,write} 1997-10-14 09:24:57 +00:00
Andrew Cagney 18c64df613 o Add support for configuring wordsize, fp hardware and target
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
1997-10-14 07:27:31 +00:00
Andrew Cagney d5cecca93c Output line-ref to original igen source file when generating trace
statements.
Define NIA macro (dependant on gen-delayed-branch).
Verify opening/closing quote in input assembler strings.
1997-10-14 02:54:08 +00:00
Fred Fish 1155e06e3f * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
exception generation code to OP_6E01.
	(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
	generation code.
PR 13550
1997-10-13 18:26:52 +00:00
Fred Fish b83093ff79 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
(OP_6601): Ditto.
PR 13498
1997-10-11 16:50:05 +00:00
Fred Fish 93f0cb6975 * simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
(OP_6601): Ditto.
1997-10-11 16:48:47 +00:00
Andrew Cagney 49a6eed58a Snap. Gets through igen's checks. 1997-10-09 08:38:22 +00:00
Andrew Cagney 8782bfcfc4 Add -Wnodiscard option so that warning about discarded instructions
can be suppressed.
Allow ``<insn-spec> { <nmemonic> | <model> }'' in instruction file.
1997-10-09 08:35:33 +00:00
Andrew Cagney 2875c6c685 Build IGEN with the MIPS simulator. 1997-10-09 00:41:14 +00:00
Andrew Cagney f2b3001251 MIPS/IGEN checkpoint - doesn't build. 1997-10-08 04:16:01 +00:00
Andrew Cagney 391c71708e Checkpoint IGEN input file for MIPS simulator. 1997-10-07 08:45:11 +00:00
Andrew Cagney b3c77578dc Rewrite simulator floating point module. Do not rely on host FP
implementation.  Add preliminary support for different IEEE-754
rounding modes.  Implement SQRT in software.
Update TiC80 simulator.
Add sim-fpu -> TestFloat interface for testing.
1997-10-03 00:03:35 +00:00
Andrew Cagney 63fe2cc799 Fix typo, WITH_TARGET_WORD_BITSIZE not WITH_TARGET_BITSIZE. 1997-10-02 23:37:30 +00:00
Andrew Cagney adf4739efe Add access to hi part of r5900 128 bit registers. 1997-09-30 03:45:51 +00:00
Bob Manson 26b20b0a0e * configure: Regenerated.
Can't hack one without the other...
1997-09-29 21:46:32 +00:00
Andrew Cagney e9b53280ba Do not sanitize out sim/testsuite/common directory. 1997-09-29 00:24:08 +00:00
Fred Fish 5f90b21e40 * d10v_sim.h (INC_ADDR): Align MOD_E to increment before testing
for end condition.
PR 13334
1997-09-27 20:04:22 +00:00
Fred Fish 823f2df47f * interp.c (pc_addr): Discard upper bit(s) of PC in case
IMAP1 selects unified memory.
PR 13275
1997-09-27 19:57:05 +00:00
Mark Alexander 6eedf3f4e5 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. 1997-09-26 20:56:55 +00:00
Felix Lee b28ad90b4d * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and
SIM_ENGINE_RESTART_HOOK.
1997-09-26 19:24:45 +00:00
Stu Grossman 68f92f98ac * sim-break.c (sim_set_breakpoint sim_clear_breakpoint): Use ZALLOC
and zfree instead of xmalloc and free.  Prevents warnings.
1997-09-25 18:22:46 +00:00
Andrew Cagney af51b8d56d Add/use SIM_AC_OPTION_BITSIZE. 1997-09-25 07:19:05 +00:00
Andrew Cagney 7a3fb4e6ea * config/v850/tm-v850.h (BREAKPOINT): Use 1 word DIVH insn with
RRRRR=0 for simulator breakpoint. Previous breakpoint insn was two
words.
1997-09-25 07:01:21 +00:00
Andrew Cagney e63bc706fe Allow gencode.c to generate input to the igen generator. 1997-09-25 04:23:24 +00:00
Andrew Cagney eb2e3c85ca Pacify GCC -Wall 1997-09-25 04:13:50 +00:00
Stu Grossman b9d580a4b0 * Make-common.in: New files sim-break.c, sim-break.h.
* sim-base.h:  Add point to breakpoint list to sim_state_base.
	* sim-break.c sim-break.h:  New modules that implement intrinsic
	breakpoint support.
	* sim-module.c:  Add breakpoint module.
1997-09-25 00:51:17 +00:00
Jeff Law bfebf1a52a r5900 sanitization fixes. 1997-09-24 07:27:43 +00:00
Jeff Law c118539e6b mips64vr5900el-elf -> mips64r5900-elf. 1997-09-23 21:45:43 +00:00
Felix Lee 34d07b7867 * sim-events.c (SIM_EVENTS_POLL_RATE): poll more often than once
an hour.
        * sim-n-core.h (WITH_XOR_ENDIAN): MSVC barfs on
        if (0) { 1 % 0; }
        * sim-core.c (sim_core_xor_write_buffer): WITH_XOR_ENDIAN + 1.
        (SIGBUS) define for Windows.
        * sim-trace.c (trace_printf,debug_printf): added ALMOST_STDC.
        * sim-resume.c: define SIGTRAP for windows.
        * sim-xcat.h: use token pasting if ALMOST_STDC.
1997-09-23 18:08:09 +00:00
Jeff Law 832f05e865 vr5900-r5900. 1997-09-23 16:21:23 +00:00
Andrew Cagney 1398204eb0 Check v850eq popm[hl] instructions.
Check v850 NMI/RETI.
1997-09-23 08:40:55 +00:00
Andrew Cagney 4141b1c63d * Make-common.in (SIM_SCACHE, SIM_DEFAULT_MODEL): Assign configured values.
(CONFIG_CFLAGS): Add same.
1997-09-23 04:05:50 +00:00
Felix Lee 9f4fd82344 * sim-types.h (SIGNED64): ##i64 when _MSC_VER, not _WIN32.
(SIGNED32): use ##i32.
1997-09-23 03:51:33 +00:00
Felix Lee 8f80453197 * configure.in: i386-windows is a cross, so don't expect
libiberty to be there.
	* configure: updated.
1997-09-23 03:48:59 +00:00
Andrew Cagney 92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney 76a6247f07 Add memory alignment config option. 1997-09-22 09:40:57 +00:00
Andrew Cagney 8d332f9c1a Enable --alignment option, stop sim-options.c hardwiring the alignment. 1997-09-22 09:34:28 +00:00
Andrew Cagney 4ca7d6d25b Fix disabling of model code when simulator does not support modeling.
Stops `-p' crashing simulators.
1997-09-22 09:16:14 +00:00
Andrew Cagney 794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
Nick Clifton f13f11b494 Removed the v850eq sanitization 1997-09-20 23:40:50 +00:00
Gavin Romig-Koch c476ac5560 Add handling for 3900's SDBBP, DERET, and RFE insns.
* gencode.c (SDBBP,DERET): Added (3900) insns.
	(RFE): Turn on for 3900.
	* interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
	(dsstate): Made global.
	(SUBTARGET_R3900): Added.
	(CANCELDELAYSLOT): New.
	(SignalException): Ignore SystemCall rather than ignore and
	terminate.  Add DebugBreakPoint handling.
	(decode_coproc): New insns RFE, DERET; and new registers Debug
	and DEPC protected by SUBTARGET_R3900.
	(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
	bits explicitly.
	* Makefile.in,configure.in: Add mips subtarget option.
	* configure: Update.
1997-09-20 18:22:22 +00:00
Gavin Romig-Koch 7afa8d4edc * gencode.c: Add r3900 (tx39).
* gencode.c: Fix some configuration problems by improving
	the relationship between tx19 and tx39.
1997-09-19 13:39:55 +00:00
Andrew Cagney 8122e3e471 Add alignment option.
Add support for hardwired and default alignment to configuration.
1997-09-19 08:11:40 +00:00
Andrew Cagney f4822f1e6e More tests.
Have sld check verify that the processor is a v850eq.
1997-09-19 06:40:11 +00:00
Andrew Cagney a276b6f057 Clean up tracing for Bcond & jmp insns.
Fix computation of disp16 and disp22.
Clean up tracing of sld* insns.
1997-09-19 06:39:21 +00:00
Andrew Cagney 4410c4b925 Correctly locate `_' in generated names. 1997-09-19 04:41:01 +00:00
Andrew Cagney bd4c35cc6d Fix cmov immed. 1997-09-19 02:20:02 +00:00
Andrew Cagney 6a4c8f1e29 Change semantic function name to semantic_<INSN>_<FMT> instead of
semantic_<FMT>_<INSN>.
1997-09-19 00:50:24 +00:00
Andrew Cagney 60fe0e06a8 Fix cmov insn. 1997-09-19 00:50:19 +00:00
Felix Lee 3e906c081a sanitization fixes. typoes, missing fences, "start" instead of "end", etc. 1997-09-18 06:03:52 +00:00
Felix Lee 88770c1c90 add missing files. 1997-09-18 04:56:22 +00:00
Felix Lee e1625ed217 v850 files that weren't being removed if !keep-v850 1997-09-18 01:33:24 +00:00
Felix Lee 2001e533ff * sim-main.h (kill): macro was missing args.
(SIGTRAP): define for MSVC.
1997-09-17 23:46:49 +00:00
Andrew Cagney 8bd89725a7 Test US bit of v850eq.
Loop program for testing interrupt delivery.
1997-09-17 13:46:29 +00:00
Andrew Cagney a72f8fb439 Clean up more tracing.
FIX interrupt delivery - was zapping PSW before it had been saved.
FIX interrupt return, was one instruction out.
1997-09-17 08:14:23 +00:00
Andrew Cagney 175c6fd375 * sim-events.c (ETRACE): Use trace_printf not sim_io_printf for
trace output.
* sim-core.c (sim_core_signal): When bad access halt simulator
SIGSEGV / SIGBUS instead of aborting.
(signal.h): Include.
* sim-watch.c (sim_watchpoint_install): Handler for watchpoint
options was missing.
1997-09-17 08:13:07 +00:00
Andrew Cagney 6aead89a5f Fix tracing for: "ctret", "bsw", "hsw"
Fix bugs in: "bsh", "callt", "stsr".
1997-09-17 05:31:00 +00:00
Andrew Cagney dfa5c0ca02 Define MOVED macro, move sub-bitfield from XXX to YYY. 1997-09-17 05:28:32 +00:00
Andrew Cagney fc07e279aa More v850 simulator tests. 1997-09-17 05:27:56 +00:00
Andrew Cagney 1a6eb36b62 More v850 simulator tests. 1997-09-17 03:31:09 +00:00
Andrew Cagney b52e58c24f Add/test 8bit bit manipuation macros.
Test LS and MS versions of SEXT macro.
Simplify/test macro returning a single bit.
1997-09-17 03:25:54 +00:00
Andrew Cagney 8603b0f0ff Generic rules for building simple simulator test programs. 1997-09-16 23:57:57 +00:00
Gavin Romig-Koch 667065d0d4 * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 for
JALR, just 2.
1997-09-16 20:01:00 +00:00
Gavin Romig-Koch 9cb8397f86 * sim/mips/interp.c: Correct some HASFPU problems. 1997-09-16 15:36:18 +00:00
Andrew Cagney fb1fd47514 Smooth some of ALU tracing's rough edges.
Fix switch insn.
1997-09-16 14:00:15 +00:00
Andrew Cagney 6a0f95864a More sim-bits testing. 1997-09-16 13:58:44 +00:00
Andrew Cagney aa5e6a5a78 Add {LS,MS}SEXT and {LS,MS}INSERTED macros. Eliminates bug in SEXT. 1997-09-16 07:04:46 +00:00
Andrew Cagney 3f33acd039 Use trace_one_insn in trace functions. Buffer up trace data so that
it is displayed in a single block.
1997-09-16 07:03:41 +00:00
Andrew Cagney 65a87fa9e1 v850eq simulator tests. 1997-09-16 07:01:57 +00:00
Andrew Cagney c7db488f71 Restrict ldsr (load system register) to modifying just non-reserved PSW bits.
For v850eq, include PSW[US] in bits that can be modified.
1997-09-16 04:49:24 +00:00
Andrew Cagney 721478d51b Add v850e version of breakpoint instruction. 1997-09-16 02:15:55 +00:00
Andrew Cagney 3484de0091 Differentiate between a non-zero string and a constant zero field. 1997-09-16 02:14:18 +00:00
Jim Wilson 5262de2167 * simops.c (Multiply64): Don't store into register zero. 1997-09-16 01:45:23 +00:00
Andrew Cagney 4dda50b052 For instructions moved into v850.igen was computing (wrong) NIA when
this wasn't needed.
1997-09-15 23:09:26 +00:00
Andrew Cagney 0604253676 * igen.c (gen_run_c): Handle non-multi-sim case. 1997-09-15 22:40:14 +00:00
Andrew Cagney bda6163995 Fix sanitization for v850 V v850e V v850eq 1997-09-15 14:42:51 +00:00
Andrew Cagney a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common
directory to specify its own unqiue config.h file).
1997-09-15 08:25:04 +00:00
Andrew Cagney 658303f7d4 For v850eq start up with US bit set.
Let sim_analyze_program determine the architecture.
Fix various sanitizations.
1997-09-15 08:18:20 +00:00
Andrew Cagney 08547b1f1d Determine ARCHITECTURE from program if possible.
Rename common's generated config.h to cconfig.h.
1997-09-15 08:11:50 +00:00
Andrew Cagney 4bdab45adb * callback.c (os_write): divert stdout and stderr to their
respective hooks.
1997-09-15 08:02:23 +00:00
Andrew Cagney 410230cf6d Check reserved bits before executing instructions.
Make v850[eq] the the default simulator.
Report illegal instructions.
Include v850e instructions in v850eq.
1997-09-12 05:56:38 +00:00
Andrew Cagney 944deab68e v850eq wasn't building igen directory. 1997-09-12 03:13:27 +00:00
Andrew Cagney 93e7a1b5b7 Add profiling support to v850*. 1997-09-12 02:44:03 +00:00
Andrew Cagney 11ac69e013 Short form of sample-size option had wrong value. 1997-09-12 02:29:04 +00:00
Andrew Cagney 7a2f7ea758 v850* wants igen 1997-09-12 02:27:22 +00:00
Andrew Cagney cf5c6e6e5d Generate instruction profile call with each instruction. 1997-09-12 02:26:31 +00:00
Martin Hunt 30d8198448 Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com>
* interp.c (sim_resume): Increment PC at end of rep
	loop.

	* simops.c (OP_4201): Fix rachi instruction.
1997-09-11 05:32:23 +00:00
Andrew Cagney 972f3a34f5 mips/sim_info was just returning????? 1997-09-10 23:50:32 +00:00
Andrew Cagney cad7297e80 o Wordwrap usage messages from sim-options
o	Clarify how to use alias options
o	use in sim-watch (better usage message)
o	Don't pass something on the stack into the
	watch-point interrupt hander.
1997-09-10 22:47:12 +00:00
Andrew Cagney 8f050205eb (gen_itable_h): Output an enum defining the max size of the itable
string members.
1997-09-10 22:07:06 +00:00
Andrew Cagney 02508bb179 Have trace_input, trace_output use sim-trace for IO. 1997-09-10 05:40:04 +00:00
Felix Lee d6cef44df4 * inst.h (sim_state): rename to h8300_sim_state, to avoid conflict
with sim/common.
	* configure.in: check for sys/param.h
	* compile.c: #ifdef HAVE_SYS_PARAM_H.
	#define SIGTRAP for wingdb.
	(sim_resume): poll keyboard at least once per call.
	(sim_resume): use host_callback instead of printf for syscall
 	output.
1997-09-10 05:20:37 +00:00
Andrew Cagney d0b59aa593 Add option architecture-info to list supported architectures. 1997-09-10 05:16:34 +00:00
Gavin Romig-Koch 318b499d8e Support tx19 sanitation. 1997-09-10 04:53:18 +00:00
Felix Lee 31dda65aff * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid
illegal zero-sized array.
	* sim-core.c (sim_core_xor_read_buffer): same.
1997-09-10 04:46:37 +00:00
Felix Lee a1efa0d880 * interp.c (sim_resume): poll_quit() at least once per call;
otherwise gdb can loop sim_resume() uninterruptably.
1997-09-10 03:52:48 +00:00
David Edelsohn 7b4aeebabe * nltvals.def: Regenerate. 1997-09-09 18:20:57 +00:00
Andrew Cagney 9eeaaefa0f Better word error messages. 1997-09-09 10:38:39 +00:00
Andrew Cagney c31c13b481 Remove GCC specific `0x...LL', replace with SIGNED64 (0x...). 1997-09-09 07:02:02 +00:00
Andrew Cagney db511584c9 Add basic tests for d10v-elf simulator. 1997-09-09 02:22:07 +00:00
Andrew Cagney 5d37a07bc5 Add multi-sim support to v850/v850e/v850eq simulators. 1997-09-08 17:42:48 +00:00
Andrew Cagney 687f3f1cef Add multi-sim support to simulator. 1997-09-08 17:40:24 +00:00
Andrew Cagney 70c8abdb4c Use updated MSMASK, MSMASKED macros.
Fix sat problem in d30v.
1997-09-08 17:23:16 +00:00
Andrew Cagney 75faf9aecb Check MS* macros from sim/common. 1997-09-08 17:22:01 +00:00
Andrew Cagney 75b3697d5f Add/use LSEXTRACTED, MSEXTRACTED macros.
Add CPU_CIA macro to extract the PC.
1997-09-08 17:21:13 +00:00
Andrew Cagney 986cb931ca Sanity check for tic80 simulator. 1997-09-08 17:19:21 +00:00
Gavin Romig-Koch b637f306ba tx19 and related necessary changes.
* config.sub: Add tx19/r1900.
	* sim/mips/configure.in, sim/mips/gencode: Add tx19/r1900.
	* gcc/config.sub, gcc/configure: Add tx19/r1900.
	* gcc/config/mips/r1900.h, config/mips/t-r1900: New.
	* gas/config/tc-mips.c: Add tx19/r1900.

	* gcc/config/mips/mips.c: Don't build 16 bit to 32 bit stubs for
	TARGET_SOFT_FLOAT.

	* config.sub: Add "marketing-names" patch.
	* gcc/config.sub: Add "marketing-names" patch.

	* gcc/configure: Change "as" link from "../gas/as.new" to "../gas/as-new";
	Same for "ld" link.
1997-09-07 20:33:22 +00:00
Andrew Cagney 1bba340afe Redo watchpoint code so that it target can specify interrupt names.
Replace v850 interrupt code with this common watchpoint code.
Other minor fixes to core.
1997-09-05 08:16:23 +00:00
Andrew Cagney 1b465b54e1 Add sim_do_commandf - printf version of sim_do_command. 1997-09-05 07:57:27 +00:00
David Edelsohn 6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney 30efae3acd Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue. 1997-09-05 00:30:38 +00:00
Andrew Cagney da3a66e5ca Replace memory model with one from sim/common directory. 1997-09-04 10:10:02 +00:00
Andrew Cagney 6dbaff8f60 Finish implementation of sim-memopt.
Use in d30v and tic80.
Make available a generic sim_read, sim_write implementation.
1997-09-04 10:08:44 +00:00
Andrew Cagney a34abff813 o Add modulo argument to sim_core_attach
o	Add sim-memopt module - memory option processing.
1997-09-04 03:47:39 +00:00
David Edelsohn 600d83316c * sim-hload.c (sim_load): Add assert for SIM_MAGIC_NUMBER. 1997-09-04 00:57:21 +00:00
David Edelsohn 88d5f8e854 * gdbinit.in: New file.
* aclocal.m4 (SIM_AC_OUTPUT): Build .gdbinit.
	* Make-common.in (distclean): Delete .gdbinit.
	(.gdbinit): Add rule for.
	* configure: Regenerated to track ../common/aclocal.m4 changes.
1997-09-04 00:49:57 +00:00
Nick Clifton 2636486389 removed v850 sanitization
Added v850/sim-main.h to list of files to keep after sanitization.
1997-09-03 22:27:28 +00:00
Andrew Cagney cb6a7127d9 Basic tests for tic80 simulator. 1997-09-03 07:41:35 +00:00
Andrew Cagney 2bc779d782 Doc directory - README.
Make suffix of executables to be run on simulator .run
1997-09-03 07:36:09 +00:00
Andrew Cagney b83adf4eeb Doc C language guidelines. 1997-09-03 07:34:59 +00:00
Andrew Cagney b5e935ae85 Pacify gcc-current -Wall. 1997-09-03 07:30:17 +00:00
Andrew Cagney fdd64f952d Add support for suspending/resumeing the simulator in sim-modules.
Use in sim-events.
1997-09-03 07:26:11 +00:00
Andrew Cagney cabedd5871 Standard simulator header file. 1997-09-03 04:13:45 +00:00
Andrew Cagney 9cdd2c6d72 Add real SIM_DESC arg to v850 simulator.
Add --enable-sim-warnings, use/fix errors.
Add --enable-sim-endian, don't use.
Add common modules. Don't yet use most.
1997-09-03 04:10:33 +00:00
Andrew Cagney 80c651f02d Stanify error reporting memory overlaps. 1997-09-03 04:06:27 +00:00
Joern Rennecke 134f75d8ba Support restore-sanitize-sh4 . 1997-09-02 22:57:50 +00:00
Joern Rennecke 552c6220e0 Comment typo fix. 1997-09-02 22:43:55 +00:00
David Edelsohn 51037f28cf Add note on TAGS support. 1997-09-02 22:07:54 +00:00
David Edelsohn 645ab3ec42 (TAGS): Add support for "/* TAGS: foo */" marker. 1997-09-02 22:03:41 +00:00
David Edelsohn 74db699d1d * Makefile.in (TAGS): Add support for "/* TAGS: foo */" marker.
* sim-n-bits.h: Add TAGS comments for all functions.
	* sim-n-core.h: Likewise.
	* sim-n-endian.h: Likewise.
1997-09-02 21:58:58 +00:00
Joern Rennecke bbce7567b6 Sanitation fixes. 1997-09-02 21:43:06 +00:00
Andrew Cagney 4de6b5d361 Merge SH4 branch simulator in to devo. 1997-09-02 03:49:55 +00:00
Andrew Cagney 52352d38d6 Test/fix pabsh, pabsw, psrlvw. 1997-09-01 09:47:03 +00:00
Andrew Cagney 0ffba68fdc Compile from UNIX to cygwin32. 1997-09-01 03:43:56 +00:00
Andrew Cagney 4b2a6aed84 Use sim_state_alloc to create common sim object. 1997-09-01 03:26:31 +00:00
Andrew Cagney 9f3f352539 Passify cross compilation and GCC -Wall 1997-09-01 03:21:59 +00:00
Andrew Cagney f90b720ba1 Passify GCC. Convert 0x0LL to something more portable in the FP code. 1997-08-30 00:02:19 +00:00
Andrew Cagney 4113ba4cd7 Passify GCC. 1997-08-30 00:01:12 +00:00
David Edelsohn 36db8e64ab * sim-options.c (standard_option_handler): Use xstrdup, not strdup. 1997-08-28 17:37:30 +00:00
Andrew Cagney 04258deea2 Make igen available when v850 is being build. 1997-08-28 09:55:55 +00:00
Andrew Cagney 18c319ae59 Add --target=BFDTARGET and --architecture=MACHINE options. 1997-08-28 09:44:42 +00:00
Andrew Cagney 8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney d6fea803dc Add MSBIT* and LSBIT* macro's to sim-bits.h
Add more macro's for extracting sub word quantites to sim-endian.h
1997-08-27 07:56:27 +00:00
Andrew Cagney 230a95ce5a New file - generic implementation of sim_load for hardware only
simulators.
1997-08-27 04:45:59 +00:00
Andrew Cagney fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney 9f64f00ada * idecode_expression.h (ALU_END): From Charles Lefurgy - Extract
sign bit using 64 bit and not a 32 bit mask.

        * sim_calls.c (sim_load): From Ian Lance Taylor - free argv after
        it has been used, not before.
1997-08-27 00:44:05 +00:00
Andrew Cagney d07dddd2b2 Save a copy of argv, not just a pointer. 1997-08-27 00:35:34 +00:00
Andrew Cagney 3f1a33d673 Make building of w65 simulator conditional on --enable-sim. 1997-08-26 08:38:34 +00:00
Andrew Cagney 7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney 247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
Nick Clifton 6061622830 Updated with respect to the HDD-tool-0611 document. 1997-08-22 17:41:20 +00:00