* hw_htab.c (htab_map_binary): Don't try to map the text section
when it is empty.
* emul_chirp.c (map_over_chirp_note): Default load-base to -1 not
CHIRP_LOAD_BASE.
(emul_chirp_create): Map in the interrupt table.
* lib/sim-defs.exp (run_sim_test): Include a description such as
"assembling" or "linking" that identifies the phase a test fails
in, for easier analysis of failures.
* interp.c (sim_resume): New function from sim-resume.c, install
the stepping event after having processed the pending ticks.
(has_stepped): Likewise.
(sim_info): Produce an output only if verbose or STATE_VERBOSE_P.
pending interrupts.
* interrupts.c (interrupts_process): Keep track of the last number
of masked insn cycles.
(interrupts_initialize): Clear last number of masked insn cycles.
(interrupts_info): Report them.
(interrupts_update_pending): Compute clear and set masks of
interrupts and clear the interrupt bits before setting them
(due to SCI interrupt sharing).
* interrupts.h (struct interrupts): New members last_mask_cycles
and xirq_last_mask_cycles.
2001-04-18 matthew green <mrg@redhat.com>
* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
(read_cp15_reg): Make non-static.
(XScale_cp15_LDC): Update for write_cp15_reg() change.
(XScale_cp15_MCR): Likewise.
(XScale_cp15_write_reg): Likewise.
(XScale_check_memacc): New function. Check for breakpoints being
activated by memory accesses. Does not support the Branch Target
Buffer.
(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
(XScale_debug_moe): New function. Set the debug Method Of Entry,
if configured.
(write_cp14_reg): Reset count counter if requested.
* armdefs.h (struct ARMul_State): New members `LastTime' and
`CP14R0_CCD' used for the timer/counters.
(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
defines for XScale registers.
(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
(ARMul_Emulate32): Handle the clock counter and hardware instruction
breakpoints. Call XScale_set_fsr_far() for software breakpoints and
software interrupts.
(LoadMult): Call XScale_set_fsr_far() for data aborts.
(LoadSMult): Likewise.
(StoreMult): Likewise.
(StoreSMult): Likewise.
* armemu.h (write_cp15_reg): Update prototype.
* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
register 0.
* armvirt.c (GetWord): Call XScale_check_memacc().
(PutWord): Likewise.
PENDING_FILL. Use PENDING_SCHED directly to handle the pending
set of the FCSR.
* sim-main.h (COCIDX): Remove definition; this isn't supported by
PENDING_FILL, and you can get the intended effect gracefully by
calling PENDING_SCHED directly.
2001-03-16 Frank Ch. Eigler <fche@redhat.com>
Add support for mmap-based memory regions.
* sim-memopt.c (mmap_next_fd): New global.
(sim_memory_init): Reinitialize it.
(OPTION_MEMORY_MAPFILE, memory_option_handler): Support new
"--memory-mapfile FILE" option. Check for some errors.
(do_memopt_add): Conditionally do mmap instead of malloc for
backing store of simulated memory. Check for more errors.
(do_simopt_delete, sim_memory_uninstall): Corresponding cleanup.
* sim-memopt.h (munmap_length): New member of _sim_memopt.
* configure.in: Look for mmap/fstat related functions and headers.
* config.in, configure: Regenerated.
2001-02-09 Ben Elliston <bje@redhat.com>
* (profile_print_pc): Write header out in target byte order.
2001-02-09 Ben Elliston <bje@redhat.com>
* sim-profile.c (profile_pc_init): Correct bug in loop logic when
adjusting the pc shift value.
later inspection by the trap handler.
(count_argc): New function.
(prog_argv): Declare static.
(sim_write): Declare.
(trap): Implement argc, argnlen and argn system calls. Do not
abort on unknown system calls--simply return -1.
* syscall.h (SYS_argc, SYS_argnlen, SYS_argn): Define.
[common/ChangeLog]
2001-01-12 Chris Demetriou <cgd@sibyte.com>
* aclocal.m4 (SIM_AC_OPTION_SCACHE): Properly
handle the case where a numeric value is supplied.
[eg. m32r/ChangeLog]
2001-01-12 Frank Ch. Eigler <fche@redhat.com>
* configure: Regenerated with sim_scache fix.
* sim-fpu.h (sim_fpu_printn_fpu): Declare.
* sim-fpu.c (print_bits): Add digits parameter. Print only as many
trailing digits as specified (-1 to print all digits).
(sim_fpu_print_fpu): New wrapper around sim_fpu_printn_fpu.
(sim_fpu_printn_fpu): Rename from sim_fpu_print_fpu; update calls
to print_bits ().
* sim-endian.h: Don't have parameters on macro definitions which
are simply renaming functions, to permit use of XCONCAT2 in both
the macro name and the arguments in a use of such a definition.
In sim/ppc:
* sim-endian.h: Don't have parameters on macro definitions which
are simply renaming functions, to permit use of XCONCAT2 in both
the macro name and the arguments in a use of such a definition.
* lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
"xerror" options do not use a list of machines. Clear options from
previous test case. Use "$cpu_option" to identify the machine to the
assembler, if specified.
* cgen.sh: Handle an isa argument between cpu and mach. Default to
`all'. Pass `-i' options to cgen applications.
* Make-common.in (cgen-arch, cgen-cpu, cgen-decode, cgen-cpu-decode,
cgen-desc): Pass $(isa) to cgen.sh.
2000-10-19 Frank Ch. Eigler <fche@redhat.com>
On advice from Chris G. Demetriou <cgd@sibyte.com>:
* sim-main.h (GPR_CLEAR): Remove unused alternative macro.
* dv-m68hc11tim.c (cycle_to_string): New function to translate
the cpu cycle into some formatted time string.
(m68hc11tim_print_timer): Use it.
* dv-m68hc11sio.c (m68hc11sio_info): Use cycle_to_string.
* dv-m68hc11spi.c (m68hc11spi_info): Likewise.
* interrupts.c (interrupts_info): Likewise.
* m68hc11_sim.c (cpu_info): Likewise.
* sim-profile.h (PROFILE_DATA): Add cpu_freq.
(PROFILE_CPU_FREQ): New macro.
* sim-profile.c (OPTION_PROFILE_CPU_FREQUENCY): New enumerator.
(profile-options): Add profile-cpu-frequency.
(parse_frequency): New function.
(profile_option_handler): Handle OPTION_PROFILE_CPU_FREQUENCY.
(profile_print_speed): Print cpu frequency and simulated execution time.
Re-indent other items to match.
(movm): Initialize PC and mask.
(mov, movbu, movhu): Set srcreg2 from RI0.
(bsch): Initialize c.
(sat16_cmp): Actually do the comparison.
(mov_llt): Do not overwrite dstreg with uninitialized variable.
* sim-events.c (sim_events_remain_time): New function returning
the time that remains before the event is raised.
* hw-events.c (hw_event_remain_time): Likewise.
* sim-events.h (sim_events_remain_time): Declare.
* hw-events.h (hw_event_remain_time): Declare.
* sim-hw.c: Use <errno.h> instead of <sys/errno.h>
(OPTION_HW_LIST): New option --hw-list to list the devices.
(hw_option_handler): List the device tree with 'sim_hw_print'.
* sim-bits.h (_MSB_16, _LSB_16): Define for 16-bit targets.
(MASK, LSBIT, MSBIT): Likewise and use _MSB_16 and _LSB_16.
(EXTENDED): Define for 16-bit word size.
* sim-bits.c (LSEXTRACTED, MSEXTRACTED, LSINSERTED,
MSINSERTED, LSSEXT, MSSEXT): Implement for 16-bit word size.
* sim-types.h: Added support for 16-bit targets.
(ARM_Strong_Prop, STRONGARM): Define.
* arminit.c (ARMul_NewState): Reset is_StrongARM.
(ARMul_SelectProcessor): Set is_StrongARM.
* wrapper.c (sim_create_inferior): Use bfd machine type to
determine processor type to emulate.
* armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC
when emulating StrongARM.
(SET_ABORT): Save CPSR in SPSR and set LR.
* armemu.c (ARMul_Emulate, isize): Set to INSN_SIZE.
(WriteR15, WriteSR15): Do not discard bit 1 in Thumb mode.
* arminit.c (ARMul_Abort): Use new SETABORT and INSN_SIZE.
* armemu.c (ARMul_Emulate26, bl): Use WriteR15Branch() to
modify PC. Moved the existing logic...
(WriteR15Branch): ... here. New function.
(WriteR15, WriteSR15): Drop the two least significant bits.
(LoadSMult): Use WriteR15Branch() to modify PC.
(LoadMult): Use WRITEDESTB() instead of WRITEDEST().
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
extracted from state->Cpsr, but preserve the unused bits.
(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
get the full CPSR word.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask. Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
Ben Harris
Andrew Cagney
Dave Brolley
Nick Clifton
John R. Moore
Ben Elliston
Stephane Carrez
Daniel Jacobowitz
Jim Blandy
Alexandre Oliva
Frank Ch. Eigler
Matthew Green
J.T. Conklin
Michael Meissner
Chris Demetriou
DJ Delorie
Jonathan Larmour
Geoffrey Keating
Michael Chastain
Greg McGary
Elena Zannoni
Kazu Hirata
Fernando Nasser