Make _bfd_riscv_relax_call handle section alignment padding same as
the _bfd_riscv_relax_lui and _bfd_riscv_relax_pc functions already
do. Use the max section alignment if section boundaries are crossed,
otherwise the alignment of the containing section.
bfd/
PR 25181
* elfnn-riscv.c (_bfd_riscv_relax_call): Always add max_alignment to
foff. If sym_sec->output_section and sec->output_section are the same
and not *ABS* then set max_alignment to that section's alignment.
ld/
PR 25181
* testsuite/ld-riscv-elf/call-relax-0.s: New file.
* testsuite/ld-riscv-elf/call-relax-1.s: New file.
* testsuite/ld-riscv-elf/call-relax-2.s: New file.
* testsuite/ld-riscv-elf/call-relax-3.s: New file.
* testsuite/ld-riscv-elf/call-relax.d: New test.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run call-relax test.
Change-Id: Iaf65cee52345abf1955f36e8e72c4f6cc0db8d9a
At least, not in the GOT. R_PPC64_RELATIVE is fine for powerpc64 in
the .opd section.
PR 22269
* testsuite/ld-elf/pr22269-1.rd: Look for GOT section NONE and
RELATIVE relocs.
* testsuite/ld-elf/shared.exp (pr22269-1): Give test a better
name. Use -z nocombreloc.
Two patches from Nelson Chu.
It is better to use the linker's callback functions to handle the link time
error when relocating. The unresolved relocation error can be regarded as
an unsupported relocation. To make user easier to understand different errors,
we need to extend the current error message format of the callback function
since the format is fixed.
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): Use asprintf to extend
the error message if needed, and then store the result into the
`msg_buf`. Finally, remember to free the unused `msg_buf`. All error
message for the dangerous relocation should be set before we call the
callback function. If we miss the error message since linker runs out
of memory, we should set the default error message for the error.
ld/
* testsuite/ld-riscv-elf/lib-nopic-01a.s: Create the shared library
lib-nopic-01a.so, it will be linked with lib-nopic-01b.s.
* testsuite/ld-riscv-elf/lib-nopic-01b.s: Add new test for the
unresolved relocation. Link the non-pic code into a shared library
may cause the error.
* testsuite/ld-riscv-elf/lib-nopic-01b.d: Likewise.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the new test only when
the shared library is supported.
R_RISCV_CALL, R_RISCV_JAL and R_RISCV_RVC_JUMP are pc-relative relocation.
For now, we do not allow the object with these relocation links into a shared
library since the referenced symbols may be loaded to the places that too far
from the pc. We can improve the error message for these unsupported relocation
to notice user that they should recompile their code with `fPIC`.
bfd/
* elfnn-riscv.c (riscv_elf_relocate_section): Report the error message
that user should recompile their code with `fPIC` when linking non-pic
code into shared library.
ld/
* testsuite/ld-riscv-elf/lib-nopic-01b.d: Update the error message.
Change-Id: Ib3347a0a6fa1c2b20a9647c314d5bec2c322ff04
This is the one that causes ld segfaults between 2019-10-04 and
2019-10-07. Bug introduced with f749f26eea, fixed by 93370e8e7b.
* testsuite/ld-powerpc/localgot.s,
* testsuite/ld-powerpc/localgot.d: New test.
* testsuite/ld-powerpc/powerpc.exp: Run it.
This functionality will generate a new GNU object attribute for the "data region"
has been added. This object attribute is used
mark whether the compiler has generated code assuming that data could be in the
upper or lower memory regions.
Code which assumes data is always in the lower memory region is incompatible
with code which uses the full memory range for data.
The patch also adds a new assembler directive ".mspabi_attribute" to handle the
existing MSPABI object attributes. GCC will now emit both .gnu_attribute and
.mspabi_attribute directives to indicate what options the source file was
compiled with.
The assembler will now check the values set in these directives against the
options that the it has been invoked with. If there is a discrepancy, the
assembler will exit with an error.
bfd * elf32-msp430.c (elf32_msp430_merge_mspabi_attributes): Rename to..
(elf32_msp430_merge_msp430_attributes): Add support for merging the GNU
object attribute for data region.
binutils* readelf.c (display_msp430_gnu_attribute): New.
(process_arch_specific): Use msp430 specific handler for GNU
attributes.
gas * config/tc-msp430.c (md_parse_option): Set lower_data_region_only to
FALSE if the data region is set to "upper", "either" or "none".
(msp430_object_attribute): New.
(md_pseudo_table): Handle .mspabi_attribute and .gnu_attribute.
(msp430_md_end): Replace hard-coded attribute values with enums.
Handle data region object attribute.
* doc/as.texi: Document MSP430 Data Region object attribute.
* doc/c-msp430.texi: Document the .mspabi_attribute directive.
* testsuite/gas/msp430/attr-430-small-bad.d: New test.
* testsuite/gas/msp430/attr-430-small-bad.l: New test.
* testsuite/gas/msp430/attr-430-small-good.d: New test.
* testsuite/gas/msp430/attr-430-small.s: New test.
* testsuite/gas/msp430/attr-430x-large-any-bad.d: New test.
* testsuite/gas/msp430/attr-430x-large-any-bad.l: New test.
* testsuite/gas/msp430/attr-430x-large-any-good.d: New test.
* testsuite/gas/msp430/attr-430x-large-any.s: New test.
* testsuite/gas/msp430/attr-430x-large-lower-bad.d: New test.
* testsuite/gas/msp430/attr-430x-large-lower-bad.l: New test.
* testsuite/gas/msp430/attr-430x-large-lower-good.d: New test.
* testsuite/gas/msp430/attr-430x-large-lower.s: New test.
* testsuite/gas/msp430/msp430.exp: Run new tests.
include * elf/msp430.h: Add enums for MSPABI and GNU object attribute tag names
and values.
ld * testsuite/ld-msp430-elf/attr-gnu-main.s: New test.
* testsuite/ld-msp430-elf/attr-gnu-obj.s: New test.
* testsuite/ld-msp430-elf/attr-gnu-region-lower-upper.d: New test.
* testsuite/ld-msp430-elf/attr-gnu-region-lower.d: New test.
* testsuite/ld-msp430-elf/attr-gnu-region-upper.d: New test.
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new tests.
This patch is a result of noticing messages like the following:
tmpdir/tls32.o: in function `_start':
(.text+0x1c): unresolvable R_PPC_REL24 relocation against symbol `__tls_get_addr_opt'
./ld-new: final link failed: symbol needs debug section which does not exist
The "needs debug section" comes from attempting to use debug info to
find source line information to print the first error message. That
error isn't of interest to the user, and any previous bfd_error value
which might be of interest is overwritten. So save and restore
bfd_error around the fancy error reporting code.
That still doesn't leave us with a clean bfd_error. Now we get
./ld-new: final link failed: nonrepresentable section on output
An unresolvable relocation surely doesn't mean there is some bfd
section that ld doesn't know how to output! Digging into that showed
a _bfd_elf_section_from_bfd_section failure attempting to find an elf
section correcsponding to ".interp". So don't go looking for elf
sections on linker created bfd sections.
And then fix the linker testsuite which expected the bogus message..
bfd/
* elflink.c (elf_fixup_link_order): Don't attempt to find
an elf_section for linker created bfd sections.
ld/
* ldmisc.c (vfinfo): Save and restore bfd_error around bfd
function calls that might set it.
* testsuite/ld-elf/indirect.exp: Don't expect "nonrepresentable
section" message.
This patch adds some --no-tls-optimize tests and performs some of the
existing dynamic tests with tls markers in order to catch any
regression in PLT counting.
* testsuite/ld-powerpc/tlsexe.r: Adjust for added TLSMARK symbol.
* testsuite/ld-powerpc/tlsexe32.r: Likewise.
* testsuite/ld-powerpc/tlsso.r: Likewise.
* testsuite/ld-powerpc/tlsso32.r: Likewise.
* testsuite/ld-powerpc/tls32no.d,
* testsuite/ld-powerpc/tls32no.g: New test files.
* testsuite/ld-powerpc/tlsexe32no.d,
* testsuite/ld-powerpc/tlsexe32no.g,
* testsuite/ld-powerpc/tlsexe32no.r: New test files.
* testsuite/ld-powerpc/tlsexeno.d,
* testsuite/ld-powerpc/tlsexeno.g,
* testsuite/ld-powerpc/tlsexeno.r: New test files.
* testsuite/ld-powerpc/tlsexetocno.d,
* testsuite/ld-powerpc/tlsexetocno.g: New test files.
* testsuite/ld-powerpc/tlsno.d,
* testsuite/ld-powerpc/tlsno.g: New test files.
* testsuite/ld-powerpc/tlstocno.d,
* testsuite/ld-powerpc/tlstocno.g: New test files.
* testsuite/ld-powerpc/powerpc.exp: Run new tests.
1) GOT entries generated for any of the GOT TLS relocations don't need
dynamic relocations for locally defined symbols in PIEs. In the case
of a tls_index doubleword, the dtpmod entry is known to be 1, and the
dtprel entry is also known at link time and relative. Similarly,
dtprel and tprel words are known at link time and relative. (GOT
entries for other than TLS symbols are not relative and thus need
dynamic relocations in PIEs.)
2) Local dynamic TLS code is really only meant for accesses local to
the current binary. There was a cheapskate test for this before using
the common tlsld_got slot, but the test wasn't exactly correct and
might confuse anyone looking at the code. The proper test,
SYMBOL_REFERENCES_LOCAL isn't so expensive that it should be avoided.
3) The same cheap test for local syms when optimising TLS sequences
should be SYMBOL_REFERENCES_LOCAL too.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Move initialisation of vars.
(ppc64_elf_tls_optimize): Correct is_local condition.
(allocate_got): Don't reserve dynamic relocations for any of the
tls got relocs in PIEs when the symbol is local.
(allocate_dynrelocs): Correct validity test for local sym using
tlsld_got slot.
(ppc64_elf_size_dynamic_sections): Don't reserve dynamic relocations
for any of the tls got relocs in PIEs.
(ppc64_elf_layout_multitoc): Likewise.
(ppc64_elf_relocate_section): Correct validity test for local sym
using tlsld_got slot. Don't emit dynamic relocations for any of
the tls got relocs in PIEs when the symbol is local.
* elf32-ppc.c (ppc_elf_tls_optimize): Correct is_local condition.
(got_relocs_needed): Delete.
(allocate_dynrelocs): Correct validity test for local sym using
tlsld_got slot. Don't reserve dynamic relocations for any of the
tls got relocs in PIEs when the symbol is local.
(ppc_elf_size_dynamic_sections): Don't reserve dynamic relocations
for any of the tls got relocs in PIEs.
(ppc_elf_relocate_section): Correct validity test for local sym
using tlsld_got slot. Don't emit dynamic relocations for any of
the tls got relocs in PIEs when the symbol is local.
ld/
* testsuite/ld-powerpc/tlsso.d: Adjust to suit tlsld_got usage change.
* testsuite/ld-powerpc/tlsso.g: Likewise.
* testsuite/ld-powerpc/tlsso.r: Likewise.
* testsuite/ld-powerpc/tlsso32.d: Likewise.
* testsuite/ld-powerpc/tlsso32.g: Likewise.
* testsuite/ld-powerpc/tlsso32.r: Likewise.
On 64-bit host the 32-bit addend was loaded without sign extension into
an unsigned long.
bfd/ChangeLog:
PR ld/25062
* elf32-arm.c (elf32_arm_final_link_relocate): Sign extend data.
ld/ChangeLog:
PR ld/25062
* testsuite/ld-arm/arm-elf.exp: Update.
* testsuite/ld-arm/tls-gdesc-neg.d: New test.
* testsuite/ld-arm/tls-gdesc-neg.s: New test.
This is quite complicated because the CTF section's contents depend on
the final contents of the symtab and strtab, because it has two sections
whose contents are shuffled to be in 1:1 correspondence with the symtab,
and an internal strtab that gets deduplicated against the ELF strtab
(with offsets adjusted to point into the ELF strtab instead). It is
also compressed if large enough, so its size depends on its contents!
So we cannot construct it as early as most sections: we cannot even
*begin* construction until after the symtab and strtab are finalized.
Thankfully there is already one section treated similarly: compressed
debugging sections: the only differences are that compressed debugging
sections have extra handling to deal with their changing name if
compressed (CTF sections are always called ".ctf" for now, though we
have reserved ".ctf.*" against future use), and that compressed
debugging sections have previously-uncompressed content which has to be
stashed away for later compression, while CTF sections have no content
at all until we generate it (very late).
BFD also cannot do the link itself: libctf knows how to do it, and BFD
cannot call libctf directly because libctf already depends on bfd for
file I/O. So we have to use a pair of callbacks, one, examine_strtab,
which allows a caller to examine the symtab and strtab after
finalization (called from elf_link_swap_symbols_out(), right before the
symtabs are written, and after the strtab has been finalized), and one
which actually does the emission (called emit_ctf simply because it is
grouped with a bunch of section-specific late-emission function calls at
the bottom of bfd_elf_final_link, and a section-specific name seems best
for that). emit_ctf is actually called *twice*: once from lang_process
if the emulation suggests that this bfd target does not examine the
symtab or strtab, and once via a bfd callback if it does. (This means
that non-ELF targets still get CTF emitted, even though the late CTF
emission stage is never called for them).
v2: merged with non-ELF support patch: slight commit message
adjustments.
v3: do not spend time merging CTF, or crash, if the CTF section is
explicitly discarded. Do not try to merge or compress CTF unless
linking.
v4: add CTF_COMPRESSION_THRESHOLD. Annul the freed input ctf_file_t's
after writeout: set SEC_IN_MEMORY on the output contents so a future
bfd enhancement knows it could free it. Add SEC_LINKER_CREATED |
SEC_KEEP to avoid having to add .ctf to the linker script. Drop
now-unnecessary ldlang.h-level elf-bfd.h include and hackery around
it. Adapt to elf32.em->elf.em and elf-generic.em->ldelf*.c
changes.
v5: fix tabdamage. Drop #inclusions in .h files: include in .c files,
.em files, and use struct forwards instead. Use bfd_section_is_ctf
inline function rather than SECTION_IS_CTF macro. Move a few
comments.
* Makefile.def (dependencies): all-ld depends on all-libctf.
* Makefile.in: Regenerated.
include/
* bfdlink.h (elf_strtab_hash): New forward.
(elf_sym_strtab): Likewise.
(struct bfd_link_callbacks <examine_strtab>): New.
(struct bfd_link_callbacks <emit_ctf>): Likewise.
bfd/
* elf-bfd.h (bfd_section_is_ctf): New inline function.
* elf.c (special_sections_c): Add ".ctf".
(assign_file_positions_for_non_load_sections): Note that
compressed debugging sections etc are not assigned here. Treat
CTF sections like SEC_ELF_COMPRESS sections when is_linker_output:
sh_offset -1.
(assign_file_positions_except_relocs): Likewise.
(find_section_in_list): Note that debugging and CTF sections, as
well as reloc sections, are assigned later.
(_bfd_elf_assign_file_positions_for_non_load): CTF sections get
their size and contents updated.
(_bfd_elf_set_section_contents): Skip CTF sections: unlike
compressed sections, they have no uncompressed content to copy at
this stage.
* elflink.c (elf_link_swap_symbols_out): Call the examine_strtab
callback right before the strtab is written out.
(bfd_elf_final_link): Don't cache the section contents of CTF
sections: they are not populated yet. Call the emit_ctf callback
right at the end, after all the symbols and strings are flushed
out.
ld/
* ldlang.h: (struct lang_input_statement_struct): Add the_ctf.
(struct elf_sym_strtab): Add forward.
(struct elf_strtab_hash): Likewise.
(ldlang_ctf_apply_strsym): Declare.
(ldlang_write_ctf_late): Likewise.
* ldemul.h (ldemul_emit_ctf_early): New.
(ldemul_examine_strtab_for_ctf): Likewise.
(ld_emulation_xfer_type) <emit_ctf_early>: Likewise.
(ld_emulation_xfer_type) <examine_strtab_for_ctf>: Likewise.
* ldemul.c (ldemul_emit_ctf_early): New.
(ldemul_examine_strtab_for_ctf): Likewise.
* ldlang.c: Include ctf-api.h.
(CTF_COMPRESSION_THRESHOLD): New.
(ctf_output): New. Initialized in...
(ldlang_open_ctf): ... this new function. Open all the CTF
sections in the input files: mark them non-loaded and empty
so as not to copy their contents to the output, but linker-created
so the section gets created in the target.
(ldlang_merge_ctf): New, merge types via ctf_link_add_ctf and
ctf_link.
(ldlang_ctf_apply_strsym): New, an examine_strtab callback: wrap
ldemul_examine_strtab_for_ctf.
(lang_write_ctf): New, write out the CTF section.
(ldlang_write_ctf_late): New, late call via bfd's emit_ctf hook.
(lang_process): Call ldlang_open_ctf, ldlang_merge_ctf, and
lang_write_ctf.
* ldmain.c (link_callbacks): Add ldlang_ctf_apply_strsym,
ldlang_write_ctf_late.
* emultempl/aix.em: Add ctf-api.h.
* emultempl/armcoff.em: Likewise.
* emultempl/beos.em: Likewise.
* emultempl/elf.em: Likewise.
* emultempl/generic.em: Likewise.
* emultempl/linux.em: Likewise.
* emultempl/msp430.em: Likewise.
* emultempl/pe.em: Likewise.
* emultempl/pep.em: Likewise.
* emultempl/ticoff.em: Likewise.
* emultempl/vanilla.em: Likewise.
* ldcref.c: Likewise.
* ldctor.c: Likewise.
* ldelf.c: Likewise.
* ldelfgen.c: Likewise.
* ldemul.c: Likewise.
* ldexp.c: Likewise.
* ldfile.c: Likewise.
* ldgram.c: Likewise.
* ldlex.l: Likewise.
* ldmain.c: Likewise.
* ldmisc.c: Likewise.
* ldver.c: Likewise.
* ldwrite.c: Likewise.
* lexsup.c: Likewise.
* mri.c: Likewise.
* pe-dll.c: Likewise.
* plugin.c: Likewise.
* ldelfgen.c (ldelf_emit_ctf_early): New.
(ldelf_examine_strtab_for_ctf): tell libctf about the symtab and
strtab.
(struct ctf_strsym_iter_cb_arg): New, state to do so.
(ldelf_ctf_strtab_iter_cb): New: tell libctf about
each string in the strtab in turn.
(ldelf_ctf_symbols_iter_cb): New, tell libctf
about each symbol in the symtab in turn.
* ldelfgen.h (struct elf_sym_strtab): Add forward.
(struct elf_strtab_hash): Likewise.
(struct ctf_file): Likewise.
(ldelf_emit_ctf_early): Declare.
(ldelf_examine_strtab_for_ctf): Likewise.
* emultempl/elf-generic.em (LDEMUL_EMIT_CTF_EARLY): Set it.
(LDEMUL_EXAMINE_STRTAB_FOR_CTF): Likewise.
* emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Add
emit_ctf_early and examine_strtab_for_ctf, NULL by default.
* emultempl/armcoff.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/beos.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/elf.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/generic.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/linux.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/msp430.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/pe.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/pep.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/ticoff.em (ld_${EMULATION_NAME}_emulation): Likewise.
* emultempl/vanilla.em (ld_vanilla_emulation): Likewise.
* Makefile.am: Pull in libctf (and zlib, a transitive requirement
for compressed CTF section emission). Pass it on to DejaGNU.
* configure.ac: Add AM_ZLIB.
* aclocal.m4: Added zlib.m4.
* Makefile.in: Regenerated.
* testsuite/ld-bootstrap/bootstrap.exp: Use it when relinking ld.
gcc10 on x86_64 and powerpc64le recognises that the loop in
Foo::operator= can be turned into a call to memmove, which then
results in an undefined symbol when linking. Avoid that by making the
loop smaller.
* testsuite/ld-srec/sr3.cc (FOO_MSG_LEN): Set to 4.
For the lui and auipc relaxations, since the symbol value of an undefined weak
symbol is always be zero, we can optimize the patterns into a single LI/MV/ADDI
instruction.
bfd/
* elfnn-riscv.c (riscv_pcgp_hi_reloc): Add new field undefined_weak.
(riscv_record_pcgp_hi_reloc): New parameter undefined_weak.
Set undefined_weak field from it.
(relax_func_t): New parameter undefined_weak.
(_bfd_riscv_relax_call): New ignored parameter undefined_weak.
(_bfd_riscv_relax_tls_le): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_delete): Likewise.
(_bfd_riscv_relax_lui): New parameter undefined_weak. If true,
allow relaxing. For LO12* relocs, set rs1 to x0 when undefined_weak.
(_bfd_riscv_relax_pc): New parameter undefined_weak. For LO12* relocs,
set undefined_weak from hi_reloc. If true, allow relaxing. For LO12*
relocs, set rs1 to x0 when undefined_weak and change to non-pcrel
reloc.
(_bfd_riscv_relax_section): New local undefined_weak. Set for
undef weak relocs that can be relaxed. Pass to relax_func call.
ld/
* testsuite/ld-riscv-elf/weakref32.s: Add relaxable undef weak code.
* testsuite/ld-riscv-elf/weakref64.s: Likewise.
* testsuite/ld-riscv-elf/weakref32.d: Updated.
* testsuite/ld-riscv-elf/weakref64.d: Updated.
The loads and stores handled in the second instruction of a sequence
marked by R_PPC64_PCREL_OPT may be a prefix instruction. For example:
pld ra,symbol@got@pcrel
0:
pld rt,off(ra)
.reloc 0b-8,R_PPC64_PCREL_OPT,(.-8)-(0b-8)
can be optimised to
pld rt,symbol+off@pcrel
pnop
* elf64-ppc.c (xlate_pcrel_opt): Handle prefix loads and stores
in second instruction.
(ppc64_elf_relocate_section): Likewise.
This patch fixes a few linker crashes due to TLS code reaching an assert when it
shouldn't.
The first scenario is with weak TLS symbols that remain weak during linking. In
this case the mid-end would not have seen a TLS symbol and so wouldn't have
allocated the TLS section. We currently assert here and the linker crashes with
a not very useful message.
This patch changes this to return the value 0 for the TLS symbol in question
emulating what lld and gold and other BFD targets do. However because weak TLS
is implementation defined and we don't define any behavior for it I also emit a
warning to the user to inform them of such.
Secondly when a strong TLS reference is undefined. The linker crashes even after
it correctly reported that there is an undefined reference. This changes it so
that it gracefully exits and reports a useful error.
bfd/ChangeLog:
PR ld/24601
* elfnn-aarch64.c (aarch64_relocate): Handle weak TLS and undefined TLS.
Also Pass input_bfd to _bfd_aarch64_elf_resolve_relocation.
* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use it.
* elfxx-aarch64.h (_bfd_aarch64_elf_resolve_relocation): Emit warning
for weak TLS.
ld/ChangeLog:
PR ld/24601
* testsuite/ld-aarch64/aarch64-elf.exp (undef-tls, weak-tls): New.
* testsuite/ld-aarch64/undef-tls.d: New test.
* testsuite/ld-aarch64/undef-tls.s: New test.
* testsuite/ld-aarch64/weak-tls.d: New test.
* testsuite/ld-aarch64/weak-tls.s: New test.
We currently use a padding NOP after a Thumb to Arm interworking veneer (BX pc).
The NOP is never executed but may result in a performance penalty on some cores.
For this reason this patch changes the NOPs after Thumb to Arm veneers into B .-2
and adds a note to this in the source code for future reference.
bfd/ChangeLog:
* elf32-arm.c (elf32_thumb2_plt_entry, elf32_arm_plt_thumb_stub,
elf32_arm_stub_long_branch_v4t_thumb_thumb,
elf32_arm_stub_long_branch_v4t_thumb_arm,
elf32_arm_stub_short_branch_v4t_thumb_arm,
elf32_arm_stub_long_branch_v4t_thumb_arm_pic,
elf32_arm_stub_long_branch_v4t_thumb_thumb_pic,
elf32_arm_stub_long_branch_v4t_thumb_tls_pic): Change nop to branch to
previous instruction.
ld/ChangeLog:
* testsuite/ld-arm/cortex-a8-fix-b-plt.d: Update Testcase.
* testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d: Likewise.
* testsuite/ld-arm/cortex-a8-fix-bcc-plt.d: Likewise.
* testsuite/ld-arm/farcall-cond-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
* testsuite/ld-arm/farcall-thumb-arm.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
* testsuite/ld-arm/fix-arm1176-on.d: Likewise.
* testsuite/ld-arm/ifunc-10.dd: Likewise.
* testsuite/ld-arm/ifunc-2.dd: Likewise.
* testsuite/ld-arm/ifunc-4.dd: Likewise.
* testsuite/ld-arm/ifunc-6.dd: Likewise.
* testsuite/ld-arm/ifunc-8.dd: Likewise.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Likewise.
* testsuite/ld-arm/mixed-app.d: Likewise.
* testsuite/ld-arm/thumb2-b-interwork.d: Likewise.
* testsuite/ld-arm/tls-longplt.d: Likewise.
* testsuite/ld-arm/tls-thumb1.d: Likewise.
commit 83924b3846
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Tue Feb 5 18:45:23 2019 -0800
x86-64: Restore PIC check for PCREL reloc against protected symbol
moved PIC check for PC-relative relocations to elf_x86_64_check_relocs.
Since linker defined symbols may not be processed at the time, we need
to move the check back to elf_x86_64_relocate_section.
bfd/
PR ld/24905
* elf64-x86-64.c (elf_x86_64_check_relocs): Move PIC check for
PC-relative relocations back to ...
(elf_x86_64_relocate_section): Here.
ld/
PR ld/24905
* testsuite/ld-x86-64/pr24905-x32.d: New file.
* testsuite/ld-x86-64/pr24905.d: Likewise.
* testsuite/ld-x86-64/pr24905.s: Likewise.
* testsuite/ld-x86-64/pr24905.t: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24905 and pr24905-x32.
This fixes a problem originally reported at
https://github.com/riscv/riscv-binutils-gdb/issues/173
If you have code linked at address zero, you can have a lui instruction
loading a value 0x800 which gets relaxed to a c.lui which is valid (c.lui 0x1
followed by addi -0x800). Relaxation can reduce the value below 0x800 at which
point the c.lui 0x0 is no longer valid. We can fix this by converting the
c.lui to a c.li which can load 0.
bfd/
* elfnn-riscv.c (perform_relocation) <R_RISCV_RVC_LUI>: If
RISCV_CONST_HIGH_PART (value) is zero, then convert c.lui instruction
to c.li instruction, and use ENCODE_RVC_IMM to set value.
ld/
* testsuite/ld-riscv-elf/c-lui-2.d: New.
* testsuite/ld-riscv-elf/c-lui-2.ld: New.
* testsuite/ld-riscv-elf/c-lui-2.s: New.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run the c-lui-2 test.
This patch is a reimplementation of [1] which was submitted in 2015 by
Neil Schellenberger. Copyright issue was sorted out [2] last year.
It proposed a new section (.gnu.xhash) and related dynamic tag
(DT_GNU_XHASH). The new section would be virtually identical to the
existing .gnu.hash except for the translation table (xlat) which would
contain correct MIPS .dynsym indexes corresponding to the hashvals in
chains. This is because MIPS ABI imposes a different ordering on the
dynsyms than the one expected by the .gnu.hash section. Another addition
would be a leading word (ngnusyms) which would contain the number of
entries in the translation table.
In this patch, the new section name and dynamic tag are changed to
reflect the fact that the section should be treated as MIPS-specific
(.MIPS.xhash and DT_MIPS_XHASH).
This patch addresses the alignment issue as reported in [3], which is
caused by the leading word added to the .MIPS.xhash section. Leading word
is removed in this patch, and the number of entries in the translation
table is now calculated using DT_MIPS_SYMTABNO dynamic tag (this is
addressed by the corresponding glibc patch).
Suggestions on coding style in [4] were taken into account. Existing
GNU hash testcase was covered, and another one was added in the MIPS
part of the testsuite.
The other major change is reserving MIPS ABI version 5 for .MIPS.xhash,
marking the need of support for .MIPS.xhash in the dynamic linker (again,
addressed in the corresponding glibc patch). This is something which I
am not sure of, especially after reading [5]. I am confused on whether
this ABI version is reserved for IFUNC, or it can be used for this
purpose.
Already mentioned glibc patch is submitted at:
https://sourceware.org/ml/libc-alpha/2019-06/msg00456.html
[1] https://sourceware.org/ml/binutils/2015-10/msg00057.html
[2] https://sourceware.org/ml/binutils/2018-03/msg00025.html
[3] https://sourceware.org/ml/binutils/2016-01/msg00006.html
[4] https://sourceware.org/ml/binutils/2016-02/msg00097.html
[5] https://sourceware.org/ml/libc-alpha/2016-12/msg00853.html
ld * emulparams/elf32bmip.sh: Add .MIPS.xhash section.
* emulparams/elf32bmipn32-defs.sh: Add .MIPS.xhash section.
* emulparams/elf64bmip-defs.sh: Add .MIPS.xhash section.
* emultempl/mipself.em: Remove mips_after_parse function.
* testsuite/ld-elf/hash.d: Update comment.
* testsuite/ld-mips-elf/hash1.d: New test.
* testsuite/ld-mips-elf/hash1.s: Ditto.
* testsuite/ld-mips-elf/hash1a.d: Remove.
* testsuite/ld-mips-elf/hash1b.d: Ditto.
* testsuite/ld-mips-elf/hash1c.d: Ditto
* testsuite/ld-mips-elf/hash2.d: New test.
* testsuite/ld-mips-elf/mips-elf.exp: New tests.
* testsuite/ld-mips-elf/start.s: New test.
bfd * elf-bfd.h (struct elf_backend_data): New members.
* elflink.c (_bfd_elf_link_create_dynamic_sections): Create
.gnu.hash section if necessary.
(struct collect_gnu_hash_codes): New member.
(elf_gnu_hash_process_symidx): New function name.
(elf_renumber_gnu_hash_syms): Ignore local and undefined
symbols. Record xlat location for every symbol which should have
a .MIPS.xhash entry.
(bfd_elf_size_dynamic_sections): Add DT_GNU_HASH dynamic tag to
dynamic section if necessary.
(GNU_HASH_SECTION_NAME): New define.
(bfd_elf_size_dynsym_hash_dynstr): Get .MIPS.xhash section.
Update the section size info.
* elfxx-mips.c (struct mips_elf_hash_sort_data): New members.
(struct mips_elf_link_hash_entry): New member.
(mips_elf_link_hash_newfunc): Initialize .MIPS.xhash translation
table location.
(mips_elf_sort_hash_table): Initialize the pointer to the
.MIPS.xhash section.
(mips_elf_sort_hash_table_f): Populate the .MIPS.xhash
translation table entry with the symbol dynindx.
(_bfd_mips_elf_section_from_shdr): Add SHT_MIPS_XHASH.
(_bfd_mips_elf_fake_sections): Initialize .MIPS.xhash section
info.
(_bfd_mips_elf_create_dynamic_sections): Create .MIPS.xhash
section.
(_bfd_mips_elf_size_dynamic_sections): Add DT_MIPS_XHASH tag to
dynamic section.
(_bfd_mips_elf_finish_synamic_sections): Add DT_MIPS_XHASH.
(_bfd_mips_elf_final_write_processing): Set .MIPS.xhash section
sh_link info.
(_bfd_mips_elf_get_target_dtag): Get DT_MIPS_XHASH tag.
(MIPS_LIBC_ABI_XHASH): New ABI version enum value.
(_bfd_mips_post_process_headers): Mark the ABI version as
MIPS_LIBC_ABI_XHASH if there exists a .MIPS.xhash section,
but not a .hash section.
(_bfd_mips_elf_record_xhash_symbol): New function. Record a
position in the translation table, associated with the hash
entry.
* elfxx-mips.h (literal_reloc_p): Define
elf_backend_record_xhash_symbol backend hook.
* elfxx-target.h: Initialize elf_backend_record_xhash_symbol
backend hook.
include * elf/mips.h (SHT_GNU_XHASH): New define.
(DT_GNU_XHASH): New define.
binutils * readelf.c (get_mips_dynamic_type): Return MIPS_XHASH dynamic type.
(get_mips_section_type_name): Return MI{S_XHASH name string.
(dynamic_section_mips_val): Initialize the .MIPS.xhash dynamic
info.
(process_symbol_table): Initialize the .MIPS.xhash section
pointer. Adjust the readelf output to support the new section.
(process_object): Set the .MIPS.xhash dynamic info to zero.
This patch makes the elf64bpf emulation to use it's own linker script,
based on elf.sc. At the moment, the only change is that the BPF
executable doesn't define an entry symbol (BPF programs feature
several entry points scattered in several sections.)
This is a step towards the goal of generating proper ELF executables
that would be loaded by the kernel's libbpf. We are not there yet:
BPF "programs" should still be linked with -r.
This change removes a warning while linking executables, decreases the
number of unsupported tests in the target from 47 to 29, and increases
the number of expected passes from 104 to 145.
Regtested in x86_64 for all targets.
No regressions.
ld/ChangeLog:
2019-08-07 Jose E. Marchesi <jose.marchesi@oracle.com>
* scripttempl/elf64bpf.sc: Adapted from elf.sc.
* emulparams/elf64bpf.sh (SCRIPT_NAME): Use elf64bpf.
(EMBEDDED): Define.
* testsuite/ld-bpf/call-1.d: Do not expect a warning regarding an
undefined entry symbol.
* testsuite/ld-bpf/jump-1.d: Likewise.
* testsuite/ld-undefined/undefined.exp: Do not pass '-e entry' to
ld in BPF targets, and do not expect line number information.
* testsuite/ld-srec/srec.exp (run_srec_test): xfail s-record tests
in BPF targets.
Revert
commit 8c728a9d93
Author: Martin Liska <mliska@suse.cz>
Date: Mon Jul 22 14:23:32 2019 +0200
Remove tests that test __gnu_lto_v1 symbol.
since outputs of these tests are used by later tests. Check the normal
symbol, foo, instead of __gnu_lto_v.*, which GCC stopped emitting after
r273662.
* testsuite/ld-plugin/lto-3r.d: Restored. Check foo instead
of __gnu_lto_v.*.
* testsuite/ld-plugin/lto-5r.d: Likewise.
* testsuite/ld-plugin/lto.exp: Run lto-3r and lto-5r tests.
Add linker relaxation. The first relaxation added is converting
GOTPC32 to PCREL relocations. This relaxation doesn't change the size of
the binary.
bfd/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* elf32-arc.c (bfd_get_32_me): New function.
(bfd_put_32_me): Likewise.
(arc_elf_relax_section): Likewise.
(bfd_elf32_bfd_relax_section): Define.
ld/testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* ld-arc/relax-local-pic.d: New test.
* ld-arc/relax-local-pic.s: New file.
ld/ChangeLog:
2019-07-22 Martin Liska <mliska@suse.cz>
* testsuite/ld-plugin/lto-3r.d: Remove.
* testsuite/ld-plugin/lto-5r.d: Remove.
* testsuite/ld-plugin/lto.exp: Do not run lto-3r and lto-5r
tests.
Also restore them somewhat closer to the original. They originally
failed on many targets, and a month later I "simplified" them as part
of a larger patch fixing other failing tests. That unfortunately lost
their main purpose, which was to test TLS layout.
* testsuite/ld-elf/size-1.d,
* testsuite/ld-elf/size-1.s,
* testsuite/ld-elf/size-1.t: New test.
* testsuite/ld-elf/size-2.d,
* testsuite/ld-elf/size-2.s,
* testsuite/ld-elf/size-2.t: New test.
* testsuite/ld-scripts/size-1.d,
* testsuite/ld-scripts/size-1.s,
* testsuite/ld-scripts/size-1.t,
* testsuite/ld-scripts/size-2.s,
* testsuite/ld-scripts/size-2.d,
* testsuite/ld-scripts/size-2.t,
* testsuite/ld-scripts/size.exp: Delete.
This patch supports using pcrel instructions in TLS code sequences. A
number of new relocations are needed, gas operand modifiers to
generate those relocations, and new TLS optimisation. For
optimisation it turns out that the new pcrel GD and LD sequences can
be distinguished from the non-pcrel GD and LD sequences by there being
different relocations on the new sequence. The final "add ra,rb,13"
on IE sequences similarly needs a new relocation, or as I chose, a
modification of R_PPC64_TLS. On pcrel IE code, the R_PPC64_TLS points
one byte into the "add" instruction rather than being on the
instruction boundary.
GD:
pla 3,z@got@tlsgd@pcrel # R_PPC64_GOT_TLSGD34
bl __tls_get_addr@notoc(z@tlsgd) # R_PPC64_TLSGD and R_PPC64_REL24_NOTOC
edited to IE
pld 3,z@got@tprel@pcrel
add 3,3,13
edited to LE
paddi 3,13,z@tprel
nop
LD:
pla 3,z@got@tlsld@pcrel # R_PPC64_GOT_TLSLD34
bl __tls_get_addr@notoc(z@tlsld) # R_PPC64_TLSLD and R_PPC64_REL24_NOTOC
..
paddi 9,3,z2@dtprel
pld 10,z3@got@dtprel@pcrel
add 10,10,3
edited to LE
paddi 3,13,0x1000
nop
IE:
pld 9,z@got@tprel@pcrel # R_PPC64_GOT_TPREL34
add 3,9,z@tls@pcrel # R_PPC64_TLS at insn+1
ldx 4,9,z@tls@pcrel
lwax 5,9,z@tls@pcrel
stdx 5,9,z@tls@pcrel
edited to LE
paddi 9,13,z@tprel
nop
ld 4,0(9)
lwa 5,0(9)
std 5,0(9)
LE:
paddi 10,13,z@tprel
include/
* elf/ppc64.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
(IS_PPC64_TLS_RELOC): Include new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_TPREL34, BFD_RELOC_PPC64_DTPREL34),
(BFD_RELOC_PPC64_GOT_TLSGD34, BFD_RELOC_PPC64_GOT_TLSLD34),
(BFD_RELOC_PPC64_GOT_TPREL34, BFD_RELOC_PPC64_GOT_DTPREL34),
(BFD_RELOC_PPC64_TLS_PCREL): New pcrel tls relocs.
* elf64-ppc.c (ppc64_elf_howto_raw): Add howtos for pcrel tls relocs.
(ppc64_elf_reloc_type_lookup): Translate pcrel tls relocs.
(must_be_dyn_reloc, dec_dynrel_count): Add R_PPC64_TPREL64.
(ppc64_elf_check_relocs): Support pcrel tls relocs.
(ppc64_elf_tls_optimize, ppc64_elf_relocate_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-ppc.c (ppc_elf_suffix): Map "tls@pcrel", "got@tlsgd@pcrel",
"got@tlsld@pcrel", "got@tprel@pcrel", and "got@dtprel@pcrel".
(fixup_size, md_assemble): Handle pcrel tls relocs.
(ppc_force_relocation, ppc_fix_adjustable): Likewise.
(md_apply_fix, tc_gen_reloc): Likewise.
ld/
* testsuite/ld-powerpc/tlsgd.d,
* testsuite/ld-powerpc/tlsgd.s,
* testsuite/ld-powerpc/tlsie.d,
* testsuite/ld-powerpc/tlsie.s,
* testsuite/ld-powerpc/tlsld.d,
* testsuite/ld-powerpc/tlsld.s: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
Just making room for a new tlsld test.
* testsuite/ld-powerpc/tlsldopt.d: Rename from tlsld.d.
* testsuite/ld-powerpc/tlsldopt.s: Rename from tlsld.s.
* testsuite/ld-powerpc/tlsldopt32.d: Rename from tlsld32.d.
* testsuite/ld-powerpc/tlsldopt32.s: Rename from tlsld32.s.
* testsuite/ld-powerpc/powerpc.exp: Update.
When doing a relocatable link, members of input section group are
placed in their own output sections. We need to make sure that no
input sections are merged with member of output section group.
PR ld/24819
* emultempl/elf32.em (elf_orphan_compatible): Return FALSE for
member of output section group when doing a relocatable link.
* testsuite/ld-elf/pr24819.d: New file.
* testsuite/ld-elf/pr24819.s: Likewise.
It is possible to create shared libraries on PowerPC using
-ftls-model=inital-exec or -ftls-model=local-exec. The first is half
reasonable, getting you a shared library that can't be dlopen'd but
otherwise is reasonable. The second is quite bad. Not only do you
lose being able to dlopen, the library also has dynamic text
relocations. Worse, the TPREL16_LO, TPREL16_HA and other TPREL16
dynamic relocs emitted were wrong, resulting in wrong values being
applied by ld.so.
Using the first TLS section symbol in dynamic relocations for local
TLS symbols doesn't work. It's wrong because TLS symbols used by TLS
relocs have values relative to the TLS segment, whereas the TLS
section symbols are addresses. This patch instead uses a symbol index
of zero which is used elsewhere by PowerPC on dynamic TLS relocs.
It's not strictly ABI compliant to use a non-TLS symbol with TLS
relocs but symbol index zero can be interpreted as "no symbol". Not
using the first TLS section symbol means it doesn't need to be dynamic.
The patch also fixes a further problem with PowerPC32 dynamic TPREL16*
relocs, which shouldn't have the symbol value in the addend as we do
for non-TLS symbols.
bfd/
* elflink.c (_bfd_elf_omit_section_dynsym_default): Don't keep
tls_sec.
(_bfd_elf_init_1_index_section): Prefer not using TLS sections.
(_bfd_elf_init_2_index_sections): Likewise.
* elf64-ppc.c (ppc64_elf_relocate_section): When emitting dynamic
relocations for local TLS symbols, use STN_UNDEF as the relocation
symbol.
* elf32-ppc.c (ppc_elf_relocate_section): Likewise, and don't
leave TLS symbol value in the addend.
ld/
* testsuite/ld-powerpc/tlsso.r: Update.
* testsuite/ld-powerpc/tlsso32.g: Update.
* testsuite/ld-powerpc/tlsso32.r: Update.
* testsuite/ld-powerpc/tlstocso.r: Update.
* testsuite/ld-cris/tls-dso-dtpoffd2.d: Update.
* testsuite/ld-cris/tls-dso-dtpoffd4.d: Update.
* testsuite/ld-cris/tls-dso-tpoffgotcomm1.d: Update.
* testsuite/ld-cris/tls-gd-1.d: Update.
* testsuite/ld-cris/tls-gd-1h.d: Update.
* testsuite/ld-cris/tls-gd-2.d: Update.
* testsuite/ld-cris/tls-gd-2h.d: Update.
* testsuite/ld-cris/tls-ie-10.d: Update.
* testsuite/ld-cris/tls-ie-11.d: Update.
* testsuite/ld-cris/tls-ie-8.d: Update.
* testsuite/ld-cris/tls-ie-9.d: Update.
* testsuite/ld-cris/tls-js1.d: Update.
* testsuite/ld-cris/tls-ld-4.d: Update.
* testsuite/ld-cris/tls-ld-5.d: Update.
* testsuite/ld-cris/tls-ld-6.d: Update.
* testsuite/ld-cris/tls-ld-7.d: Update.
* testsuite/ld-cris/tls-ldgd-14.d: Update.
* testsuite/ld-cris/tls-ldgd-15.d: Update.
* testsuite/ld-cris/tls-ldgdx-14.d: Update.
* testsuite/ld-cris/tls-ldgdx-15.d: Update.
* testsuite/ld-cris/tls-local-54.d: Update.
* testsuite/ld-cris/tls-local-60.d: Update.
* testsuite/ld-cris/tls-local-61.d: Update.
* testsuite/ld-cris/tls-local-63.d: Update.
* testsuite/ld-cris/tls-local-64.d: Update.
* testsuite/ld-cris/tls-ok-30.d: Update.
* testsuite/ld-cris/tls-ok-32.d: Update.
* testsuite/ld-cris/tls-ok-34.d: Update.
* testsuite/ld-mips-elf/tls-multi-got-1.got: Update.
* testsuite/ld-mips-elf/tls-multi-got-1.r: Update.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.d: Update.
* testsuite/ld-mips-elf/tlsdyn-pie-o32.got: Update.
* testsuite/ld-mips-elf/tlslib-o32-hidden.got: Update.
* testsuite/ld-mips-elf/tlslib-o32-ver.got: Update.
* testsuite/ld-mips-elf/tlslib-o32.got: Update.
* testsuite/ld-s390/tlspic.rd: Update.
* testsuite/ld-s390/tlspic_64.rd: Update.
* testsuite/ld-sparc/tlssunnopic32.rd: Update.
* testsuite/ld-sparc/tlssunnopic64.rd: Update.
* testsuite/ld-sparc/tlssunpic32.rd: Update.
* testsuite/ld-sparc/tlssunpic64.rd: Update.
Recently a patch was submitted for a Xen Project test harness binary to
override the compiler specified @object to @func (see [1]). In a reply I
suggested we shouldn't make ourselves dependent on currently unspecified
behavior of gas here: It accumulates all requests, and then
bfd/elf.c:swap_out_syms(), in an apparently ad hoc manner, prioritizes
certain flags over others.
Make the behavior predictable: Generally the last .type is what counts.
Exceptions are directives which set multiple bits (TLS, IFUNC, and
UNIQUE): Subsequent directives requesting just the more generic bit
(i.e. FUNC following IFUNC) won't clear the more specific one. Warn
about incompatible changes, except from/to STT_NOTYPE.
Also add a new target hook, which hppa wants to use right away afaict.
In the course of adding the warning I ran into two ld testsuite
failures. I can only assume that it was a copy-and-paste mistake that
lead to the same symbol having its type set twice.
[1] https://lists.xenproject.org/archives/html/xen-devel/2019-05/msg01980.html
Consider a file containing only Armv8-M secure entry functions.
This file is compiled and linked with "-march=armv8-m.main -mfloat-abi=hard
-mfpu=fpv5-sp-d16 -mcmse -static --specs=rdimon.specs
-Wl,--section-start,.gnu.sgstubs=0x190000 -ffunction-sections
-fdata-sections
-Wl,--gc-sections -g" options to generate an executable.
The executable generated does not contain any debug information of these
secure entry functions even though it contains secure entry functions in
the .text section. This patch fixes this problem.
PR 23839
bfd * elf32-arm.c (elf32_arm_update_relocs): Do not include the
section VMA in the offset used to update exidx relocs.
ld * testsuite/ld-arm/unwind-4.d: Adjust for corrected calculation of
exidx relocs.
commit d2ef37ebd9
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Fri Dec 7 08:30:30 2018 -0800
elf: Report property change when merging properties
failed to remove the property after reporting it has been removed. This
patch corrects it.
bfd/
PR ld/24721
* elf-properties.c (elf_merge_gnu_property_list): Remove the
property after reporting property removal.
ld/
PR ld/24721
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/24721 tests.
* testsuite/ld-x86-64/pr24721-x32.d: New file.
* testsuite/ld-x86-64/pr24721.d: Likewise.
* testsuite/ld-x86-64/pr24721.map: Likewise.
* testsuite/ld-x86-64/pr24721a.s: Likewise.
* testsuite/ld-x86-64/pr24721b.s: Likewise.
While the skiboot linker script bears some culpability in this PR,
it's also true that the GOT indirect to GOT relative optimisation for
16-bit offsets isn't safe. At least, it isn't safe to remove the GOT
entry based on distance between the GOT pointer and symbol calculated
from the preliminary layout. So this patch removes that optimisation,
and reduces the range allowed for 32-bit and 34-bit offsets.
PR 24704
bfd/
* elf64-ppc.c (R_PPC64_GOT16_DS): Don't set has_gotrel.
(ppc64_elf_edit_toc): Don't remove R_PPC64_GOT16_DS got entries.
Reduce range of offsets allowed for other GOT relocs.
ld/
* testsuite/ld-powerpc/elfv2exe.d: Update.
* testsuite/ld-powerpc/elfv2so.d: Update.
These ilp32 relocations were missing for some reason.
bfd/ChangeLog:
* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
include/ChangeLog:
* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
(R_AARCH64_P32_MOVW_PREL_G1): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
* testsuite/ld-aarch64/emit-relocs-22.d: New test.
* testsuite/ld-aarch64/emit-relocs-22.s: New test.
* testsuite/ld-aarch64/emit-relocs-23.d: New test.
* testsuite/ld-aarch64/emit-relocs-23.s: New test.
If the new GNU property section was being created by the linker
(this will happen only if none of the inputs have any GNU property
section but the command line to the linker forces a bti with
--force-bti), the alignment of the section and hence the program
header of PT_GNU_PROPERTY type was not being set correctly. This
patch fixes this issue.
bfd/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Set
alignment of the new gnu property section.
ld/ChangeLog:
2019-06-06 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/property-bti-pac4-a.d: New test.
* testsuite/ld-aarch64/property-bti-pac4-b.d: New test.
* testsuite/ld-aarch64/property-bti-pac4.s: New test.
This changes s12z to use generic.em and genelf.em, which is more
suited to targets that use the generic linker hash table. A tweak or
two to some testsuite predicates then gives a clean testsuite result
on the target.
PR 24596
binutils/
* testsuite/lib/binutils-common.exp (supports_gnu_unique): Add
s12z to targets not supporting this feature.
ld/
* emulparams/m9s12zelf.sh (TEMPLATE_NAME): Set to generic.
(EXTRA_EM_FILE): Define to genelf.
* testsuite/lib/ld-lib.exp (uses_genelf): Add s12z.
Overflow checks were removed for all hi16 relocations except PC-relative
high relocations per PR ld/16720. Remove overflow checks from %pcrel_hi
relocations so that we can correctly handle negative offsets from PC.
bfd/
* elfxx-mips.c (mips_elf_calculate_relocation) <R_MIPS_PCHI16>:
Remove overflow check.
ld/
* testsuite/ld-mips-elf/undefweak-overflow.s: Remove test case
for pcrel_hi/pcrel_lo.
* testsuite/ld-mips-elf/undefweak-overflow.d: Update to match.
* testsuite/ld-mips-elf/reloc-pcrel-r6.s: New test source.
* testsuite/ld-mips-elf/reloc-pcrel-r6.d: New test linker script.
* testsuite/ld-mips-elf/reloc-pcrel-r6.ld: New test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
Force sysv hash style for reliable symbol table layout.
ld/ChangeLog:
* testsuite/ld-aarch64/variant_pcs-now.d: Use --hash-style=sysv.
* testsuite/ld-aarch64/variant_pcs-shared.d: Likewise.
Propagate STO_AARCH64_VARIANT_PCS st_other attribute to the output and
add DT_AARCH64_VARIANT_PCS dynamic tag if necessary.
Mismatching attributes are not diagnosed.
bfd/ChangeLog:
* elfnn-aarch64.c (elfNN_aarch64_merge_symbol_attribute): New function.
(struct elf_aarch64_link_hash_table): Add variant_pcs member.
(elfNN_aarch64_allocate_dynrelocs): Update variant_pcs.
(elfNN_aarch64_size_dynamic_sections): Add DT_AARCH64_VARIANT_PCS.
(elf_backend_merge_symbol_attribute): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add new tests.
* testsuite/ld-aarch64/variant_pcs-1.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-2.s: New asm for tests.
* testsuite/ld-aarch64/variant_pcs-now.d: New test.
* testsuite/ld-aarch64/variant_pcs-r.d: New test.
* testsuite/ld-aarch64/variant_pcs-shared.d: New test.
* testsuite/ld-aarch64/variant_pcs.ld: New linker script for tests.
bfd/
* elf64-ppc.c (ppc64_elf_check_relocs): Set has_gotrel for
R_PPC64_GOT_PCREL34.
(xlate_pcrel_opt): New function.
(ppc64_elf_edit_toc): Handle R_PPC64_GOT_PCREL34.
(ppc64_elf_relocate_section): Edit GOT indirect to GOT relative
for R_PPC64_GOT_PCREL34. Implement R_PPC64_PCREL_OPT optimisation.
ld/
* testsuite/ld-powerpc/pcrelopt.s,
* testsuite/ld-powerpc/pcrelopt.d,
* testsuite/ld-powerpc/pcrelopt.sec: New test.
* testsuite/ld-powerpc/powerpc.exp: Run it.
This patch adds support to the linker for the Linux eBPF architecture.
A minimal testsuite is included.
ld/ChangeLog:
2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
* Makefile.am (ALL_64_EMULATION_SOURCES): Add eelf64bpf.c.
* Makefile.in (prefix): Regenerate.
* configure.tgt (targ_extra_ofiles): Add case for bpf-*-* targets.
* emulparams/elf64bpf.sh: New file.
* testsuite/lib/ld-lib.exp (check_gc_sections_available): Add
bpf-*-* to the list of targets not supporting gc-sections.
* testsuite/ld-bpf/bar.s: New file.
* testsuite/ld-bpf/jump-1.d: Likewise.
* testsuite/ld-bpf/foo.s: Likewise.
* testsuite/ld-bpf/call-1.d: Likewise.
* testsuite/ld-bpf/bpf.exp: Likewise.
* testsuite/ld-bpf/baz.s: Likewise.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer
checks. Search the RELA table for n64 relocations.
ld/
* testsuite/ld-mips-elf/pic-reloc-5.d: New test.
* testsuite/ld-mips-elf/pic-reloc-6.d: New test.
* testsuite/ld-mips-elf/pic-reloc-7.d: New test.
* testsuite/ld-mips-elf/pic-reloc-5.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-6.s: New test source.
* testsuite/ld-mips-elf/pic-reloc-7.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
Add a new option to get the linker to emit PLTs that use compact
branches instead of delay slot branches.
bfd/
* elfxx-mips.c (LA25_BC): New macro.
(mips_elf_link_hash_table)<compact_branches>: New field.
(STUB_JALRC): New macro.
(mipsr6_o32_exec_plt0_entry_compact): New array.
(mipsr6_n32_exec_plt0_entry_compact): Likewise.
(mipsr6_n64_exec_plt0_entry_compact): Likewise.
(mipsr6_exec_plt_entry_compact): Likewise.
(mips_elf_create_la25_stub): Use BC instead of J for stubs
when compact_branches is true.
(_bfd_mips_elf_finish_dynamic_symbol): Choose the compact
PLT for MIPSR6 with compact_branches. Do not reorder the
compact branches PLT. Switch the lazy stub for MIPSR6
with compact_branches to use JALRC.
(mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6
when compact_branches is true.
(_bfd_mips_elf_compact_branches): New function.
* elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype.
ld/
* emultempl/mipself.em (compact_branches): New static variable.
(mips_create_output_section_statements): Call
_bfd_mips_elf_compact_branches.
(PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and
OPTION_NO_COMPACT_BRANCHES.
(PARSE_AND_LIST_LONGOPTS): Add compact-branches,
no-compact-branches.
(PARSE_AND_LIST_OPTIONS): Add --compact-branches,
--no-compact-branches.
(PARSE_AND_LIST_ARGS_CASES): Handle the above.
* ld.texinfo: Document --compact-branches, --no-compact-branches.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test.
* testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source.
* testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
The Cortex-A53 erratum currently has two ways it can resolve the erratum when
using the flag --fix-cortex-a53-843419:
1) If the address is within the range of an ADR instruction it rewrites the ADRP
into an ADR, and those doesn't need the use of a veneer.
2) If the address is not within range, it adds a branch to a veneer which will
execute the final bit of the erratum workaround and branch back to the call
site.
When we do this we always generate the veneers and we always align the size of
the text section to 4KB. This is because we only know which workaround we can
use after all linking has finished and all addresses are known. This means even
though the veneers are not used, we still generate the section and we still
change the size of the input section.
This is problematic for small memory devices as this would require the user to
take about a ~4KB hit in memory even though it's not even used.
Since there's no real way to restart the linking process from the final write
phase this patch solves the issue by allowing the user more control over which
erratum workaround gets used.
Concretely this changes the option --fix-cortex-a53-843419 to take optional
arguments --fix-cortex-a53-843419[=full|adr|adrp]
- full (default): Use both ADRP and ADR workaround. This is equivalent to not
specifying any options and is the default behavior before this
patch.
- adr: Only use the ADR workaround, this will not cause any increase in binary
size but linking will fail if the referenced address is out of range of
an ADR instruction.
- adrp: Use only the ADRP workaround, this will never rewrite your ADRP.
In the cases where the user knows how big their binaries are the `adr` option
would prevent the unneeded overhead.
bfd/ChangeLog:
PR ld/24373
* bfd-in.h (enum erratum_84319_opts): New
(bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change
int to enum erratum_84319_opts.
* bfd-in2.h: Regenerate.
* elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change
fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr.
(_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub.
(aarch64_size_one_stub): Conditionally size erratum 843419 stubs.
(_bfd_aarch64_resize_stubs): Amend comment.
(elfNN_aarch64_size_stubs): Don't generate stubs when no workaround
requested.
(bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum.
(_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of
erratum workaround.
(clear_erratum_843419_entry): Update erratum conditional.
ld/ChangeLog:
PR ld/24373
* emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args
to flags.
* NEWS: Add changes to flag.
(PARSE_AND_LIST_OPTIONS): Update help descriptions.
(PARSE_AND_LIST_ARGS_CASES): Add new options to parser.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests.
* testsuite/ld-aarch64/erratum843419-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-adrp.d: New test.
* testsuite/ld-aarch64/erratum843419-far-adr.d: New test.
* testsuite/ld-aarch64/erratum843419-far-full.d: New test.
* testsuite/ld-aarch64/erratum843419-far.s: New test.
* testsuite/ld-aarch64/erratum843419-full.d: New test.
* testsuite/ld-aarch64/erratum843419-near.s: New test.
* testsuite/ld-aarch64/erratum843419-no-args.d: New test.
The range check done to transform an absolute call/jump to a pc-relative one is
off-by-one, and that causes this shortening optimization to be missed if the
branch target is right at the range boundary.
In the non-shrinkable case, the range is what is mentioned in the ISA - -4094
bytes in the backward direction, and 4096 bytes in the positive direction.
In the shrinkable case, the forward jump range increases by two bytes (deleted
because of the shortening from call/jmp to rcall/rjmp), and therefore, the
range is -4094 in the reverse, and 4098 in the positive direction.
Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to
ensure jumps to max forward and backward ranges get relaxed to rjmp.
The current code to compute relative distance in the wrap around case does not
handle the edge case of the target (after adjusting for implicit PC increment)
being exactly half of the wrap around distance. This patch fixes that and adds a
testcase.
The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes
for the implicit PC increment)). If the target of the jump is at a distance of
4098 bytes, it is out of range for a forward jump - however, a backward jump can
still reach that address if pmem-wrap-around is 8192.
Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and
*without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will
jump to address 4096 (wrap around at 8192 and decreasing addresses from then
on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098.
avr_relative_distance_considering_wrap_around though, does the wrap around only
if the passed in distance is less than half of the wrap around distance. In this
case, it is exactly equal to half (original distance 4098, adjusted distance of
4096 and wraparound of 8192), and the bypassed wrap around causes the reloc
overflow error.
Fix by wrapping around even if adjusted distance is equal to half of wrap around
distance.
On IRIX 5, every global symbol that is not explicitly labelled as
being a function is assumed to be an object. There is no reason
why IRIX behaviour should extend to all MIPS targets, so limit this
to only IRIX targets.
gas/
PR 14798
* config/tc-mips.c (s_mips_globl): Only treat symbols that are
not explicitly labelled as BSF_OBJECTs for IRIX targets.
* testsuite/gas/mips/pr14798.s: New test source.
* testsuite/gas/mips/pr14798-irix.d: New test.
* testsuite/gas/mips/pr14798.d: Likewise.
* testsuite/gas/mips/mips.exp: Run the new tests.
binutils/
PR 14798
* testsuite/binutils-all/readelf.ss-mips: Update reference output.
* testsuite/binutils-all/readelf.ss-tmips: Likewise.
ld/
PR 14798
* testsuite/ld-mips-elf/reloc-6a.s: Specify .text section for
global code symbols.
* testsuite/ld-mips-elf/reloc-6b.s: Likewise.
This fixes the recently added ld-elf/pr24511 test failure on pj-elf.
Incidentally, pj-elf has failed its gas "pj" test since 2005-12-22
(git commit 54758c3e39). I think that makes the target ripe for
obsolescence.
bfd/
* elf32-pj.c (pj_elf_reloc): Don't report undefined weak as an error.
ld/
* testsuite/ld-undefined/weak-undef.exp: Don't xfail pj.
m32c_md_end attempted to pad out a code section with nops, but this
was just plain wrong in many ways:
- The padding didn't happen at all if the last section emitted wasn't
a code section.
- The padding went to the wrong place if subsections were used, and
the last subseg used wasn't the highest numbered subseg.
- Padding wasn't added to all code sections.
- If the last section was empty, it was padded to 4 bytes.
- The padding didn't go to a 4-byte alignment boundary, instead it
effectively made the last instruction 4 bytes in size.
- The padding didn't take into account that code sections may have
contents other than machine instructions.
So, rip it out and handle nop padding properly, also fixing .align
.balign/.p2align in the middle of code.
gas/
* config/tc-m32c.c (insn_size): Delete static var.
(md_begin): Don't set it.
(m32c_md_end): Delete.
(md_assemble): Add insn_size auto var.
* config/tc-m32c.h (md_end): Don't define.
(m32c_md_end): Delete.
(NOP_OPCODE, HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Define.
* testsuite/gas/all/align.d: Remove m32c from notarget list.
* testsuite/gas/all/incbin.d: Likewise.
* testsuite/gas/elf/dwarf2-11.d: Likewise.
* testsuite/gas/macros/semi.d: Likewise.
* testsuite/gas/all/gas.exp (do_comment): Similarly.
ld/
* testsuite/ld-scripts/fill.d: Don't xfail m32c
* testsuite/ld-scripts/fill16.d: Likewise.
This patch restricts the section names matched in coff_section_type,
a function that translates section names to symbol type, and arranges
to translate section flags to symbol type before looking at names.
The latter change resulted in various test failures due to improper
section flags being used in tests, and by the plugin support, so fix
that too.
The new test fails on many ELF targets that lack .init/fini_array
in their scripts. I've just xfailed those. pru-elf oddly defines
__init_array_begin rather than __init_array_start. I've left that
target as a FAIL, and pj-elf too which reports an error for undefined
weak symbols.
bfd/
PR 24511
* syms.c (coff_section_type): Only allow '.', '$' and numeric
following the standard section names.
(bfd_decode_symclass): Prioritize section flag tests in
decode_section_type before name tests in coff_section_type.
* plugin.c (bfd_plugin_canonicalize_symtab): Init fake_section
and fake_common_section using BFD_FAKE_SECTION. Use "fake" as
their names and choose standard .text section flags for
fake_section.
ld/
PR 24511
* testsuite/ld-elf/pr14156a.d: Allow for .init/.fini being a
data section on hppa64.
* testsuite/ld-elf/pr14156b.d: Likewise.
* testsuite/ld-scripts/pr18963.t: Map standard sections to set
output section flags.
* testsuite/ld-scripts/sane1.t: Likewise.
* testsuite/ld-elf/init-fini-arrays.s: Reference __init_array_start
and __fini_array_start. Define __start et al.
* testsuite/ld-elf/pr24511.d: New test.
When undefined non-weak references in IR objects are optimized out
by LTO, we can have weak dynamic referencs to symbols marked with
bfd_link_hash_undefined. We shouldn't complain such undefined weak
dynamic references.
bfd/
PR ld/24486
* elflink.c (elf_link_output_extsym): Don't complain undefined
weak dynamic reference.
ld/
PR ld/24486
* testsuite/ld-plugin/lto.exp: Run PR ld/24486 tests.
* testsuite/ld-plugin/pr24486a.c: New file.
* testsuite/ld-plugin/pr24486b.c: Likewise.
* testsuite/ld-plugin/pr24486c.c: Likewise.
When a wrapper symbol, __wrap_FOO, is defined in IR, its resolution
should be LDPR_PREVAILING_DEF, not PREVAILING_DEF_IRONLY, since LTO
doesn't know that __wrap_FOO provides definition of FOO. And resolution
of FOO should be LDPR_RESOLVED_IR since it is resolved by __wrap_FOO in
IR.
PR ld/24406
* ld.texi: Remove LTO warning from --wrap.
* plugin.c (get_symbols): Update resolution for wrapper and
wrapped symbols.
* testsuite/ld-plugin/lto.exp: Run ld/24406 tests.
* testsuite/ld-plugin/pr24406-1.c: New file.
* testsuite/ld-plugin/pr24406-2a.c: Likewise.
* testsuite/ld-plugin/pr24406-2b.c: Likewise.
This patch aims to improve the definitions of BTI and PAC based PLTs.
The following changes are made:
* PLT0 does not need PAC instructions since the PLTGOT[2] (and PLTGOT[1])
are readonly so they cannot be corrupted at runtime. Thus both PAC plt0
and BTI+PAC plt0 are removed and we can use basic plt0 and BTI plt0
instead, respectively.
* We can remove the extra padding nops when we add the new bti instructions.
BTI plt0 and BTI TLSDESC plt are updated.
* For better performance PLTn could be padded to 24bytes. Both BTI pltn and
PAC pltn are updated.
*** bfd/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): Remove.
(PLT_BTI_TLSDESC_ENTRY_SIZE): Remove.
(PLT_PAC_ENTRY_SIZE, PLT_BTI_PAC_ENTRY_SIZE): Remove.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): Update.
(elfNN_aarch64_small_plt0_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_pac_entry): Remove.
(elfNN_aarch64_small_plt0_bti_entry): Update.
(elfNN_aarch64_small_plt_bti_entry): Update.
(elfNN_aarch64_small_plt_pac_entry): Update.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): Update.
(setup_plt_values): Setup new entries.
(elfNN_aarch64_finish_dynamic_sections): Remove size change.
(elfNN_aarch64_plt_sym_val): Likewise.
*** ld/ChangeLog ***
2019-04-25 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/bti-pac-plt-1.d: Update.
* testsuite/ld-aarch64/bti-pac-plt-2.d: Update.
* testsuite/ld-aarch64/bti-plt-1.d: Update.
* testsuite/ld-aarch64/bti-plt-3.d: Update.
* testsuite/ld-aarch64/bti-plt-5.d: Update.
* testsuite/ld-aarch64/pac-plt-1.d: Update.
* testsuite/ld-aarch64/pac-plt-2.d: Update.
The ld testsuite includes numerous tests that depend on being able to
compile and link programs with the C compiler. Some of these tests
use [which $CC] to check for the presence of the compiler before
proceeding with the test, but run_ld_link_exec_tests and run_cc_link_tests
give ERRORs if compilation fails. Also, even if $CC is defined and present,
it may not be usable due to missing libraries, etc.
This patch adds a new procedure check_compiler_available that attempts
to build an empty program and caches the result. Uses of [which $CC]
are replaced with calls to this procedure, and run_ld_link_exec_tests
and run_cc_link_tests now also guard attempts to use $CC.
2019-04-24 Sandra Loosemore <sandra@codesourcery.com>
ld/
* testsuite/config/default.exp: Use [check_compiler_available]
instead of [which $CC].
* testsuite/ld-auto-import/auto-import.exp: Likewise.
* testsuite/ld-cygwin/exe-export.exp: Likewise.
* testsuite/ld-elf/audit.exp: Likewise.
* testsuite/ld-elf/compress.exp: Likewise.
* testsuite/ld-elf/dwarf.exp: Likewise.
* testsuite/ld-elf/elf.exp: Likewise.
* testsuite/ld-elf/indirect.exp: Likewise.
* testsuite/ld-elf/linux-x86.exp: Likewise.
* testsuite/ld-elf/shared.exp: Likewise.
* testsuite/ld-elf/tls.exp: Likewise.
* testsuite/ld-elf/wrap.exp: Likewise.
* testsuite/ld-elfcomm/elfcomm.exp: Likewise.
* testsuite/ld-elfvers/vers.exp: Likewise.
* testsuite/ld-elfvsb/elfvsb.exp: Likewise.
* testsuite/ld-elfweak/elfweak.exp: Likewise.
* testsuite/ld-gc/gc.exp: Likewise.
* testsuite/ld-i386/i386.exp: Likewise.
* testsuite/ld-i386/no-plt.exp: Likewise.
* testsuite/ld-i386/tls.exp: Likewise.
* testsuite/ld-ifunc/ifunc.exp: Likewise.
* testsuite/ld-mn10300/mn10300.exp: Likewise.
* testsuite/ld-pe/pe-compile.exp: Likewise.
* testsuite/ld-pe/pe-run.exp: Likewise.
* testsuite/ld-pe/pe-run2.exp: Likewise.
* testsuite/ld-pie/pie.exp: Likewise.
* testsuite/ld-plugin/lto.exp: Likewise.
* testsuite/ld-plugin/plugin.exp: Likewise.
* testsuite/ld-scripts/crossref.exp: Likewise.
* testsuite/ld-sh/sh.exp: Likewise.
* testsuite/ld-shared/shared.exp: Likewise.
* testsuite/ld-size/size.exp: Likewise.
* testsuite/ld-srec/srec.exp: Likewise.
* testsuite/ld-undefined/undefined.exp: Likewise.
* testsuite/ld-unique/unique.exp: Likewise.
* testsuite/ld-x86-64/mpx.exp: Likewise.
* testsuite/ld-x86-64/no-plt.exp: Likewise.
* testsuite/ld-x86-64/tls.exp: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Call
check_compiler_available before trying to use the compiler.
(run_cc_link_tests): Likewise.
(check_compiler_available): New. Use it instead of [which $CC].
This tidies the remaining --no-print-map-discarded fails. h8300-elf
warns on a section without flags, and s12z doesn't support
--gc-sections.
bfd/
* elf32-s12z.c (elf_backend_can_gc_sections): Don't define
ld/
* testsuite/ld-gc/skip-map-discarded.s: Add section attributes.
* testsuite/lib/ld-lib.exp (check_gc_sections_available): Add
s12z to list of targets not supporting --gc-sections.
ld * config/tc-msp430.c (msp430_make_init_symbols): Define __crt0_init_bss
symbol when .lower.bss or .either.bss sections exist.
Define __crt0_movedata when .lower.data or .either.data sections exist.
* testsuite/gas/msp430/either-data-bss-sym.d: New test.
* testsuite/gas/msp430/low-data-bss-sym.d: New test.
* testsuite/gas/msp430/either-data-bss-sym.s: New test source.
* testsuite/gas/msp430/low-data-bss-sym.s: New test source.
* testsuite/gas/msp430/msp430.exp: Run new tests.
Enable large code model when running -mdata-region={upper,either}
tests.
Some of these tests were excluded for ns32k-netbsd, exclude for all
ns32k instead.
binutils/
* testsuite/binutils-all/copy-2.d: Don't run for ns32k-*-*.
* testsuite/binutils-all/copy-3.d: Likewise.
gas/
* testsuite/gas/all/gas.exp: Remove ns32k xfails.
* testsuite/gas/all/weakref1u.d: Don't run for ns32k-*-*.
ld/
* testsuite/ld-scripts/pr20302.d: Don't run for ns32k-*-*.
* testsuite/ld-scripts/section-match-1.d: Likewise.
* testsuite/ld-undefined/require-defined.exp: Likewise.
s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils.
This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum.
ChangeLog entries are as follows:
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entriy for bfcsel.
(do_t_v8_1_branch): New switch case for bfcsel.
(toU): Define.
(insns): New instruction for bfcsel.
(md_pcrel_from_section): New switch case
for BFD_RELOC_THUMB_PCREL_BFCSEL.
(md_appdy_fix): Likewise
(tc_gen_reloc): Likewise.
* testsuite/gas/arm/armv8_1-m-bfcsel.d: New.
* testsuite/gas/arm/armv8_1-m-bfcsel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfcsel.s: New.
* testsuite/ld-arm/bfcsel.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfcsel.
(print_insn_thumb32): Edit the switch case for %Z.
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BFL instruction.
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entrie for bfl.
(do_t_v8_1_branch): New switch case for bfl.
(insns): New instruction for bfl.
* testsuite/gas/arm/armv8_1-m-bfl.d: New.
* testsuite/gas/arm/armv8_1-m-bfl.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bfl-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bfl.s: New.
* testsuite/ld-arm/bfl.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instruction bfl.
This patch is part of a series of patches to add support for Armv8.1-M Mainline
instructions to binutils.
This patch adds the BF instruction.
ChangeLog entries are as follows:
*** gas/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
Andre Vieira <andre.simoesdiasvieira@arm.com>
* config/tc-arm.c (T16_32_TAB): New entries for bf.
(do_t_branch_future): New.
(insns): New instruction for bf.
* testsuite/gas/arm/armv8_1-m-bf.d: New.
* testsuite/gas/arm/armv8_1-m-bf.s: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.s: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.l: New.
* testsuite/gas/arm/armv8_1-m-bf-bad.d: New.
* testsuite/gas/arm/armv8_1-m-bf-rel.d: New.
* testsuite/gas/arm/armv8_1-m-bf-rel.s: New.
*** ld/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-arm/bf.s: New.
* testsuite/ld-arm/bf.d: New.
* testsuite/ld-arm/arm-elf.exp: Add above test.
*** opcodes/ChangeLog ***
2019-04-15 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (thumb32_opcodes): New instructions for bf.
The patch is straightforward, it does the following:
- support the new Tag_CPU_arch build attribute value, ie.:
+ declare the new value
+ update all the asserts forcing logic to be reviewed for new
architectures
+ create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and
add mapping from Tag_CPU_arch to it
+ teach readelf about new Tag_CPU_arch value
- declare armv8.1-m.main as a supported architecture value
- define Armv8.1-M Mainline in terms of feature bits available
- tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature
bits available
- update architecture-specific logic in gas and bfd guarded by the
asserts mentioned above.
- tests for all the above
ChangeLog entries are as follows:
*** bfd/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* archures.c (bfd_mach_arm_8_1M_MAIN): Define.
* bfd-in2.h: Regenerate.
* cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline.
* elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline
and update assert.
(using_thumb2): Likewise.
(using_thumb2_bl): Update assert.
(arch_has_arm_nop): Likewise.
(bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline.
(tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging.
*** binutils/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline.
*** gas/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline
Tag_CPU_arch build attribute value. Reindent.
(get_aeabi_cpu_arch_from_fset): Update assert.
(aeabi_set_public_attributes): Update assert for Tag_DIV_use logic.
* testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test.
*** include/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
(MAX_TAG_CPU_ARCH): Set value to above macro.
* opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
(ARM_AEXT_V8_1M_MAIN): Likewise.
(ARM_AEXT2_V8_1M_MAIN): Likewise.
(ARM_ARCH_V8_1M_MAIN): Likewise.
*** ld/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/attr-merge-13.attr: New test.
* testsuite/ld-arm/attr-merge-13a.s: New test.
* testsuite/ld-arm/attr-merge-13b.s: New test.
*** opcodes/ChangeLog ***
2019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
* arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline.
Add a new option to disable the listing of discarded sections
in map file output. The use case stems from a large application
built with -ffunction-sections --gc-sections where the list of
discarded sections blows up the map file output. The default
behaviour remains to print discarded sections, but the new option
allows us to disable it.
ld/
* NEWS: Mention new option --no-print-map-discarded.
* ld.h (ld_config_type) <print_map_discarded>: New field.
* ldlang.c (lang_map): Conditionally output discarded sections
in map files based on configuration option.
* ldlex.h (option_values) <OPTION_PRINT_MAP_DISCARDED,
OPTION_NO_PRINT_MAP_DISCARDED>: New.
* ldmain.c (main): Enabled print_map_discarded by default.
* lexsup.c (ld_options): Add new command-line options.
(parse_args) <OPTION_NO_PRINT_MAP_DISCARDED,
OPTION_PRINT_MAP_DISCARDED>: New cases.
* ld.texi: Document new options.
* testsuite/ld-gc/gc.exp: Add new test.
* testsuite/ld-gc/skip-map-discarded.s: New file.
* testsuite/ld-gc/skip-map-discarded.d: New file.
* testsuite/ld-gc/skip-map-discarded.map: New file.
Add -static-pie tests for DT_INIT_ARRAY, DT_FINI_ARRAY, DT_PREINIT_ARRAY
and IFUNC.
* testsuite/config/default.exp (STATIC_PIE_LDFLAGS): New. Set
to "-static-pie" if target compiler supports it.
* testsuite/ld-elf/elf.exp: Run -static-pie tests if
$STATIC_PIE_LDFLAGS isn't empty.
* testsuite/ld-ifunc/ifunc.exp: Likewise.
When using DF_BIND_NOW on AArch64 we don't reserve the GOT slot for a TLSDESC,
but we still emitted DT_TLSDESC_GOT and DT_TLSDESC_PLT. This caused random
memory corruption as the "special" value of (bfd_vma)-1 would be set for
dt_tlsdesc_got.
Since we don't have a value of dt_tlsdesc_got I also don't emit DT_TLSDESC_PLT
now becuase it would point to an incomplete PLT. To be able to write the PLT
entry DT_TLSDESC_GOT is needed and since we don't have one we can't write the
PLT entry either.
It is my understanding that GLIBC doesn't need these two entries when not lazy
loading. Conversely AArch32 does not reserve neither the GOT not the PLT slot
when doing DF_BIND_NOW.
AArch32 does not need these checks because these values are initialized to 0
and so the if (...) checks don't pass, but on AArch64 these are initialized
to (bfd_vma)-1 and thus we need some extra checks.
bfd/ChangeLog:
PR ld/24302
* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Don't emit
DT_TLSDESC_GOT and DT_TLSDESC_PLT when DF_BIND_NOW.
(elfNN_aarch64_finish_dynamic_sections): Don't write PLT if DF_BIND_NOW.
ld/ChangeLog:
PR ld/24302
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/tls-relax-gdesc-le-now.d: New test.
When an instruction has operands, the PowerPC disassembler prints
spaces after the opcode so as to line up operands. If the operands
are all optional and all default value, then no operands are printed,
leaving trailing spaces. This patch fixes that.
opcodes/
* ppc-dis.c (print_insn_powerpc): Delay printing spaces after
opcode until first operand is output.
gas/
* testsuite/gas/ppc/476.d: Remove trailing spaces.
* testsuite/gas/ppc/a2.d: Likewise.
* testsuite/gas/ppc/booke.d: Likewise.
* testsuite/gas/ppc/booke_xcoff.d: Likewise.
* testsuite/gas/ppc/e500.d: Likewise.
* testsuite/gas/ppc/e500mc.d: Likewise.
* testsuite/gas/ppc/e6500.d: Likewise.
* testsuite/gas/ppc/htm.d: Likewise.
* testsuite/gas/ppc/power6.d: Likewise.
* testsuite/gas/ppc/power8.d: Likewise.
* testsuite/gas/ppc/power9.d: Likewise.
* testsuite/gas/ppc/vle.d: Likewise.
ld/
* testsuite/ld-powerpc/tlsexe32.d: Remove trailing spaces.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
* testsuite/ld-powerpc/tlsopt5_32.d: Likewise.
shrink_dynamic_reloc_sections must remove PLT entry that was created for
an undefined weak symbol in the presence of --export-dynamic option when
relaxation coalesces literals pointing to that symbol. This fixes the
following assertion:
ld: BFD (GNU Binutils) 2.31.1 internal error, aborting at
elf32-xtensa.c:3292 in elf_xtensa_finish_dynamic_sections
2019-03-29 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (shrink_dynamic_reloc_sections): Add
info->export_dynamic to the conditional.
ld/
* testsuite/ld-xtensa/relax-undef-weak-pie-export-dynamic.d: New
test definition.
* testsuite/ld-xtensa/xtensa.exp
(relax-undef-weak-pie-export-dynamic): Add new test.
ld/ChangeLog:
2019-02-26 Martin Liska <mliska@suse.cz>
* plugin.c (get_symbols): Add lto_kind_str, lto_resolution_str,
lto_visibility_str and use then to inform about plugin-symbols.
* testsuite/ld-plugin/plugin-12.d: Adjust expected pattern.
Similar to the AArch64 patches the Arm disassembler has the same issues with
out of order sections but also a few short comings.
For one thing there are multiple code blocks to determine mapping symbols, and
they all work slightly different, and neither fully correct. The first thing
this patch does is centralise the mapping symbols search into one function
mapping_symbol_for_insn. This function is then updated to perform a search in
a similar way as AArch64.
Their used to be a value has_mapping_symbols which was used to determine the
default disassembly for objects that have no mapping symbols. The problem with
the approach was that it was determining this value in the same loop that needed
it, which is why this field could take on the states -1, 0, 1 where -1 means
"don't know". However this means that until you actually find a mapping symbol
or reach the end of the disassembly glob, you don't know if you did the right
action or not, and if you didn't you can't correct it anymore.
This is why the two jump-reloc-veneers-* testcases end up disassembling some
insn as data when they shouldn't.
Out of order here refers to an object file where sections are not listed in a
monotonic increasing VMA order.
The ELF ABI for Arm [1] specifies the following for mapping symbols:
1) A text section must always have a corresponding mapping symbol at it's
start.
2) Data sections do not require any mapping symbols.
3) The range of a mapping symbol extends from the address it starts on up to
the next mapping symbol (exclusive) or section end (inclusive).
However there is no defined order between a symbol and it's corresponding
mapping symbol in the symbol table. This means that while in general we look
up for a corresponding mapping symbol, we have to make at least one check of
the symbol below the address being disassembled.
When disassembling different PCs within the same section, the search for mapping
symbol can be cached somewhat. We know that the mapping symbol corresponding to
the current PC is either the previous one used, or one at the same address as
the current PC.
However this optimization and mapping symbol search must stop as soon as we
reach the end or start of the section. Furthermore if we're only disassembling
a part of a section, the search is a allowed to search further than the current
chunk, but is not allowed to search past it (The mapping symbol if there, must
be at the same address, so in practice we usually stop at PC+4).
lastly, since only data sections don't require a mapping symbol the default
mapping type should be DATA and not INSN as previously defined, however if the
binary has had all its symbols stripped than this isn't very useful. To fix
this we determine the default based on the section flags. This will allow the
disassembler to be more useful on stripped binaries. If there is no section
than we assume you to be disassembling INSN.
[1] https://developer.arm.com/docs/ihi0044/latest/elf-for-the-arm-architecture-abi-2018q4-documentation#aaelf32-table4-7
binutils/ChangeLog:
* testsuite/binutils-all/arm/in-order-all.d: New test.
* testsuite/binutils-all/arm/in-order.d: New test.
* testsuite/binutils-all/arm/objdump.exp: Support .d tests.
* testsuite/binutils-all/arm/out-of-order-all.d: New test.
* testsuite/binutils-all/arm/out-of-order.T: New test.
* testsuite/binutils-all/arm/out-of-order.d: New test.
* testsuite/binutils-all/arm/out-of-order.s: New test.
ld/ChangeLog:
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Update disassembly.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Update disassembly.
opcodes/ChangeLog:
* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
(mapping_symbol_for_insn): Implement new algorithm.
(print_insn): Remove duplicate code.
The AArch64 linker option to turn on BTI (--force-bti) warns in case there are
input objects which have a missing GNU NOTE section for BTI. This patch is trying
to improve the warnings that come out.
In order to do so, I propose adding a new argument to elf_merge_gnu_properties
and the backend function merge_gnu_properties. This new argument makes sure
that we now pass both the objects along with the properties to which they
belong to. The x86 backend function has also been updated to match this
change.
*** bfd/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* elf-bfd.h (struct elf_backend_data): Add argument to
merge_gnu_properties.
* elf-properties.c (elf_merge_gnu_properties): Add argument to
itself and while calling bed->merge_gnu_properties.
(elf_merge_gnu_property_list): Update the calls for
elf_merge_gnu_properties.
* elfnn-aarch64.c (elfNN_aarch64_merge_gnu_properties): Update handling
of --force-bti warning and add argument.
* elfxx-aarch64.c (_bfd_aarch64_elf_link_setup_gnu_properties): Add
warning.
* elfxx-x86.c (_bfd_x86_elf_merge_gnu_properties): Add argument.
* elfxx-x86.h (_bfd_x86_elf_merge_gnu_properties): Likewise in
declaration.
*** ld/ChangeLog ***
2019-03-21 Sudakshina Das <sudi.das@arm.com>
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifdef for PAC note section.
* testsuite/ld-aarch64/bti-plt-6.d: Update warning.
* testsuite/ld-aarch64/bti-plt-7.d: Likewise.
* testsuite/ld-aarch64/bti-warn.d: New test.
Generic linker ELF targets using CREATE_OBJECT_SYMBOLS in their
scripts run into a problem. The file symbols are created by
_bfd_generic_link_output_symbols in each object file, in the section
corresponding to the CREATE_OBJECT_SYMBOLS section, typically .text.
If it so happens that the output .text section is stripped due to
being empty, then elf.c:assign_section_numbers won't assign an ELF
section number and swap_out_syms will report "unable to find
equivalent output section" for the object symbols. Fix this by
always keeping an output section with CREATE_OBJECT_SYMBOLS.
* ldlang.c (lang_size_sections_1): Set SEC_KEEP on
create_object_symbols_section.
* testsuite/ld-elf/pr22319.d: Don't xfail dlx.
* testsuite/ld-elf/merge.d: Remove csky from xfails, add moxie.
* testsuite/ld-elf/pr21884.d: Remove csky from xfails.
* testsuite/ld-elf/shared.exp: Add csky to list not xfailing pr22374.
* testsuite/ld-unique/pr21529.d: Remove csky from xfails
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds new definitions of PAC enabled PLTs
and both BTI and PAC enabled PLTs.
2) It also defines the new dynamic tag DT_AARCH64_PAC_PLT
for the PAC enabled PLTs.
3) This patch adds a new ld command line option: --pac-plt.
In the presence of this option, the linker uses the PAC
enabled PLTs and marks with DT_AARCH64_PAC_PLT.
4) In case both BTI and PAC are enabled the linker should
pick PLTs enabled with both and also use dynamic tags for both.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elfnn-aarch64.c (PLT_PAC_ENTRY_SIZE, PLT_PAC_SMALL_ENTRY_SIZE): New.
(PLT_BTI_PAC_ENTRY_SIZE, PLT_BTI_PAC_SMALL_ENTRY_SIZE): New.
(setup_plt_values): Account for PAC or PAC and BTI enabled PLTs.
(elfNN_aarch64_size_dynamic_sections): Add checks for PLT_BTI_PAC
and PLT_PAC_PLT.
(elfNN_aarch64_finish_dynamic_sections): Account for PLT_BTI_PAC.
(get_plt_type): Add case for DT_AARCH64_PAC_PLT.
(elfNN_aarch64_plt_sym_val): Add cases for PLT_BTI_PAC and PLT_PAC.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* readelf.c (get_aarch64_dynamic_type): Add case for
DT_AARCH64_PAC_PLT.
(dynamic_section_aarch64_val): Likewise.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
* NEWS: Document --pac-plt.
* emultempl/aarch64elf.em (OPTION_PAC_PLT): New.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add pac-plt.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_PAC_PLT.
* testsuite/ld-aarch64/aarch64-elf.exp: Add the following tests.
* testsuite/ld-aarch64/bti-pac-plt-1.d: New test.
* testsuite/ld-aarch64/bti-pac-plt-2.d: New test.
* testsuite/ld-aarch64/pac-plt-1.d: New test.
* testsuite/ld-aarch64/pac-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: Add .ifndef directive.
Jim Wilson
Alan Modra
John David Anglin
Jozef Lawrynowicz
Szabolcs Nagy
Nick Alcock
H.J. Lu
Tamar Christina
Mihailo Stojanovic
Nick Clifton
Jose E. Marchesi
Claudiu Zissulescu
Martin Liska
Srinath Parvathaneni
Jan Beulich
Sudakshina Das
Faraz Shahbazker
Matthew Fortune
Andre Vieira
Senthil Kumar Selvaraj
Sandra Loosemore
Max Filippov