Kito Cheng f91d48deb2 RISC-V: Fix disassemble for c.li, c.andi and c.addiw
ChangeLog

2017-05-03  Kito Cheng  <kito.cheng@gmail.com>

        * riscv-dis.c (print_insn_args): Handle 'Co' operands.
2017-05-04 03:20:30 -07:00
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