7799a85590
x86: Add -mindirect-branch=
...
Add -mindirect-branch= option to convert indirect call and jump to call
and return thunks. The default is 'keep', which keeps indirect call and
jump unmodified. 'thunk' converts indirect call and jump to call and
return thunk. 'thunk-inline' converts indirect call and jump to inlined
call and return thunk. 'thunk-extern' converts indirect call and jump to
external call and return thunk provided in a separate object file. You
can control this behavior for a specific function by using the function
attribute indirect_branch.
2 kinds of thunks are geneated. Memory thunk where the function address
is at the top of the stack:
__x86_indirect_thunk:
call L2
L1:
pause
lfence
jmp L1
L2:
lea 8(%rsp), %rsp|lea 4(%esp), %esp
ret
Indirect jmp via memory, "jmp mem", is converted to
push memory
jmp __x86_indirect_thunk
Indirect call via memory, "call mem", is converted to
jmp L2
L1:
push [mem]
jmp __x86_indirect_thunk
L2:
call L1
Register thunk where the function address is in a register, reg:
__x86_indirect_thunk_reg:
call L2
L1:
pause
lfence
jmp L1
L2:
movq %reg, (%rsp)|movl %reg, (%esp)
ret
where reg is one of (r|e)ax, (r|e)dx, (r|e)cx, (r|e)bx, (r|e)si, (r|e)di,
(r|e)bp, r8, r9, r10, r11, r12, r13, r14 and r15.
Indirect jmp via register, "jmp reg", is converted to
jmp __x86_indirect_thunk_reg
Indirect call via register, "call reg", is converted to
call __x86_indirect_thunk_reg
gcc/
Backport from mainline
* config/i386/i386-opts.h (indirect_branch): New.
* config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
* config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
with local indirect jump when converting indirect call and jump.
(ix86_set_indirect_branch_type): New.
(ix86_set_current_function): Call ix86_set_indirect_branch_type.
(indirectlabelno): New.
(indirect_thunk_needed): Likewise.
(indirect_thunk_bnd_needed): Likewise.
(indirect_thunks_used): Likewise.
(indirect_thunks_bnd_used): Likewise.
(INDIRECT_LABEL): Likewise.
(indirect_thunk_name): Likewise.
(output_indirect_thunk): Likewise.
(output_indirect_thunk_function): Likewise.
(ix86_output_indirect_branch_via_reg): Likewise.
(ix86_output_indirect_branch_via_push): Likewise.
(ix86_output_indirect_branch): Likewise.
(ix86_output_indirect_jmp): Likewise.
(ix86_code_end): Call output_indirect_thunk_function if needed.
(ix86_output_call_insn): Call ix86_output_indirect_branch if
needed.
(ix86_handle_fndecl_attribute): Handle indirect_branch.
(ix86_attribute_table): Add indirect_branch.
* config/i386/i386.h (machine_function): Add indirect_branch_type
and has_local_indirect_jump.
* config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
to true.
(tablejump): Likewise.
(*indirect_jump): Use ix86_output_indirect_jmp.
(*tablejump_1): Likewise.
(simple_return_indirect_internal): Likewise.
* config/i386/i386.opt (mindirect-branch=): New option.
(indirect_branch): New.
(keep): Likewise.
(thunk): Likewise.
(thunk-inline): Likewise.
(thunk-extern): Likewise.
* doc/extend.texi: Document indirect_branch function attribute.
* doc/invoke.texi: Document -mindirect-branch= option.
gcc/testsuite/
Backport from mainline
* gcc.target/i386/indirect-thunk-1.c: New test.
* gcc.target/i386/indirect-thunk-2.c: Likewise.
* gcc.target/i386/indirect-thunk-3.c: Likewise.
* gcc.target/i386/indirect-thunk-4.c: Likewise.
* gcc.target/i386/indirect-thunk-5.c: Likewise.
* gcc.target/i386/indirect-thunk-6.c: Likewise.
* gcc.target/i386/indirect-thunk-7.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-1.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-2.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-3.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-4.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-5.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-6.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-7.c: Likewise.
* gcc.target/i386/indirect-thunk-attr-8.c: Likewise.
* gcc.target/i386/indirect-thunk-bnd-1.c: Likewise.
* gcc.target/i386/indirect-thunk-bnd-2.c: Likewise.
* gcc.target/i386/indirect-thunk-bnd-3.c: Likewise.
* gcc.target/i386/indirect-thunk-bnd-4.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-1.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-2.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-3.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-4.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-5.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-6.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-7.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-1.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-2.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-3.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-4.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-5.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-6.c: Likewise.
* gcc.target/i386/indirect-thunk-inline-7.c: Likewise.
From-SVN: r256732
2018-01-16 02:59:42 -08:00
9453ba0a0e
Introduce =<number> for couple of options.
...
2017-02-28 Martin Liska <mliska@suse.cz>
* c.opt: Replace space with tabular for options of <number>
type.
2017-02-28 Martin Liska <mliska@suse.cz>
* common.opt: Replace space with tabular for options of <number>
type.
* config/i386/i386.opt: Show <number> value for
-mlarge-data-threshold.
* opts.c (print_filtered_help): Do not display number in hexadecimal
format.
From-SVN: r245789
2017-02-28 22:02:58 +00:00
a156b0f10c
Fix typo in -masm-dialect option values.
...
2017-02-21 Martin Liska <mliska@suse.cz>
* config/i386/i386.opt: Replace -masm-dialect with -masm.
From-SVN: r245624
2017-02-21 10:45:35 +00:00
c28fcc601c
re PR target/79569 (Unrecognized command line option ‘-m3dnowa’)
...
PR target/79569
* config/i386/i386.opt (m3dnowa): Replace Undocumented with Report.
* common/config/i386/i386-common.c (OPTION_MASK_ISA_3DNOW_A_SET): Define.
(ix86_handle_option): Handle OPT_m3dnowa.
* doc/invoke.texi (-m3dnowa): Document.
* doc/extend.texi (__builtin_ia32_pmulhuw, __builtin_ia32_pf2iw): Use
-m3dnowa instead of -m3dnow -march=athlon.
* gcc.target/i386/3dnowA-3.c: New test.
From-SVN: r245561
2017-02-18 14:14:43 +01:00
1d516992d1
i386-common.c (OPTION_MASK_ISA_RDPID_SET): New.
...
* common/config/i386/i386-common.c (OPTION_MASK_ISA_RDPID_SET): New.
(OPTION_MASK_ISA_PKU_UNSET): New.
(ix86_handle_option): Handle -mrdpid.
* config/i386/cpuid.h (bit_RDPID): New.
* config/i386/driver-i386.c (host_detect_local_cpu):
Detect RDPID feature.
* config/i386/i386-builtin.def (__builtin_ia32_rdpid): New.
* config/i386/i386-c.c (ix86_target_macros_internal):
Handle RDPID flag.
* config/i386/i386.c (ix86_target_string): Add -mrdpid to isa2_opts.
(ix86_valid_target_attribute_inner_p): Add "rdpid".
(ix86_expand_builtin): Handle IX86_BUILTIN_RDPID.
* config/i386/i386.h (TARGET_RDPID, TARGET_RDPID_P): New.
* config/i386/i386.md (define_insn "rdpid"): New.
* config/i386/i386.opt Add -mrdpid.
* config/i386/immintrin.h (_rdpid_u32): New.
testsuite/ChangeLog:
* gcc.target/i386/rdpid.c New test.
* gcc.target/i386/sse-12.c: Add -mrdpid.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r245540
2017-02-17 19:11:28 +01:00
7cdca3ec8a
i386.opt (msgx): Use ix86_isa_flags2 variable.
...
* config/i386/i386.opt (msgx): Use ix86_isa_flags2 variable.
* config/i386/i386.c (ix86_target_string): Add missing options
to isa_opts and reorder options by implied ISAs. Rename isa_opts2 to
isa2_opts, ix86_flag_opts to flag2_opts, ix86_target_other to
flags_other and ix86_target_other to flags2_other. Display unknown
isa2 options.
(ix86_valid_target_attribute_inner_p): Add missing options and
reorder options by implied ISAs, as in ix86_target_string.
testsuite/ChangeLog:
* gcc.target/i386/funcspec-56.inc: Add missing options and
reorder options by implied ISAs, as in ix86_target_string.
From-SVN: r244452
2017-01-13 19:32:44 +01:00
73e32c4743
i386-common.c (OPTION_MASK_ISA_SGX_UNSET): New.
...
* common/config/i386/i386-common.c (OPTION_MASK_ISA_SGX_UNSET): New.
(OPTION_MASK_ISA_SGX_SET): New.
(ix86_handle_option): Handle OPT_msgx.
* config.gcc: Added sgxintrin.h.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect sgx.
* config/i386/i386-c.c (ix86_target_macros_internal): Define __SGX__.
* config/i386/i386.c (ix86_target_string): Add -msgx.
(PTA_SGX): New.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add sgx.
* config/i386/i386.h (TARGET_SGX, TARGET_SGX_P): New.
* config/i386/i386.opt: Add msgx.
* config/i386/sgxintrin.h: New file.
* config/i386/x86intrin.h: Add sgxintrin.h.
testsuite/ChangeLog:
* gcc.target/i386/sgx.c New test.
* gcc.target/i386/sse-12.c: Add -msgx.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>
From-SVN: r244339
2017-01-11 22:41:13 +01:00
79fc8ffe6c
Enable AVX-512 VPOPCNTD/VPOPCNTQ instructions.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET,
OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET): New.
* config.gcc: Add avx512vpopcntdqintrin.h.
* config/i386/avx512vpopcntdqintrin.h: New.
* config/i386/cpuid.h (bit_AVX512VPOPCNTDQ): New.
* config/i386/i386-builtin-types.def: Add new types.
* config/i386/i386-builtin.def (__builtin_ia32_vpopcountd_v16si,
__builtin_ia32_vpopcountd_v16si_mask, __builtin_ia32_vpopcountq_v8di,
__builtin_ia32_vpopcountq_v8di_mask): New.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512VPOPCNTDQ__.
* config/i386/i386.c (ix86_target_string): Add -mavx512vpopcntdq.
(PTA_AVX512VPOPCNTDQ): Define.
* config/i386/i386.h (TARGET_AVX512VPOPCNTDQ,
TARGET_AVX512VPOPCNTDQ_P): Define.
* config/i386/i386.opt: Add mavx512vpopcntdq.
* config/i386/immintrin.h: Include avx512vpopcntdqintrin.h.
* config/i386/sse.md (define_insn "vpopcount<mode><mask_name>"): New.
libgcc/
* config/i386/cpuinfo.h (processor_features): Add
FEATURE_AVX512VPOPCNTDQ.
* config/i386/cpuinfo.c (get_available_features): Habdle new
feature.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mavx512vpopcntdq.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/builtin_target.c: Handle new option.
* gcc.target/i386/funcspec-56.inc: Test new attributes.
* gcc.target/i386/avx512vpopcntdq-vpopcntd.c: New test.
* gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto.
From-SVN: r244263
2017-01-10 12:55:41 +00:00
cbe34bb5ed
Update copyright years.
...
From-SVN: r243994
2017-01-01 13:07:43 +01:00
5fbb13a720
Enable AVX512_4FMAPS and AVX512_4VNNIW instructions
...
This requires additional patch for register allocator from Vladimir
Makarov.
gcc/
2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com>
Andrew Senkevich <andrew.senkevich@intel.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX5124FMAPS_SET,
OPTION_MASK_ISA_AVX5124FMAPS_UNSET,
OPTION_MASK_ISA_AVX5124VNNIW_SET,
OPTION_MASK_ISA_AVX5124VNNIW_UNSET): New.
(ix86_handle_option): Handle OPT_mavx5124fmaps,
OPT_mavx5124vnniw.
* config.gcc: Add avx5124fmapsintrin.h, avx5124vnniwintrin.h.
* config/i386/avx5124fmapsintrin.h: New file.
* config/i386/avx5124vnniwintrin.h: Ditto.
* config/i386/constraints.md (h): New constraint.
* config/i386/cpuid.h: (bit_AVX5124VNNIW,
bit_AVX5124FMAPS): New.
* config/i386/driver-i386.c (host_detect_local_cpu):
Detect avx5124fmaps, avx5124vnniw.
* config/i386/i386-builtin-types.def: Add types
V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF_V16SF_UHI,
V16SF_FTYPE_V16SF_V16SF_V16SF_V16SF_V16SF_PCV4SF,
V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF,
V4SF_FTYPE_V4SF_V4SF_V4SF_V4SF_V4SF_PCV4SF_V4SF_UQI,
V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI,
V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI.
* config/i386/i386-builtin.def (__builtin_ia32_4fmaddps_mask,
__builtin_ia32_4fmaddps, __builtin_ia32_4fmaddss,
__builtin_ia32_4fmaddss_mask, __builtin_ia32_4fnmaddps_mask,
__builtin_ia32_4fnmaddps, __builtin_ia32_4fnmaddss,
__builtin_ia32_4fnmaddss_mask, __builtin_ia32_vp4dpwssd,
__builtin_ia32_vp4dpwssd_mask, __builtin_ia32_vp4dpwssds,
__builtin_ia32_vp4dpwssds_mask): New.
* config/i386/i386-c.c (ix86_target_macros_internal):
Define __AVX5124FMAPS__, __AVX5124VNNIW__.
* config/i386/i386-modes.def: Fixed comment typos, added new
modes (VECTOR_MODES (FLOAT, 256), VECTOR_MODE (INT, SI, 64)).
* config/i386/i386.c (ix86_target_string): Add -mavx5124fmaps,
-mavx5124vnniw.
(PTA_AVX5124FMAPS, PTA_AVX5124VNNIW): Define.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add avx5124fmaps,
avx5124vnniw.
(ix86_expand_builtin): Handle new builtins.
(ix86_additional_allocno_class_p): New.
* config/i386/i386.h (TARGET_AVX5124FMAPS,
TARGET_AVX5124FMAPS_P,
TARGET_AVX5124VNNIW,
TARGET_AVX5124VNNIW_P): Define.
(reg_class): Add MOD4_SSE_REGS.
(MOD4_SSE_REG_P, MOD4_SSE_REGNO_P): New.
* config/i386/i386.opt: Add mavx5124fmaps, mavx5124vnniw.
* config/i386/immintrin.h: Include avx5124fmapsintrin.h,
avx5124vnniwintrin.h.
* config/i386/sse.md (unspec): Add UNSPEC_VP4FMADD,
UNSPEC_VP4FNMADD,
UNSPEC_VP4DPWSSD, UNSPEC_VP4DPWSSDS.
(define_mode_iterator IMOD4): New.
(define_mode_attr imod4_narrow): Ditto.
(define_insn "mov<mode>"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps_mask"): Ditto.
(define_insn "avx5124fmaddps_4fmaddps_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss_mask"): Ditto.
(define_insn "avx5124fmaddps_4fmaddss_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps_mask"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddps_maskz"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss_mask"): Ditto.
(define_insn "avx5124fmaddps_4fnmaddss_maskz"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd_mask"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssd_maskz"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds_mask"): Ditto.
(define_insn "avx5124vnniw_vp4dpwssds_maskz"): Ditto.
* init-regs.c (initialize_uninitialized_regs): Add emit_clobber call.
* genmodes.c (mode_size_inline): Extend return type.
* machmode.h (mode_size, mode_base_align): Extend type.
gcc/testsuite/
2016-11-17 Kirill Yukhin <kirill.yukhin@gmail.com>
Andrew Senkevich <andrew.senkevich@intel.com>
* gcc.target/i386/avx5124fmadd-v4fmaddps-1.c: New test.
* gcc.target/i386/avx5124fmadd-v4fmaddps-2.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fmaddss-1.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddps-1.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddps-2.c: Ditto.
* gcc.target/i386/avx5124fmadd-v4fnmaddss-1.c: Ditto.
* gcc.target/i386/avx5124fmaps-check.h: Ditto.
* gcc.target/i386/avx5124vnniw-check.h: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssd-1.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssd-2.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssds-1.c: Ditto.
* gcc.target/i386/avx5124vnniw-vp4dpwssds-2.c: Ditto.
* gcc.target/i386/avx512f-helper.h: Add avx5124fmaps-check.h,
avx5124vnniw-check.h.
* gcc.target/i386/i386.exp (check_effective_target_avx5124fmaps,
check_effective_target_avx5124vnniw): New.
* gcc.target/i386/m128-check.h (ESP_FLOAT, ESP_DOUBLE):
Set under ifndef.
* gcc.target/i386/sse-12.c: Add -mavx5124fmaps, -mavx5124vnniw.
* gcc.target/i386/sse-13.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
From-SVN: r242569
2016-11-17 14:11:21 -08:00
eee8f0b07f
Delete x86 deprecated pcommit instruction support
...
Delete x86 pcommit instruction support, which has been deprecated:
https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
OPTION_MASK_ISA_PCOMMIT_SET): Deleted definitions.
(ix86_handle_option): Deleted handle of OPT_mpcommit.
* config.gcc: Deleted pcommitintrin.h
* config/i386/pcommitintrin.h: Deleted file.
* config/i386/cpuid.h (bit_PCOMMIT): Deleted.
* config/i386/driver-i386.c (host_detect_local_cpu): Deleted pcommit
detection.
* config/i386/i386-c.c (ix86_target_macros_internal): Deleted define
__PCOMMIT__.
* config/i386/i386.c (ix86_target_string): Deleted -mpcommit.
(PTA_PCOMMIT): Deleted define.
(ix86_option_override_internal): Deleted handle of option.
(ix86_valid_target_attribute_inner_p): Deleted pcommit.
* config/i386/i386-builtin.def (IX86_BUILTIN_PCOMMIT,
__builtin_ia32_pcommit): Deleted.
* config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Deleted.
* config/i386/i386.md (unspecv): Deleted UNSPECV_PCOMMIT.
(pcommit): Deleted instruction.
* config/i386/i386.opt: Mention -mpcommit deprecation.
* config/i386/x86intrin.h: Deleted inclusion of pcommitintrin.h.
gcc/testsuite/
* gcc.target/i386/pcommit-1.c: Deleted.
* gcc.target/i386/sse-12.c: Deleted -pcommit option.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
From-SVN: r240816
2016-10-05 15:08:48 -07:00
c6e434f5b7
re PR target/70738 (Add -mgeneral-regs-only option)
...
PR target/70738
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
(ix86_handle_option) <case OPT_mgeneral_regs_only>: Disable
MPX, MMX, SSE and x87 instructions for -mgeneral-regs-only.
* config/i386/i386.opt (ix86_target_flags): Add new Variable.
(-mgeneral-regs-only): Add new option.
* config/i386/i386.c (ix86_option_override_internal): Don't enable
x87 instructions if only general registers are allowed.
(ix86_target_string): Add ix86_flags argument. Handle additional
flags options through ix86_flags argument. Update all callers.
* doc/invoke.texi: Document -mgeneral-regs-only.
testsuite/ChangeLog:
PR target/70738
* gcc.target/i386/pr70738-1.c: New test.
* gcc.target/i386/pr70738-2.c: Likewise.
* gcc.target/i386/pr70738-3.c: Likewise.
* gcc.target/i386/pr70738-4.c: Likewise.
* gcc.target/i386/pr70738-5.c: Likewise.
* gcc.target/i386/pr70738-6.c: Likewise.
* gcc.target/i386/pr70738-7.c: Likewise.
* gcc.target/i386/pr70738-8.c: Likewise.
* gcc.target/i386/pr70738-9.c: Likewise.
From-SVN: r236738
2016-05-25 20:58:49 +02:00
41a6c07141
revert: re PR target/70738 (Add -mgeneral-regs-only option)
...
Revert:
gcc/
PR target/70738
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
(ix86_handle_option): Disable MPX, MMX, SSE and x87 instructions
for -mgeneral-regs-only.
* config/i386/i386.c (ix86_option_override_internal): Don't
enable x87 instructions if only the general registers are
allowed.
* config/i386/i386.opt: Add -mgeneral-regs-only.
* doc/invoke.texi: Document -mgeneral-regs-only.
gcc/testsuite/
PR target/70738
* gcc.target/i386/pr70738-1.c: Likewise.
* gcc.target/i386/pr70738-2.c: Likewise.
* gcc.target/i386/pr70738-3.c: Likewise.
* gcc.target/i386/pr70738-4.c: Likewise.
* gcc.target/i386/pr70738-5.c: Likewise.
* gcc.target/i386/pr70738-6.c: Likewise.
* gcc.target/i386/pr70738-7.c: Likewise.
* gcc.target/i386/pr70738-8.c: Likewise.
* gcc.target/i386/pr70738-9.c: Likewise.
From-SVN: r236570
2016-05-22 19:20:10 +02:00
ce3a16ff1f
Add -mgeneral-regs-only option
...
X86 Linux kernel is compiled only with integer instructions. Currently,
-mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -mno-80387
-mno-fp-ret-in-387 -mskip-rax-setup
is used to compile kernel. If we add another non-integer feature, it
has to be turned off. We can add a -mgeneral-regs-only option, similar
to AArch64, to disable all non-integer features so that kernel doesn't
need a long list and the same option will work for future compilers.
It can also be used to compile interrupt handler.
gcc/
PR target/70738
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): New.
(ix86_handle_option): Disable MPX, MMX, SSE and x87 instructions
for -mgeneral-regs-only.
* config/i386/i386.c (ix86_option_override_internal): Don't
enable x87 instructions if only the general registers are
allowed.
* config/i386/i386.opt: Add -mgeneral-regs-only.
* doc/invoke.texi: Document -mgeneral-regs-only.
gcc/testsuite/
PR target/70738
* gcc.target/i386/pr70738-1.c: Likewise.
* gcc.target/i386/pr70738-2.c: Likewise.
* gcc.target/i386/pr70738-3.c: Likewise.
* gcc.target/i386/pr70738-4.c: Likewise.
* gcc.target/i386/pr70738-5.c: Likewise.
* gcc.target/i386/pr70738-6.c: Likewise.
* gcc.target/i386/pr70738-7.c: Likewise.
* gcc.target/i386/pr70738-8.c: Likewise.
* gcc.target/i386/pr70738-9.c: Likewise.
From-SVN: r236520
2016-05-20 09:06:39 -07:00
818ab71a41
Update copyright years.
...
From-SVN: r232055
2016-01-04 15:30:50 +01:00
41a4ef2243
Introduce support for PKU instructions.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PKU_SET): New.
(OPTION_MASK_ISA_PKU_UNSET): Ditto.
(ix86_handle_option): Handle OPT_mpku.
* config.gcc: Add pkuintrin.h to i[34567]86-*-* and x86_64-*-*
targets.
* config/i386/cpuid.h (host_detect_local_cpu): Detect PKU feature.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle PKU ISA
flag.
* config/i386/i386.c (ix86_target_string): Add "-mpku" to
ix86_target_opts.
(ix86_option_override_internal): Define PTA_PKU, mention new key
in skylake-avx512. Handle new ISA bits.
(ix86_valid_target_attribute_inner_p): Add "pku".
(enum ix86_builtins): Add IX86_BUILTIN_RDPKRU and IX86_BUILTIN_WRPKRU.
(builtin_description bdesc_special_args[]): Add new built-ins.
* config/i386/i386.h (define TARGET_PKU): New.
(define TARGET_PKU_P): Ditto.
* config/i386/i386.md (define_c_enum "unspecv"): Add UNSPEC_PKU.
(define_expand "rdpkru"): New.
(define_insn "*rdpkru"): Ditto.
(define_expand "wrpkru"): Ditto.
(define_insn "*wrpkru"): Ditto.
* config/i386/i386.opt (mpku): Ditto.
* config/i386/pkuintrin.h: New file.
* config/i386/x86intrin.h: Include pkuintrin.h
* doc/extend.texi: Describe new built-ins.
* doc/invoke.texi: Describe new switches.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mpku.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/rdpku-1.c: New test.
* gcc.target/i386/sse-12.c: Add -mpku.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-33.c: Ditto.
* gcc.target/i386/wrpku-1.c: New test.
From-SVN: r231944
2015-12-24 11:05:34 +00:00
62e56a0d65
support for AMD clzero isa.
...
gcc/ChangeLog
2015-12-06 Victoria Stepanyan <victoria.stepanyan@amd.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_CLZERO_SET): New.
(ix86_handle_option): Handle clzero.
* config.gcc (i[34567]86-*-*): Add clzerointrin.h,
(x86_64-*-*): Likewise.
* config/i386/clzerointrin.h: New header.
* config/i386/cpuid.h (bit_CLZERO): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
CLZERO support.
* config/i386/i386.opt (clzero): New.
* config/i386/i386-c.c: Define __CLZERO__ if needed.
* config/i386/i386.c (ix86_target_string): Define -mclzero option.
(PTA_CLZERO): New.
(ix86_option_override_internal): Handle new option.
(processor_alias_table): Added PTA_CLZERO.
(ix86_valid_target_attribute_inner_p): Add OPT_mclzero.
(ix86_builtins): Add IX86_BUILTIN_CLZERO, IX86_BUILTIN_CLZERO.
(ix86_expand_builtin): Handle IX86_BUILTIN_CLZERO and
IX86_BUILTIN_CLZERO built-ins.
* config/i386/i386.h (TARGET_CLZERO): New.
* config/i386/i386.md (unspecv): Add UNSPEC_CLZERO.
(clzero): New pattern.
(clzero_<mode>): New pattern.
* config/i386/x86intrin.h: Include clzerointrin.h.
* doc/extend.texi: Document clzero builtins.
* doc/invoke.texi: Document -mclzero option.
gcc/testsuite/ChangeLog
2015-12-06 Victoria Stepanyan <victoria.stepanyan@amd.com>
* gcc.target/i386/clzero.c: New.
* gcc.target/i386/sse-12.c: Add -mclzero.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r231340
2015-12-06 17:02:48 +00:00
d085c46817
regrename.h (struct du_head): Add target_data_1 and target_data_2 fields.
...
* regrename.h (struct du_head): Add target_data_1 and target_data_2
fields.
* regrename.c (create_new_chain): Clear entire struct after allocating.
* config/i386/i386.opt (mmitigate-rop): New option.
* doc/invoke.texi (mmitigate-rop): Document.
* config/i386/i386.c: Include "regrename.h".
(ix86_rop_should_change_byte_p, reg_encoded_number,
ix86_get_modrm_for_rop, set_rop_modrm_reg_bits, ix86_mitigate_rop): New
static functions.
(ix86_reorg): Call ix86_mitigate_rop if -fmitigate-rop.
* config/i386/i386.md (attr "modrm_class"): New.
(cmp<mode>_ccno_1, mov<mode>_xor, movstrict<mode>_xor,
x86_mov<mode>cc_0_m1. x86_mov<mode>cc_0_m1_se)
(x86_mov<mode>cc_0_m1_neg): Override modrm_class attribute.
From-SVN: r230543
2015-11-18 12:26:43 +00:00
ffbd5e09b7
re PR driver/68043 (many undocumented options, missing punctuation)
...
gcc/ChangeLog:
2015-10-22 Martin Sebor <msebor@redhat.com>
PR driver/68043
* config/i386/i386.opt: Add missing periods to the ends of sentences.
* config/msp430/msp430.opt: Same.
gcc/testsuite/ChangeLog:
2015-10-22 Martin Sebor <msebor@redhat.com>
PR driver/68043
* gcc.misc-tests/help.exp: Verify that option descriptions
end in periods.
* lib/options.exp (check_for_options): Use the regexp --line option.
Print unexpected match on failure.
From-SVN: r229205
2015-10-22 17:48:17 -06:00
a7b2e1845f
Improve --help output to generate references to option aliases.
...
gcc/
PR driver/68043
* opts.c (undocumented_msg, use_diagnosed_msg): New globals.
(print_filtered_help): Reference aliased option's name and encourage
readers to use it in preference to the alias if the former is not
documented. Mention when using an option is diagnosed.
* gcc.c (display_help): End each sentence with a period.
* ada/gcc-interface/lang.opt: End each sentence that describes
an option with a period.
* c-family/c.opt: Same.
* common.opt: Same.
* config/aarch64/aarch64.opt: Same.
* config/alpha/alpha.opt: Same.
* config/arc/arc.opt: Same.
* config/arm/arm.opt: Same.
* config/avr/avr.opt: Same.
* config/bfin/bfin.opt: Same.
* config/c6x/c6x.opt: Same.
* config/cr16/cr16.opt: Same.
* config/cris/cris.opt: Same.
* config/cris/linux.opt: Same.
* config/darwin.opt: Same.
* config/epiphany/epiphany.opt: Same.
* config/fr30/fr30.opt: Same.
* config/frv/frv.opt: Same.
* config/ft32/ft32.opt: Same.
* config/g.opt: Same.
* config/h8300/h8300.opt: Same.
* config/i386/cygming.opt: Same.
* config/i386/djgpp.opt: Same.
* config/i386/i386.opt: Same.
* config/i386/interix.opt: Same.
* config/i386/mingw-w64.opt: Same.
* config/i386/mingw.opt: Same.
* config/ia64/ia64.opt: Same.
* config/ia64/ilp32.opt: Same.
* config/iq2000/iq2000.opt: Same.
* config/linux.opt: Same.
* config/lm32/lm32.opt: Same.
* config/lynx.opt: Same.
* config/m32c/m32c.opt: Same.
* config/m32r/m32r.opt: Same.
* config/m68k/ieee.opt: Same.
* config/m68k/m68k.opt: Same.
* config/mcore/mcore.opt: Same.
* config/mep/mep.opt: Same.
* config/microblaze/microblaze.opt: Same.
* config/mips/mips.opt: Same.
* config/mmix/mmix.opt: Same.
* config/mn10300/mn10300.opt: Same.
* config/moxie/moxie.opt: Same.
* config/msp430/msp430.opt: Same.
* config/nios2/elf.opt: Same.
* config/nios2/nios2.opt: Same.
* config/nvptx/nvptx.opt: Same.
* config/pa/pa-hpux.opt: Same.
* config/pa/pa-hpux1010.opt: Same.
* config/pa/pa-hpux1111.opt: Same.
* config/pa/pa-hpux1131.opt: Same.
* config/pa/pa.opt: Same.
* config/pa/pa64-hpux.opt: Same.
* config/pdp11/pdp11.opt: Same.
* config/rl78/rl78.opt: Same.
* config/rs6000/476.opt: Same.
* config/rs6000/aix64.opt: Same.
* config/rs6000/darwin.opt: Same.
* config/rs6000/linux64.opt: Same.
* config/rs6000/rs6000.opt: Same.
* config/rs6000/sysv4.opt: Same.
* config/s390/s390.opt: Same.
* config/s390/tpf.opt: Same.
* config/sh/sh.opt: Same.
* config/sol2.opt: Same.
* config/sparc/long-double-switch.opt: Same.
* config/sparc/sparc.opt: Same.
* config/spu/spu.opt: Same.
* config/stormy16/stormy16.opt: Same.
* config/tilegx/tilegx.opt: Same.
* config/tilepro/tilepro.opt: Same.
* config/v850/v850.opt: Same.
* config/vax/vax.opt: Same.
* config/visium/visium.opt: Same.
* config/vms/vms.opt: Same.
* config/vxworks.opt: Same.
* config/xtensa/xtensa.opt: Same.
* fortran/lang.opt: Same.
testsuite/
PR driver/68043
* gcc.misc-tests/help.exp: Adjust.
* lib/options.exp (check_for_options): Add detail to output.
From-SVN: r229155
2015-10-21 16:24:41 -06:00
9ce29eb05d
AMD znver1 enablement.
...
2015-10-06 Venkataramanan Kumar <Venkataramanan.kumar@amd.com>
AMD znver1 enablement.
* config.gcc (i[34567]86-*-linux* | ...): Add znver1.
(case ${target}): Add znver1.
* config/i386/cpuid.h(bit_CLZERO): Define.
* config/i386/driver-i386.c: (host_detect_local_cpu): Let
-march=native recognize znver1 processors.
* config/i386/i386-c.c (ix86_target_macros_internal): Add
znver1, clzero def_and_undef.
* config/i386/i386.c (struct processor_costs znver1_cost): New.
(m_znver1): New definition.
(m_AMD_MULTIPLE): Includes m_znver1.
(processor_target_table): Add znver1 entry.
(ix86_target_string) : Add clzero entry.
(static const char *const cpu_names): Add znver1 entry.
(ix86_option_override_internal): Add znver1 instruction sets.
(PTA_CLZERO) : New definition.
(ix86_option_override_internal): Handle new clzerooption.
(ix86_issue_rate): Add znver1.
(ix86_adjust_cost): Add znver1.
(ia32_multipass_dfa_lookahead): Add znver1.
(has_dispatch): Add znver1.
* config/i386/i386.h (TARGET_znver1): New definition.
(TARGET_CLZERO): Define.
(TARGET_CLZERO_P): Define.
(struct ix86_size_cost): Add TARGET_ZNVER1.
(enum processor_type): Add PROCESSOR_znver1.
* config/i386/i386.md (define_attr "cpu"): Add znver1.
(set_attr znver1_decode): New definitions for znver1.
* config/i386/i386.opt (flag_dispatch_scheduler): Add znver1.
(mclzero): New.
* config/i386/mmx.md (set_attr znver1_decode): New definitions
for znver1.
* config/i386/sse.md (set_attr znver1_decode): Likewise.
* config/i386/x86-tune.def: Add znver1 tunings.
* config/i386/znver1.md: Introduce znver1 cpu and include new md file.
* gcc/doc/invoke.texi: Add details about znver1
From-SVN: r228520
2015-10-06 12:48:41 +00:00
006ba5047c
re PR target/65105 ([i386] XMM registers are not used for 64bit computations on 32bit target)
...
gcc/
PR target/65105
* config/i386/i386.c: Include dbgcnt.h.
(has_non_address_hard_reg): New.
(convertible_comparison_p): New.
(scalar_to_vector_candidate_p): New.
(remove_non_convertible_regs): New.
(scalar_chain): New.
(scalar_chain::scalar_chain): New.
(scalar_chain::~scalar_chain): New.
(scalar_chain::add_to_queue): New.
(scalar_chain::mark_dual_mode_def): New.
(scalar_chain::analyze_register_chain): New.
(scalar_chain::add_insn): New.
(scalar_chain::build): New.
(scalar_chain::compute_convert_gain): New.
(scalar_chain::replace_with_subreg): New.
(scalar_chain::replace_with_subreg_in_insn): New.
(scalar_chain::emit_conversion_insns): New.
(scalar_chain::make_vector_copies): New.
(scalar_chain::convert_reg): New.
(scalar_chain::convert_op): New.
(scalar_chain::convert_insn): New.
(scalar_chain::convert): New.
(convert_scalars_to_vector): New.
(pass_data_stv): New.
(pass_stv): New.
(make_pass_stv): New.
(ix86_option_override): Created and register stv pass.
(flag_opts): Add -mstv.
(ix86_option_override_internal): Likewise.
* config/i386/i386.md (SWIM1248x): New.
(*movdi_internal): Add xmm to mem alternative for TARGET_STV.
(and<mode>3): Use SWIM1248x iterator instead of SWIM.
(*anddi3_doubleword): New.
(*zext<mode>_doubleword): New.
(*zextsi_doubleword): New.
(<code><mode>3): Use SWIM1248x iterator instead of SWIM.
(*<code>di3_doubleword): New.
* config/i386/i386.opt (mstv): New.
* dbgcnt.def (stv_conversion): New.
gcc/testsuite/
PR target/65105
* gcc.target/i386/pr65105-1.c: New.
* gcc.target/i386/pr65105-2.c: New.
* gcc.target/i386/pr65105-3.c: New.
* gcc.target/i386/pr65105-4.C: New.
* gcc.dg/lower-subreg-1.c: Add -mno-stv options for ia32.
From-SVN: r228231
2015-09-29 09:32:40 +00:00
d90639476f
IA MCU psABI support: GCC changes
...
This patch introduces basic IA MCU psABI support into GCC.
* configure.ac (ospace_frag): Enable for i?86*-*-elfiamcu
target.
* configure: Regenerate.
gcc/
* config.gcc: Support i[34567]86-*-elfiamcu target.
* config/i386/iamcu.h: New.
* config/i386/i386.opt: Add -miamcu.
* doc/invoke.texi: Document -miamcu.
* common/config/i386/i386-common.c (ix86_handle_option): Turn
off x87/MMX/SSE/AVX codegen for -miamcu.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__iamcu/__iamcu__ for -miamcu.
* config/i386/i386.h (PREFERRED_STACK_BOUNDARY_DEFAULT): Set
to MIN_STACK_BOUNDARY if TARGET_IAMCU is true.
(BIGGEST_ALIGNMENT): Set to 32 if TARGET_IAMCU is true.
* config/i386/i386.c (ix86_option_override_internal): Ignore and
warn -mregparm for Intel MCU. Turn on -mregparm=3 for Intel
MCU by default. Default long double to 64-bit for Intel MCU.
Turn on -freg-struct-return for Intel MCU. Issue an error when
-miamcu is used in 64-bit or x32 mode or if x87, MMX, SSE or
AVX is turned on.
(function_arg_advance_32): Pass value whose size is no larger
than 8 bytes in registers for Intel MCU.
(function_arg_32): Likewise.
(ix86_return_in_memory): Return value whose size is no larger
than 8 bytes in registers for Intel MCU.
(iamcu_alignment): New function.
(ix86_data_alignment): Call iamcu_alignment if TARGET_IAMCU is
true.
(ix86_local_alignment): Don't increase alignment for Intel MCU.
(x86_field_alignment): Return iamcu_alignment if TARGET_IAMCU is
true.
From-SVN: r225197
2015-06-30 09:40:19 -07:00
500a08b263
gcc/
...
2015-06-12 Venkataramanan Kumar <venkataramanan.kumar@amd.com>
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_MWAITX_SET): New.
(ix86_handle_option): Handle mwaitx.
* config.gcc (i[34567]86-*-*): Add mwaitxintrin.h,
(x86_64-*-*): Likewise.
* config/i386/mwaitxintrin.h: New header.
* config/i386/cpuid.h (bit_MWAITX): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
MWAITX support.
* config/i386/i386.opt (mwaitx): New.
* config/i386/i386-builtin-types.def
(VOID_FTYPE_UNSIGNED_ UNSIGNED_UNSIGNED): New function type.
* config/i386/i386-c.c: Define __MWAITX__ if needed.
* config/i386/i386.c (ix86_target_string): Define -mmwaitx option.
(PTA_MWAITX): New.
(ix86_option_override_internal): Handle new option.
(processor_alias_table): Added PTA_MWAITX.
(ix86_valid_target_attribute_inner_p): Add OPT_mmwaitx.
(ix86_builtins): Add IX86_BUILTIN_MWAITX, IX86_BUILTIN_MONITORX.
(ix86_expand_builtin): Handle IX86_BUILTIN_MWAITX and
IX86_BUILTIN_MONITORX built-ins.
* config/i386/i386.h (TARGET_MWAITX): New.
* config/i386/i386.md (unspecv): Add UNSPEC_MWAITX and
UNSPEC_MONITORX.
(mwaitx): New pattern.
(monitorx_<mode>): New pattern.
* config/i386/x86intrin.h: Include mwaitxintrin.h.
* doc/extend.texi: Document monitorx and mwaitx builtins.
* doc/invoke.texi: Document -mmwaitx option.
gcc/testsuite
2015-06-12 Venkataramanan Kumar <venkataramanan.kumar@amd.com>
* gcc.target/i386/monitorx.c: New.
* gcc.target/i386/sse-12.c: Add -mmwaitx.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r224414
2015-06-12 10:02:25 +00:00
d0d7b0b383
i386.opt (prefetch_sse): New targetsave.
...
* i386.opt (prefetch_sse): New targetsave.
* i386.c (ix86_function_specific_save): Save prefetch_sse.
(ix86_function_specific_restore): Restore prefetch_sse and initialize
ix86_cost/ix86_tune_cost.
From-SVN: r220077
2015-01-24 06:26:46 +00:00
5624e564d2
Update copyright years.
...
From-SVN: r219188
2015-01-05 13:33:28 +01:00
fbe575b652
X86-64: Add -mskip-rax-setup
...
The Linux kernel never passes floating point arguments around, vararg
functions or not. Hence no vector registers are ever used when calling a
vararg function. But gcc still dutifully emits an "xor %eax,%eax" before
each and every call of a vararg function. Since no callee use that for
anything, these instructions are redundant.
This patch adds the -mskip-rax-setup option to skip setting up RAX
register when SSE is disabled and there are no variable arguments passed
in vector registers. Since RAX register is used to avoid unnecessarily
saving vector registers on stack when passing variable arguments, the
impacts of this option are callees may waste some stack space, misbehave
or jump to a random location. GCC 4.4 or newer don't those issues,
regardless the RAX register value since they don't check the RAX register
value when SSE is disabled.
gcc/
* config/i386/i386.c (ix86_expand_call): Skip setting up RAX
register for -mskip-rax-setup when there are no parameters
passed in vector registers.
* config/i386/i386.opt (mskip-rax-setup): New option.
* doc/invoke.texi: Document -mskip-rax-setup.
gcc/testsuite/
* gcc.target/i386/amd64-abi-7.c: New tests.
* gcc.target/i386/amd64-abi-8.c: Likwise.
* gcc.target/i386/amd64-abi-9.c: Likwise.
From-SVN: r218870
2014-12-18 09:35:45 -08:00
239711f6af
Add -malign-data={abi|compat|cachineline}
...
Add -malign-data={abi|compat,cachineline} to control how GCC aligns
variables. "compat" uses increased alignment value compatible with
GCC 4.8 and earlier, "abi" uses alignment value as specified by the
psABI, and "cacheline" uses increased alignment value to match the
cache line size. "compat" is the default.
gcc/
PR target/61296
* config/i386/i386-opts.h (ix86_align_data): New enum.
* config/i386/i386.c (ix86_data_alignment): Return the ABI
alignment value for -malign-data=abi, the cachine line size
for -malign-data=cachineline and the older GCC compatible
alignment value for for -malign-data=compat.
* config/i386/i386.opt (malign-data=): New.
* doc/invoke.texi: Document -malign-data=.
gcc/testsuite/
PR target/61296
* gcc.target/i386/pr61296-2.c: New.
* gcc.target/i386/pr61296-2.c: Likewise.
* gcc.target/i386/pr61296-3.c: Likewise.
* gcc.target/i386/pr61296-4.c: Likewise.
* gcc.target/i386/pr61296-5.c: Likewise.
* gcc.target/i386/pr61296-6.c: Likewise.
* gcc.target/i386/pr61296-7.c: Likewise.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>
From-SVN: r218818
2014-12-17 06:22:57 -08:00
36e9b73ea9
Add x86 pcommit instruction.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET,
OPTION_MASK_ISA_PCOMMIT_SET): New.
(ix86_handle_option): Handle OPT_mpcommit.
* config.gcc: Add pcommitintrin.h
* config/i386/pcommitintrin.h: New file.
* config/i386/cpuid.h (bit_PCOMMIT): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect pcommit.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__PCOMMIT__.
* config/i386/i386.c (ix86_target_string): Add -mpcommit.
(PTA_PCOMMIT): Define.
(ix86_option_override_internal): Handle new option.
(ix86_valid_target_attribute_inner_p): Add pcommit.
(ix86_builtins): Add IX86_BUILTIN_PCOMMIT.
(bdesc_special_args): Add __builtin_ia32_pcommit.
* config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Define.
* config/i386/i386.md (unspecv): Add UNSPECV_PCOMMIT.
(pcommit): New instruction.
* config/i386/i386.opt: Add mpcommit.
* config/i386/x86intrin.h: Include pcommitintrin.h.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mpcommit.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/pcommit-1.c: New test.
* gcc.target/i386/sse-12.c: Add new options.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
From-SVN: r217935
2014-11-21 19:04:20 +03:00
9c3bca1143
Support clwb x86 instruction.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_CLWB_UNSET,
OPTION_MASK_ISA_CLWB_SET): New.
(ix86_handle_option): Handle OPT_mclwb.
* config.gcc: Add clwbintrin.h.
* config/i386/clwbintrin.h: New file.
* config/i386/cpuid.h (bit_CLWB): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect clwb.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__CLWB__.
* config/i386/i386.c (ix86_target_string): Add -mclwb.
(PTA_CLWB): Define.
(ix86_option_override_internal): Handle new option.
(ix86_valid_target_attribute_inner_p): Add clwb.
(ix86_builtins): Add IX86_BUILTIN_CLWB.
(ix86_init_mmx_sse_builtins): Add __builtin_ia32_clwb.
(ix86_expand_builtin): Handle IX86_BUILTIN_CLWB.
* config/i386/i386.h (TARGET_CLWB, TARGET_CLWB_P): Define.
* config/i386/i386.md (unspecv): Add UNSPECV_CLWB.
(clwb): New instruction.
* config/i386/i386.opt: Add mclwb.
* config/i386/x86intrin.h: Include clwbintrin.h.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mclwb.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/clwb-1.c: New test.
* gcc.target/i386/sse-12.c: Add new options.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
From-SVN: r217933
2014-11-21 18:52:49 +03:00
3dcc8af5cd
Add avx512vbmi instructions.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI_SET
OPTION_MASK_ISA_AVX512VBMI_UNSET): New.
(ix86_handle_option): Handle OPT_mavx512vbmi.
* config.gcc: Add avx512vbmiintrin.h, avx512vbmivlintrin.h.
* config/i386/avx512vbmiintrin.h: New file.
* config/i386/avx512vbmivlintrin.h: Ditto.
* config/i386/cpuid.h (bit_AVX512VBMI): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512vbmi.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512VBMI__.
* config/i386/i386.c (ix86_target_string): Add -mavx512vbmi.
(PTA_AVX512VBMI): Define.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add avx512vbmi,
(ix86_builtins): Add IX86_BUILTIN_VPMULTISHIFTQB512,
IX86_BUILTIN_VPMULTISHIFTQB256, IX86_BUILTIN_VPMULTISHIFTQB128,
IX86_BUILTIN_VPERMVARQI512_MASK, IX86_BUILTIN_VPERMT2VARQI512,
IX86_BUILTIN_VPERMT2VARQI512_MASKZ, IX86_BUILTIN_VPERMI2VARQI512,
IX86_BUILTIN_VPERMVARQI256_MASK, IX86_BUILTIN_VPERMVARQI128_MASK,
IX86_BUILTIN_VPERMT2VARQI256, IX86_BUILTIN_VPERMT2VARQI256_MASKZ,
IX86_BUILTIN_VPERMT2VARQI128, IX86_BUILTIN_VPERMI2VARQI256,
IX86_BUILTIN_VPERMI2VARQI128.
(bdesc_special_args): Add __builtin_ia32_vpmultishiftqb512_mask,
__builtin_ia32_vpmultishiftqb256_mask,
__builtin_ia32_vpmultishiftqb128_mask,
__builtin_ia32_permvarqi512_mask, __builtin_ia32_vpermt2varqi512_mask,
__builtin_ia32_vpermt2varqi512_maskz,
__builtin_ia32_vpermi2varqi512_mask, __builtin_ia32_permvarqi256_mask,
__builtin_ia32_permvarqi128_mask, __builtin_ia32_vpermt2varqi256_mask,
__builtin_ia32_vpermt2varqi256_maskz,
__builtin_ia32_vpermt2varqi128_mask,
__builtin_ia32_vpermt2varqi128_maskz,
__builtin_ia32_vpermi2varqi256_mask,
__builtin_ia32_vpermi2varqi128_mask.
(ix86_hard_regno_mode_ok): Allow big masks for AVX512VBMI.
* config/i386/i386.h (TARGET_AVX512VBMI, TARGET_AVX512VBMI_P): Define.
* config/i386/i386.opt: Add mavx512vbmi.
* config/i386/immintrin.h: Include avx512vbmiintrin.h,
avx512vbmivlintrin.h.
* config/i386/sse.md (unspec): Add UNSPEC_VPMULTISHIFT.
(VI1_AVX512VL): New iterator.
(<avx512>_permvar<mode><mask_name>): Use it.
(<avx512>_vpermi2var<mode>3_maskz): Ditto.
(<avx512>_vpermi2var<mode>3<sd_maskz_name>): Ditto.
(<avx512>_vpermi2var<mode>3_mask): Ditto.
(<avx512>_vpermt2var<mode>3_maskz): Ditto.
(<avx512>_vpermt2var<mode>3<sd_maskz_name>): Ditto.
(<avx512>_vpermt2var<mode>3_mask): Ditto.
(vpmultishiftqb<mode><mask_name>): Ditto.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mavx512vbmi.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/avx512f-helper.h: Add avx512vbmi-check.h.
* gcc.target/i386/avx512vbmi-check.h: Ditto.
* gcc.target/i386/avx512vbmi-vpermb-1.c: Ditto.
* gcc.target/i386/avx512vbmi-vpermb-2.c: Ditto.
* gcc.target/i386/avx512vbmi-vpermi2b-1.c: Ditto.
* gcc.target/i386/avx512vbmi-vpermi2b-2.c: Ditto.
* gcc.target/i386/avx512vbmi-vpermt2b-1.c: Ditto.
* gcc.target/i386/avx512vbmi-vpermt2b-2.c: Ditto.
* gcc.target/i386/avx512vbmi-vpmultishiftqb-1.c: Ditto.
* gcc.target/i386/avx512vbmi-vpmultishiftqb-2.c: Ditto.
* gcc.target/i386/avx512vl-vpermb-2.c: Ditto.
* gcc.target/i386/avx512vl-vpermi2b-2.c: Ditto.
* gcc.target/i386/avx512vl-vpermt2b-2.c: Ditto.
* gcc.target/i386/avx512vl-vpmaddhuq-2.c: Ditto.
* gcc.target/i386/avx512vl-vpmaddluq-2.c: Ditto.
* gcc.target/i386/avx512vl-vpmultishiftqb-2.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_avx512vbmi): New.
* gcc.target/i386/sse-12.c: Add new options.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
From-SVN: r217932
2014-11-21 18:44:37 +03:00
4190ea3804
Add avx512ifma instructions.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512IFMA_SET,
OPTION_MASK_ISA_AVX512IFMA_UNSET): New.
(ix86_handle_option): Handle OPT_mavx512ifma.
* config.gcc: Add avx512ifmaintrin.h, avx512ifmavlintrin.h.
* config/i386/avx512ifmaintrin.h: New file.
* config/i386/avx512ifmaivlntrin.h: Ditto.
* config/i386/cpuid.h (bit_AVX512IFMA): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
avx512ifma.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__AVX512IFMA__.
* config/i386/i386.c (ix86_target_string): Add -mavx512ifma.
(PTA_AVX512IFMA): Define.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Add avx512ifma.
(ix86_builtins): Add IX86_BUILTIN_VPMADD52LUQ512,
IX86_BUILTIN_VPMADD52HUQ512, IX86_BUILTIN_VPMADD52LUQ256,
IX86_BUILTIN_VPMADD52HUQ256, IX86_BUILTIN_VPMADD52LUQ128,
IX86_BUILTIN_VPMADD52HUQ128, IX86_BUILTIN_VPMADD52LUQ512_MASKZ,
IX86_BUILTIN_VPMADD52HUQ512_MASKZ, IX86_BUILTIN_VPMADD52LUQ256_MASKZ,
IX86_BUILTIN_VPMADD52HUQ256_MASKZ, IX86_BUILTIN_VPMADD52LUQ128_MASKZ,
IX86_BUILTIN_VPMADD52HUQ128_MASKZ.
(bdesc_special_args): Add __builtin_ia32_vpmadd52luq512_mask,
__builtin_ia32_vpmadd52luq512_maskz,
__builtin_ia32_vpmadd52huq512_mask,
__builtin_ia32_vpmadd52huq512_maskx,
__builtin_ia32_vpmadd52luq256_mask,
__builtin_ia32_vpmadd52luq256_maskz,
__builtin_ia32_vpmadd52huq256_mask,
__builtin_ia32_vpmadd52huq256_maskz,
__builtin_ia32_vpmadd52luq128_mask,
__builtin_ia32_vpmadd52luq128_maskz,
__builtin_ia32_vpmadd52huq128_mask,
__builtin_ia32_vpmadd52huq128_maskz,
* config/i386/i386.h (TARGET_AVX512IFMA, TARGET_AVX512IFMA_P): Define.
* config/i386/i386.opt: Add mavx512ifma.
* config/i386/immintrin.h: Include avx512ifmaintrin.h,
avx512ifmavlintrin.h.
* config/i386/sse.md (unspec): Add UNSPEC_VPMADD52LUQ,
UNSPEC_VPMADD52HUQ.
(VPMADD52): New iterator.
(vpmadd52type): New attribute.
(vpamdd52huq<mode>_maskz): New.
(vpamdd52luq<mode>_maskz): Ditto.
(vpamdd52<vpmadd52type><mode><sd_maskz_name>): Ditto.
(vpamdd52<vpmadd52type><mode>_mask): Ditto.
gcc/testsuite/
* g++.dg/other/i386-2.C: Add -mavx512ifma.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/avx512f-helper.h: Add avx512ifma-check.h.
* gcc.target/i386/avx512ifma-check.h: New.
* gcc.target/i386/avx512ifma-vpmaddhuq-1.c: Ditto.
* gcc.target/i386/avx512ifma-vpmaddhuq-2.c: Ditto.
* gcc.target/i386/avx512ifma-vpmaddluq-1.c: Ditto.
* gcc.target/i386/avx512ifma-vpmaddluq-2.c: Ditto.
* gcc.target/i386/avx512vl-vpmaddhuq-2.c: Ditto.
* gcc.target/i386/avx512vl-vpmaddluq-2.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_avx512ifma): New.
* gcc.target/i386/sse-12.c: Add new options.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
2014-11-21 Georg-Johann Lay <avr@gjlay.de>
From-SVN: r217928
2014-11-21 18:28:24 +03:00
d5e254e19c
ipa-chkp.c: New.
...
gcc/
2014-11-05 Ilya Enkovich <ilya.enkovich@intel.com>
* ipa-chkp.c: New.
* ipa-chkp.h: New.
* tree-chkp.c: New.
* tree-chkp.h: New.
* tree-chkp-opt.c: New.
* rtl-chkp.c: New.
* rtl-chkp.h: New.
* Makefile.in (OBJS): Add ipa-chkp.o, rtl-chkp.o, tree-chkp.o
tree-chkp-opt.o.
(GTFILES): Add tree-chkp.c.
* mode-classes.def (MODE_POINTER_BOUNDS): New.
* tree.def (POINTER_BOUNDS_TYPE): New.
* genmodes.c (complete_mode): Support MODE_POINTER_BOUNDS.
(POINTER_BOUNDS_MODE): New.
(make_pointer_bounds_mode): New.
* machmode.h (POINTER_BOUNDS_MODE_P): New.
* stor-layout.c (int_mode_for_mode): Support MODE_POINTER_BOUNDS.
(layout_type): Support POINTER_BOUNDS_TYPE.
* tree-pretty-print.c (dump_generic_node): Support POINTER_BOUNDS_TYPE.
* tree-core.h (tree_index): Add TI_POINTER_BOUNDS_TYPE.
* tree.c (build_int_cst_wide): Support POINTER_BOUNDS_TYPE.
(type_contains_placeholder_1): Likewise.
(build_common_tree_nodes): Initialize
pointer_bounds_type_node.
* tree.h (POINTER_BOUNDS_TYPE_P): New.
(pointer_bounds_type_node): New.
(POINTER_BOUNDS_P): New.
(BOUNDED_TYPE_P): New.
(BOUNDED_P): New.
(CALL_WITH_BOUNDS_P): New.
* gimple.h (gf_mask): Add GF_CALL_WITH_BOUNDS.
(gimple_call_with_bounds_p): New.
(gimple_call_set_with_bounds): New.
(gimple_return_retbnd): New.
(gimple_return_set_retbnd): New
* gimple.c (gimple_build_return): Increase number of ops
for return statement.
(gimple_build_call_from_tree): Propagate CALL_WITH_BOUNDS_P
flag.
* gimple-pretty-print.c (dump_gimple_return): Print second op.
* rtl.h (CALL_EXPR_WITH_BOUNDS_P): New.
* gimplify.c (gimplify_init_constructor): Avoid infinite
loop during gimplification of bounds initializer.
* calls.c: Include tree-chkp.h, rtl-chkp.h, bitmap.h.
(special_function_p): Use original decl name when analyzing
instrumentation clone.
(arg_data): Add fields special_slot, pointer_arg and
pointer_offset.
(store_bounds): New.
(emit_call_1): Propagate instrumentation flag for CALL.
(initialize_argument_information): Compute pointer_arg,
pointer_offset and special_slot for pointer bounds arguments.
(finalize_must_preallocate): Preallocate when storing bounds
in bounds table.
(compute_argument_addresses): Skip pointer bounds.
(expand_call): Store bounds into tables separately. Return
result joined with resulting bounds.
* cfgexpand.c: Include tree-chkp.h, rtl-chkp.h.
(expand_call_stmt): Propagate bounds flag for CALL_EXPR.
(expand_return): Add returned bounds arg. Handle returned bounds.
(expand_gimple_stmt_1): Adjust to new expand_return signature.
(gimple_expand_cfg): Reset rtx bounds map.
* expr.c: Include tree-chkp.h, rtl-chkp.h.
(expand_assignment): Handle returned bounds.
(store_expr_with_bounds): New. Replaces store_expr with new bounds
target argument. Handle bounds returned by calls.
(store_expr): Now wraps store_expr_with_bounds.
* expr.h (store_expr_with_bounds): New.
* function.c: Include tree-chkp.h, rtl-chkp.h.
(bounds_parm_data): New.
(use_register_for_decl): Do not registerize decls used for bounds
stores and loads.
(assign_parms_augmented_arg_list): Add bounds of the result
structure pointer as the second argument.
(assign_parm_find_entry_rtl): Mark bounds are never passed on
the stack.
(assign_parm_is_stack_parm): Likewise.
(assign_parm_load_bounds): New.
(assign_bounds): New.
(assign_parms): Load bounds and determine a location for
returned bounds.
(diddle_return_value_1): New.
(diddle_return_value): Handle returned bounds.
* function.h (rtl_data): Add field for returned bounds.
* varasm.c: Include tree-chkp.h.
(output_constant): Support POINTER_BOUNDS_TYPE.
(output_constant_pool_2): Support MODE_POINTER_BOUNDS.
(ultimate_transparent_alias_target): Move up.
(make_decl_rtl): For instrumented function use
name of the original decl.
(assemble_start_function): Mark function as global
in case it is instrumentation clone of the global
function.
(do_assemble_alias): Follow transparent alias chain
for identifier. Check if original alias is public.
(maybe_assemble_visibility): Use visibility of the
original function for instrumented version.
(default_unique_section): Likewise.
* emit-rtl.c (immed_double_const): Support MODE_POINTER_BOUNDS.
(init_emit_once): Build pointer bounds zero constants.
* explow.c (trunc_int_for_mode): Support MODE_POINTER_BOUNDS.
* target.def (builtin_chkp_function): New.
(chkp_bound_type): New.
(chkp_bound_mode): New.
(chkp_make_bounds_constant): New.
(chkp_initialize_bounds): New.
(load_bounds_for_arg): New.
(store_bounds_for_arg): New.
(load_returned_bounds): New.
(store_returned_bounds): New.
(chkp_function_value_bounds): New.
(setup_incoming_vararg_bounds): New.
(function_arg): Update hook description with new possible return
value CONST_INT.
* targhooks.h (default_load_bounds_for_arg): New.
(default_store_bounds_for_arg): New.
(default_load_returned_bounds): New.
(default_store_returned_bounds): New.
(default_chkp_bound_type): New.
(default_chkp_bound_mode): New.
(default_builtin_chkp_function): New.
(default_chkp_function_value_bounds): New.
(default_chkp_make_bounds_constant): New.
(default_chkp_initialize_bounds): New.
(default_setup_incoming_vararg_bounds): New.
* targhooks.c (default_load_bounds_for_arg): New.
(default_store_bounds_for_arg): New.
(default_load_returned_bounds): New.
(default_store_returned_bounds): New.
(default_chkp_bound_type): New.
(default_chkp_bound_mode); New.
(default_builtin_chkp_function): New.
(default_chkp_function_value_bounds): New.
(default_chkp_make_bounds_constant): New.
(default_chkp_initialize_bounds): New.
(default_setup_incoming_vararg_bounds): New.
* builtin-types.def (BT_BND): New.
(BT_FN_PTR_CONST_PTR): New.
(BT_FN_CONST_PTR_CONST_PTR): New.
(BT_FN_BND_CONST_PTR): New.
(BT_FN_CONST_PTR_BND): New.
(BT_FN_PTR_CONST_PTR_SIZE): New.
(BT_FN_PTR_CONST_PTR_CONST_PTR): New.
(BT_FN_VOID_PTRPTR_CONST_PTR): New.
(BT_FN_VOID_CONST_PTR_SIZE): New.
(BT_FN_VOID_PTR_BND): New.
(BT_FN_CONST_PTR_CONST_PTR_CONST_PTR): New.
(BT_FN_BND_CONST_PTR_SIZE): New.
(BT_FN_PTR_CONST_PTR_CONST_PTR_SIZE): New.
(BT_FN_VOID_CONST_PTR_BND_CONST_PTR): New.
* chkp-builtins.def: New.
* builtins.def: include chkp-builtins.def.
(DEF_CHKP_BUILTIN): New.
* builtins.c: Include tree-chkp.h and rtl-chkp.h.
(expand_builtin): Support BUILT_IN_CHKP_INIT_PTR_BOUNDS,
BUILT_IN_CHKP_NULL_PTR_BOUNDS, BUILT_IN_CHKP_COPY_PTR_BOUNDS,
BUILT_IN_CHKP_CHECK_PTR_LBOUNDS, BUILT_IN_CHKP_CHECK_PTR_UBOUNDS,
BUILT_IN_CHKP_CHECK_PTR_BOUNDS, BUILT_IN_CHKP_SET_PTR_BOUNDS,
BUILT_IN_CHKP_NARROW_PTR_BOUNDS, BUILT_IN_CHKP_STORE_PTR_BOUNDS,
BUILT_IN_CHKP_GET_PTR_LBOUND, BUILT_IN_CHKP_GET_PTR_UBOUND,
BUILT_IN_CHKP_BNDMK, BUILT_IN_CHKP_BNDSTX, BUILT_IN_CHKP_BNDCL,
BUILT_IN_CHKP_BNDCU, BUILT_IN_CHKP_BNDLDX, BUILT_IN_CHKP_BNDRET,
BUILT_IN_CHKP_INTERSECT, BUILT_IN_CHKP_NARROW,
BUILT_IN_CHKP_EXTRACT_LOWER, BUILT_IN_CHKP_EXTRACT_UPPER.
(std_expand_builtin_va_start): Init bounds for va_list.
* cppbuiltin.c (define_builtin_macros_for_compilation_flags): Add
__CHKP__ macro when Pointer Bounds Checker is on.
* params.def (PARAM_CHKP_MAX_CTOR_SIZE): New.
* passes.def (pass_ipa_chkp_versioning): New.
(pass_early_local_passes): Renamed to pass_build_ssa_passes.
(pass_fixup_cfg): Moved to pass_chkp_instrumentation_passes.
(pass_chkp_instrumentation_passes): New.
(pass_ipa_chkp_produce_thunks): New.
(pass_local_optimization_passes): New.
(pass_chkp_opt): New.
* tree-pass.h (make_pass_ipa_chkp_versioning): New.
(make_pass_ipa_chkp_produce_thunks): New.
(make_pass_chkp): New.
(make_pass_chkp_opt): New.
(make_pass_early_local_passes): Renamed to ...
(make_pass_build_ssa_passes): This.
(make_pass_chkp_instrumentation_passes): New.
(make_pass_local_optimization_passes): New.
* passes.c (pass_manager::execute_early_local_passes): Execute
early passes in three steps.
(execute_all_early_local_passes): Renamed to ...
(execute_build_ssa_passes): This.
(pass_data_early_local_passes): Renamed to ...
(pass_data_build_ssa_passes): This.
(pass_early_local_passes): Renamed to ...
(pass_build_ssa_passes): This.
(pass_data_chkp_instrumentation_passes): New.
(pass_chkp_instrumentation_passes): New.
(pass_data_local_optimization_passes): New.
(pass_local_optimization_passes): New.
(make_pass_early_local_passes): Renamed to ...
(make_pass_build_ssa_passes): This.
(make_pass_chkp_instrumentation_passes): New.
(make_pass_local_optimization_passes): New.
* c-family/c.opt (fcheck-pointer-bounds): New.
(fchkp-check-incomplete-type): New.
(fchkp-zero-input-bounds-for-main): New.
(fchkp-first-field-has-own-bounds): New.
(fchkp-narrow-bounds): New.
(fchkp-narrow-to-innermost-array): New.
(fchkp-optimize): New.
(fchkp-use-fast-string-functions): New.
(fchkp-use-nochk-string-functions): New.
(fchkp-use-static-bounds): New.
(fchkp-use-static-const-bounds): New.
(fchkp-treat-zero-dynamic-size-as-infinite): New.
(fchkp-check-read): New.
(fchkp-check-write): New.
(fchkp-store-bounds): New.
(fchkp-instrument-calls): New.
(fchkp-instrument-marked-only): New.
(Wchkp): New.
* c-family/c-common.c (handle_bnd_variable_size_attribute): New.
(handle_bnd_legacy): New.
(handle_bnd_instrument): New.
(c_common_attribute_table): Add bnd_variable_size, bnd_legacy
and bnd_instrument. Fix documentation.
(c_common_format_attribute_table): Likewsie.
* toplev.c: include tree-chkp.h.
(process_options): Check Pointer Bounds Checker is supported.
(compile_file): Add chkp_finish_file call.
* ipa-cp.c (initialize_node_lattices): Use cgraph_local_p
to handle instrumentation clones properly.
(propagate_constants_accross_call): Do not propagate
through instrumentation thunks.
* ipa-pure-const.c (propagate_pure_const): Support
IPA_REF_CHKP.
* ipa-inline.c (early_inliner): Check edge has summary allocated.
* ipa-split.c: Include tree-chkp.h.
(find_retbnd): New.
(split_part_set_ssa_name_p): New.
(consider_split): Do not split retbnd and retval
producers.
(insert_bndret_call_after): new.
(split_function): Propagate Pointer Bounds Checker
instrumentation marks and handle returned bounds.
* tree-ssa-sccvn.h (vn_reference_op_struct): Transform opcode
into bit field and add with_bounds field.
* tree-ssa-sccvn.c (copy_reference_ops_from_call): Set
with_bounds field for instrumented calls.
* tree-ssa-pre.c (create_component_ref_by_pieces_1): Restore
CALL_WITH_BOUNDS_P flag for calls.
* tree-ssa-ccp.c: Include tree-chkp.h.
(insert_clobber_before_stack_restore): Handle
BUILT_IN_CHKP_BNDRET calls.
* tree-ssa-dce.c: Include tree-chkp.h.
(propagate_necessity): For free call fed by alloc check
bounds are also provided by the same alloc.
(eliminate_unnecessary_stmts): Handle BUILT_IN_CHKP_BNDRET
used by free calls.
* tree-inline.c: Include tree-chkp.h.
(declare_return_variable): Add arg holding
returned bounds slot. Create and initialize returned bounds var.
(remap_gimple_stmt): Handle returned bounds.
Return sequence of statements instead of a single statement.
(insert_init_stmt): Add declaration.
(remap_gimple_seq): Adjust to new remap_gimple_stmt signature.
(copy_bb): Adjust to changed return type of remap_gimple_stmt.
Properly handle bounds in va_arg_pack and va_arg_pack_len.
(expand_call_inline): Handle returned bounds. Add bounds copy
for generated mem to mem assignments.
* tree-inline.h (copy_body_data): Add fields retbnd and
assign_stmts.
* value-prof.c: Include tree-chkp.h.
(gimple_ic): Support returned bounds.
* ipa.c (cgraph_build_static_cdtor_1): Support contructors
with "chkp ctor" and "bnd_legacy" attributes.
(symtab_remove_unreachable_nodes): Keep initial values for
pointer bounds to be used for checks eliminations.
(process_references): Handle IPA_REF_CHKP.
(walk_polymorphic_call_targets): Likewise.
* ipa-visibility.c (cgraph_externally_visible_p): Mark
instrumented 'main' as externally visible.
(function_and_variable_visibility): Filter instrumentation
thunks.
* cgraph.h (cgraph_thunk_info): Add add_pointer_bounds_args
field.
(cgraph_node): Add instrumented_version, orig_decl and
instrumentation_clone fields.
(symtab_node::get_alias_target): Allow IPA_REF_CHKP reference.
(varpool_node): Add need_bounds_init field.
(cgraph_local_p): New.
* cgraph.c: Include tree-chkp.h.
(cgraph_node::remove): Fix instrumented_version
of the referenced node if any.
(cgraph_node::dump): Dump instrumentation_clone and
instrumented_version fields.
(cgraph_node::verify_node): Check correctness of IPA_REF_CHKP
references and instrumentation thunks.
(cgraph_can_remove_if_no_direct_calls_and_refs_p): Keep
all not instrumented instrumentation clones alive.
(cgraph_redirect_edge_call_stmt_to_callee): Support
returned bounds.
* cgraphbuild.c (rebuild_cgraph_edges): Rebuild IPA_REF_CHKP
reference.
(cgraph_rebuild_references): Likewise.
* cgraphunit.c: Include tree-chkp.h.
(assemble_thunks_and_aliases): Skip thunks calling instrumneted
function version.
(varpool_finalize_decl): Register statically initialized decls
in Pointer Bounds Checker.
(walk_polymorphic_call_targets): Do not mark generated call to
__builtin_unreachable as with_bounds.
(output_weakrefs): If there are both instrumented and original
versions, output only one of them.
(cgraph_node::expand_thunk): Set with_bounds flag
for created call statement.
* ipa-ref.h (ipa_ref_use): Add IPA_REF_CHKP.
(ipa_ref): increase size of use field.
* symtab.c (ipa_ref_use_name): Add element for IPA_REF_CHKP.
* varpool.c (dump_varpool_node): Dump need_bounds_init field.
(ctor_for_folding): Do not fold constant bounds vars.
* lto-streamer.h (LTO_minor_version): Change minor version from
0 to 1.
* lto-cgraph.c (compute_ltrans_boundary): Keep initial values for
pointer bounds.
(lto_output_node): Output instrumentation_clone,
thunk.add_pointer_bounds_args and orig_decl field.
(lto_output_ref): Adjust to new ipa_ref::use field size.
(input_overwrite_node): Read instrumentation_clone field.
(input_node): Read thunk.add_pointer_bounds_args and orig_decl
fields.
(input_ref): Adjust to new ipa_ref::use field size.
(input_cgraph_1): Compute instrumented_version fields and restore
IDENTIFIER_TRANSPARENT_ALIAS chains.
(lto_output_varpool_node): Output
need_bounds_init value.
(input_varpool_node): Read need_bounds_init value.
* lto-partition.c (add_symbol_to_partition_1): Keep original
and instrumented versions together.
(privatize_symbol_name): Restore transparent alias chain if required.
(add_references_to_partition): Add references to pointer bounds vars.
* dbxout.c (dbxout_type): Ignore POINTER_BOUNDS_TYPE.
* dwarf2out.c (gen_subprogram_die): Ignore bound args.
(gen_type_die_with_usage): Skip pointer bounds.
(dwarf2out_global_decl): Likewise.
(is_base_type): Support POINTER_BOUNDS_TYPE.
(gen_formal_types_die): Skip pointer bounds.
(gen_decl_die): Likewise.
* var-tracking.c (vt_add_function_parameters): Skip
bounds parameters.
* ipa-icf.c (sem_function::merge): Do not merge when instrumentation
thunk still exists.
(sem_variable::merge): Reset need_bounds_init flag.
* doc/extend.texi: Document Pointer Bounds Checker built-in functions
and attributes.
* doc/tm.texi.in (TARGET_LOAD_BOUNDS_FOR_ARG): New.
(TARGET_STORE_BOUNDS_FOR_ARG): New.
(TARGET_LOAD_RETURNED_BOUNDS): New.
(TARGET_STORE_RETURNED_BOUNDS): New.
(TARGET_CHKP_FUNCTION_VALUE_BOUNDS): New.
(TARGET_SETUP_INCOMING_VARARG_BOUNDS): New.
(TARGET_BUILTIN_CHKP_FUNCTION): New.
(TARGET_CHKP_BOUND_TYPE): New.
(TARGET_CHKP_BOUND_MODE): New.
(TARGET_CHKP_MAKE_BOUNDS_CONSTANT): New.
(TARGET_CHKP_INITIALIZE_BOUNDS): New.
* doc/tm.texi: Regenerated.
* doc/rtl.texi (MODE_POINTER_BOUNDS): New.
(BND32mode): New.
(BND64mode): New.
* doc/invoke.texi (-mmpx): New.
(-mno-mpx): New.
(chkp-max-ctor-size): New.
* config/i386/constraints.md (w): New.
(Ti): New.
(Tb): New.
* config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__.
* config/i386/i386-modes.def (BND32): New.
(BND64): New.
* config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New.
* config/i386/i386.c: Include tree-chkp.h, rtl-chkp.h, tree-iterator.h.
(regclass_map): Add bound registers.
(dbx_register_map): Likewise.
(dbx64_register_map): Likewise.
(svr4_dbx_register_map): Likewise.
(isa_opts): Add -mmpx.
(PTA_MPX): New.
(ix86_option_override_internal): Support MPX ISA.
(ix86_conditional_register_usage): Support bound registers.
(ix86_code_end): Add MPX bnd prefix.
(output_set_got): Likewise.
(print_reg): Avoid prefixes for bound registers.
(ix86_print_operand): Add '!' (MPX bnd) print prefix support.
(ix86_print_operand_punct_valid_p): Likewise.
(ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and
UNSPEC_BNDLDX_ADDR.
(ix86_output_call_insn): Add MPX bnd prefix to branch instructions.
(ix86_class_likely_spilled_p): Add bound regs support.
(ix86_hard_regno_mode_ok): Likewise.
(x86_order_regs_for_local_alloc): Likewise.
(ix86_bnd_prefixed_insn_p): New.
(ix86_builtins): Add
IX86_BUILTIN_BNDMK, IX86_BUILTIN_BNDSTX,
IX86_BUILTIN_BNDLDX, IX86_BUILTIN_BNDCL,
IX86_BUILTIN_BNDCU, IX86_BUILTIN_BNDRET,
IX86_BUILTIN_BNDNARROW, IX86_BUILTIN_BNDINT,
IX86_BUILTIN_SIZEOF, IX86_BUILTIN_BNDLOWER,
IX86_BUILTIN_BNDUPPER.
(builtin_isa): Add leaf_p and nothrow_p fields.
(def_builtin): Initialize leaf_p and nothrow_p.
(ix86_add_new_builtins): Handle leaf_p and nothrow_p
flags.
(bdesc_mpx): New.
(bdesc_mpx_const): New.
(ix86_init_mpx_builtins): New.
(ix86_init_builtins): Call ix86_init_mpx_builtins.
(ix86_emit_cmove): New.
(ix86_emit_move_max): New.
(ix86_expand_builtin): Expand IX86_BUILTIN_BNDMK,
IX86_BUILTIN_BNDSTX, IX86_BUILTIN_BNDLDX,
IX86_BUILTIN_BNDCL, IX86_BUILTIN_BNDCU,
IX86_BUILTIN_BNDRET, IX86_BUILTIN_BNDNARROW,
IX86_BUILTIN_BNDINT, IX86_BUILTIN_SIZEOF,
IX86_BUILTIN_BNDLOWER, IX86_BUILTIN_BNDUPPER.
(ix86_function_value_bounds): New.
(ix86_builtin_mpx_function): New.
(ix86_get_arg_address_for_bt): New.
(ix86_load_bounds): New.
(ix86_store_bounds): New.
(ix86_load_returned_bounds): New.
(ix86_store_returned_bounds): New.
(ix86_mpx_bound_mode): New.
(ix86_make_bounds_constant): New.
(ix86_initialize_bounds):
(TARGET_LOAD_BOUNDS_FOR_ARG): New.
(TARGET_STORE_BOUNDS_FOR_ARG): New.
(TARGET_LOAD_RETURNED_BOUNDS): New.
(TARGET_STORE_RETURNED_BOUNDS): New.
(TARGET_CHKP_BOUND_MODE): New.
(TARGET_BUILTIN_CHKP_FUNCTION): New.
(TARGET_CHKP_FUNCTION_VALUE_BOUNDS): New.
(TARGET_CHKP_MAKE_BOUNDS_CONSTANT): New.
(TARGET_CHKP_INITIALIZE_BOUNDS): New.
(ix86_option_override_internal): Do not
support x32 with MPX.
(init_cumulative_args): Init stdarg, bnd_regno, bnds_in_bt
and force_bnd_pass.
(function_arg_advance_32): Return number of used integer
registers.
(function_arg_advance_64): Likewise.
(function_arg_advance_ms_64): Likewise.
(ix86_function_arg_advance): Handle pointer bounds.
(ix86_function_arg): Likewise.
(ix86_function_value_regno_p): Mark fisrt bounds registers as
possible function value.
(ix86_function_value_1): Handle pointer bounds type/mode
(ix86_return_in_memory): Likewise.
(ix86_print_operand): Analyse insn to decide abounf "bnd" prefix.
(ix86_expand_call): Generate returned bounds.
(ix86_setup_incoming_vararg_bounds): New.
(ix86_va_start): Initialize bounds for pointers in va_list.
(TARGET_SETUP_INCOMING_VARARG_BOUNDS): New.
* config/i386/i386.h (TARGET_MPX): New.
(TARGET_MPX_P): New.
(FIRST_PSEUDO_REGISTER): Fix to new value.
(FIXED_REGISTERS): Add bound registers.
(CALL_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(HARD_REGNO_NREGS): Likewise.
(VALID_BND_REG_MODE): New.
(FIRST_BND_REG): New.
(LAST_BND_REG): New.
(reg_class): Add BND_REGS.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(BND_REGNO_P): New.
(ANY_BND_REG_P): New.
(BNDmode): New.
(HI_REGISTER_NAMES): Add bound registers.
(ix86_args): Add bnd_regno, bnds_in_bt, force_bnd_pass and
stdarg fields.
* config/i386/i386.md (UNSPEC_BNDMK): New.
(UNSPEC_BNDMK_ADDR): New.
(UNSPEC_BNDSTX): New.
(UNSPEC_BNDLDX): New.
(UNSPEC_BNDLDX_ADDR): New.
(UNSPEC_BNDCL): New.
(UNSPEC_BNDCU): New.
(UNSPEC_BNDCN): New.
(UNSPEC_MPX_FENCE): New.
(UNSPEC_SIZEOF): New.
(BND0_REG): New.
(BND1_REG): New.
(type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst.
(length_immediate): Support mpxmov, mpxmk, mpxchk, mpxld, mpxst.
(prefix_rep): Check for bnd prefix.
(prefix_0f): Support mpxmov, mpxmk, mpxchk, mpxld, mpxst.
(length_nobnd): New.
(length): Use length_nobnd when specified.
(memory): Support mpxmov, mpxmk, mpxchk, mpxld, mpxst.
(BND): New.
(bnd_ptr): New.
(BNDCHECK): New.
(bndcheck): New.
(*jcc_1): Add MPX bnd prefix.
(*jcc_2): Likewise.
(jump): Likewise.
(*indirect_jump): Likewise.
(*tablejump_1): Likewise.
(simple_return_internal): Likewise.
(simple_return_internal_long): Likewise.
(simple_return_pop_internal): Likewise.
(simple_return_indirect_internal): Likewise.
(<mode>_mk): New.
(*<mode>_mk): New.
(mov<mode>): New.
(*mov<mode>_internal_mpx): New.
(<mode>_<bndcheck>): New.
(*<mode>_<bndcheck>): New.
(<mode>_ldx): New.
(*<mode>_ldx): New.
(<mode>_stx): New.
(*<mode>_stx): New.
move_size_reloc_<mode>): New.
* config/i386/predicates.md (address_mpx_no_base_operand): New.
(address_mpx_no_index_operand): New.
(bnd_mem_operator): New.
(symbol_operand): New.
(x86_64_immediate_size_operand): New.
* config/i386/i386.opt (mmpx): New.
* config/i386/i386-builtin-types.def (BND): New.
(ULONG): New.
(BND_FTYPE_PCVOID_ULONG): New.
(VOID_FTYPE_BND_PCVOID): New.
(VOID_FTYPE_PCVOID_PCVOID_BND): New.
(BND_FTYPE_PCVOID_PCVOID): New.
(BND_FTYPE_PCVOID): New.
(BND_FTYPE_BND_BND): New.
(PVOID_FTYPE_PVOID_PVOID_ULONG): New.
(PVOID_FTYPE_PCVOID_BND_ULONG): New.
(ULONG_FTYPE_VOID): New.
(PVOID_FTYPE_BND): New.
gcc/testsuite/
2014-11-05 Ilya Enkovich <ilya.enkovich@intel.com>
* gcc.target/i386/chkp-builtins-1.c: New.
* gcc.target/i386/chkp-builtins-2.c: New.
* gcc.target/i386/chkp-builtins-3.c: New.
* gcc.target/i386/chkp-builtins-4.c: New.
* gcc.target/i386/chkp-remove-bndint-1.c: New.
* gcc.target/i386/chkp-remove-bndint-2.c: New.
* gcc.target/i386/chkp-const-check-1.c: New.
* gcc.target/i386/chkp-const-check-2.c: New.
* gcc.target/i386/chkp-lifetime-1.c: New.
* gcc.dg/pr37858.c: Replace early_local_cleanups pass name
with build_ssa_passes.
From-SVN: r217125
2014-11-05 12:42:03 +00:00
ecc81e3312
Add direct support for Linux kernel __fentry__ patching
...
The Linux kernel dynamically patches in __fentry__ calls in and
out at runtime. This allows using function tracing for debugging
in production kernels without (significant) performance penalty.
For this it needs a table pointing to each __fentry__ call.
The way it is currently implemented is that a special
perl script scans the object file, generates the table in a special
section. When the kernel boots up it nops the calls, and
then later patches in the calls again as needed.
The recordmcount.pl script in the kernel works, but it seems
cleaner and faster to support the code generation of the patch table
directly in gcc.
This also allows to nop the calls directly at code generation
time, which allows to skip a patching step at kernel boot.
I also expect that a patchable production tracing facility is also useful
for other applications.
For example it could be used in ftracer
(https://github.com/andikleen/ftracer )
Having a nop area at the beginning of each function can be also
also useful for other things. For example it can be used to patch
functions at runtime to point to different functions, to do
binary updates without restarting the program (like ksplice or
similar)
This patch implements two new options for the i386 target:
-mrecord-mcount
Generate a __mcount_loc section entry for each __fentry__ or mcount
call. The section is compatible with the kernel convention
and the data is put into a section loaded at runtime.
-mnop-mcount
Generate the mcount/__fentry__ call as 5 byte nop that can be
patched in later. The nop is generated as a single instruction,
as the Linux kernel run time patching relies on this.
Limitations:
- I didn't implement -mnop-mcount for -fPIC. This
would need a good single instruction 6 byte NOP and it seems a
bit pointless, as the patching would prevent text sharing.
- I didn't implement noping for targets that pass a variable
to mcount.
- The facility could be useful on architectures too. Currently
the mcount code is target specific, so I made it a i386 option.
gcc/:
2014-09-25 Andi Kleen <ak@linux.intel.com>
* config/i386/i386.c (x86_print_call_or_nop): New function.
(x86_function_profiler): Support -mnop-mcount and
-mrecord-mcount.
* config/i386/i386.opt (-mnop-mcount, -mrecord-mcount): Add
* doc/invoke.texi: Document -mnop-mcount, -mrecord-mcount.
gcc/testsuite:
2014-09-25 Andi Kleen <ak@linux.intel.com>
* gcc.target/i386/nop-mcount.c: New file.
* gcc.target/i386/record-mcount.c: New file.
From-SVN: r215629
2014-09-26 04:06:40 +00:00
f4af595f28
gcc/
...
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512VL_SET): Define.
(OPTION_MASK_ISA_AVX512F_UNSET): Update.
(ix86_handle_option): Handle OPT_mavx512vl.
* config/i386/cpuid.h (bit_AVX512VL): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512vl,
set -mavx512vl accordingly.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_AVX512VL.
* config/i386/i386.c (ix86_target_string): Handle -mavx512vl.
(ix86_option_override_internal): Define PTA_AVX512VL, handle
PTA_AVX512VL and OPTION_MASK_ISA_AVX512VL.
(ix86_valid_target_attribute_inner_p): Handle OPT_mavx512vl.
* config/i386/i386.h (TARGET_AVX512VL): Define.
(TARGET_AVX512VL_P(x)): Ditto.
* config/i386/i386.opt: Add mavx512vl.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r213813
2014-08-11 11:39:14 +00:00
b525d9437f
i386-common.c (OPTION_MASK_ISA_AVX512BW_SET): Define.
...
gcc/
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512BW_SET) : Define.
(OPTION_MASK_ISA_AVX512BW_UNSET): Ditto.
(OPTION_MASK_ISA_AVX512VL_UNSET) : Ditto.
(ix86_handle_option): Handle OPT_mavx512bw.
* config/i386/cpuid.h (bit_AVX512BW): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512bw,
set -mavx512bw accordingly.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_AVX512BW.
* config/i386/i386.c (ix86_target_string): Handle -mavx512bw.
(ix86_option_override_internal): Define PTA_AVX512BW, handle
PTA_AVX512BW and OPTION_MASK_ISA_AVX512BW.
(ix86_valid_target_attribute_inner_p): Handle OPT_mavx512bw.
* config/i386/i386.h (TARGET_AVX512BW): Define.
(TARGET_AVX512BW_P(x)): Ditto.
* config/i386/i386.opt: Add mavx512bw.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r213811
2014-08-11 11:22:26 +00:00
07165dd72c
gcc/
...
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_AVX512DQ_SET): Define.
(OPTION_MASK_ISA_AVX512DQ_UNSET): Ditto.
(ix86_handle_option): Handle OPT_mavx512dq.
* config/i386/cpuid.h (bit_AVX512DQ): Define.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512dq,
set -mavx512dq accordingly.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_AVX512DQ.
* config/i386/i386.c (ix86_target_string): Handle -mavx512dq.
(ix86_option_override_internal): Define PTA_AVX512DQ, handle
PTA_AVX512DQ and OPTION_MASK_ISA_AVX512DQ.
(ix86_valid_target_attribute_inner_p): Handle OPT_mavx512dq.
* config/i386/i386.h (TARGET_AVX512DQ): Define.
(TARGET_AVX512DQ_P(x)): Ditto.
* config/i386/i386.opt: Add mavx512dq.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r213757
2014-08-08 11:31:34 +00:00
9cdea277ef
gcc/
...
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_CLFLUSHOPT_SET): Define.
(OPTION_MASK_ISA_XSAVES_SET): Ditto.
(OPTION_MASK_ISA_XSAVEC_SET): Ditto.
(OPTION_MASK_ISA_CLFLUSHOPT_UNSET): Ditto.
(OPTION_MASK_ISA_XSAVES_UNSET): Ditto.
(OPTION_MASK_ISA_XSAVEC_UNSET): Ditto.
(ix86_handle_option): Handle OPT_mxsavec, OPT_mxsaves,
OPT_mclflushopt.
* config.gcc (i[34567]86-*-*): Add clflushoptintrin.h,
xsavecintrin.h, xsavesintrin.h.
(x86_64-*-*): Ditto.
* config/i386/clflushoptintrin.h: New.
* config/i386/xsavecintrin.h: Ditto.
* config/i386/xsavesintrin.h: Ditto.
* config/i386/cpuid.h (bit_CLFLUSHOPT): Define.
(bit_XSAVES): Ditto.
(bit_XSAVES): Ditto.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle
-mclflushopt, -mxsavec, -mxsaves, -mno-xsaves, -mno-xsavec,
-mno-clflushopt.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_CLFLUSHOPT, OPTION_MASK_ISA_XSAVEC,
OPTION_MASK_ISA_XSAVES.
* config/i386/i386.c (ix86_target_string): Handle -mclflushopt,
-mxsavec, -mxsaves.
(PTA_CLFLUSHOPT) Define.
(PTA_XSAVEC): Ditto.
(PTA_XSAVES): Ditto.
(ix86_option_override_internal): Handle new options.
(ix86_valid_target_attribute_inner_p): Ditto.
(ix86_builtins): Add IX86_BUILTIN_XSAVEC, IX86_BUILTIN_XSAVEC64,
IX86_BUILTIN_XSAVES, IX86_BUILTIN_XRSTORS, IX86_BUILTIN_XSAVES64,
IX86_BUILTIN_XRSTORS64, IX86_BUILTIN_CLFLUSHOPT.
(bdesc_special_args): Add __builtin_ia32_xsaves, __builtin_ia32_xrstors,
__builtin_ia32_xsavec, __builtin_ia32_xsaves64, __builtin_ia32_xrstors64,
__builtin_ia32_xsavec64.
(ix86_init_mmx_sse_builtins): Add __builtin_ia32_clflushopt.
(ix86_expand_builtin): Handle new builtins.
* config/i386/i386.h (TARGET_CLFLUSHOPT) Define.
(TARGET_CLFLUSHOPT_P): Ditto.
(TARGET_XSAVEC): Ditto.
(TARGET_XSAVEC_P): Ditto.
(TARGET_XSAVES): Ditto.
(TARGET_XSAVES_P): Ditto.
* config/i386/i386.md (ANY_XSAVE): Add UNSPECV_XSAVEC, UNSPECV_XSAVES.
(ANY_XSAVE64)" Add UNSPECV_XSAVEC64, UNSPECV_XSAVES64.
(attr xsave): Add xsavec, xsavec64, xsaves, xsaves64.
(ANY_XRSTOR): New.
(ANY_XRSTOR64): Ditto.
(xrstor): Ditto.
(xrstor): Change into <xrstor>.
(xrstor_rex64): Change into <xrstor>_rex64.
(xrstor64): Change into <xrstor>64
(clflushopt): New.
* config/i386/i386.opt (mclflushopt): New.
(mxsavec): Ditto.
(mxsaves): Ditto.
* config/i386/x86intrin.h: Add clflushoptintrin.h, xsavesintrin.h,
xsavecintrin.h.
* doc/invoke.texi: Document new options.
gcc/testsuite/
* gcc.target/i386/clflushopt-1.c: New.
* gcc.target/i386/xsavec-1.c: Ditto.
* gcc.target/i386/xsavec64-1.c: Ditto.
* gcc.target/i386/xsaves-1.c: Ditto.
* gcc.target/i386/xsaves64-1.c: Ditto.
* gcc.target/i386/sse-12.c: Test new options.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* g++.dg/other/i386-2.C: Ditto.
* g++.dg/other/i386-3.C: Ditto.
From-SVN: r210421
2014-05-14 12:41:42 +00:00
43b3f52f4a
gcc/
...
* common/config/i386/i386-common.c (OPTION_MASK_ISA_PREFETCHWT1_SET),
(OPTION_MASK_ISA_PREFETCHWT1_UNSET): New.
(ix86_handle_option): Handle OPT_mprefetchwt1.
* config/i386/cpuid.h (bit_PREFETCHWT1): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
PREFETCHWT1 CPUID.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_PREFETCHWT1.
* config/i386/i386.c (ix86_target_string): Handle mprefetchwt1.
(PTA_PREFETCHWT1): New.
(ix86_option_override_internal): Handle PTA_PREFETCHWT1.
(ix86_valid_target_attribute_inner_p): Handle OPT_mprefetchwt1.
* config/i386/i386.h (TARGET_PREFETCHWT1), (TARGET_PREFETCHWT1_P):
New.
* config/i386/i386.md (prefetch): Check TARGET_PREFETCHWT1
(*prefetch_avx512pf_<mode>_: Change into ...
(*prefetch_prefetchwt1_<mode>: This.
* config/i386/i386.opt (mprefetchwt1): New.
* config/i386/xmmintrin.h (_mm_hint): Add _MM_HINT_ET1.
(_mm_prefetch): Handle intent to write.
* doc/invoke.texi (mprefetchwt1), (mno-prefetchwt1): Doccument.
gcc/testsuite/
* gcc.target/i386/avx-1.c: Update __builtin_prefetch.
* gcc.target/i386/prefetchwt1-1.c: New.
* g++.dg/other/i386-2.C: Add new option.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Update __builtin_prefetch, add new option.
* gcc.target/i386/sse-22.c: Add new option.
* gcc.target/i386/sse-23.c: Update __builtin_prefetch, add new option.
From-SVN: r208115
2014-02-25 09:52:53 +00:00
a2a1ddb57a
Add -mlong-double-128 and make it default for 64-bit Bionic
...
gcc/
* config/i386/i386.c (flag_opts): Add -mlong-double-128.
(ix86_option_override_internal): Default long double to 64-bit for
32-bit Bionic and to 128-bit for 64-bit Bionic.
* config/i386/i386.h (LONG_DOUBLE_TYPE_SIZE): Use 128 if
TARGET_LONG_DOUBLE_128 is true.
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Likewise.
* config/i386/i386.opt (mlong-double-80): Negate -mlong-double-64.
(mlong-double-64): Negate -mlong-double-128.
(mlong-double-128): New option.
* config/i386/i386-c.c (ix86_target_macros): Define
__LONG_DOUBLE_128__ for TARGET_LONG_DOUBLE_128.
* doc/invoke.texi: Document -mlong-double-128.
gcc/testsuite/
* gcc.target/i386/long-double-64-1.c: Verify __multf3 isn't used.
* gcc.target/i386/long-double-64-4.c: Likewise.
* gcc.target/i386/long-double-80-1.c: Likewise.
* gcc.target/i386/long-double-80-2.c: Likewise.
* gcc.target/i386/long-double-80-3.c: Likewise.
* gcc.target/i386/long-double-80-4.c: Likewise.
* gcc.target/i386/long-double-80-5.c: Likewise.
* gcc.target/i386/long-double-64-2.c: Limit to ia32. Verify
__multf3 isn't used.
* gcc.target/i386/long-double-64-3.c: Likewise.
* gcc.target/i386/long-double-128-1.c: New test.
* gcc.target/i386/long-double-128-2.c: Likewise.
* gcc.target/i386/long-double-128-3.c: Likewise.
* gcc.target/i386/long-double-128-4.c: Likewise.
* gcc.target/i386/long-double-128-5.c: Likewise.
* gcc.target/i386/long-double-128-6.c: Likewise.
* gcc.target/i386/long-double-128-7.c: Likewise.
* gcc.target/i386/long-double-128-8.c: Likewise.
* gcc.target/i386/long-double-128-9.c: Likewise.
* gcc.target/i386/long-double-64-5.c: Likewise.
* gcc.target/i386/long-double-64-6.c: Likewise.
* gcc.target/i386/long-double-64-7.c: Likewise.
* gcc.target/i386/long-double-64-8.c: Likewise.
* gcc.target/i386/long-double-64-9.c: Likewise.
* gcc.target/i386/long-double-80-10.c: Likewise.
* gcc.target/i386/long-double-80-8.c: Likewise.
* gcc.target/i386/long-double-80-9.c: Likewise.
From-SVN: r207428
2014-02-03 07:18:44 -08:00
d5d618b5da
Add -m16 support for x86
...
The .code16gcc directive was added to binutils back in 1999:
---
'.code16gcc' provides experimental support for generating 16-bit code
from gcc, and differs from '.code16' in that 'call', 'ret', 'enter',
'leave', 'push', 'pop', 'pusha', 'popa', 'pushf', and 'popf'
instructions default to 32-bit size. This is so that the stack pointer
is manipulated in the same way over function calls, allowing access to
function parameters at the same stack offsets as in 32-bit mode.
'.code16gcc' also automatically adds address size prefixes where
necessary to use the 32-bit addressing modes that gcc generates.
---
It encodes 32-bit assembly instructions generated by GCC in 16-bit format
so that GCC can be used to generate 16-bit instructions. To do that, the
.code16gcc directive must be placed at the very beginning of the assembly
code. This patch adds -m16 to x86 backend by:
1. Add -m16 and make it mutually exclusive with -m32, -m64 and -mx32.
2. Treat -m16 like -m32 so that --32 is passed to assembler.
3. Output .code16gcc at the very beginning of the assembly code.
4. Turn off 64-bit ISA when -m16 is used.
PR target/59672
* config/i386/gnu-user64.h (SPEC_32): Add "m16|" to "m32".
(SPEC_X32): Likewise.
(SPEC_64): Likewise.
* config/i386/i386.c (ix86_option_override_internal): Turn off
OPTION_MASK_ISA_64BIT, OPTION_MASK_ABI_X32 and OPTION_MASK_ABI_64
for TARGET_16BIT.
(x86_file_start): Output .code16gcc for TARGET_16BIT.
* config/i386/i386.h (TARGET_16BIT): New macro.
(TARGET_16BIT_P): Likewise.
* config/i386/i386.opt: Add m16.
* doc/invoke.texi: Document -m16.
From-SVN: r207196
2014-01-28 08:22:45 -08:00
23a5b65a92
Update copyright years in gcc/
...
From-SVN: r206289
2014-01-02 22:23:26 +00:00
c1618f8254
i386-common.c (OPTION_MASK_ISA_SHA_SET): New.
...
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New.
(OPTION_MASK_ISA_SHA_UNSET): Ditto.
(ix86_handle_option): Handle OPT_msha.
* config.gcc (extra_headers): Add shaintrin.h.
* config/i386/cpuid.h (bit_SHA): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA
instructions.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_SHA.
* config/i386/i386.c (ix86_target_string): Add -msha.
(ix86_option_override_internal): Add PTA_SHA.
(ix86_valid_target_attribute_inner_p): Handle OPT_msha.
(enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1,
IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4,
IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2,
IX86_BUILTIN_SHA256RNDS2.
(bdesc_args): Add BUILTINS defined above.
(ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1,
__builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte,
__builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1,
__builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2.
(ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add
warning for CODE_FOR_sha1rnds4.
* config/i386/i386.h (TARGET_SHA): New.
(TARGET_SHA_P): Ditto.
* config/i386/i386.opt (-msha): Document it.
* config/i386/immintrin.h: Add shaintrin.h.
* config/i386/shaintrin.h: New.
* config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2,
UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1,
UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2.
(sha1msg1): New.
(sha1msg2): Ditto.
(sha1nexte): Ditto.
(sha1rnds4): Ditto.
(sha256msg1): Ditto.
(sha256msg2): Ditto.
(sha256rnds2): Ditto.
* doc/invoke.texi: Add -msha.
testsuite/
* gcc.target/i386/avx-1.c: Add define for __builtin_ia32_sha1rnds4.
* gcc.target/i386/i386.exp (check_effective_target_sha): New.
* gcc.target/i386/sha-check.h: New file.
* gcc.target/i386/sha1msg1-1.c: Ditto.
* gcc.target/i386/sha1msg1-2.c: Ditto.
* gcc.target/i386/sha1msg2-1.c: Ditto.
* gcc.target/i386/sha1msg2-2.c: Ditto.
* gcc.target/i386/sha1nexte-1: Ditto.
* gcc.target/i386/sha1nexte-2: Ditto.
* gcc.target/i386/sha1rnds4-1.c: Ditto.
* gcc.target/i386/sha1rnds4-2.c: Ditto.
* gcc.target/i386/sha256msg1-1.c: Ditto.
* gcc.target/i386/sha256msg1-2.c: Ditto.
* gcc.target/i386/sha256msg2-1.c: Ditto.
* gcc.target/i386/sha256msg2-2.c: Ditto.
* gcc.target/i386/sha256rnds2-1.c: Ditto.
* gcc.target/i386/sha256rnds2-2.c: Ditto.
* gcc.target/i386/sse-13.c: Add __builtin_ia32_sha1rnds4.
* gcc.target/i386/sse-14.c: Add _mm_sha1rnds4_epu32.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Add __builtin_ia32_sha1rnds4.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r206263
2013-12-31 11:39:07 +00:00
80f1fd0dab
This patch fixes PR 58944
...
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58944
ix86_valid_target_attribute_tree in config/i386/i386.c was
refactored to not depend on global_options structure and to be able to
use any gcc_options structure. One clean way to fix this is by having
target_option_default_node save all the default target options which
can be restored to any gcc_options structure. The root cause of the
above bugs was that ix86_arch_string and ix86_tune_string was not
saved in target_option_deault_node.
This patch saves all the target options used in i386.opt which are
either obtained from the command-line or set to some default.
Testing:
Patch tested for bootstrap on all default languages(also obj-c++ and ada)
on x86_64 and regression testsuite checked for parity with RUNTESTFLAGS -m32
and m64.
From-SVN: r205616
2013-12-03 03:14:09 +00:00
089d122746
revert: cgraph.h (varpool_node): Add need_bounds_init field.
...
Reverted:
2013-11-20 Ilya Enkovich <ilya.enkovich@intel.com>
* cgraph.h (varpool_node): Add need_bounds_init field.
* lto-cgraph.c (lto_output_varpool_node): Output
need_bounds_init value.
(input_varpool_node): Read need_bounds_init value.
* varpool.c (dump_varpool_node): Dump need_bounds_init field.
Reverted:
2013-11-20 Ilya Enkovich <ilya.enkovich@intel.com>
* dbxout.c (dbxout_type): Ignore POINTER_BOUNDS_TYPE.
* dwarf2out.c (gen_subprogram_die): Ignore bound args.
(gen_type_die_with_usage): Skip pointer bounds.
(dwarf2out_global_decl): Likewise.
Reverted:
2013-11-18 Ilya Enkovich <ilya.enkovich@intel.com>
* builtin-types.def (BT_FN_PTR_CONST_PTR_VAR): New.
* chkp-builtins.def (BUILT_IN_CHKP_BIND_BOUNDS): New.
* cfgexpand.c (expand_call_stmt): Expand BUILT_IN_CHKP_BIND_BOUNDS.
* gimple.c (gimple_call_get_nobnd_arg_index): Remove.
* gimple.h (gf_mask): Add GF_CALL_WITH_BOUNDS.
(gimple_call_with_bounds_p): New.
(gimple_call_set_with_bounds): New.
(gimple_call_num_nobnd_args): Remove.
(gimple_call_nobnd_arg): Remove.
* tree.h (CALL_WITH_BOUNDS_P): New.
* rtl.h (CALL_EXPR_WITH_BOUNDS_P): New.
Reverted:
2013-11-08 Ilya Enkovich <ilya.enkovich@intel.com>
* common.opt (fcheck-pointer-bounds): Move to ...
* c-family/c.opt: ... here.
* langhooks-def.h (LANG_HOOKS_CHKP_SUPPORTED): Remove.
(LANG_HOOKS_INITIALIZER): Remove LANG_HOOKS_CHKP_SUPPORTED.
* langhooks.h (lang_hooks): Remove chkp_supported field.
* toplev.c (process_options): Remove chkp_supported check.
Reverted:
2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com>
* tree-core.h (tree_index): Add TI_POINTER_BOUNDS_TYPE.
* tree.h (POINTER_BOUNDS_P): New.
(BOUNDED_TYPE_P): New.
(BOUNDED_P): New.
(pointer_bounds_type_node): New.
* tree.c (build_common_tree_nodes): Initialize
pointer_bounds_type_node.
* gimple.h (gimple_call_get_nobnd_arg_index): New.
(gimple_call_num_nobnd_args): New.
(gimple_call_nobnd_arg): New.
(gimple_return_retbnd): New.
(gimple_return_set_retbnd): New
* gimple.c (gimple_build_return): Increase number of ops
for return statement.
(gimple_call_get_nobnd_arg_index): New.
* gimple-pretty-print.c (dump_gimple_return): Print second op.
Reverted:
2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com>
* ipa.c (cgraph_build_static_cdtor_1): Support contructors
with "chkp ctor" and "bnd_legacy" attributes.
* gimplify.c (gimplify_init_constructor): Avoid infinite
loop during gimplification of bounds initializer.
Reverted:
2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com>
* c-family/c-common.c (handle_bnd_variable_size_attribute): New.
(handle_bnd_legacy): New.
(c_common_attribute_table): Add bnd_variable_size and bnd_legacy.
* doc/extend.texi: Document bnd_variable_size and bnd_legacy
attributes.
Reverted:
2013-10-29 Ilya Enkovich <ilya.enkovich@intel.com>
* builtin-types.def (BT_FN_VOID_CONST_PTR): New.
(BT_FN_PTR_CONST_PTR): New.
(BT_FN_CONST_PTR_CONST_PTR): New.
(BT_FN_PTR_CONST_PTR_SIZE): New.
(BT_FN_PTR_CONST_PTR_CONST_PTR): New.
(BT_FN_VOID_PTRPTR_CONST_PTR): New.
(BT_FN_VOID_CONST_PTR_SIZE): New.
(BT_FN_PTR_CONST_PTR_CONST_PTR_SIZE): New.
* chkp-builtins.def: New.
* builtins.def: include chkp-builtins.def.
(DEF_CHKP_BUILTIN): New.
* builtins.c (expand_builtin): Support BUILT_IN_CHKP_INIT_PTR_BOUNDS,
BUILT_IN_CHKP_NULL_PTR_BOUNDS, BUILT_IN_CHKP_COPY_PTR_BOUNDS,
BUILT_IN_CHKP_CHECK_PTR_LBOUNDS, BUILT_IN_CHKP_CHECK_PTR_UBOUNDS,
BUILT_IN_CHKP_CHECK_PTR_BOUNDS, BUILT_IN_CHKP_SET_PTR_BOUNDS,
BUILT_IN_CHKP_NARROW_PTR_BOUNDS, BUILT_IN_CHKP_STORE_PTR_BOUNDS,
BUILT_IN_CHKP_GET_PTR_LBOUND, BUILT_IN_CHKP_GET_PTR_UBOUND,
BUILT_IN_CHKP_BNDMK, BUILT_IN_CHKP_BNDSTX, BUILT_IN_CHKP_BNDCL,
BUILT_IN_CHKP_BNDCU, BUILT_IN_CHKP_BNDLDX, BUILT_IN_CHKP_BNDRET,
BUILT_IN_CHKP_INTERSECT, BUILT_IN_CHKP_ARG_BND, BUILT_IN_CHKP_NARROW,
BUILT_IN_CHKP_EXTRACT_LOWER, BUILT_IN_CHKP_EXTRACT_UPPER.
* common.opt (fcheck-pointer-bounds): New.
* toplev.c (process_options): Check Pointer Bounds Checker is
supported.
* doc/extend.texi: Document Pointer Bounds Checker built-in functions.
Reverted:
2013-10-30 Ilya Enkovich <ilya.enkovich@intel.com>
* target.def (builtin_chkp_function): New.
(chkp_bound_type): New.
(chkp_bound_mode): New.
(fn_abi_va_list_bounds_size): New.
(load_bounds_for_arg): New.
(store_bounds_for_arg): New.
* targhooks.h (default_load_bounds_for_arg): New.
(default_store_bounds_for_arg): New.
(default_fn_abi_va_list_bounds_size): New.
(default_chkp_bound_type): New.
(default_chkp_bound_mode): New.
(default_builtin_chkp_function): New.
* targhooks.c (default_load_bounds_for_arg): New.
(default_store_bounds_for_arg): New.
(default_fn_abi_va_list_bounds_size): New.
(default_chkp_bound_type): New.
(default_chkp_bound_mode); New.
(default_builtin_chkp_function): New.
* doc/tm.texi.in (TARGET_FN_ABI_VA_LIST_BOUNDS_SIZE): New.
(TARGET_LOAD_BOUNDS_FOR_ARG): New.
(TARGET_STORE_BOUNDS_FOR_ARG): New.
(TARGET_BUILTIN_CHKP_FUNCTION): New.
(TARGET_CHKP_BOUND_TYPE): New.
(TARGET_CHKP_BOUND_MODE): New.
* doc/tm.texi: Regenerated.
* langhooks.h (lang_hooks): Add chkp_supported field.
* langhooks-def.h (LANG_HOOKS_CHKP_SUPPORTED): New.
(LANG_HOOKS_INITIALIZER); Add LANG_HOOKS_CHKP_SUPPORTED.
Reverted:
2013-10-24 Ilya Enkovich <ilya.enkovich@intel.com>
* config/i386/constraints.md (B): New.
(Ti): New.
(Tb): New.
* config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__.
* config/i386/i386-modes.def (BND32): New.
(BND64): New.
* config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New.
* config/i386/i386.c (isa_opts): Add mmpx.
(regclass_map): Add bound registers.
(dbx_register_map): Likewise.
(dbx64_register_map): Likewise.
(svr4_dbx_register_map): Likewise.
(PTA_MPX): New.
(ix86_option_override_internal): Support MPX ISA.
(ix86_conditional_register_usage): Support bound registers.
(print_reg): Likewise.
(ix86_code_end): Add MPX bnd prefix.
(output_set_got): Likewise.
(ix86_output_call_insn): Likewise.
(ix86_print_operand): Add '!' (MPX bnd) print prefix support.
(ix86_print_operand_punct_valid_p): Likewise.
(ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and
UNSPEC_BNDMK_ADDR.
(ix86_class_likely_spilled_p): Add bound regs support.
(ix86_hard_regno_mode_ok): Likewise.
(x86_order_regs_for_local_alloc): Likewise.
(ix86_bnd_prefixed_insn_p): New.
* config/i386/i386.h (FIRST_PSEUDO_REGISTER): Fix to new value.
(FIXED_REGISTERS): Add bound registers.
(CALL_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(HARD_REGNO_NREGS): Likewise.
(TARGET_MPX): New.
(VALID_BND_REG_MODE): New.
(FIRST_BND_REG): New.
(LAST_BND_REG): New.
(reg_class): Add BND_REGS.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(BND_REGNO_P): New.
(ANY_BND_REG_P): New.
(BNDmode): New.
(HI_REGISTER_NAMES): Add bound registers.
* config/i386/i386.md (UNSPEC_BNDMK): New.
(UNSPEC_BNDMK_ADDR): New.
(UNSPEC_BNDSTX): New.
(UNSPEC_BNDLDX): New.
(UNSPEC_BNDLDX_ADDR): New.
(UNSPEC_BNDCL): New.
(UNSPEC_BNDCU): New.
(UNSPEC_BNDCN): New.
(UNSPEC_MPX_FENCE): New.
(BND0_REG): New.
(BND1_REG): New.
(type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst.
(length_immediate): Likewise.
(prefix_0f): Likewise.
(memory): Likewise.
(prefix_rep): Check for bnd prefix.
(length_nobnd): New.
(length): Use length_nobnd if specified.
(BND): New.
(bnd_ptr): New.
(BNDCHECK): New.
(bndcheck): New.
(*jcc_1): Add bnd prefix and rename length attr to length_nobnd.
(*jcc_2): Likewise.
(jump): Likewise.
(simple_return_internal): Likewise.
(simple_return_pop_internal): Likewise.
(*indirect_jump): Add MPX bnd prefix.
(*tablejump_1): Likewise.
(simple_return_internal_long): Likewise.
(simple_return_indirect_internal): Likewise.
(<mode>_mk): New.
(*<mode>_mk): New.
(mov<mode>): New.
(*mov<mode>_internal_mpx): New.
(<mode>_<bndcheck>): New.
(*<mode>_<bndcheck>): New.
(<mode>_ldx): New.
(*<mode>_ldx): New.
(<mode>_stx): New.
(*<mode>_stx): New.
* config/i386/predicates.md (lea_address_operand): Rename to...
(address_no_seg_operand): ... this.
(address_mpx_no_base_operand): New.
(address_mpx_no_index_operand): New.
(bnd_mem_operator): New.
* config/i386/i386.opt (mmpx): New.
* doc/invoke.texi: Add documentation for the flags -mmpx, -mno-mpx.
* doc/rtl.texi Add documentation for BND32mode and BND64mode.
Reverted:
2013-10-24 Ilya Enkovich <ilya.enkovich@intel.com>
* mode-classes.def (MODE_POINTER_BOUNDS): New.
* tree.def (POINTER_BOUNDS_TYPE): New.
* genmodes.c (complete_mode): Support MODE_POINTER_BOUNDS.
(POINTER_BOUNDS_MODE): New.
(make_pointer_bounds_mode): New.
* machmode.h (POINTER_BOUNDS_MODE_P): New.
* stor-layout.c (int_mode_for_mode): Support MODE_POINTER_BOUNDS.
(layout_type): Support POINTER_BOUNDS_TYPE.
* tree-pretty-print.c (dump_generic_node): Support POINTER_BOUNDS_TYPE.
* tree.c (build_int_cst_wide): Support POINTER_BOUNDS_TYPE.
(type_contains_placeholder_1): Likewise.
* tree.h (POINTER_BOUNDS_TYPE_P): New.
* varasm.c (output_constant): Support POINTER_BOUNDS_TYPE.
* doc/rtl.texi (MODE_POINTER_BOUNDS): New.
From-SVN: r205522
2013-11-29 12:12:39 +00:00
ed97ad4709
AMD bdver4 enablement
...
From-SVN: r204939
2013-11-18 09:25:21 +00:00
66d6cbaa56
constraints.md (B): New.
...
* config/i386/constraints.md (B): New.
(Ti): New.
(Tb): New.
* config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__.
* config/i386/i386-modes.def (BND32): New.
(BND64): New.
* config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New.
* config/i386/i386.c (isa_opts): Add mmpx.
(regclass_map): Add bound registers.
(dbx_register_map): Likewise.
(dbx64_register_map): Likewise.
(svr4_dbx_register_map): Likewise.
(PTA_MPX): New.
(ix86_option_override_internal): Support MPX ISA.
(ix86_conditional_register_usage): Support bound registers.
(print_reg): Likewise.
(ix86_code_end): Add MPX bnd prefix.
(output_set_got): Likewise.
(ix86_output_call_insn): Likewise.
(ix86_print_operand): Add '!' (MPX bnd) print prefix support.
(ix86_print_operand_punct_valid_p): Likewise.
(ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and
UNSPEC_BNDMK_ADDR.
(ix86_class_likely_spilled_p): Add bound regs support.
(ix86_hard_regno_mode_ok): Likewise.
(x86_order_regs_for_local_alloc): Likewise.
(ix86_bnd_prefixed_insn_p): New.
* config/i386/i386.h (FIRST_PSEUDO_REGISTER): Fix to new value.
(FIXED_REGISTERS): Add bound registers.
(CALL_USED_REGISTERS): Likewise.
(REG_ALLOC_ORDER): Likewise.
(HARD_REGNO_NREGS): Likewise.
(TARGET_MPX): New.
(VALID_BND_REG_MODE): New.
(FIRST_BND_REG): New.
(LAST_BND_REG): New.
(reg_class): Add BND_REGS.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(BND_REGNO_P): New.
(ANY_BND_REG_P): New.
(BNDmode): New.
(HI_REGISTER_NAMES): Add bound registers.
* config/i386/i386.md (UNSPEC_BNDMK): New.
(UNSPEC_BNDMK_ADDR): New.
(UNSPEC_BNDSTX): New.
(UNSPEC_BNDLDX): New.
(UNSPEC_BNDLDX_ADDR): New.
(UNSPEC_BNDCL): New.
(UNSPEC_BNDCU): New.
(UNSPEC_BNDCN): New.
(UNSPEC_MPX_FENCE): New.
(BND0_REG): New.
(BND1_REG): New.
(type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst.
(length_immediate): Likewise.
(prefix_0f): Likewise.
(memory): Likewise.
(prefix_rep): Check for bnd prefix.
(length_nobnd): New.
(length): Use length_nobnd if specified.
(BND): New.
(bnd_ptr): New.
(BNDCHECK): New.
(bndcheck): New.
(*jcc_1): Add bnd prefix and rename length attr to length_nobnd.
(*jcc_2): Likewise.
(jump): Likewise.
(simple_return_internal): Likewise.
(simple_return_pop_internal): Likewise.
(*indirect_jump): Add MPX bnd prefix.
(*tablejump_1): Likewise.
(simple_return_internal_long): Likewise.
(simple_return_indirect_internal): Likewise.
(<mode>_mk): New.
(*<mode>_mk): New.
(mov<mode>): New.
(*mov<mode>_internal_mpx): New.
(<mode>_<bndcheck>): New.
(*<mode>_<bndcheck>): New.
(<mode>_ldx): New.
(*<mode>_ldx): New.
(<mode>_stx): New.
(*<mode>_stx): New.
* config/i386/predicates.md (lea_address_operand): Rename to...
(address_no_seg_operand): ... this.
(address_mpx_no_base_operand): New.
(address_mpx_no_index_operand): New.
(bnd_mem_operator): New.
* config/i386/i386.opt (mmpx): New.
* doc/invoke.texi: Add documentation for the flags -mmpx, -mno-mpx.
* doc/rtl.texi Add documentation for BND32mode and BND64mode.
From-SVN: r204046
2013-10-25 05:37:57 +00:00
bf7b5747bb
re PR target/57756 (Function target attribute is retaining state of previously seen function)
...
PR target/57756
The root-cause of this PR is that global_options is not restored to
default before calling ix86_valid_target_attribute_tree and hence
target attributes are incorrectly processed sometimes.
This patch refactors code in i386.c in functions in the call-chain of
ix86_valid_target_attribute_tree to use any gcc_options struct passed
as a parameter. It replaces existing code which always uses the
global_options struct.
2013-10-15 Sriraman Tallam <tmsriram@google.com>
PR target/57756
* optc-save-gen.awk: Add extra parameter to the save and restore
target calls.
* opth-gen.awk: Generate new TARGET_* macros to accept a parameter.
* tree.c (build_optimization_node): New parameter. Add extra parameter
to call to cl_optimization_save.
(build_target_option_node): New parameter. Add extra parameter
to call to cl_target_option_save.
* tree.h (build_optimization_node): New parameter.
(build_target_option_node): New parameter.
* c-family/c-common.c (handle_optimize_attribute): Fix calls to
build_optimization_node and build_target_option_node.
* c-family/c-pragma.c (handle_pragma_optimize): Ditto.
(handle_pragma_push_options): Ditto.
* toplev.c (process_options): Ditto.
* opts.c (init_options_struct): Check for opts_set non-null.
* target.def (target_option.save): New parameter.
(target_option.restore): New parameter.
* tm.texi: Generate.
* config/i386/i386-c.c (ix86_target_macros_internal): Ditto.
(ix86_pragma_target_parse): Ditto.
* config/i386/i386-protos.h (ix86_valid_target_attribute_tree): New
parameters.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Fix calls
to build_optimization_node and build_target_option_node.
(rs6000_valid_attribute_p): Ditto.
(rs6000_pragma_target_parse): Ditto.
* config/i386/i386.opt (x_ix86_target_flags_explicit): New TargetSave
data.
* config/i386/i386.h:
TARGET_64BIT_P: New Macro
TARGET_MMX_P: New Macro.
TARGET_3DNOW_P: New Macro.
TARGET_3DNOW_A_P: New Macro.
TARGET_SSE_P: New Macro.
TARGET_SSE2_P: New Macro.
TARGET_SSE3_P: New Macro.
TARGET_SSSE3_P: New Macro.
TARGET_SSE4_1_P: New Macro.
TARGET_SSE4_2_P: New Macro.
TARGET_AVX_P: New Macro.
TARGET_AVX2_P: New Macro.
TARGET_AVX512F_P: New Macro.
TARGET_AVX512PF_P: New Macro.
TARGET_AVX512ER_P: New Macro.
TARGET_AVX512CD_P: New Macro.
TARGET_FMA_P: New Macro.
TARGET_SSE4A_P: New Macro.
TARGET_FMA4_P: New Macro.
TARGET_XOP_P: New Macro.
TARGET_LWP_P: New Macro.
TARGET_ABM_P: New Macro.
TARGET_BMI_P: New Macro.
TARGET_BMI2_P: New Macro.
TARGET_LZCNT_P: New Macro.
TARGET_TBM_P: New Macro.
TARGET_POPCNT_P: New Macro.
TARGET_SAHF_P: New Macro.
TARGET_MOVBE_P: New Macro.
TARGET_CRC32_P: New Macro.
TARGET_AES_P: New Macro.
TARGET_PCLMUL_P: New Macro.
TARGET_CMPXCHG16B_P: New Macro.
TARGET_FSGSBASE_P: New Macro.
TARGET_RDRND_P: New Macro.
TARGET_F16C_P: New Macro.
TARGET_RTM_P: New Macro.
TARGET_HLE_P: New Macro.
TARGET_RDSEED_P: New Macro.
TARGET_PRFCHW_P: New Macro.
TARGET_ADX_P: New Macro.
TARGET_FXSR_P: New Macro.
TARGET_XSAVE_P: New Macro.
TARGET_XSAVEOPT_P: New Macro.
TARGET_LP64_P: New Macro.
TARGET_X32_P: New Macro.
TARGET_FPMATH_DEFAULT_P: New Macro.
TARGET_FLOAT_RETURNS_IN_80387_P: New Macro.
* config/i386/i386.c (ix86_option_override_internal): New parameters.
opts and opts_set.
Change ix86_tune_string to access opts->x_ix86_tune_string.
Change ix86_isa_flags to access opts->x_ix86_isa_flags.
Change ix86_arch_string to access opts->x_ix86_arch_string.
Change ix86_stringop_alg to access opts->x_ix86_stringop_alg.
Change ix86_pmode to access opts->x_ix86_pmode.
Change ix86_abi to access opts->x_ix86_abi.
Change ix86_cmodel to access opts->x_ix86_cmodel.
Change ix86_asm_dialect to access opts->x_ix86_asm_dialect.
Change ix86_isa_flags_explicit to access
opts->x_ix86_isa_flags_explicit.
Change ix86_dump_tunes to access opts->x_ix86_dump_tunes.
Change ix86_regparm to access opts->x_ix86_regparm.
Change ix86_branch_cost to access opts->x_ix86_branch_cost.
Change ix86_preferred_stack_boundary_arg to access
opts->x_ix86_preferred_stack_boundary_arg.
Change ix86_force_align_arg_pointer to access
opts->x_ix86_force_align_arg_pointer.
Change ix86_incoming_stack_boundar_arg to access
opts->x_ix86_incoming_stack_boundar_arg.
Change ix86_fpmath to access opts->x_ix86_fpmath.
Change ix86_veclibabi_type to access opts->x_ix86_veclibabi_type.
Change ix86_recip_name to access opts->x_ix86_recip_name.
Change ix86_stack_protector_guard to access
opts->x_ix86_stack_protector_guard.
Change ix86_tune_memcpy_strategy to access
opts->x_ix86_tune_memcpy_strategy.
Change ix86_tune_memset_strategy to access
opts->x_ix86_tune_memset_strategy.
Change global_options to access opts.
Change global_options_set to access opts_set.
Change TARGET_64BIT to TARGET_64BIT_P (opts->...)
Change TARGET_MMX to TARGET_MMX_P (opts->...)
Change TARGET_3DNOW to TARGET_3DNOW_P (opts->...)
Change TARGET_3DNOW_A to TARGET_3DNOW_A_P (opts->...)
Change TARGET_SSE to TARGET_SSE_P (opts->...)
Change TARGET_SSE2 to TARGET_SSE2_P (opts->...)
Change TARGET_SSE3 to TARGET_SSE3_P (opts->...)
Change TARGET_SSSE3 to TARGET_SSSE3_P (opts->...)
Change TARGET_SSE4_1 to TARGET_SSE4_1_P (opts->...)
Change TARGET_SSE4_2 to TARGET_SSE4_2_P (opts->...)
Change TARGET_AVX to TARGET_AVX_P (opts->...)
Change TARGET_AVX2 to TARGET_AVX2_P (opts->...)
Change TARGET_AVX512F to TARGET_AVX512F_P (opts->...)
Change TARGET_AVX512PF to TARGET_AVX512PF_P (opts->...)
Change TARGET_AVX512ER to TARGET_AVX512ER_P (opts->...)
Change TARGET_AVX512CD to TARGET_AVX512CD_P (opts->...)
Change TARGET_FMA to TARGET_FMA_P (opts->...)
Change TARGET_SSE4A to TARGET_SSE4A_P (opts->...)
Change TARGET_FMA4 to TARGET_FMA4_P (opts->...)
Change TARGET_XOP to TARGET_XOP_P (opts->...)
Change TARGET_LWP to TARGET_LWP_P (opts->...)
Change TARGET_ABM to TARGET_ABM_P (opts->...)
Change TARGET_BMI to TARGET_BMI_P (opts->...)
Change TARGET_BMI2 to TARGET_BMI2_P (opts->...)
Change TARGET_LZCNT to TARGET_LZCNT_P (opts->...)
Change TARGET_TBM to TARGET_TBM_P (opts->...)
Change TARGET_POPCNT to TARGET_POPCNT_P (opts->...)
Change TARGET_SAHF to TARGET_SAHF_P (opts->...)
Change TARGET_MOVBE to TARGET_MOVBE_P (opts->...)
Change TARGET_CRC32 to TARGET_CRC32_P (opts->...)
Change TARGET_AES to TARGET_AES_P (opts->...)
Change TARGET_PCLMUL to TARGET_PCLMUL_P (opts->...)
Change TARGET_CMPXCHG16B to TARGET_CMPXCHG16B_P (opts->...)
Change TARGET_FSGSBASE to TARGET_FSGSBASE_P (opts->...)
Change TARGET_RDRND to TARGET_RDRND_P (opts->...)
Change TARGET_F16C to TARGET_F16C_P (opts->...)
Change TARGET_RTM to TARGET_RTM_P (opts->...)
Change TARGET_HLE to TARGET_HLE_P (opts->...)
Change TARGET_RDSEED to TARGET_RDSEED_P (opts->...)
Change TARGET_PRFCHW to TARGET_PRFCHW_P (opts->...)
Change TARGET_ADX to TARGET_ADX_P (opts->...)
Change TARGET_FXSR to TARGET_FXSR_P (opts->...)
Change TARGET_XSAVE to TARGET_XSAVE_P (opts->...)
Change TARGET_XSAVEOPT to TARGET_XSAVEOPT_P (opts->...)
Change TARGET_LP64 to TARGET_LP64_P (opts->...)
Change TARGET_X32 to TARGET_X32_P (opts->...)
Change TARGET_FPMATH_DEFAULT to TARGET_FPMATH_DEFAULT_P (opts->...)
Change TARGET_FLOAT_RETURNS_IN_80387 to
TARGET_FLOAT_RETURNS_IN_80387_P (opts->...)
(ix86_function_specific_save): New parameter. Use opts-> fields
to replace global fields.
(ix86_function_specific_restore): Ditto.
(ix86_valid_target_attribute_inner_p): New parameters.
Fix recursive call.
Fix call to ix86_handle_option and set_option.
(ix86_valid_target_attribute_tree): New parameters.
Change global_options to access opts.
Change global_options_set to access opts_set.
Fix call to ix86_valid_target_attribute_inner_p.
Change ix86_tune_string to access opts->x_ix86_tune_string.
Change ix86_arch_string to access opts->x_ix86_arch_string.
Change ix86_fpmath to access opts->x_ix86_fpmath
Fix call to ix86_option_override_internal.
Fix call to ix86_add_new_builtins.
Fix calls to build_optimization_node and build_target_option_node.
(ix86_valid_target_attribute_p): Remove access to global_options.
Use new gcc_options structure func_options.
Fix call to ix86_valid_target_attribute_tree.
Fix call to build_optimization_node.
(get_builtin_code_for_version): Fix call to
ix86_valid_target_attribute_tree.
PR target/57756
* gcc.target/i386/pr57756.c: New test.
* gcc.target/i386/pr57756_2.c: New test.
From-SVN: r203634
2013-10-15 21:43:21 +00:00
3f97cb0b27
i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New.
...
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New.
(OPTION_MASK_ISA_AVX512CD_SET): Ditto.
(OPTION_MASK_ISA_AVX512PF_SET): Ditto.
(OPTION_MASK_ISA_AVX512ER_SET): Ditto.
(OPTION_MASK_ISA_AVX2_UNSET): Update.
(OPTION_MASK_ISA_AVX512F_UNSET): New.
(OPTION_MASK_ISA_AVX512CD_UNSET): Ditto.
(OPTION_MASK_ISA_AVX512PF_UNSET): Ditto.
(OPTION_MASK_ISA_AVX512ER_UNSET): Ditto.
(ix86_handle_option): Handle OPT_mavx512f, OPT_mavx512cd,
OPT_mavx512pf, OPT_mavx512er cases.
* config/i386/constraints.md (v): New constraint.
(Yi, Yj): Replace SSE_REGS with ALL_SSE_REGS.
* config/i386/cpuid.h (bit_AVX512F, bit_AVX512PF, bit_AVX512ER)
(bit_AVX512CD): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
AVX512F, AVX512ER, AVX512PF, AVX512CD features.
* config/i386/i386-c.c (ix86_target_macros_internal):
Conditionally define __AVX512F__, __AVX512ER__, __AVX512CD__,
__AVX512PF__.
* config/i386/i386-modes.def (VECTOR_MODES (INT, 128))
(VECTOR_MODES (FLOAT, 128), INT_MODE (XI, 64)): New modes.
* config/i386/i386.c (regclass_map, dbx_register_map)
(dbx64_register_map, svr4_dbx_register_map): Add new SSE registers.
(gate_insert_vzeroupper): Disable vzeroupper for TARGET_AVX512F.
(ix86_target_string): Define -mavx512f, -mavx512er, -mavx512cd,
-mavx512pf options.
(ix86_option_override_internal): Define PTA_AVX512F, PTA_AVX512ER,
PTA_AVX512PF, PTA_AVX512CD. Handle -mavx512f, -mavx512er, -mavx512cd,
-mavx512pf options. Fix formatting.
(ix86_conditional_register_usage): Squash EXT_REX_SSE_REGs for 32-bit
targets. Squash EVEX_SSE_REGS if AVX512F is disabled.
(ix86_valid_target_attribute_inner_p): Handle -mavx512f, -mavx512er,
-mavx512cd, -mavx512pf options.
(standard_sse_constant_opcode): Add vpternlogd for 512-bit modes.
(print_reg, ix86_print_operand): Handle 'g' to output 512-bit operands.
(ix86_preferred_output_reload_class): Replace SSE_REGS with
ALL_SSE_REGS.
(ix86_hard_regno_mode_ok): Support 512-bit registers.
(ix86_set_reg_reg_cost): Ditto.
(x86_order_regs_for_local_alloc): Ditto.
(MAX_VECT_LEN): Extend to 64-byte.
(ix86_spill_class): Replace SSE_REGS with ALL_SSE_REGS.
* config/i386/i386.h (TARGET_AVX512F, TARGET_AVX512PF)
(TARGET_AVX512ER, TARGET_AVX512CD): New.
(BIGGEST_ALIGNMENT): Extend to 512-bits.
(FIRST_PSEUDO_REGISTER, FIXED_REGISTERS): Add new registers.
(CALL_USED_REGISTERS, REG_ALLOC_ORDER): Likewise.
(VALID_AVX512F_SCALAR_MODE, VALID_AVX512F_REG_MODE): New.
(SSE_REG_MODE_P): Support new modes.
(FIRST_MMX_REG, FIRST_REX_INT_REG, FIRST_REX_SSE_REG): Add comments.
(FIRST_EXT_REX_SSE_REG, LAST_EXT_REX_SSE_REG): New.
(reg_class, REG_CLASS_NAMES): Add EVEX_SSE_REGS, ALL_SSE_REGS.
(SSE_CLASS_P, MAYBE_SSE_CLASS_P): Replace SSE_REGS with ALL_SSE_REGS.
(REG_CLASS_CONTENTS): Add new registers.
(SSE_REGNO_P, SSE_REGNO, HARD_REGNO_RENAME_OK): Support new registers.
(EXT_REX_SSE_REGNO_P): New.
(HI_REGISTER_NAMES): Add new registers.
* config/i386/i386.md: Define constants for new registers.
(mode): Add new 512-bit modes.
(prefix): Support evex prefix.
(isa): Support avx512f, noavx512f, fma_avx512f.
(ssemodesuffix): Add new 512-bit modes.
(movxi): New.
(*movxi_internal_avx512f): Ditto.
(*movdi_internal): Replace constraint "x" with the new constraint "v".
Support MODE_XI.
(*movsi_internal): Likewise.
(*movdf_internal): Likewise.
(*movsf_internal): Likewise.
(*fop_<mode>_comm_sse): Replace constraint "x" with new constraint "v".
(<code><mode>3): Likewise.
* config/i386/i386.opt (mavx512f, mavx512pf, mavx512er, mavx512cd): New.
* config/i386/mmx.md (*mov<mode>_internal): Replace constraint "x"
with the new constraint "v".
* config/i386/sse.md (*mov<mode>_internal): Support new registers and
modes.
(<sse>_loadu<ssemodesuffix><avxsizesuffix>): Replace constraint "x"
with the new constraint "v".
(<sse2>_loaddqu<avxsizesuffix>): Likewise.
(<sse2>_storedqu<avxsizesuffix>): Likewise.
(*<plusminus_insn><mode>3): Likewise.
(<sse>_vm<plusminus_insn><mode>3): Likewise.
(*mul<mode>3): Likewise.
(<sse>_vmmul<mode>3): Likewise.
(<sse>_div<mode>3): Likewise.
(<sse>_vmdiv<mode>3): Likewise.
(<sse>_sqrt<mode>2): Likewise.
(<sse>_vmsqrt<mode>2): Likewise.
(*<code><mode>3_finite): Likewise.
(*<code><mode>3) <smaxmin>: Likewise.
(<sse>_vm<code><mode>3): Likewise.
(*<code><mode>3) <any_logic>: Likewise.
(*fma_fmadd_<mode>): Likewise.
(*fma_fmsub_<mode>): Likewise.
(*fma_fnmadd_<mode>): Likewise.
(*fma_fnmsub_<mode>): Likewise.
(*fma_fmaddsub_<mode>): Likewise.
(*fma_fmsubadd_<mode>): Likewise.
(*fmai_fmadd_<mode>): Likewise.
(*fmai_fmsub_<mode>): Likewise.
(*fmai_fnmadd_<mode>): Likewise.
(*fmai_fnmsub_<mode>): Likewise.
(sse_cvtsi2ss): Likewise.
(sse_cvtsi2ssq): Likewise.
(sse_cvtss2si): Likewise.
(sse_cvtss2si_2): Likewise.
(sse_cvtss2siq): Likewise.
(sse_cvtss2siq_2): Likewise.
(sse_cvttss2si): Likewise.
(sse_cvtss2siq_2): Likewise.
(float<sseintvecmodelower><mode>2): Likewise.
(sse2_cvtsd2si_2): Likewise.
(sse2_cvtsd2siq_2): Likewise.
(*<plusminus_insn><mode>3): Likewise.
(*<sse2_avx2>_<plusminus_insn><mode>3): Likewise.
(*<sse4_1_avx2>_mul<mode>3): Likewise.
(ashr<mode>3): Likewise.
(<shift_insn><mode>3): Likewise.
(avx2_<code><mode>3): Likewise.
(*avx2_<code><mode>3): Likewise.
(*andnot<mode>3): Likewise.
(*<code><mode>3) <any_logic>: Likewise.
(abs<mode>2): Likewise.
(avx2_permvar<mode>): Likewise.
(avx2_perm<mode>_1): Likewise.
(*avx_vpermilp<mode>): Likewise.
(avx_vpermilvar<mode>3): Likewise.
(avx2_ashrv<mode>): Likewise.
(avx2_<shift_insn>v<mode>): Likewise.
* doc/invoke.texi: Document -mavx512f, -mavx512pf, -mavx512er,
-mavx512cd.
* doc/rtl.texi: Document XImode.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com>
From-SVN: r201915
2013-08-22 06:06:03 +00:00
3ad20bd448
Implement -mno-default, option documentation and code refactoring
...
From-SVN: r201732
2013-08-14 17:41:02 +00:00
H.J. Lu
Martin Liska
Jakub Jelinek
Julia Koval
Uros Bizjak
Andrew Senkevich
Jakub Jelinek
Kirill Yukhin
Uros Bizjak
Kirill Yukhin
Victoria Stepanyan
Bernd Schmidt
Martin Sebor
Venkataramanan Kumar
Ilya Enkovich
Jan Hubicka
Ilya Tocar
Ilya Enkovich
Andi Kleen
Alexander Ivchenko
Richard Sandiford
Sriraman Tallam
Ganesh Gopalasubramanian
Xinliang David Li